rt2560.c revision 1.8
1/* $OpenBSD: rt2560.c,v 1.8 2006/01/13 21:06:09 damien Exp $ */ 2 3/*- 4 * Copyright (c) 2005, 2006 5 * Damien Bergamini <damien.bergamini@free.fr> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20/*- 21 * Ralink Technology RT2560 chipset driver 22 * http://www.ralinktech.com/ 23 */ 24 25#include "bpfilter.h" 26 27#include <sys/param.h> 28#include <sys/sockio.h> 29#include <sys/sysctl.h> 30#include <sys/mbuf.h> 31#include <sys/kernel.h> 32#include <sys/socket.h> 33#include <sys/systm.h> 34#include <sys/malloc.h> 35#include <sys/timeout.h> 36#include <sys/conf.h> 37#include <sys/device.h> 38 39#include <machine/bus.h> 40#include <machine/endian.h> 41#include <machine/intr.h> 42 43#if NBPFILTER > 0 44#include <net/bpf.h> 45#endif 46#include <net/if.h> 47#include <net/if_arp.h> 48#include <net/if_dl.h> 49#include <net/if_media.h> 50#include <net/if_types.h> 51 52#include <netinet/in.h> 53#include <netinet/in_systm.h> 54#include <netinet/in_var.h> 55#include <netinet/if_ether.h> 56#include <netinet/ip.h> 57 58#include <net80211/ieee80211_var.h> 59#include <net80211/ieee80211_rssadapt.h> 60#include <net80211/ieee80211_radiotap.h> 61 62#include <dev/ic/rt2560reg.h> 63#include <dev/ic/rt2560var.h> 64 65#include <dev/pci/pcireg.h> 66#include <dev/pci/pcivar.h> 67#include <dev/pci/pcidevs.h> 68 69#ifdef RAL_DEBUG 70#define DPRINTF(x) do { if (rt2560_debug > 0) printf x; } while (0) 71#define DPRINTFN(n, x) do { if (rt2560_debug >= (n)) printf x; } while (0) 72int rt2560_debug = 0; 73#else 74#define DPRINTF(x) 75#define DPRINTFN(n, x) 76#endif 77 78int rt2560_alloc_tx_ring(struct rt2560_softc *, 79 struct rt2560_tx_ring *, int); 80void rt2560_reset_tx_ring(struct rt2560_softc *, 81 struct rt2560_tx_ring *); 82void rt2560_free_tx_ring(struct rt2560_softc *, 83 struct rt2560_tx_ring *); 84int rt2560_alloc_rx_ring(struct rt2560_softc *, 85 struct rt2560_rx_ring *, int); 86void rt2560_reset_rx_ring(struct rt2560_softc *, 87 struct rt2560_rx_ring *); 88void rt2560_free_rx_ring(struct rt2560_softc *, 89 struct rt2560_rx_ring *); 90struct ieee80211_node *rt2560_node_alloc(struct ieee80211com *); 91void rt2560_node_copy(struct ieee80211com *ic, 92 struct ieee80211_node *, const struct ieee80211_node *); 93int rt2560_media_change(struct ifnet *); 94void rt2560_next_scan(void *); 95void rt2560_iter_func(void *, struct ieee80211_node *); 96void rt2560_rssadapt_updatestats(void *); 97int rt2560_newstate(struct ieee80211com *, enum ieee80211_state, 98 int); 99uint16_t rt2560_eeprom_read(struct rt2560_softc *, uint8_t); 100void rt2560_encryption_intr(struct rt2560_softc *); 101void rt2560_tx_intr(struct rt2560_softc *); 102void rt2560_prio_intr(struct rt2560_softc *); 103void rt2560_decryption_intr(struct rt2560_softc *); 104void rt2560_rx_intr(struct rt2560_softc *); 105void rt2560_beacon_expire(struct rt2560_softc *); 106void rt2560_wakeup_expire(struct rt2560_softc *); 107int rt2560_ack_rate(struct ieee80211com *, int); 108uint16_t rt2560_txtime(int, int, uint32_t); 109uint8_t rt2560_plcp_signal(int); 110void rt2560_setup_tx_desc(struct rt2560_softc *, 111 struct rt2560_tx_desc *, uint32_t, int, int, int, 112 bus_addr_t); 113int rt2560_tx_bcn(struct rt2560_softc *, struct mbuf *, 114 struct ieee80211_node *); 115int rt2560_tx_mgt(struct rt2560_softc *, struct mbuf *, 116 struct ieee80211_node *); 117struct mbuf *rt2560_get_rts(struct rt2560_softc *, 118 struct ieee80211_frame *, uint16_t); 119int rt2560_tx_data(struct rt2560_softc *, struct mbuf *, 120 struct ieee80211_node *); 121void rt2560_start(struct ifnet *); 122void rt2560_watchdog(struct ifnet *); 123int rt2560_ioctl(struct ifnet *, u_long, caddr_t); 124void rt2560_bbp_write(struct rt2560_softc *, uint8_t, uint8_t); 125uint8_t rt2560_bbp_read(struct rt2560_softc *, uint8_t); 126void rt2560_rf_write(struct rt2560_softc *, uint8_t, uint32_t); 127void rt2560_set_chan(struct rt2560_softc *, 128 struct ieee80211_channel *); 129void rt2560_disable_rf_tune(struct rt2560_softc *); 130void rt2560_enable_tsf_sync(struct rt2560_softc *); 131void rt2560_update_plcp(struct rt2560_softc *); 132void rt2560_update_slot(struct rt2560_softc *); 133void rt2560_set_basicrates(struct rt2560_softc *); 134void rt2560_update_led(struct rt2560_softc *, int, int); 135void rt2560_set_bssid(struct rt2560_softc *, uint8_t *); 136void rt2560_set_macaddr(struct rt2560_softc *, uint8_t *); 137void rt2560_get_macaddr(struct rt2560_softc *, uint8_t *); 138void rt2560_update_promisc(struct rt2560_softc *); 139void rt2560_set_txantenna(struct rt2560_softc *, int); 140void rt2560_set_rxantenna(struct rt2560_softc *, int); 141const char *rt2560_get_rf(int); 142void rt2560_read_eeprom(struct rt2560_softc *); 143int rt2560_bbp_init(struct rt2560_softc *); 144int rt2560_init(struct ifnet *); 145void rt2560_stop(struct ifnet *, int); 146 147/* 148 * Supported rates for 802.11a/b/g modes (in 500Kbps unit). 149 */ 150static const struct ieee80211_rateset rt2560_rateset_11a = 151 { 8, { 12, 18, 24, 36, 48, 72, 96, 108 } }; 152 153static const struct ieee80211_rateset rt2560_rateset_11b = 154 { 4, { 2, 4, 11, 22 } }; 155 156static const struct ieee80211_rateset rt2560_rateset_11g = 157 { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } }; 158 159/* 160 * Default values for MAC registers; values taken from the reference driver. 161 */ 162static const struct { 163 uint32_t reg; 164 uint32_t val; 165} rt2560_def_mac[] = { 166 { RT2560_PSCSR0, 0x00020002 }, 167 { RT2560_PSCSR1, 0x00000002 }, 168 { RT2560_PSCSR2, 0x00020002 }, 169 { RT2560_PSCSR3, 0x00000002 }, 170 { RT2560_TIMECSR, 0x00003f21 }, 171 { RT2560_CSR9, 0x00000780 }, 172 { RT2560_CSR11, 0x07041483 }, 173 { RT2560_CNT3, 0x00000000 }, 174 { RT2560_TXCSR1, 0x07614562 }, 175 { RT2560_ARSP_PLCP_0, 0x8c8d8b8a }, 176 { RT2560_ACKPCTCSR, 0x7038140a }, 177 { RT2560_ARTCSR1, 0x1d21252d }, 178 { RT2560_ARTCSR2, 0x1919191d }, 179 { RT2560_RXCSR0, 0xffffffff }, 180 { RT2560_RXCSR3, 0xb3aab3af }, 181 { RT2560_PCICSR, 0x000003b8 }, 182 { RT2560_PWRCSR0, 0x3f3b3100 }, 183 { RT2560_GPIOCSR, 0x0000ff00 }, 184 { RT2560_TESTCSR, 0x000000f0 }, 185 { RT2560_PWRCSR1, 0x000001ff }, 186 { RT2560_MACCSR0, 0x00213223 }, 187 { RT2560_MACCSR1, 0x00235518 }, 188 { RT2560_RLPWCSR, 0x00000040 }, 189 { RT2560_RALINKCSR, 0x9a009a11 }, 190 { RT2560_CSR7, 0xffffffff }, 191 { RT2560_BBPCSR1, 0x82188200 }, 192 { RT2560_TXACKCSR0, 0x00000020 }, 193 { RT2560_SECCSR3, 0x0000e78f } 194}; 195 196/* 197 * Default values for BBP registers; values taken from the reference driver. 198 */ 199static const struct { 200 uint8_t reg; 201 uint8_t val; 202} rt2560_def_bbp[] = { 203 { 3, 0x02 }, 204 { 4, 0x19 }, 205 { 14, 0x1c }, 206 { 15, 0x30 }, 207 { 16, 0xac }, 208 { 17, 0x48 }, 209 { 18, 0x18 }, 210 { 19, 0xff }, 211 { 20, 0x1e }, 212 { 21, 0x08 }, 213 { 22, 0x08 }, 214 { 23, 0x08 }, 215 { 24, 0x80 }, 216 { 25, 0x50 }, 217 { 26, 0x08 }, 218 { 27, 0x23 }, 219 { 30, 0x10 }, 220 { 31, 0x2b }, 221 { 32, 0xb9 }, 222 { 34, 0x12 }, 223 { 35, 0x50 }, 224 { 39, 0xc4 }, 225 { 40, 0x02 }, 226 { 41, 0x60 }, 227 { 53, 0x10 }, 228 { 54, 0x18 }, 229 { 56, 0x08 }, 230 { 57, 0x10 }, 231 { 58, 0x08 }, 232 { 61, 0x60 }, 233 { 62, 0x10 }, 234 { 75, 0xff } 235}; 236 237/* 238 * Default values for RF register R2 indexed by channel numbers; values taken 239 * from the reference driver. 240 */ 241static const uint32_t rt2560_rf2522_r2[] = { 242 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814, 243 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e 244}; 245 246static const uint32_t rt2560_rf2523_r2[] = { 247 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 248 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 249}; 250 251static const uint32_t rt2560_rf2524_r2[] = { 252 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 253 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 254}; 255 256static const uint32_t rt2560_rf2525_r2[] = { 257 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d, 258 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346 259}; 260 261static const uint32_t rt2560_rf2525_hi_r2[] = { 262 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345, 263 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e 264}; 265 266static const uint32_t rt2560_rf2525e_r2[] = { 267 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463, 268 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b 269}; 270 271static const uint32_t rt2560_rf2526_hi_r2[] = { 272 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d, 273 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241 274}; 275 276static const uint32_t rt2560_rf2526_r2[] = { 277 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229, 278 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d 279}; 280 281/* 282 * For dual-band RF, RF registers R1 and R4 also depend on channel number; 283 * values taken from the reference driver. 284 */ 285static const struct { 286 uint8_t chan; 287 uint32_t r1; 288 uint32_t r2; 289 uint32_t r4; 290} rt2560_rf5222[] = { 291 { 1, 0x08808, 0x0044d, 0x00282 }, 292 { 2, 0x08808, 0x0044e, 0x00282 }, 293 { 3, 0x08808, 0x0044f, 0x00282 }, 294 { 4, 0x08808, 0x00460, 0x00282 }, 295 { 5, 0x08808, 0x00461, 0x00282 }, 296 { 6, 0x08808, 0x00462, 0x00282 }, 297 { 7, 0x08808, 0x00463, 0x00282 }, 298 { 8, 0x08808, 0x00464, 0x00282 }, 299 { 9, 0x08808, 0x00465, 0x00282 }, 300 { 10, 0x08808, 0x00466, 0x00282 }, 301 { 11, 0x08808, 0x00467, 0x00282 }, 302 { 12, 0x08808, 0x00468, 0x00282 }, 303 { 13, 0x08808, 0x00469, 0x00282 }, 304 { 14, 0x08808, 0x0046b, 0x00286 }, 305 306 { 36, 0x08804, 0x06225, 0x00287 }, 307 { 40, 0x08804, 0x06226, 0x00287 }, 308 { 44, 0x08804, 0x06227, 0x00287 }, 309 { 48, 0x08804, 0x06228, 0x00287 }, 310 { 52, 0x08804, 0x06229, 0x00287 }, 311 { 56, 0x08804, 0x0622a, 0x00287 }, 312 { 60, 0x08804, 0x0622b, 0x00287 }, 313 { 64, 0x08804, 0x0622c, 0x00287 }, 314 315 { 100, 0x08804, 0x02200, 0x00283 }, 316 { 104, 0x08804, 0x02201, 0x00283 }, 317 { 108, 0x08804, 0x02202, 0x00283 }, 318 { 112, 0x08804, 0x02203, 0x00283 }, 319 { 116, 0x08804, 0x02204, 0x00283 }, 320 { 120, 0x08804, 0x02205, 0x00283 }, 321 { 124, 0x08804, 0x02206, 0x00283 }, 322 { 128, 0x08804, 0x02207, 0x00283 }, 323 { 132, 0x08804, 0x02208, 0x00283 }, 324 { 136, 0x08804, 0x02209, 0x00283 }, 325 { 140, 0x08804, 0x0220a, 0x00283 }, 326 327 { 149, 0x08808, 0x02429, 0x00281 }, 328 { 153, 0x08808, 0x0242b, 0x00281 }, 329 { 157, 0x08808, 0x0242d, 0x00281 }, 330 { 161, 0x08808, 0x0242f, 0x00281 } 331}; 332 333int 334rt2560_attach(void *xsc, int id) 335{ 336 struct rt2560_softc *sc = xsc; 337 struct ieee80211com *ic = &sc->sc_ic; 338 struct ifnet *ifp = &ic->ic_if; 339 int error, i; 340 341 timeout_set(&sc->scan_ch, rt2560_next_scan, sc); 342 timeout_set(&sc->rssadapt_ch, rt2560_rssadapt_updatestats, sc); 343 344 /* retrieve RT2560 rev. no */ 345 sc->asic_rev = RAL_READ(sc, RT2560_CSR0); 346 347 /* retrieve MAC address */ 348 rt2560_get_macaddr(sc, ic->ic_myaddr); 349 printf(", address %s\n", ether_sprintf(ic->ic_myaddr)); 350 351 /* retrieve RF rev. no and various other things from EEPROM */ 352 rt2560_read_eeprom(sc); 353 354 printf("%s: MAC/BBP RT2560 (rev 0x%02x), RF %s\n", sc->sc_dev.dv_xname, 355 sc->asic_rev, rt2560_get_rf(sc->rf_rev)); 356 357 /* 358 * Allocate Tx and Rx rings. 359 */ 360 error = rt2560_alloc_tx_ring(sc, &sc->txq, RT2560_TX_RING_COUNT); 361 if (error != 0) { 362 printf("%s: could not allocate Tx ring\n", 363 sc->sc_dev.dv_xname); 364 goto fail1; 365 } 366 367 error = rt2560_alloc_tx_ring(sc, &sc->atimq, RT2560_ATIM_RING_COUNT); 368 if (error != 0) { 369 printf("%s: could not allocate ATIM ring\n", 370 sc->sc_dev.dv_xname); 371 goto fail2; 372 } 373 374 error = rt2560_alloc_tx_ring(sc, &sc->prioq, RT2560_PRIO_RING_COUNT); 375 if (error != 0) { 376 printf("%s: could not allocate Prio ring\n", 377 sc->sc_dev.dv_xname); 378 goto fail3; 379 } 380 381 error = rt2560_alloc_tx_ring(sc, &sc->bcnq, RT2560_BEACON_RING_COUNT); 382 if (error != 0) { 383 printf("%s: could not allocate Beacon ring\n", 384 sc->sc_dev.dv_xname); 385 goto fail4; 386 } 387 388 error = rt2560_alloc_rx_ring(sc, &sc->rxq, RT2560_RX_RING_COUNT); 389 if (error != 0) { 390 printf("%s: could not allocate Rx ring\n", 391 sc->sc_dev.dv_xname); 392 goto fail5; 393 } 394 395 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 396 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 397 ic->ic_state = IEEE80211_S_INIT; 398 399 /* set device capabilities */ 400 ic->ic_caps = 401 IEEE80211_C_IBSS | /* IBSS mode supported */ 402 IEEE80211_C_MONITOR | /* monitor mode supported */ 403 IEEE80211_C_HOSTAP | /* HostAp mode supported */ 404 IEEE80211_C_TXPMGT | /* tx power management */ 405 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 406 IEEE80211_C_SHSLOT | /* short slot time supported */ 407 IEEE80211_C_WEP; /* s/w WEP */ 408 409 if (sc->rf_rev == RT2560_RF_5222) { 410 /* set supported .11a rates */ 411 ic->ic_sup_rates[IEEE80211_MODE_11A] = rt2560_rateset_11a; 412 413 /* set supported .11a channels */ 414 for (i = 36; i <= 64; i += 4) { 415 ic->ic_channels[i].ic_freq = 416 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 417 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 418 } 419 for (i = 100; i <= 140; i += 4) { 420 ic->ic_channels[i].ic_freq = 421 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 422 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 423 } 424 for (i = 149; i <= 161; i += 4) { 425 ic->ic_channels[i].ic_freq = 426 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 427 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 428 } 429 } 430 431 /* set supported .11b and .11g rates */ 432 ic->ic_sup_rates[IEEE80211_MODE_11B] = rt2560_rateset_11b; 433 ic->ic_sup_rates[IEEE80211_MODE_11G] = rt2560_rateset_11g; 434 435 /* set supported .11b and .11g channels (1 through 14) */ 436 for (i = 1; i <= 14; i++) { 437 ic->ic_channels[i].ic_freq = 438 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 439 ic->ic_channels[i].ic_flags = 440 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 441 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 442 } 443 444 ifp->if_softc = sc; 445 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 446 ifp->if_init = rt2560_init; 447 ifp->if_ioctl = rt2560_ioctl; 448 ifp->if_start = rt2560_start; 449 ifp->if_watchdog = rt2560_watchdog; 450 IFQ_SET_READY(&ifp->if_snd); 451 memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ); 452 453 if_attach(ifp); 454 ieee80211_ifattach(ifp); 455 ic->ic_node_alloc = rt2560_node_alloc; 456 ic->ic_node_copy = rt2560_node_copy; 457 458 /* override state transition machine */ 459 sc->sc_newstate = ic->ic_newstate; 460 ic->ic_newstate = rt2560_newstate; 461 ieee80211_media_init(ifp, rt2560_media_change, ieee80211_media_status); 462 463#if NBPFILTER > 0 464 bpfattach(&sc->sc_drvbpf, ifp, DLT_IEEE802_11_RADIO, 465 sizeof (struct ieee80211_frame) + 64); 466 467 sc->sc_rxtap_len = sizeof sc->sc_rxtapu; 468 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 469 sc->sc_rxtap.wr_ihdr.it_present = htole32(RT2560_RX_RADIOTAP_PRESENT); 470 471 sc->sc_txtap_len = sizeof sc->sc_txtapu; 472 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 473 sc->sc_txtap.wt_ihdr.it_present = htole32(RT2560_TX_RADIOTAP_PRESENT); 474#endif 475 476 return 0; 477 478fail5: rt2560_free_tx_ring(sc, &sc->bcnq); 479fail4: rt2560_free_tx_ring(sc, &sc->prioq); 480fail3: rt2560_free_tx_ring(sc, &sc->atimq); 481fail2: rt2560_free_tx_ring(sc, &sc->txq); 482fail1: return ENXIO; 483} 484 485int 486rt2560_detach(void *xsc) 487{ 488 struct rt2560_softc *sc = xsc; 489 struct ifnet *ifp = &sc->sc_ic.ic_if; 490 491 timeout_del(&sc->scan_ch); 492 timeout_del(&sc->rssadapt_ch); 493 494 ieee80211_ifdetach(ifp); 495 if_detach(ifp); 496 497 rt2560_free_tx_ring(sc, &sc->txq); 498 rt2560_free_tx_ring(sc, &sc->atimq); 499 rt2560_free_tx_ring(sc, &sc->prioq); 500 rt2560_free_tx_ring(sc, &sc->bcnq); 501 rt2560_free_rx_ring(sc, &sc->rxq); 502 503 return 0; 504} 505 506int 507rt2560_alloc_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring, 508 int count) 509{ 510 int i, nsegs, error; 511 512 ring->count = count; 513 ring->queued = 0; 514 ring->cur = ring->next = 0; 515 ring->cur_encrypt = ring->next_encrypt = 0; 516 517 error = bus_dmamap_create(sc->sc_dmat, count * RT2560_TX_DESC_SIZE, 1, 518 count * RT2560_TX_DESC_SIZE, 0, BUS_DMA_NOWAIT, &ring->map); 519 if (error != 0) { 520 printf("%s: could not create desc DMA map\n", 521 sc->sc_dev.dv_xname); 522 goto fail; 523 } 524 525 error = bus_dmamem_alloc(sc->sc_dmat, count * RT2560_TX_DESC_SIZE, 526 PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT); 527 if (error != 0) { 528 printf("%s: could not allocate DMA memory\n", 529 sc->sc_dev.dv_xname); 530 goto fail; 531 } 532 533 error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs, 534 count * RT2560_TX_DESC_SIZE, (caddr_t *)&ring->desc, 535 BUS_DMA_NOWAIT); 536 if (error != 0) { 537 printf("%s: could not map desc DMA memory\n", 538 sc->sc_dev.dv_xname); 539 goto fail; 540 } 541 542 error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc, 543 count * RT2560_TX_DESC_SIZE, NULL, BUS_DMA_NOWAIT); 544 if (error != 0) { 545 printf("%s: could not load desc DMA map\n", 546 sc->sc_dev.dv_xname); 547 goto fail; 548 } 549 550 memset(ring->desc, 0, count * RT2560_TX_DESC_SIZE); 551 ring->physaddr = ring->map->dm_segs->ds_addr; 552 553 ring->data = malloc(count * sizeof (struct rt2560_tx_data), M_DEVBUF, 554 M_NOWAIT); 555 if (ring->data == NULL) { 556 printf("%s: could not allocate soft data\n", 557 sc->sc_dev.dv_xname); 558 error = ENOMEM; 559 goto fail; 560 } 561 562 memset(ring->data, 0, count * sizeof (struct rt2560_tx_data)); 563 for (i = 0; i < count; i++) { 564 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 565 RT2560_MAX_SCATTER, MCLBYTES, 0, BUS_DMA_NOWAIT, 566 &ring->data[i].map); 567 if (error != 0) { 568 printf("%s: could not create DMA map\n", 569 sc->sc_dev.dv_xname); 570 goto fail; 571 } 572 } 573 574 return 0; 575 576fail: rt2560_free_tx_ring(sc, ring); 577 return error; 578} 579 580void 581rt2560_reset_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring) 582{ 583 struct ieee80211com *ic = &sc->sc_ic; 584 struct rt2560_tx_desc *desc; 585 struct rt2560_tx_data *data; 586 int i; 587 588 for (i = 0; i < ring->count; i++) { 589 desc = &ring->desc[i]; 590 data = &ring->data[i]; 591 592 if (data->m != NULL) { 593 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 594 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 595 bus_dmamap_unload(sc->sc_dmat, data->map); 596 m_freem(data->m); 597 data->m = NULL; 598 } 599 600 if (data->ni != NULL) { 601 ieee80211_release_node(ic, data->ni); 602 data->ni = NULL; 603 } 604 605 desc->flags = 0; 606 } 607 608 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 609 BUS_DMASYNC_PREWRITE); 610 611 ring->queued = 0; 612 ring->cur = ring->next = 0; 613 ring->cur_encrypt = ring->next_encrypt = 0; 614} 615 616void 617rt2560_free_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring) 618{ 619 struct ieee80211com *ic = &sc->sc_ic; 620 struct rt2560_tx_data *data; 621 int i; 622 623 if (ring->desc != NULL) { 624 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, 625 ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 626 bus_dmamap_unload(sc->sc_dmat, ring->map); 627 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)ring->desc, 628 ring->count * RT2560_TX_DESC_SIZE); 629 bus_dmamem_free(sc->sc_dmat, &ring->seg, 1); 630 } 631 632 if (ring->data != NULL) { 633 for (i = 0; i < ring->count; i++) { 634 data = &ring->data[i]; 635 636 if (data->m != NULL) { 637 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 638 data->map->dm_mapsize, 639 BUS_DMASYNC_POSTWRITE); 640 bus_dmamap_unload(sc->sc_dmat, data->map); 641 m_freem(data->m); 642 } 643 644 if (data->ni != NULL) 645 ieee80211_release_node(ic, data->ni); 646 647 if (data->map != NULL) 648 bus_dmamap_destroy(sc->sc_dmat, data->map); 649 } 650 free(ring->data, M_DEVBUF); 651 } 652} 653 654int 655rt2560_alloc_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring, 656 int count) 657{ 658 struct rt2560_rx_desc *desc; 659 struct rt2560_rx_data *data; 660 int i, nsegs, error; 661 662 ring->count = count; 663 ring->cur = ring->next = 0; 664 ring->cur_decrypt = 0; 665 666 error = bus_dmamap_create(sc->sc_dmat, count * RT2560_RX_DESC_SIZE, 1, 667 count * RT2560_RX_DESC_SIZE, 0, BUS_DMA_NOWAIT, &ring->map); 668 if (error != 0) { 669 printf("%s: could not create desc DMA map\n", 670 sc->sc_dev.dv_xname); 671 goto fail; 672 } 673 674 error = bus_dmamem_alloc(sc->sc_dmat, count * RT2560_RX_DESC_SIZE, 675 PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT); 676 if (error != 0) { 677 printf("%s: could not allocate DMA memory\n", 678 sc->sc_dev.dv_xname); 679 goto fail; 680 } 681 682 error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs, 683 count * RT2560_RX_DESC_SIZE, (caddr_t *)&ring->desc, 684 BUS_DMA_NOWAIT); 685 if (error != 0) { 686 printf("%s: could not map desc DMA memory\n", 687 sc->sc_dev.dv_xname); 688 goto fail; 689 } 690 691 error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc, 692 count * RT2560_RX_DESC_SIZE, NULL, BUS_DMA_NOWAIT); 693 if (error != 0) { 694 printf("%s: could not load desc DMA map\n", 695 sc->sc_dev.dv_xname); 696 goto fail; 697 } 698 699 memset(ring->desc, 0, count * RT2560_RX_DESC_SIZE); 700 ring->physaddr = ring->map->dm_segs->ds_addr; 701 702 ring->data = malloc(count * sizeof (struct rt2560_rx_data), M_DEVBUF, 703 M_NOWAIT); 704 if (ring->data == NULL) { 705 printf("%s: could not allocate soft data\n", 706 sc->sc_dev.dv_xname); 707 error = ENOMEM; 708 goto fail; 709 } 710 711 /* 712 * Pre-allocate Rx buffers and populate Rx ring. 713 */ 714 memset(ring->data, 0, count * sizeof (struct rt2560_rx_data)); 715 for (i = 0; i < count; i++) { 716 desc = &sc->rxq.desc[i]; 717 data = &sc->rxq.data[i]; 718 719 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES, 720 0, BUS_DMA_NOWAIT, &data->map); 721 if (error != 0) { 722 printf("%s: could not create DMA map\n", 723 sc->sc_dev.dv_xname); 724 goto fail; 725 } 726 727 MGETHDR(data->m, M_DONTWAIT, MT_DATA); 728 if (data->m == NULL) { 729 printf("%s: could not allocate rx mbuf\n", 730 sc->sc_dev.dv_xname); 731 error = ENOMEM; 732 goto fail; 733 } 734 735 MCLGET(data->m, M_DONTWAIT); 736 if (!(data->m->m_flags & M_EXT)) { 737 printf("%s: could not allocate rx mbuf cluster\n", 738 sc->sc_dev.dv_xname); 739 error = ENOMEM; 740 goto fail; 741 } 742 743 error = bus_dmamap_load(sc->sc_dmat, data->map, 744 mtod(data->m, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT); 745 if (error != 0) { 746 printf("%s: could not load rx buf DMA map", 747 sc->sc_dev.dv_xname); 748 goto fail; 749 } 750 751 desc->flags = htole32(RT2560_RX_BUSY); 752 desc->physaddr = htole32(data->map->dm_segs->ds_addr); 753 } 754 755 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 756 BUS_DMASYNC_PREWRITE); 757 758 return 0; 759 760fail: rt2560_free_rx_ring(sc, ring); 761 return error; 762} 763 764void 765rt2560_reset_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring) 766{ 767 int i; 768 769 for (i = 0; i < ring->count; i++) { 770 ring->desc[i].flags = htole32(RT2560_RX_BUSY); 771 ring->data[i].drop = 0; 772 } 773 774 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 775 BUS_DMASYNC_PREWRITE); 776 777 ring->cur = ring->next = 0; 778 ring->cur_decrypt = 0; 779} 780 781void 782rt2560_free_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring) 783{ 784 struct rt2560_rx_data *data; 785 int i; 786 787 if (ring->desc != NULL) { 788 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, 789 ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 790 bus_dmamap_unload(sc->sc_dmat, ring->map); 791 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)ring->desc, 792 ring->count * RT2560_RX_DESC_SIZE); 793 bus_dmamem_free(sc->sc_dmat, &ring->seg, 1); 794 } 795 796 if (ring->data != NULL) { 797 for (i = 0; i < ring->count; i++) { 798 data = &ring->data[i]; 799 800 if (data->m != NULL) { 801 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 802 data->map->dm_mapsize, 803 BUS_DMASYNC_POSTREAD); 804 bus_dmamap_unload(sc->sc_dmat, data->map); 805 m_freem(data->m); 806 } 807 808 if (data->map != NULL) 809 bus_dmamap_destroy(sc->sc_dmat, data->map); 810 } 811 free(ring->data, M_DEVBUF); 812 } 813} 814 815struct ieee80211_node * 816rt2560_node_alloc(struct ieee80211com *ic) 817{ 818 struct rt2560_node *rn; 819 820 rn = malloc(sizeof (struct rt2560_node), M_DEVBUF, M_NOWAIT); 821 if (rn == NULL) 822 return NULL; 823 824 memset(rn, 0, sizeof (struct rt2560_node)); 825 826 return &rn->ni; 827} 828 829void 830rt2560_node_copy(struct ieee80211com *ic, struct ieee80211_node *dst, 831 const struct ieee80211_node *src) 832{ 833 *(struct rt2560_node *)dst = *(const struct rt2560_node *)src; 834} 835 836int 837rt2560_media_change(struct ifnet *ifp) 838{ 839 int error; 840 841 error = ieee80211_media_change(ifp); 842 if (error != ENETRESET) 843 return error; 844 845 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 846 rt2560_init(ifp); 847 848 return 0; 849} 850 851/* 852 * This function is called periodically (every 200ms) during scanning to 853 * switch from one channel to another. 854 */ 855void 856rt2560_next_scan(void *arg) 857{ 858 struct rt2560_softc *sc = arg; 859 struct ieee80211com *ic = &sc->sc_ic; 860 struct ifnet *ifp = &ic->ic_if; 861 862 if (ic->ic_state == IEEE80211_S_SCAN) 863 ieee80211_next_scan(ifp); 864} 865 866/* 867 * This function is called for each neighbor node. 868 */ 869void 870rt2560_iter_func(void *arg, struct ieee80211_node *ni) 871{ 872 struct rt2560_node *rn = (struct rt2560_node *)ni; 873 874 ieee80211_rssadapt_updatestats(&rn->rssadapt); 875} 876 877/* 878 * This function is called periodically (every 100ms) in RUN state to update 879 * the rate adaptation statistics. 880 */ 881void 882rt2560_rssadapt_updatestats(void *arg) 883{ 884 struct rt2560_softc *sc = arg; 885 struct ieee80211com *ic = &sc->sc_ic; 886 887 ieee80211_iterate_nodes(ic, rt2560_iter_func, arg); 888 889 timeout_add(&sc->rssadapt_ch, hz / 10); 890} 891 892int 893rt2560_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg) 894{ 895 struct rt2560_softc *sc = ic->ic_if.if_softc; 896 enum ieee80211_state ostate; 897 struct ieee80211_node *ni; 898 struct mbuf *m; 899 int error = 0; 900 901 ostate = ic->ic_state; 902 timeout_del(&sc->scan_ch); 903 904 switch (nstate) { 905 case IEEE80211_S_INIT: 906 timeout_del(&sc->rssadapt_ch); 907 908 if (ostate == IEEE80211_S_RUN) { 909 /* abort TSF synchronization */ 910 RAL_WRITE(sc, RT2560_CSR14, 0); 911 912 /* turn association led off */ 913 rt2560_update_led(sc, 0, 0); 914 } 915 break; 916 917 case IEEE80211_S_SCAN: 918 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 919 timeout_add(&sc->scan_ch, hz / 5); 920 break; 921 922 case IEEE80211_S_AUTH: 923 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 924 break; 925 926 case IEEE80211_S_ASSOC: 927 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 928 break; 929 930 case IEEE80211_S_RUN: 931 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 932 933 ni = ic->ic_bss; 934 935 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 936 rt2560_update_slot(sc); 937 rt2560_set_basicrates(sc); 938 rt2560_set_bssid(sc, ni->ni_bssid); 939 } 940 941 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 942 ic->ic_opmode == IEEE80211_M_IBSS) { 943 m = ieee80211_beacon_alloc(ic, ni); 944 if (m == NULL) { 945 printf("%s: could not allocate beacon\n", 946 sc->sc_dev.dv_xname); 947 error = ENOBUFS; 948 break; 949 } 950 951 error = rt2560_tx_bcn(sc, m, ni); 952 if (error != 0) 953 break; 954 } 955 956 /* turn assocation led on */ 957 rt2560_update_led(sc, 1, 0); 958 959 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 960 timeout_add(&sc->rssadapt_ch, hz / 10); 961 rt2560_enable_tsf_sync(sc); 962 } 963 break; 964 } 965 966 return (error != 0) ? error : sc->sc_newstate(ic, nstate, arg); 967} 968 969/* 970 * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46 or 971 * 93C66). 972 */ 973uint16_t 974rt2560_eeprom_read(struct rt2560_softc *sc, uint8_t addr) 975{ 976 uint32_t tmp; 977 uint16_t val; 978 int n; 979 980 /* clock C once before the first command */ 981 RT2560_EEPROM_CTL(sc, 0); 982 983 RT2560_EEPROM_CTL(sc, RT2560_S); 984 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 985 RT2560_EEPROM_CTL(sc, RT2560_S); 986 987 /* write start bit (1) */ 988 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D); 989 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C); 990 991 /* write READ opcode (10) */ 992 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D); 993 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C); 994 RT2560_EEPROM_CTL(sc, RT2560_S); 995 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 996 997 /* write address (A5-A0 or A7-A0) */ 998 n = (RAL_READ(sc, RT2560_CSR21) & RT2560_93C46) ? 5 : 7; 999 for (; n >= 0; n--) { 1000 RT2560_EEPROM_CTL(sc, RT2560_S | 1001 (((addr >> n) & 1) << RT2560_SHIFT_D)); 1002 RT2560_EEPROM_CTL(sc, RT2560_S | 1003 (((addr >> n) & 1) << RT2560_SHIFT_D) | RT2560_C); 1004 } 1005 1006 RT2560_EEPROM_CTL(sc, RT2560_S); 1007 1008 /* read data Q15-Q0 */ 1009 val = 0; 1010 for (n = 15; n >= 0; n--) { 1011 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 1012 tmp = RAL_READ(sc, RT2560_CSR21); 1013 val |= ((tmp & RT2560_Q) >> RT2560_SHIFT_Q) << n; 1014 RT2560_EEPROM_CTL(sc, RT2560_S); 1015 } 1016 1017 RT2560_EEPROM_CTL(sc, 0); 1018 1019 /* clear Chip Select and clock C */ 1020 RT2560_EEPROM_CTL(sc, RT2560_S); 1021 RT2560_EEPROM_CTL(sc, 0); 1022 RT2560_EEPROM_CTL(sc, RT2560_C); 1023 1024 return val; 1025} 1026 1027/* 1028 * Some frames were processed by the hardware cipher engine and are ready for 1029 * transmission. 1030 */ 1031void 1032rt2560_encryption_intr(struct rt2560_softc *sc) 1033{ 1034 struct rt2560_tx_desc *desc; 1035 int hw; 1036 1037 /* retrieve last descriptor index processed by cipher engine */ 1038 hw = (RAL_READ(sc, RT2560_SECCSR1) - sc->txq.physaddr) / 1039 RT2560_TX_DESC_SIZE; 1040 1041 for (; sc->txq.next_encrypt != hw;) { 1042 desc = &sc->txq.desc[sc->txq.next_encrypt]; 1043 1044 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1045 sc->txq.next_encrypt * RT2560_TX_DESC_SIZE, 1046 RT2560_TX_DESC_SIZE, BUS_DMASYNC_POSTREAD); 1047 1048 if (letoh32(desc->flags) & 1049 (RT2560_TX_BUSY | RT2560_TX_CIPHER_BUSY)) 1050 break; 1051 1052 /* for TKIP, swap eiv field to fix a bug in ASIC */ 1053 if ((letoh32(desc->flags) & RT2560_TX_CIPHER_MASK) == 1054 RT2560_TX_CIPHER_TKIP) 1055 desc->eiv = swap32(desc->eiv); 1056 1057 /* mark the frame ready for transmission */ 1058 desc->flags |= htole32(RT2560_TX_BUSY | RT2560_TX_VALID); 1059 1060 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1061 sc->txq.next_encrypt * RT2560_TX_DESC_SIZE, 1062 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 1063 1064 DPRINTFN(15, ("encryption done idx=%u\n", 1065 sc->txq.next_encrypt)); 1066 1067 sc->txq.next_encrypt = 1068 (sc->txq.next_encrypt + 1) % RT2560_TX_RING_COUNT; 1069 } 1070 1071 /* kick Tx */ 1072 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_TX); 1073} 1074 1075void 1076rt2560_tx_intr(struct rt2560_softc *sc) 1077{ 1078 struct ieee80211com *ic = &sc->sc_ic; 1079 struct ifnet *ifp = &ic->ic_if; 1080 struct rt2560_tx_desc *desc; 1081 struct rt2560_tx_data *data; 1082 struct rt2560_node *rn; 1083 1084 for (;;) { 1085 desc = &sc->txq.desc[sc->txq.next]; 1086 data = &sc->txq.data[sc->txq.next]; 1087 1088 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1089 sc->txq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1090 BUS_DMASYNC_POSTREAD); 1091 1092 if ((letoh32(desc->flags) & RT2560_TX_BUSY) || 1093 (letoh32(desc->flags) & RT2560_TX_CIPHER_BUSY) || 1094 !(letoh32(desc->flags) & RT2560_TX_VALID)) 1095 break; 1096 1097 rn = (struct rt2560_node *)data->ni; 1098 1099 switch (letoh32(desc->flags) & RT2560_TX_RESULT_MASK) { 1100 case RT2560_TX_SUCCESS: 1101 DPRINTFN(10, ("data frame sent successfully\n")); 1102 if (data->id.id_node != NULL) { 1103 ieee80211_rssadapt_raise_rate(ic, 1104 &rn->rssadapt, &data->id); 1105 } 1106 ifp->if_opackets++; 1107 break; 1108 1109 case RT2560_TX_SUCCESS_RETRY: 1110 DPRINTFN(9, ("data frame sent after %u retries\n", 1111 (letoh32(desc->flags) >> 5) & 0x7)); 1112 ifp->if_opackets++; 1113 break; 1114 1115 case RT2560_TX_FAIL_RETRY: 1116 DPRINTFN(9, ("sending data frame failed (too much " 1117 "retries)\n")); 1118 if (data->id.id_node != NULL) { 1119 ieee80211_rssadapt_lower_rate(ic, data->ni, 1120 &rn->rssadapt, &data->id); 1121 } 1122 ifp->if_oerrors++; 1123 break; 1124 1125 case RT2560_TX_FAIL_INVALID: 1126 case RT2560_TX_FAIL_OTHER: 1127 default: 1128 printf("%s: sending data frame failed 0x%08x\n", 1129 sc->sc_dev.dv_xname, letoh32(desc->flags)); 1130 ifp->if_oerrors++; 1131 } 1132 1133 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1134 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 1135 bus_dmamap_unload(sc->sc_dmat, data->map); 1136 m_freem(data->m); 1137 data->m = NULL; 1138 ieee80211_release_node(ic, data->ni); 1139 data->ni = NULL; 1140 1141 /* descriptor is no longer valid */ 1142 desc->flags &= ~htole32(RT2560_TX_VALID); 1143 1144 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1145 sc->txq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1146 BUS_DMASYNC_PREWRITE); 1147 1148 DPRINTFN(15, ("tx done idx=%u\n", sc->txq.next)); 1149 1150 sc->txq.queued--; 1151 sc->txq.next = (sc->txq.next + 1) % RT2560_TX_RING_COUNT; 1152 } 1153 1154 sc->sc_tx_timer = 0; 1155 ifp->if_flags &= ~IFF_OACTIVE; 1156 rt2560_start(ifp); 1157} 1158 1159void 1160rt2560_prio_intr(struct rt2560_softc *sc) 1161{ 1162 struct ieee80211com *ic = &sc->sc_ic; 1163 struct ifnet *ifp = &ic->ic_if; 1164 struct rt2560_tx_desc *desc; 1165 struct rt2560_tx_data *data; 1166 1167 for (;;) { 1168 desc = &sc->prioq.desc[sc->prioq.next]; 1169 data = &sc->prioq.data[sc->prioq.next]; 1170 1171 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1172 sc->prioq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1173 BUS_DMASYNC_POSTREAD); 1174 1175 if ((letoh32(desc->flags) & RT2560_TX_BUSY) || 1176 !(letoh32(desc->flags) & RT2560_TX_VALID)) 1177 break; 1178 1179 switch (letoh32(desc->flags) & RT2560_TX_RESULT_MASK) { 1180 case RT2560_TX_SUCCESS: 1181 DPRINTFN(10, ("mgt frame sent successfully\n")); 1182 break; 1183 1184 case RT2560_TX_SUCCESS_RETRY: 1185 DPRINTFN(9, ("mgt frame sent after %u retries\n", 1186 (letoh32(desc->flags) >> 5) & 0x7)); 1187 break; 1188 1189 case RT2560_TX_FAIL_RETRY: 1190 DPRINTFN(9, ("sending mgt frame failed (too much " 1191 "retries)\n")); 1192 break; 1193 1194 case RT2560_TX_FAIL_INVALID: 1195 case RT2560_TX_FAIL_OTHER: 1196 default: 1197 printf("%s: sending mgt frame failed 0x%08x\n", 1198 sc->sc_dev.dv_xname, letoh32(desc->flags)); 1199 } 1200 1201 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1202 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 1203 bus_dmamap_unload(sc->sc_dmat, data->map); 1204 m_freem(data->m); 1205 data->m = NULL; 1206 ieee80211_release_node(ic, data->ni); 1207 data->ni = NULL; 1208 1209 /* descriptor is no longer valid */ 1210 desc->flags &= ~htole32(RT2560_TX_VALID); 1211 1212 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1213 sc->prioq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1214 BUS_DMASYNC_PREWRITE); 1215 1216 DPRINTFN(15, ("prio done idx=%u\n", sc->prioq.next)); 1217 1218 sc->prioq.queued--; 1219 sc->prioq.next = (sc->prioq.next + 1) % RT2560_PRIO_RING_COUNT; 1220 } 1221 1222 sc->sc_tx_timer = 0; 1223 ifp->if_flags &= ~IFF_OACTIVE; 1224 rt2560_start(ifp); 1225} 1226 1227/* 1228 * Some frames were processed by the hardware cipher engine and are ready for 1229 * transmission to the IEEE802.11 layer. 1230 */ 1231void 1232rt2560_decryption_intr(struct rt2560_softc *sc) 1233{ 1234 struct ieee80211com *ic = &sc->sc_ic; 1235 struct ifnet *ifp = &ic->ic_if; 1236 struct rt2560_rx_desc *desc; 1237 struct rt2560_rx_data *data; 1238 struct rt2560_node *rn; 1239 struct ieee80211_frame *wh; 1240 struct ieee80211_node *ni; 1241 struct mbuf *mnew, *m; 1242 int hw, error; 1243 1244 /* retrieve last decriptor index processed by cipher engine */ 1245 hw = (RAL_READ(sc, RT2560_SECCSR0) - sc->rxq.physaddr) / 1246 RT2560_RX_DESC_SIZE; 1247 1248 for (; sc->rxq.cur_decrypt != hw;) { 1249 desc = &sc->rxq.desc[sc->rxq.cur_decrypt]; 1250 data = &sc->rxq.data[sc->rxq.cur_decrypt]; 1251 1252 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1253 sc->rxq.cur_decrypt * RT2560_TX_DESC_SIZE, 1254 RT2560_TX_DESC_SIZE, BUS_DMASYNC_POSTREAD); 1255 1256 if (letoh32(desc->flags) & 1257 (RT2560_RX_BUSY | RT2560_RX_CIPHER_BUSY)) 1258 break; 1259 1260 if (data->drop) { 1261 ifp->if_ierrors++; 1262 goto skip; 1263 } 1264 1265 if ((letoh32(desc->flags) & RT2560_RX_CIPHER_MASK) != 0 && 1266 (letoh32(desc->flags) & RT2560_RX_ICV_ERROR)) { 1267 ifp->if_ierrors++; 1268 goto skip; 1269 } 1270 1271 /* 1272 * Try to allocate a new mbuf for this ring element and load it 1273 * before processing the current mbuf. If the ring element 1274 * cannot be loaded, drop the received packet and reuse the old 1275 * mbuf. In the unlikely case that the old mbuf can't be 1276 * reloaded either, explicitly panic. 1277 */ 1278 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 1279 if (mnew == NULL) { 1280 ifp->if_ierrors++; 1281 goto skip; 1282 } 1283 1284 MCLGET(mnew, M_DONTWAIT); 1285 if (!(mnew->m_flags & M_EXT)) { 1286 m_freem(mnew); 1287 ifp->if_ierrors++; 1288 goto skip; 1289 } 1290 1291 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1292 data->map->dm_mapsize, BUS_DMASYNC_POSTREAD); 1293 bus_dmamap_unload(sc->sc_dmat, data->map); 1294 1295 error = bus_dmamap_load(sc->sc_dmat, data->map, 1296 mtod(mnew, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT); 1297 if (error != 0) { 1298 m_freem(mnew); 1299 1300 /* try to reload the old mbuf */ 1301 error = bus_dmamap_load(sc->sc_dmat, data->map, 1302 mtod(data->m, void *), MCLBYTES, NULL, 1303 BUS_DMA_NOWAIT); 1304 if (error != 0) { 1305 /* very unlikely that it will fail... */ 1306 panic("%s: could not load old rx mbuf", 1307 sc->sc_dev.dv_xname); 1308 } 1309 ifp->if_ierrors++; 1310 goto skip; 1311 } 1312 1313 /* 1314 * New mbuf successfully loaded, update Rx ring and continue 1315 * processing. 1316 */ 1317 m = data->m; 1318 data->m = mnew; 1319 desc->physaddr = htole32(data->map->dm_segs->ds_addr); 1320 1321 /* finalize mbuf */ 1322 m->m_pkthdr.rcvif = ifp; 1323 m->m_pkthdr.len = m->m_len = 1324 (letoh32(desc->flags) >> 16) & 0xfff; 1325 1326#if NBPFILTER > 0 1327 if (sc->sc_drvbpf != NULL) { 1328 struct mbuf mb; 1329 struct rt2560_rx_radiotap_header *tap = &sc->sc_rxtap; 1330 uint32_t tsf_lo, tsf_hi; 1331 1332 /* get timestamp (low and high 32 bits) */ 1333 tsf_lo = RAL_READ(sc, RT2560_CSR16); 1334 tsf_hi = RAL_READ(sc, RT2560_CSR17); 1335 1336 tap->wr_tsf = 1337 htole64(((uint64_t)tsf_hi << 32) | tsf_lo); 1338 tap->wr_flags = 0; 1339 tap->wr_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 1340 tap->wr_chan_flags = 1341 htole16(ic->ic_ibss_chan->ic_flags); 1342 tap->wr_antenna = sc->rx_ant; 1343 tap->wr_antsignal = desc->rssi; 1344 1345 M_DUP_PKTHDR(&mb, m); 1346 mb.m_data = (caddr_t)tap; 1347 mb.m_len = sc->sc_txtap_len; 1348 mb.m_next = m; 1349 mb.m_pkthdr.len += mb.m_len; 1350 bpf_mtap(sc->sc_drvbpf, &mb); 1351 } 1352#endif 1353 1354 wh = mtod(m, struct ieee80211_frame *); 1355 ni = ieee80211_find_rxnode(ic, wh); 1356 1357 /* send the frame to the 802.11 layer */ 1358 ieee80211_input(ifp, m, ni, desc->rssi, 0); 1359 1360 /* give rssi to the rate adatation algorithm */ 1361 rn = (struct rt2560_node *)ni; 1362 ieee80211_rssadapt_input(ic, ni, &rn->rssadapt, desc->rssi); 1363 1364 /* node is no longer needed */ 1365 ieee80211_release_node(ic, ni); 1366 1367skip: desc->flags = htole32(RT2560_RX_BUSY); 1368 1369 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1370 sc->rxq.cur_decrypt * RT2560_TX_DESC_SIZE, 1371 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 1372 1373 DPRINTFN(15, ("decryption done idx=%u\n", sc->rxq.cur_decrypt)); 1374 1375 sc->rxq.cur_decrypt = 1376 (sc->rxq.cur_decrypt + 1) % RT2560_RX_RING_COUNT; 1377 } 1378 1379 /* 1380 * In HostAP mode, ieee80211_input() will enqueue packets in if_snd 1381 * without calling if_start(). 1382 */ 1383 if (!IFQ_IS_EMPTY(&ifp->if_snd) && !(ifp->if_flags & IFF_OACTIVE)) 1384 rt2560_start(ifp); 1385} 1386 1387/* 1388 * Some frames were received. Pass them to the hardware cipher engine before 1389 * sending them to the 802.11 layer. 1390 */ 1391void 1392rt2560_rx_intr(struct rt2560_softc *sc) 1393{ 1394 struct rt2560_rx_desc *desc; 1395 struct rt2560_rx_data *data; 1396 1397 for (;;) { 1398 desc = &sc->rxq.desc[sc->rxq.cur]; 1399 data = &sc->rxq.data[sc->rxq.cur]; 1400 1401 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1402 sc->rxq.cur * RT2560_RX_DESC_SIZE, RT2560_RX_DESC_SIZE, 1403 BUS_DMASYNC_POSTREAD); 1404 1405 if (letoh32(desc->flags) & 1406 (RT2560_RX_BUSY | RT2560_RX_CIPHER_BUSY)) 1407 break; 1408 1409 data->drop = 0; 1410 1411 if (letoh32(desc->flags) & 1412 (RT2560_RX_PHY_ERROR | RT2560_RX_CRC_ERROR)) { 1413 /* 1414 * This should not happen since we did not request 1415 * to receive those frames when we filled RXCSR0. 1416 */ 1417 DPRINTFN(5, ("PHY or CRC error flags 0x%08x\n", 1418 letoh32(desc->flags))); 1419 data->drop = 1; 1420 } 1421 1422 if (((letoh32(desc->flags) >> 16) & 0xfff) > MCLBYTES) { 1423 DPRINTFN(5, ("bad length\n")); 1424 data->drop = 1; 1425 } 1426 1427 /* mark the frame for decryption */ 1428 desc->flags |= htole32(RT2560_RX_CIPHER_BUSY); 1429 1430 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1431 sc->rxq.cur * RT2560_RX_DESC_SIZE, RT2560_RX_DESC_SIZE, 1432 BUS_DMASYNC_PREWRITE); 1433 1434 DPRINTFN(15, ("rx done idx=%u\n", sc->rxq.cur)); 1435 1436 sc->rxq.cur = (sc->rxq.cur + 1) % RT2560_RX_RING_COUNT; 1437 } 1438 1439 /* kick decrypt */ 1440 RAL_WRITE(sc, RT2560_SECCSR0, RT2560_KICK_DECRYPT); 1441} 1442 1443/* 1444 * This function is called periodically in IBSS mode when a new beacon must be 1445 * sent out. 1446 */ 1447void 1448rt2560_beacon_expire(struct rt2560_softc *sc) 1449{ 1450 struct ieee80211com *ic = &sc->sc_ic; 1451 struct rt2560_tx_data *data; 1452 1453 if (ic->ic_opmode != IEEE80211_M_IBSS && 1454 ic->ic_opmode != IEEE80211_M_HOSTAP) 1455 return; 1456 1457 data = &sc->bcnq.data[sc->bcnq.next]; 1458 1459#if NBPFILTER > 0 1460 if (ic->ic_rawbpf != NULL) 1461 bpf_mtap(ic->ic_rawbpf, data->m); 1462#endif 1463 1464 DPRINTFN(15, ("beacon expired\n")); 1465} 1466 1467void 1468rt2560_wakeup_expire(struct rt2560_softc *sc) 1469{ 1470 DPRINTFN(15, ("wakeup expired\n")); 1471} 1472 1473int 1474rt2560_intr(void *arg) 1475{ 1476 struct rt2560_softc *sc = arg; 1477 uint32_t r; 1478 1479 /* disable interrupts */ 1480 RAL_WRITE(sc, RT2560_CSR8, 0xffffffff); 1481 1482 r = RAL_READ(sc, RT2560_CSR7); 1483 RAL_WRITE(sc, RT2560_CSR7, r); 1484 1485 if (r & RT2560_BEACON_EXPIRE) 1486 rt2560_beacon_expire(sc); 1487 1488 if (r & RT2560_WAKEUP_EXPIRE) 1489 rt2560_wakeup_expire(sc); 1490 1491 if (r & RT2560_ENCRYPTION_DONE) 1492 rt2560_encryption_intr(sc); 1493 1494 if (r & RT2560_TX_DONE) 1495 rt2560_tx_intr(sc); 1496 1497 if (r & RT2560_PRIO_DONE) 1498 rt2560_prio_intr(sc); 1499 1500 if (r & RT2560_DECRYPTION_DONE) 1501 rt2560_decryption_intr(sc); 1502 1503 if (r & RT2560_RX_DONE) 1504 rt2560_rx_intr(sc); 1505 1506 /* re-enable interrupts */ 1507 RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK); 1508 1509 return 1; 1510} 1511 1512/* quickly determine if a given rate is CCK or OFDM */ 1513#define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22) 1514 1515#define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */ 1516#define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */ 1517 1518#define RAL_SIFS 10 /* us */ 1519 1520#define RT2560_RXTX_TURNAROUND 10 /* us */ 1521 1522/* 1523 * Return the expected ack rate for a frame transmitted at rate `rate'. 1524 * XXX: this should depend on the destination node basic rate set. 1525 */ 1526int 1527rt2560_ack_rate(struct ieee80211com *ic, int rate) 1528{ 1529 switch (rate) { 1530 /* CCK rates */ 1531 case 2: 1532 return 2; 1533 case 4: 1534 case 11: 1535 case 22: 1536 return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate; 1537 1538 /* OFDM rates */ 1539 case 12: 1540 case 18: 1541 return 12; 1542 case 24: 1543 case 36: 1544 return 24; 1545 case 48: 1546 case 72: 1547 case 96: 1548 case 108: 1549 return 48; 1550 } 1551 1552 /* default to 1Mbps */ 1553 return 2; 1554} 1555 1556/* 1557 * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'. 1558 * The function automatically determines the operating mode depending on the 1559 * given rate. `flags' indicates whether short preamble is in use or not. 1560 */ 1561uint16_t 1562rt2560_txtime(int len, int rate, uint32_t flags) 1563{ 1564 uint16_t txtime; 1565 1566 if (RAL_RATE_IS_OFDM(rate)) { 1567 /* IEEE Std 802.11a-1999, pp. 37 */ 1568 txtime = (8 + 4 * len + 3 + rate - 1) / rate; 1569 txtime = 16 + 4 + 4 * txtime + 6; 1570 } else { 1571 /* IEEE Std 802.11b-1999, pp. 28 */ 1572 txtime = (16 * len + rate - 1) / rate; 1573 if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE)) 1574 txtime += 72 + 24; 1575 else 1576 txtime += 144 + 48; 1577 } 1578 return txtime; 1579} 1580 1581uint8_t 1582rt2560_plcp_signal(int rate) 1583{ 1584 switch (rate) { 1585 /* CCK rates (returned values are device-dependent) */ 1586 case 2: return 0x0; 1587 case 4: return 0x1; 1588 case 11: return 0x2; 1589 case 22: return 0x3; 1590 1591 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1592 case 12: return 0xb; 1593 case 18: return 0xf; 1594 case 24: return 0xa; 1595 case 36: return 0xe; 1596 case 48: return 0x9; 1597 case 72: return 0xd; 1598 case 96: return 0x8; 1599 case 108: return 0xc; 1600 1601 /* unsupported rates (should not get there) */ 1602 default: return 0xff; 1603 } 1604} 1605 1606void 1607rt2560_setup_tx_desc(struct rt2560_softc *sc, struct rt2560_tx_desc *desc, 1608 uint32_t flags, int len, int rate, int encrypt, bus_addr_t physaddr) 1609{ 1610 struct ieee80211com *ic = &sc->sc_ic; 1611 uint16_t plcp_length; 1612 int remainder; 1613 1614 desc->flags = htole32(flags); 1615 desc->flags |= htole32(len << 16); 1616 desc->flags |= encrypt ? htole32(RT2560_TX_CIPHER_BUSY) : 1617 htole32(RT2560_TX_BUSY | RT2560_TX_VALID); 1618 1619 desc->physaddr = htole32(physaddr); 1620 desc->wme = htole16( 1621 RT2560_AIFSN(2) | 1622 RT2560_LOGCWMIN(3) | 1623 RT2560_LOGCWMAX(8)); 1624 1625 /* setup PLCP fields */ 1626 desc->plcp_signal = rt2560_plcp_signal(rate); 1627 desc->plcp_service = 4; 1628 1629 len += IEEE80211_CRC_LEN; 1630 if (RAL_RATE_IS_OFDM(rate)) { 1631 desc->flags |= htole32(RT2560_TX_OFDM); 1632 1633 plcp_length = len & 0xfff; 1634 desc->plcp_length_hi = plcp_length >> 6; 1635 desc->plcp_length_lo = plcp_length & 0x3f; 1636 } else { 1637 plcp_length = (16 * len + rate - 1) / rate; 1638 if (rate == 22) { 1639 remainder = (16 * len) % 22; 1640 if (remainder != 0 && remainder < 7) 1641 desc->plcp_service |= RT2560_PLCP_LENGEXT; 1642 } 1643 desc->plcp_length_hi = plcp_length >> 8; 1644 desc->plcp_length_lo = plcp_length & 0xff; 1645 1646 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1647 desc->plcp_signal |= 0x08; 1648 } 1649} 1650 1651int 1652rt2560_tx_bcn(struct rt2560_softc *sc, struct mbuf *m0, 1653 struct ieee80211_node *ni) 1654{ 1655 struct rt2560_tx_desc *desc; 1656 struct rt2560_tx_data *data; 1657 int rate, error; 1658 1659 desc = &sc->bcnq.desc[sc->bcnq.cur]; 1660 data = &sc->bcnq.data[sc->bcnq.cur]; 1661 1662 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1663 1664 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1665 BUS_DMA_NOWAIT); 1666 if (error != 0) { 1667 printf("%s: could not map mbuf (error %d)\n", 1668 sc->sc_dev.dv_xname, error); 1669 m_freem(m0); 1670 return error; 1671 } 1672 1673 data->m = m0; 1674 data->ni = ni; 1675 1676 rt2560_setup_tx_desc(sc, desc, RT2560_TX_IFS_NEWBACKOFF | 1677 RT2560_TX_TIMESTAMP, m0->m_pkthdr.len, rate, 0, 1678 data->map->dm_segs->ds_addr); 1679 1680 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 1681 BUS_DMASYNC_PREWRITE); 1682 bus_dmamap_sync(sc->sc_dmat, sc->bcnq.map, 1683 sc->bcnq.cur * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1684 BUS_DMASYNC_PREWRITE); 1685 1686 return 0; 1687} 1688 1689int 1690rt2560_tx_mgt(struct rt2560_softc *sc, struct mbuf *m0, 1691 struct ieee80211_node *ni) 1692{ 1693 struct ieee80211com *ic = &sc->sc_ic; 1694 struct rt2560_tx_desc *desc; 1695 struct rt2560_tx_data *data; 1696 struct ieee80211_frame *wh; 1697 uint16_t dur; 1698 uint32_t flags = 0; 1699 int rate, error; 1700 1701 desc = &sc->prioq.desc[sc->prioq.cur]; 1702 data = &sc->prioq.data[sc->prioq.cur]; 1703 1704 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1705 1706 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1707 BUS_DMA_NOWAIT); 1708 if (error != 0) { 1709 printf("%s: could not map mbuf (error %d)\n", 1710 sc->sc_dev.dv_xname, error); 1711 m_freem(m0); 1712 return error; 1713 } 1714 1715#if NBPFILTER > 0 1716 if (sc->sc_drvbpf != NULL) { 1717 struct mbuf mb; 1718 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap; 1719 1720 tap->wt_flags = 0; 1721 tap->wt_rate = rate; 1722 tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 1723 tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags); 1724 tap->wt_antenna = sc->tx_ant; 1725 1726 M_DUP_PKTHDR(&mb, m0); 1727 mb.m_data = (caddr_t)tap; 1728 mb.m_len = sc->sc_txtap_len; 1729 mb.m_next = m0; 1730 mb.m_pkthdr.len += mb.m_len; 1731 bpf_mtap(sc->sc_drvbpf, &mb); 1732 } 1733#endif 1734 1735 data->m = m0; 1736 data->ni = ni; 1737 1738 wh = mtod(m0, struct ieee80211_frame *); 1739 1740 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1741 flags |= RT2560_TX_ACK; 1742 1743 dur = rt2560_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) + 1744 RAL_SIFS; 1745 *(uint16_t *)wh->i_dur = htole16(dur); 1746 1747 /* tell hardware to add timestamp for probe responses */ 1748 if ((wh->i_fc[0] & 1749 (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) == 1750 (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP)) 1751 flags |= RT2560_TX_TIMESTAMP; 1752 } 1753 1754 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 0, 1755 data->map->dm_segs->ds_addr); 1756 1757 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 1758 BUS_DMASYNC_PREWRITE); 1759 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1760 sc->prioq.cur * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1761 BUS_DMASYNC_PREWRITE); 1762 1763 DPRINTFN(10, ("sending mgt frame len=%u idx=%u rate=%u\n", 1764 m0->m_pkthdr.len, sc->prioq.cur, rate)); 1765 1766 /* kick prio */ 1767 sc->prioq.queued++; 1768 sc->prioq.cur = (sc->prioq.cur + 1) % RT2560_PRIO_RING_COUNT; 1769 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_PRIO); 1770 1771 return 0; 1772} 1773 1774/* 1775 * Build a RTS control frame. 1776 */ 1777struct mbuf * 1778rt2560_get_rts(struct rt2560_softc *sc, struct ieee80211_frame *wh, 1779 uint16_t dur) 1780{ 1781 struct ieee80211_frame_rts *rts; 1782 struct mbuf *m; 1783 1784 MGETHDR(m, M_DONTWAIT, MT_DATA); 1785 if (m == NULL) { 1786 sc->sc_ic.ic_stats.is_tx_nombuf++; 1787 printf("%s: could not allocate RTS frame\n", 1788 sc->sc_dev.dv_xname); 1789 return NULL; 1790 } 1791 1792 rts = mtod(m, struct ieee80211_frame_rts *); 1793 1794 rts->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_CTL | 1795 IEEE80211_FC0_SUBTYPE_RTS; 1796 rts->i_fc[1] = IEEE80211_FC1_DIR_NODS; 1797 *(uint16_t *)rts->i_dur = htole16(dur); 1798 IEEE80211_ADDR_COPY(rts->i_ra, wh->i_addr1); 1799 IEEE80211_ADDR_COPY(rts->i_ta, wh->i_addr2); 1800 1801 m->m_pkthdr.len = m->m_len = sizeof (struct ieee80211_frame_rts); 1802 1803 return m; 1804} 1805 1806int 1807rt2560_tx_data(struct rt2560_softc *sc, struct mbuf *m0, 1808 struct ieee80211_node *ni) 1809{ 1810 struct ieee80211com *ic = &sc->sc_ic; 1811 struct ifnet *ifp = &ic->ic_if; 1812 struct rt2560_tx_desc *desc; 1813 struct rt2560_tx_data *data; 1814 struct rt2560_node *rn; 1815 struct ieee80211_rateset *rs; 1816 struct ieee80211_frame *wh; 1817 struct mbuf *mnew; 1818 uint16_t dur; 1819 uint32_t flags = 0; 1820 int rate, error; 1821 1822 wh = mtod(m0, struct ieee80211_frame *); 1823 1824 /* XXX this should be reworked! */ 1825 if (ic->ic_fixed_rate != -1) { 1826 if (ic->ic_curmode != IEEE80211_MODE_AUTO) 1827 rs = &ic->ic_sup_rates[ic->ic_curmode]; 1828 else 1829 rs = &ic->ic_sup_rates[IEEE80211_MODE_11G]; 1830 1831 rate = rs->rs_rates[ic->ic_fixed_rate]; 1832 } else { 1833 rs = &ni->ni_rates; 1834 rn = (struct rt2560_node *)ni; 1835 ni->ni_txrate = ieee80211_rssadapt_choose(&rn->rssadapt, rs, 1836 wh, m0->m_pkthdr.len, -1, NULL, 0); 1837 rate = rs->rs_rates[ni->ni_txrate]; 1838 } 1839 rate &= IEEE80211_RATE_VAL; 1840 1841 /* assert tx rate is non-null so we don't end up dividing by zero */ 1842 KASSERT(rate != 0); 1843 1844 if (ic->ic_flags & IEEE80211_F_WEPON) { 1845 m0 = ieee80211_wep_crypt(ifp, m0, 1); 1846 if (m0 == NULL) 1847 return ENOBUFS; 1848 1849 /* packet header may have moved, reset our local pointer */ 1850 wh = mtod(m0, struct ieee80211_frame *); 1851 } 1852 1853 /* 1854 * IEEE Std 802.11-1999, pp 82: "A STA shall use an RTS/CTS exchange 1855 * for directed frames only when the length of the MPDU is greater 1856 * than the length threshold indicated by [...]" ic_rtsthreshold. 1857 */ 1858 if (!IEEE80211_IS_MULTICAST(wh->i_addr1) && 1859 m0->m_pkthdr.len > ic->ic_rtsthreshold) { 1860 struct mbuf *m; 1861 uint16_t dur; 1862 int rtsrate, ackrate; 1863 1864 rtsrate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1865 ackrate = rt2560_ack_rate(ic, rate); 1866 1867 dur = rt2560_txtime(m0->m_pkthdr.len + 4, rate, ic->ic_flags) + 1868 rt2560_txtime(RAL_CTS_SIZE, rtsrate, ic->ic_flags) + 1869 rt2560_txtime(RAL_ACK_SIZE, ackrate, ic->ic_flags) + 1870 3 * RAL_SIFS; 1871 1872 m = rt2560_get_rts(sc, wh, dur); 1873 1874 desc = &sc->txq.desc[sc->txq.cur_encrypt]; 1875 data = &sc->txq.data[sc->txq.cur_encrypt]; 1876 1877 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m, 1878 BUS_DMA_NOWAIT); 1879 if (error != 0) { 1880 printf("%s: could not map mbuf (error %d)\n", 1881 sc->sc_dev.dv_xname, error); 1882 m_freem(m); 1883 m_freem(m0); 1884 return error; 1885 } 1886 1887 /* avoid multiple free() of the same node for each fragment */ 1888 ieee80211_ref_node(ni); 1889 1890 data->m = m; 1891 data->ni = ni; 1892 1893 /* RTS frames are not taken into account for rssadapt */ 1894 data->id.id_node = NULL; 1895 1896 rt2560_setup_tx_desc(sc, desc, RT2560_TX_ACK | 1897 RT2560_TX_MORE_FRAG, m->m_pkthdr.len, rtsrate, 1, 1898 data->map->dm_segs->ds_addr); 1899 1900 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1901 data->map->dm_mapsize, BUS_DMASYNC_PREWRITE); 1902 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1903 sc->txq.cur_encrypt * RT2560_TX_DESC_SIZE, 1904 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 1905 1906 sc->txq.queued++; 1907 sc->txq.cur_encrypt = 1908 (sc->txq.cur_encrypt + 1) % RT2560_TX_RING_COUNT; 1909 1910 /* 1911 * IEEE Std 802.11-1999: when an RTS/CTS exchange is used, the 1912 * asynchronous data frame shall be transmitted after the CTS 1913 * frame and a SIFS period. 1914 */ 1915 flags |= RT2560_TX_LONG_RETRY | RT2560_TX_IFS_SIFS; 1916 } 1917 1918 data = &sc->txq.data[sc->txq.cur_encrypt]; 1919 desc = &sc->txq.desc[sc->txq.cur_encrypt]; 1920 1921 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1922 BUS_DMA_NOWAIT); 1923 if (error != 0 && error != EFBIG) { 1924 printf("%s: could not map mbuf (error %d)\n", 1925 sc->sc_dev.dv_xname, error); 1926 m_freem(m0); 1927 return error; 1928 } 1929 if (error != 0) { 1930 /* too many fragments, linearize */ 1931 1932 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 1933 if (mnew == NULL) { 1934 m_freem(m0); 1935 return ENOMEM; 1936 } 1937 1938 M_DUP_PKTHDR(mnew, m0); 1939 if (m0->m_pkthdr.len > MHLEN) { 1940 MCLGET(mnew, M_DONTWAIT); 1941 if (!(mnew->m_flags & M_EXT)) { 1942 m_freem(m0); 1943 m_freem(mnew); 1944 return ENOMEM; 1945 } 1946 } 1947 1948 m_copydata(m0, 0, m0->m_pkthdr.len, mtod(mnew, caddr_t)); 1949 m_freem(m0); 1950 mnew->m_len = mnew->m_pkthdr.len; 1951 m0 = mnew; 1952 1953 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1954 BUS_DMA_NOWAIT); 1955 if (error != 0) { 1956 printf("%s: could not map mbuf (error %d)\n", 1957 sc->sc_dev.dv_xname, error); 1958 m_freem(m0); 1959 return error; 1960 } 1961 1962 /* packet header have moved, reset our local pointer */ 1963 wh = mtod(m0, struct ieee80211_frame *); 1964 } 1965 1966#if NBPFILTER > 0 1967 if (sc->sc_drvbpf != NULL) { 1968 struct mbuf mb; 1969 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap; 1970 1971 tap->wt_flags = 0; 1972 tap->wt_rate = rate; 1973 tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 1974 tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags); 1975 tap->wt_antenna = sc->tx_ant; 1976 1977 M_DUP_PKTHDR(&mb, m0); 1978 mb.m_data = (caddr_t)tap; 1979 mb.m_len = sc->sc_txtap_len; 1980 mb.m_next = m0; 1981 mb.m_pkthdr.len += mb.m_len; 1982 bpf_mtap(sc->sc_drvbpf, &mb); 1983 } 1984#endif 1985 1986 data->m = m0; 1987 data->ni = ni; 1988 1989 /* remember link conditions for rate adaptation algorithm */ 1990 if (ic->ic_fixed_rate == -1) { 1991 data->id.id_len = m0->m_pkthdr.len; 1992 data->id.id_rateidx = ni->ni_txrate; 1993 data->id.id_node = ni; 1994 data->id.id_rssi = ni->ni_rssi; 1995 } else 1996 data->id.id_node = NULL; 1997 1998 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1999 flags |= RT2560_TX_ACK; 2000 2001 dur = rt2560_txtime(RAL_ACK_SIZE, rt2560_ack_rate(ic, rate), 2002 ic->ic_flags) + RAL_SIFS; 2003 *(uint16_t *)wh->i_dur = htole16(dur); 2004 } 2005 2006 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 1, 2007 data->map->dm_segs->ds_addr); 2008 2009 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 2010 BUS_DMASYNC_PREWRITE); 2011 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 2012 sc->txq.cur_encrypt * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 2013 BUS_DMASYNC_PREWRITE); 2014 2015 DPRINTFN(10, ("sending data frame len=%u idx=%u rate=%u\n", 2016 m0->m_pkthdr.len, sc->txq.cur_encrypt, rate)); 2017 2018 /* kick encrypt */ 2019 sc->txq.queued++; 2020 sc->txq.cur_encrypt = (sc->txq.cur_encrypt + 1) % RT2560_TX_RING_COUNT; 2021 RAL_WRITE(sc, RT2560_SECCSR1, RT2560_KICK_ENCRYPT); 2022 2023 return 0; 2024} 2025 2026void 2027rt2560_start(struct ifnet *ifp) 2028{ 2029 struct rt2560_softc *sc = ifp->if_softc; 2030 struct ieee80211com *ic = &sc->sc_ic; 2031 struct mbuf *m0; 2032 struct ieee80211_node *ni; 2033 2034 for (;;) { 2035 IF_POLL(&ic->ic_mgtq, m0); 2036 if (m0 != NULL) { 2037 if (sc->prioq.queued >= RT2560_PRIO_RING_COUNT) { 2038 ifp->if_flags |= IFF_OACTIVE; 2039 break; 2040 } 2041 IF_DEQUEUE(&ic->ic_mgtq, m0); 2042 2043 ni = (struct ieee80211_node *)m0->m_pkthdr.rcvif; 2044 m0->m_pkthdr.rcvif = NULL; 2045#if NBPFILTER > 0 2046 if (ic->ic_rawbpf != NULL) 2047 bpf_mtap(ic->ic_rawbpf, m0); 2048#endif 2049 if (rt2560_tx_mgt(sc, m0, ni) != 0) 2050 break; 2051 2052 } else { 2053 if (ic->ic_state != IEEE80211_S_RUN) 2054 break; 2055 IFQ_DEQUEUE(&ifp->if_snd, m0); 2056 if (m0 == NULL) 2057 break; 2058 if (sc->txq.queued >= RT2560_TX_RING_COUNT - 1) { 2059 IF_PREPEND(&ifp->if_snd, m0); 2060 ifp->if_flags |= IFF_OACTIVE; 2061 break; 2062 } 2063#if NBPFILTER > 0 2064 if (ifp->if_bpf != NULL) 2065 bpf_mtap(ifp->if_bpf, m0); 2066#endif 2067 m0 = ieee80211_encap(ifp, m0, &ni); 2068 if (m0 == NULL) 2069 continue; 2070#if NBPFILTER > 0 2071 if (ic->ic_rawbpf != NULL) 2072 bpf_mtap(ic->ic_rawbpf, m0); 2073#endif 2074 if (rt2560_tx_data(sc, m0, ni) != 0) { 2075 if (ni != NULL) 2076 ieee80211_release_node(ic, ni); 2077 ifp->if_oerrors++; 2078 break; 2079 } 2080 } 2081 2082 sc->sc_tx_timer = 5; 2083 ifp->if_timer = 1; 2084 } 2085} 2086 2087void 2088rt2560_watchdog(struct ifnet *ifp) 2089{ 2090 struct rt2560_softc *sc = ifp->if_softc; 2091 2092 ifp->if_timer = 0; 2093 2094 if (sc->sc_tx_timer > 0) { 2095 if (--sc->sc_tx_timer == 0) { 2096 printf("%s: device timeout\n", sc->sc_dev.dv_xname); 2097 rt2560_init(ifp); 2098 ifp->if_oerrors++; 2099 return; 2100 } 2101 ifp->if_timer = 1; 2102 } 2103 2104 ieee80211_watchdog(ifp); 2105} 2106 2107int 2108rt2560_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 2109{ 2110 struct rt2560_softc *sc = ifp->if_softc; 2111 struct ieee80211com *ic = &sc->sc_ic; 2112 struct ifaddr *ifa; 2113 struct ifreq *ifr; 2114 int s, error = 0; 2115 2116 s = splnet(); 2117 2118 switch (cmd) { 2119 case SIOCSIFADDR: 2120 ifa = (struct ifaddr *)data; 2121 ifp->if_flags |= IFF_UP; 2122#ifdef INET 2123 if (ifa->ifa_addr->sa_family == AF_INET) 2124 arp_ifinit(&ic->ic_ac, ifa); 2125#endif 2126 /* FALLTHROUGH */ 2127 case SIOCSIFFLAGS: 2128 if (ifp->if_flags & IFF_UP) { 2129 if (ifp->if_flags & IFF_RUNNING) 2130 rt2560_update_promisc(sc); 2131 else 2132 rt2560_init(ifp); 2133 } else { 2134 if (ifp->if_flags & IFF_RUNNING) 2135 rt2560_stop(ifp, 1); 2136 } 2137 break; 2138 2139 case SIOCADDMULTI: 2140 case SIOCDELMULTI: 2141 ifr = (struct ifreq *)data; 2142 error = (cmd == SIOCADDMULTI) ? 2143 ether_addmulti(ifr, &ic->ic_ac) : 2144 ether_delmulti(ifr, &ic->ic_ac); 2145 2146 if (error == ENETRESET) 2147 error = 0; 2148 break; 2149 2150 case SIOCS80211CHANNEL: 2151 /* 2152 * This allows for fast channel switching in monitor mode 2153 * (used by kismet). In IBSS mode, we must explicitly reset 2154 * the interface to generate a new beacon frame. 2155 */ 2156 error = ieee80211_ioctl(ifp, cmd, data); 2157 if (error == ENETRESET && 2158 ic->ic_opmode == IEEE80211_M_MONITOR) { 2159 rt2560_set_chan(sc, ic->ic_ibss_chan); 2160 error = 0; 2161 } 2162 break; 2163 2164 default: 2165 error = ieee80211_ioctl(ifp, cmd, data); 2166 } 2167 2168 if (error == ENETRESET) { 2169 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 2170 (IFF_UP | IFF_RUNNING)) 2171 rt2560_init(ifp); 2172 error = 0; 2173 } 2174 2175 splx(s); 2176 2177 return error; 2178} 2179 2180void 2181rt2560_bbp_write(struct rt2560_softc *sc, uint8_t reg, uint8_t val) 2182{ 2183 uint32_t tmp; 2184 int ntries; 2185 2186 for (ntries = 0; ntries < 100; ntries++) { 2187 if (!(RAL_READ(sc, RT2560_BBPCSR) & RT2560_BBP_BUSY)) 2188 break; 2189 DELAY(1); 2190 } 2191 if (ntries == 100) { 2192 printf("%s: could not write to BBP\n", sc->sc_dev.dv_xname); 2193 return; 2194 } 2195 2196 tmp = RT2560_BBP_WRITE | RT2560_BBP_BUSY | reg << 8 | val; 2197 RAL_WRITE(sc, RT2560_BBPCSR, tmp); 2198 2199 DPRINTFN(15, ("BBP R%u <- 0x%02x\n", reg, val)); 2200} 2201 2202uint8_t 2203rt2560_bbp_read(struct rt2560_softc *sc, uint8_t reg) 2204{ 2205 uint32_t val; 2206 int ntries; 2207 2208 val = RT2560_BBP_BUSY | reg << 8; 2209 RAL_WRITE(sc, RT2560_BBPCSR, val); 2210 2211 for (ntries = 0; ntries < 100; ntries++) { 2212 val = RAL_READ(sc, RT2560_BBPCSR); 2213 if (!(val & RT2560_BBP_BUSY)) 2214 return val & 0xff; 2215 DELAY(1); 2216 } 2217 2218 printf("%s: could not read from BBP\n", sc->sc_dev.dv_xname); 2219 return 0; 2220} 2221 2222void 2223rt2560_rf_write(struct rt2560_softc *sc, uint8_t reg, uint32_t val) 2224{ 2225 uint32_t tmp; 2226 int ntries; 2227 2228 for (ntries = 0; ntries < 100; ntries++) { 2229 if (!(RAL_READ(sc, RT2560_RFCSR) & RT2560_RF_BUSY)) 2230 break; 2231 DELAY(1); 2232 } 2233 if (ntries == 100) { 2234 printf("%s: could not write to RF\n", sc->sc_dev.dv_xname); 2235 return; 2236 } 2237 2238 tmp = RT2560_RF_BUSY | RT2560_RF_20BIT | (val & 0xfffff) << 2 | 2239 (reg & 0x3); 2240 RAL_WRITE(sc, RT2560_RFCSR, tmp); 2241 2242 /* remember last written value in sc */ 2243 sc->rf_regs[reg] = val; 2244 2245 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff)); 2246} 2247 2248void 2249rt2560_set_chan(struct rt2560_softc *sc, struct ieee80211_channel *c) 2250{ 2251 struct ieee80211com *ic = &sc->sc_ic; 2252 uint8_t power, tmp; 2253 u_int i, chan; 2254 2255 chan = ieee80211_chan2ieee(ic, c); 2256 if (chan == 0 || chan == IEEE80211_CHAN_ANY) 2257 return; 2258 2259 if (IEEE80211_IS_CHAN_2GHZ(c)) 2260 power = min(sc->txpow[chan - 1], 31); 2261 else 2262 power = 31; 2263 2264 DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power)); 2265 2266 switch (sc->rf_rev) { 2267 case RT2560_RF_2522: 2268 rt2560_rf_write(sc, RT2560_RF1, 0x00814); 2269 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2522_r2[chan - 1]); 2270 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040); 2271 break; 2272 2273 case RT2560_RF_2523: 2274 rt2560_rf_write(sc, RT2560_RF1, 0x08804); 2275 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2523_r2[chan - 1]); 2276 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x38044); 2277 rt2560_rf_write(sc, RT2560_RF4, 2278 (chan == 14) ? 0x00280 : 0x00286); 2279 break; 2280 2281 case RT2560_RF_2524: 2282 rt2560_rf_write(sc, RT2560_RF1, 0x0c808); 2283 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2524_r2[chan - 1]); 2284 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040); 2285 rt2560_rf_write(sc, RT2560_RF4, 2286 (chan == 14) ? 0x00280 : 0x00286); 2287 break; 2288 2289 case RT2560_RF_2525: 2290 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2291 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525_hi_r2[chan - 1]); 2292 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2293 rt2560_rf_write(sc, RT2560_RF4, 2294 (chan == 14) ? 0x00280 : 0x00286); 2295 2296 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2297 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525_r2[chan - 1]); 2298 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2299 rt2560_rf_write(sc, RT2560_RF4, 2300 (chan == 14) ? 0x00280 : 0x00286); 2301 break; 2302 2303 case RT2560_RF_2525E: 2304 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2305 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525e_r2[chan - 1]); 2306 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2307 rt2560_rf_write(sc, RT2560_RF4, 2308 (chan == 14) ? 0x00286 : 0x00282); 2309 break; 2310 2311 case RT2560_RF_2526: 2312 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2526_hi_r2[chan - 1]); 2313 rt2560_rf_write(sc, RT2560_RF4, 2314 (chan & 1) ? 0x00386 : 0x00381); 2315 rt2560_rf_write(sc, RT2560_RF1, 0x08804); 2316 2317 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2526_r2[chan - 1]); 2318 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2319 rt2560_rf_write(sc, RT2560_RF4, 2320 (chan & 1) ? 0x00386 : 0x00381); 2321 break; 2322 2323 /* dual-band RF */ 2324 case RT2560_RF_5222: 2325 for (i = 0; rt2560_rf5222[i].chan != chan; i++); 2326 2327 rt2560_rf_write(sc, RT2560_RF1, rt2560_rf5222[i].r1); 2328 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf5222[i].r2); 2329 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040); 2330 rt2560_rf_write(sc, RT2560_RF4, rt2560_rf5222[i].r4); 2331 break; 2332 } 2333 2334 if (ic->ic_opmode != IEEE80211_M_MONITOR && 2335 ic->ic_state != IEEE80211_S_SCAN) { 2336 /* set Japan filter bit for channel 14 */ 2337 tmp = rt2560_bbp_read(sc, 70); 2338 2339 tmp &= ~RT2560_JAPAN_FILTER; 2340 if (chan == 14) 2341 tmp |= RT2560_JAPAN_FILTER; 2342 2343 rt2560_bbp_write(sc, 70, tmp); 2344 2345 DELAY(1000); /* RF needs a 1ms delay here */ 2346 rt2560_disable_rf_tune(sc); 2347 2348 /* clear CRC errors */ 2349 RAL_READ(sc, RT2560_CNT0); 2350 } 2351} 2352 2353/* 2354 * Disable RF auto-tuning. 2355 */ 2356void 2357rt2560_disable_rf_tune(struct rt2560_softc *sc) 2358{ 2359 uint32_t tmp; 2360 2361 if (sc->rf_rev != RT2560_RF_2523) { 2362 tmp = sc->rf_regs[RT2560_RF1] & ~RT2560_RF1_AUTOTUNE; 2363 rt2560_rf_write(sc, RT2560_RF1, tmp); 2364 } 2365 2366 tmp = sc->rf_regs[RT2560_RF3] & ~RT2560_RF3_AUTOTUNE; 2367 rt2560_rf_write(sc, RT2560_RF3, tmp); 2368 2369 DPRINTFN(2, ("disabling RF autotune\n")); 2370} 2371 2372/* 2373 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF 2374 * synchronization. 2375 */ 2376void 2377rt2560_enable_tsf_sync(struct rt2560_softc *sc) 2378{ 2379 struct ieee80211com *ic = &sc->sc_ic; 2380 uint16_t logcwmin, preload; 2381 uint32_t tmp; 2382 2383 /* first, disable TSF synchronization */ 2384 RAL_WRITE(sc, RT2560_CSR14, 0); 2385 2386 tmp = 16 * ic->ic_bss->ni_intval; 2387 RAL_WRITE(sc, RT2560_CSR12, tmp); 2388 2389 RAL_WRITE(sc, RT2560_CSR13, 0); 2390 2391 logcwmin = 5; 2392 preload = (ic->ic_opmode == IEEE80211_M_STA) ? 384 : 1024; 2393 tmp = logcwmin << 16 | preload; 2394 RAL_WRITE(sc, RT2560_BCNOCSR, tmp); 2395 2396 /* finally, enable TSF synchronization */ 2397 tmp = RT2560_ENABLE_TSF | RT2560_ENABLE_TBCN; 2398 if (ic->ic_opmode == IEEE80211_M_STA) 2399 tmp |= RT2560_ENABLE_TSF_SYNC(1); 2400 else 2401 tmp |= RT2560_ENABLE_TSF_SYNC(2) | 2402 RT2560_ENABLE_BEACON_GENERATOR; 2403 RAL_WRITE(sc, RT2560_CSR14, tmp); 2404 2405 DPRINTF(("enabling TSF synchronization\n")); 2406} 2407 2408void 2409rt2560_update_plcp(struct rt2560_softc *sc) 2410{ 2411 struct ieee80211com *ic = &sc->sc_ic; 2412 2413 /* no short preamble for 1Mbps */ 2414 RAL_WRITE(sc, RT2560_PLCP1MCSR, 0x00700400); 2415 2416 if (!(ic->ic_flags & IEEE80211_F_SHPREAMBLE)) { 2417 /* values taken from the reference driver */ 2418 RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380401); 2419 RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x00150402); 2420 RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b8403); 2421 } else { 2422 /* same values as above or'ed 0x8 */ 2423 RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380409); 2424 RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x0015040a); 2425 RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b840b); 2426 } 2427 2428 DPRINTF(("updating PLCP for %s preamble\n", 2429 (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ? "short" : "long")); 2430} 2431 2432/* 2433 * IEEE 802.11a uses short slot time. Refer to IEEE Std 802.11-1999 pp. 85 to 2434 * know how these values are computed. 2435 */ 2436void 2437rt2560_update_slot(struct rt2560_softc *sc) 2438{ 2439 struct ieee80211com *ic = &sc->sc_ic; 2440 uint8_t slottime; 2441 uint16_t sifs, pifs, difs, eifs; 2442 uint32_t tmp; 2443 2444 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 2445 2446 /* define the MAC slot boundaries */ 2447 sifs = RAL_SIFS - RT2560_RXTX_TURNAROUND; 2448 pifs = sifs + slottime; 2449 difs = sifs + 2 * slottime; 2450 eifs = (ic->ic_curmode == IEEE80211_MODE_11B) ? 364 : 60; 2451 2452 tmp = RAL_READ(sc, RT2560_CSR11); 2453 tmp = (tmp & ~0x1f00) | slottime << 8; 2454 RAL_WRITE(sc, RT2560_CSR11, tmp); 2455 2456 tmp = pifs << 16 | sifs; 2457 RAL_WRITE(sc, RT2560_CSR18, tmp); 2458 2459 tmp = eifs << 16 | difs; 2460 RAL_WRITE(sc, RT2560_CSR19, tmp); 2461 2462 DPRINTF(("setting slottime to %uus\n", slottime)); 2463} 2464 2465void 2466rt2560_set_basicrates(struct rt2560_softc *sc) 2467{ 2468 struct ieee80211com *ic = &sc->sc_ic; 2469 2470 /* update basic rate set */ 2471 if (ic->ic_curmode == IEEE80211_MODE_11B) { 2472 /* 11b basic rates: 1, 2Mbps */ 2473 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x3); 2474 } else if (IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan)) { 2475 /* 11a basic rates: 6, 12, 24Mbps */ 2476 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x150); 2477 } else { 2478 /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */ 2479 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x15f); 2480 } 2481} 2482 2483void 2484rt2560_update_led(struct rt2560_softc *sc, int led1, int led2) 2485{ 2486 uint32_t tmp; 2487 2488 /* set ON period to 70ms and OFF period to 30ms */ 2489 tmp = led1 << 16 | led2 << 17 | 70 << 8 | 30; 2490 RAL_WRITE(sc, RT2560_LEDCSR, tmp); 2491} 2492 2493void 2494rt2560_set_bssid(struct rt2560_softc *sc, uint8_t *bssid) 2495{ 2496 uint32_t tmp; 2497 2498 tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24; 2499 RAL_WRITE(sc, RT2560_CSR5, tmp); 2500 2501 tmp = bssid[4] | bssid[5] << 8; 2502 RAL_WRITE(sc, RT2560_CSR6, tmp); 2503 2504 DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid))); 2505} 2506 2507void 2508rt2560_set_macaddr(struct rt2560_softc *sc, uint8_t *addr) 2509{ 2510 uint32_t tmp; 2511 2512 tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24; 2513 RAL_WRITE(sc, RT2560_CSR3, tmp); 2514 2515 tmp = addr[4] | addr[5] << 8; 2516 RAL_WRITE(sc, RT2560_CSR4, tmp); 2517 2518 DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr))); 2519} 2520 2521void 2522rt2560_get_macaddr(struct rt2560_softc *sc, uint8_t *addr) 2523{ 2524 uint32_t tmp; 2525 2526 tmp = RAL_READ(sc, RT2560_CSR3); 2527 addr[0] = tmp & 0xff; 2528 addr[1] = (tmp >> 8) & 0xff; 2529 addr[2] = (tmp >> 16) & 0xff; 2530 addr[3] = (tmp >> 24); 2531 2532 tmp = RAL_READ(sc, RT2560_CSR4); 2533 addr[4] = tmp & 0xff; 2534 addr[5] = (tmp >> 8) & 0xff; 2535} 2536 2537void 2538rt2560_update_promisc(struct rt2560_softc *sc) 2539{ 2540 struct ifnet *ifp = &sc->sc_ic.ic_if; 2541 uint32_t tmp; 2542 2543 tmp = RAL_READ(sc, RT2560_RXCSR0); 2544 2545 tmp &= ~RT2560_DROP_NOT_TO_ME; 2546 if (!(ifp->if_flags & IFF_PROMISC)) 2547 tmp |= RT2560_DROP_NOT_TO_ME; 2548 2549 RAL_WRITE(sc, RT2560_RXCSR0, tmp); 2550 2551 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? 2552 "entering" : "leaving")); 2553} 2554 2555void 2556rt2560_set_txantenna(struct rt2560_softc *sc, int antenna) 2557{ 2558 uint32_t tmp; 2559 uint8_t tx; 2560 2561 tx = rt2560_bbp_read(sc, RT2560_BBP_TX) & ~RT2560_BBP_ANTMASK; 2562 if (antenna == 1) 2563 tx |= RT2560_BBP_ANTA; 2564 else if (antenna == 2) 2565 tx |= RT2560_BBP_ANTB; 2566 else 2567 tx |= RT2560_BBP_DIVERSITY; 2568 2569 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */ 2570 if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526 || 2571 sc->rf_rev == RT2560_RF_5222) 2572 tx |= RT2560_BBP_FLIPIQ; 2573 2574 rt2560_bbp_write(sc, RT2560_BBP_TX, tx); 2575 2576 /* update values for CCK and OFDM in BBPCSR1 */ 2577 tmp = RAL_READ(sc, RT2560_BBPCSR1) & ~0x00070007; 2578 tmp |= (tx & 0x7) << 16 | (tx & 0x7); 2579 RAL_WRITE(sc, RT2560_BBPCSR1, tmp); 2580} 2581 2582void 2583rt2560_set_rxantenna(struct rt2560_softc *sc, int antenna) 2584{ 2585 uint8_t rx; 2586 2587 rx = rt2560_bbp_read(sc, RT2560_BBP_RX) & ~RT2560_BBP_ANTMASK; 2588 if (antenna == 1) 2589 rx |= RT2560_BBP_ANTA; 2590 else if (antenna == 2) 2591 rx |= RT2560_BBP_ANTB; 2592 else 2593 rx |= RT2560_BBP_DIVERSITY; 2594 2595 /* need to force no I/Q flip for RF 2525e and 2526 */ 2596 if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526) 2597 rx &= ~RT2560_BBP_FLIPIQ; 2598 2599 rt2560_bbp_write(sc, RT2560_BBP_RX, rx); 2600} 2601 2602const char * 2603rt2560_get_rf(int rev) 2604{ 2605 switch (rev) { 2606 case RT2560_RF_2522: return "RT2522"; 2607 case RT2560_RF_2523: return "RT2523"; 2608 case RT2560_RF_2524: return "RT2524"; 2609 case RT2560_RF_2525: return "RT2525"; 2610 case RT2560_RF_2525E: return "RT2525e"; 2611 case RT2560_RF_2526: return "RT2526"; 2612 case RT2560_RF_5222: return "RT5222"; 2613 default: return "unknown"; 2614 } 2615} 2616 2617void 2618rt2560_read_eeprom(struct rt2560_softc *sc) 2619{ 2620 uint16_t val; 2621 int i; 2622 2623 val = rt2560_eeprom_read(sc, RT2560_EEPROM_CONFIG0); 2624 sc->rf_rev = (val >> 11) & 0x1f; 2625 sc->hw_radio = (val >> 10) & 0x1; 2626 sc->led_mode = (val >> 6) & 0x7; 2627 sc->rx_ant = (val >> 4) & 0x3; 2628 sc->tx_ant = (val >> 2) & 0x3; 2629 sc->nb_ant = val & 0x3; 2630 2631 /* read default values for BBP registers */ 2632 for (i = 0; i < 16; i++) { 2633 val = rt2560_eeprom_read(sc, RT2560_EEPROM_BBP_BASE + i); 2634 sc->bbp_prom[i].reg = val >> 8; 2635 sc->bbp_prom[i].val = val & 0xff; 2636 } 2637 2638 /* read Tx power for all b/g channels */ 2639 for (i = 0; i < 14 / 2; i++) { 2640 val = rt2560_eeprom_read(sc, RT2560_EEPROM_TXPOWER + i); 2641 sc->txpow[i * 2] = val >> 8; 2642 sc->txpow[i * 2 + 1] = val & 0xff; 2643 } 2644} 2645 2646int 2647rt2560_bbp_init(struct rt2560_softc *sc) 2648{ 2649#define N(a) (sizeof (a) / sizeof ((a)[0])) 2650 int i, ntries; 2651 2652 /* wait for BBP to be ready */ 2653 for (ntries = 0; ntries < 100; ntries++) { 2654 if (rt2560_bbp_read(sc, RT2560_BBP_VERSION) != 0) 2655 break; 2656 DELAY(1); 2657 } 2658 if (ntries == 100) { 2659 printf("%s: timeout waiting for BBP\n", sc->sc_dev.dv_xname); 2660 return EIO; 2661 } 2662 2663 /* initialize BBP registers to default values */ 2664 for (i = 0; i < N(rt2560_def_bbp); i++) { 2665 rt2560_bbp_write(sc, rt2560_def_bbp[i].reg, 2666 rt2560_def_bbp[i].val); 2667 } 2668#if 0 2669 /* initialize BBP registers to values stored in EEPROM */ 2670 for (i = 0; i < 16; i++) { 2671 if (sc->bbp_prom[i].reg == 0xff) 2672 continue; 2673 rt2560_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 2674 } 2675#endif 2676 2677 return 0; 2678#undef N 2679} 2680 2681int 2682rt2560_init(struct ifnet *ifp) 2683{ 2684#define N(a) (sizeof (a) / sizeof ((a)[0])) 2685 struct rt2560_softc *sc = ifp->if_softc; 2686 struct ieee80211com *ic = &sc->sc_ic; 2687 uint32_t tmp; 2688 int i; 2689 2690 /* for CardBus, power on the socket */ 2691 if (!(sc->sc_flags & RT2560_ENABLED)) { 2692 if (sc->sc_enable != NULL && (*sc->sc_enable)(sc) != 0) { 2693 printf("%s: could not enable device\n"); 2694 return EIO; 2695 } 2696 sc->sc_flags |= RT2560_ENABLED; 2697 } 2698 2699 rt2560_stop(ifp, 0); 2700 2701 /* setup tx rings */ 2702 tmp = RT2560_PRIO_RING_COUNT << 24 | 2703 RT2560_ATIM_RING_COUNT << 16 | 2704 RT2560_TX_RING_COUNT << 8 | 2705 RT2560_TX_DESC_SIZE; 2706 2707 /* rings _must_ be initialized in this _exact_ order! */ 2708 RAL_WRITE(sc, RT2560_TXCSR2, tmp); 2709 RAL_WRITE(sc, RT2560_TXCSR3, sc->txq.physaddr); 2710 RAL_WRITE(sc, RT2560_TXCSR5, sc->prioq.physaddr); 2711 RAL_WRITE(sc, RT2560_TXCSR4, sc->atimq.physaddr); 2712 RAL_WRITE(sc, RT2560_TXCSR6, sc->bcnq.physaddr); 2713 2714 /* setup rx ring */ 2715 tmp = RT2560_RX_RING_COUNT << 8 | RT2560_RX_DESC_SIZE; 2716 2717 RAL_WRITE(sc, RT2560_RXCSR1, tmp); 2718 RAL_WRITE(sc, RT2560_RXCSR2, sc->rxq.physaddr); 2719 2720 /* initialize MAC registers to default values */ 2721 for (i = 0; i < N(rt2560_def_mac); i++) 2722 RAL_WRITE(sc, rt2560_def_mac[i].reg, rt2560_def_mac[i].val); 2723 2724 IEEE80211_ADDR_COPY(ic->ic_myaddr, LLADDR(ifp->if_sadl)); 2725 rt2560_set_macaddr(sc, ic->ic_myaddr); 2726 2727 /* set basic rate set (will be updated later) */ 2728 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x153); 2729 2730 rt2560_set_txantenna(sc, 1); 2731 rt2560_set_rxantenna(sc, 1); 2732 rt2560_update_slot(sc); 2733 rt2560_update_plcp(sc); 2734 rt2560_update_led(sc, 0, 0); 2735 2736 RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC); 2737 RAL_WRITE(sc, RT2560_CSR1, RT2560_HOST_READY); 2738 2739 if (rt2560_bbp_init(sc) != 0) { 2740 rt2560_stop(ifp, 1); 2741 return EIO; 2742 } 2743 2744 /* set default BSS channel */ 2745 ic->ic_bss->ni_chan = ic->ic_ibss_chan; 2746 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 2747 2748 /* kick Rx */ 2749 tmp = RT2560_DROP_PHY_ERROR | RT2560_DROP_CRC_ERROR; 2750 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2751 tmp |= RT2560_DROP_CTL | RT2560_DROP_VERSION_ERROR; 2752 if (ic->ic_opmode != IEEE80211_M_HOSTAP) 2753 tmp |= RT2560_DROP_TODS; 2754 if (!(ifp->if_flags & IFF_PROMISC)) 2755 tmp |= RT2560_DROP_NOT_TO_ME; 2756 } 2757 RAL_WRITE(sc, RT2560_RXCSR0, tmp); 2758 2759 /* clear old FCS and Rx FIFO errors */ 2760 RAL_READ(sc, RT2560_CNT0); 2761 RAL_READ(sc, RT2560_CNT4); 2762 2763 /* clear any pending interrupts */ 2764 RAL_WRITE(sc, RT2560_CSR7, 0xffffffff); 2765 2766 /* enable interrupts */ 2767 RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK); 2768 2769 ifp->if_flags &= ~IFF_OACTIVE; 2770 ifp->if_flags |= IFF_RUNNING; 2771 2772 if (ic->ic_opmode == IEEE80211_M_MONITOR) 2773 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 2774 else 2775 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 2776 2777 return 0; 2778#undef N 2779} 2780 2781void 2782rt2560_stop(struct ifnet *ifp, int disable) 2783{ 2784 struct rt2560_softc *sc = ifp->if_softc; 2785 struct ieee80211com *ic = &sc->sc_ic; 2786 2787 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 2788 2789 sc->sc_tx_timer = 0; 2790 ifp->if_timer = 0; 2791 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 2792 2793 /* abort Tx */ 2794 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_ABORT_TX); 2795 2796 /* disable Rx */ 2797 RAL_WRITE(sc, RT2560_RXCSR0, RT2560_DISABLE_RX); 2798 2799 /* reset ASIC (and thus, BBP) */ 2800 RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC); 2801 RAL_WRITE(sc, RT2560_CSR1, 0); 2802 2803 /* disable interrupts */ 2804 RAL_WRITE(sc, RT2560_CSR8, 0xffffffff); 2805 2806 /* reset Tx and Rx rings */ 2807 rt2560_reset_tx_ring(sc, &sc->txq); 2808 rt2560_reset_tx_ring(sc, &sc->atimq); 2809 rt2560_reset_tx_ring(sc, &sc->prioq); 2810 rt2560_reset_tx_ring(sc, &sc->bcnq); 2811 rt2560_reset_rx_ring(sc, &sc->rxq); 2812 2813 /* for CardBus, power down the socket */ 2814 if (disable && sc->sc_disable != NULL) { 2815 if (sc->sc_flags & RT2560_ENABLED) { 2816 (*sc->sc_disable)(sc); 2817 sc->sc_flags &= ~RT2560_ENABLED; 2818 } 2819 } 2820} 2821 2822struct cfdriver ral_cd = { 2823 0, "ral", DV_IFNET 2824}; 2825