rt2560.c revision 1.73
1/* $OpenBSD: rt2560.c,v 1.73 2015/10/25 12:48:46 mpi Exp $ */ 2 3/*- 4 * Copyright (c) 2005, 2006 5 * Damien Bergamini <damien.bergamini@free.fr> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20/*- 21 * Ralink Technology RT2560 chipset driver 22 * http://www.ralinktech.com/ 23 */ 24 25#include "bpfilter.h" 26 27#include <sys/param.h> 28#include <sys/sockio.h> 29#include <sys/mbuf.h> 30#include <sys/kernel.h> 31#include <sys/socket.h> 32#include <sys/systm.h> 33#include <sys/malloc.h> 34#include <sys/timeout.h> 35#include <sys/conf.h> 36#include <sys/device.h> 37#include <sys/endian.h> 38 39#include <machine/bus.h> 40#include <machine/intr.h> 41 42#if NBPFILTER > 0 43#include <net/bpf.h> 44#endif 45#include <net/if.h> 46#include <net/if_dl.h> 47#include <net/if_media.h> 48#include <net/if_types.h> 49 50#include <netinet/in.h> 51#include <netinet/if_ether.h> 52 53#include <net80211/ieee80211_var.h> 54#include <net80211/ieee80211_amrr.h> 55#include <net80211/ieee80211_radiotap.h> 56 57#include <dev/ic/rt2560reg.h> 58#include <dev/ic/rt2560var.h> 59 60#ifdef RAL_DEBUG 61#define DPRINTF(x) do { if (rt2560_debug > 0) printf x; } while (0) 62#define DPRINTFN(n, x) do { if (rt2560_debug >= (n)) printf x; } while (0) 63int rt2560_debug = 1; 64#else 65#define DPRINTF(x) 66#define DPRINTFN(n, x) 67#endif 68 69int rt2560_alloc_tx_ring(struct rt2560_softc *, 70 struct rt2560_tx_ring *, int); 71void rt2560_reset_tx_ring(struct rt2560_softc *, 72 struct rt2560_tx_ring *); 73void rt2560_free_tx_ring(struct rt2560_softc *, 74 struct rt2560_tx_ring *); 75int rt2560_alloc_rx_ring(struct rt2560_softc *, 76 struct rt2560_rx_ring *, int); 77void rt2560_reset_rx_ring(struct rt2560_softc *, 78 struct rt2560_rx_ring *); 79void rt2560_free_rx_ring(struct rt2560_softc *, 80 struct rt2560_rx_ring *); 81struct ieee80211_node *rt2560_node_alloc(struct ieee80211com *); 82int rt2560_media_change(struct ifnet *); 83void rt2560_next_scan(void *); 84void rt2560_iter_func(void *, struct ieee80211_node *); 85void rt2560_amrr_timeout(void *); 86void rt2560_newassoc(struct ieee80211com *, struct ieee80211_node *, 87 int); 88int rt2560_newstate(struct ieee80211com *, enum ieee80211_state, 89 int); 90uint16_t rt2560_eeprom_read(struct rt2560_softc *, uint8_t); 91void rt2560_encryption_intr(struct rt2560_softc *); 92void rt2560_tx_intr(struct rt2560_softc *); 93void rt2560_prio_intr(struct rt2560_softc *); 94void rt2560_decryption_intr(struct rt2560_softc *); 95void rt2560_rx_intr(struct rt2560_softc *); 96#ifndef IEEE80211_STA_ONLY 97void rt2560_beacon_expire(struct rt2560_softc *); 98#endif 99void rt2560_wakeup_expire(struct rt2560_softc *); 100#if NBPFILTER > 0 101uint8_t rt2560_rxrate(const struct rt2560_rx_desc *); 102#endif 103int rt2560_ack_rate(struct ieee80211com *, int); 104uint16_t rt2560_txtime(int, int, uint32_t); 105uint8_t rt2560_plcp_signal(int); 106void rt2560_setup_tx_desc(struct rt2560_softc *, 107 struct rt2560_tx_desc *, uint32_t, int, int, int, 108 bus_addr_t); 109#ifndef IEEE80211_STA_ONLY 110int rt2560_tx_bcn(struct rt2560_softc *, struct mbuf *, 111 struct ieee80211_node *); 112#endif 113int rt2560_tx_mgt(struct rt2560_softc *, struct mbuf *, 114 struct ieee80211_node *); 115int rt2560_tx_data(struct rt2560_softc *, struct mbuf *, 116 struct ieee80211_node *); 117void rt2560_start(struct ifnet *); 118void rt2560_watchdog(struct ifnet *); 119int rt2560_ioctl(struct ifnet *, u_long, caddr_t); 120void rt2560_bbp_write(struct rt2560_softc *, uint8_t, uint8_t); 121uint8_t rt2560_bbp_read(struct rt2560_softc *, uint8_t); 122void rt2560_rf_write(struct rt2560_softc *, uint8_t, uint32_t); 123void rt2560_set_chan(struct rt2560_softc *, 124 struct ieee80211_channel *); 125void rt2560_disable_rf_tune(struct rt2560_softc *); 126void rt2560_enable_tsf_sync(struct rt2560_softc *); 127void rt2560_update_plcp(struct rt2560_softc *); 128void rt2560_updateslot(struct ieee80211com *); 129void rt2560_set_slottime(struct rt2560_softc *); 130void rt2560_set_basicrates(struct rt2560_softc *); 131void rt2560_update_led(struct rt2560_softc *, int, int); 132void rt2560_set_bssid(struct rt2560_softc *, uint8_t *); 133void rt2560_set_macaddr(struct rt2560_softc *, uint8_t *); 134void rt2560_get_macaddr(struct rt2560_softc *, uint8_t *); 135void rt2560_update_promisc(struct rt2560_softc *); 136void rt2560_set_txantenna(struct rt2560_softc *, int); 137void rt2560_set_rxantenna(struct rt2560_softc *, int); 138const char *rt2560_get_rf(int); 139void rt2560_read_eeprom(struct rt2560_softc *); 140int rt2560_bbp_init(struct rt2560_softc *); 141int rt2560_init(struct ifnet *); 142void rt2560_stop(struct ifnet *, int); 143 144static const struct { 145 uint32_t reg; 146 uint32_t val; 147} rt2560_def_mac[] = { 148 RT2560_DEF_MAC 149}; 150 151static const struct { 152 uint8_t reg; 153 uint8_t val; 154} rt2560_def_bbp[] = { 155 RT2560_DEF_BBP 156}; 157 158static const uint32_t rt2560_rf2522_r2[] = RT2560_RF2522_R2; 159static const uint32_t rt2560_rf2523_r2[] = RT2560_RF2523_R2; 160static const uint32_t rt2560_rf2524_r2[] = RT2560_RF2524_R2; 161static const uint32_t rt2560_rf2525_r2[] = RT2560_RF2525_R2; 162static const uint32_t rt2560_rf2525_hi_r2[] = RT2560_RF2525_HI_R2; 163static const uint32_t rt2560_rf2525e_r2[] = RT2560_RF2525E_R2; 164static const uint32_t rt2560_rf2526_r2[] = RT2560_RF2526_R2; 165static const uint32_t rt2560_rf2526_hi_r2[] = RT2560_RF2526_HI_R2; 166 167int 168rt2560_attach(void *xsc, int id) 169{ 170 struct rt2560_softc *sc = xsc; 171 struct ieee80211com *ic = &sc->sc_ic; 172 struct ifnet *ifp = &ic->ic_if; 173 int error, i; 174 175 sc->amrr.amrr_min_success_threshold = 1; 176 sc->amrr.amrr_max_success_threshold = 15; 177 timeout_set(&sc->amrr_to, rt2560_amrr_timeout, sc); 178 timeout_set(&sc->scan_to, rt2560_next_scan, sc); 179 180 /* retrieve RT2560 rev. no */ 181 sc->asic_rev = RAL_READ(sc, RT2560_CSR0); 182 183 /* retrieve MAC address */ 184 rt2560_get_macaddr(sc, ic->ic_myaddr); 185 printf(", address %s\n", ether_sprintf(ic->ic_myaddr)); 186 187 /* retrieve RF rev. no and various other things from EEPROM */ 188 rt2560_read_eeprom(sc); 189 190 printf("%s: MAC/BBP RT2560 (rev 0x%02x), RF %s\n", sc->sc_dev.dv_xname, 191 sc->asic_rev, rt2560_get_rf(sc->rf_rev)); 192 193 /* 194 * Allocate Tx and Rx rings. 195 */ 196 error = rt2560_alloc_tx_ring(sc, &sc->txq, RT2560_TX_RING_COUNT); 197 if (error != 0) { 198 printf("%s: could not allocate Tx ring\n", 199 sc->sc_dev.dv_xname); 200 goto fail1; 201 } 202 error = rt2560_alloc_tx_ring(sc, &sc->atimq, RT2560_ATIM_RING_COUNT); 203 if (error != 0) { 204 printf("%s: could not allocate ATIM ring\n", 205 sc->sc_dev.dv_xname); 206 goto fail2; 207 } 208 error = rt2560_alloc_tx_ring(sc, &sc->prioq, RT2560_PRIO_RING_COUNT); 209 if (error != 0) { 210 printf("%s: could not allocate Prio ring\n", 211 sc->sc_dev.dv_xname); 212 goto fail3; 213 } 214 error = rt2560_alloc_tx_ring(sc, &sc->bcnq, RT2560_BEACON_RING_COUNT); 215 if (error != 0) { 216 printf("%s: could not allocate Beacon ring\n", 217 sc->sc_dev.dv_xname); 218 goto fail4; 219 } 220 error = rt2560_alloc_rx_ring(sc, &sc->rxq, RT2560_RX_RING_COUNT); 221 if (error != 0) { 222 printf("%s: could not allocate Rx ring\n", 223 sc->sc_dev.dv_xname); 224 goto fail5; 225 } 226 227 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 228 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 229 ic->ic_state = IEEE80211_S_INIT; 230 231 /* set device capabilities */ 232 ic->ic_caps = 233 IEEE80211_C_MONITOR | /* monitor mode supported */ 234#ifndef IEEE80211_STA_ONLY 235 IEEE80211_C_IBSS | /* IBSS mode supported */ 236 IEEE80211_C_HOSTAP | /* HostAp mode supported */ 237#endif 238 IEEE80211_C_TXPMGT | /* tx power management */ 239 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 240 IEEE80211_C_SHSLOT | /* short slot time supported */ 241 IEEE80211_C_WEP | /* s/w WEP */ 242 IEEE80211_C_RSN; /* WPA/RSN */ 243 244 /* set supported .11b and .11g rates */ 245 ic->ic_sup_rates[IEEE80211_MODE_11B] = ieee80211_std_rateset_11b; 246 ic->ic_sup_rates[IEEE80211_MODE_11G] = ieee80211_std_rateset_11g; 247 248 /* set supported .11b and .11g channels (1 through 14) */ 249 for (i = 1; i <= 14; i++) { 250 ic->ic_channels[i].ic_freq = 251 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 252 ic->ic_channels[i].ic_flags = 253 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 254 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 255 } 256 257 ifp->if_softc = sc; 258 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 259 ifp->if_ioctl = rt2560_ioctl; 260 ifp->if_start = rt2560_start; 261 ifp->if_watchdog = rt2560_watchdog; 262 IFQ_SET_READY(&ifp->if_snd); 263 memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ); 264 265 if_attach(ifp); 266 ieee80211_ifattach(ifp); 267 ic->ic_node_alloc = rt2560_node_alloc; 268 ic->ic_newassoc = rt2560_newassoc; 269 ic->ic_updateslot = rt2560_updateslot; 270 271 /* override state transition machine */ 272 sc->sc_newstate = ic->ic_newstate; 273 ic->ic_newstate = rt2560_newstate; 274 ieee80211_media_init(ifp, rt2560_media_change, ieee80211_media_status); 275 276#if NBPFILTER > 0 277 bpfattach(&sc->sc_drvbpf, ifp, DLT_IEEE802_11_RADIO, 278 sizeof (struct ieee80211_frame) + 64); 279 280 sc->sc_rxtap_len = sizeof sc->sc_rxtapu; 281 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 282 sc->sc_rxtap.wr_ihdr.it_present = htole32(RT2560_RX_RADIOTAP_PRESENT); 283 284 sc->sc_txtap_len = sizeof sc->sc_txtapu; 285 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 286 sc->sc_txtap.wt_ihdr.it_present = htole32(RT2560_TX_RADIOTAP_PRESENT); 287#endif 288 return 0; 289 290fail5: rt2560_free_tx_ring(sc, &sc->bcnq); 291fail4: rt2560_free_tx_ring(sc, &sc->prioq); 292fail3: rt2560_free_tx_ring(sc, &sc->atimq); 293fail2: rt2560_free_tx_ring(sc, &sc->txq); 294fail1: return ENXIO; 295} 296 297int 298rt2560_detach(void *xsc) 299{ 300 struct rt2560_softc *sc = xsc; 301 struct ifnet *ifp = &sc->sc_ic.ic_if; 302 303 timeout_del(&sc->scan_to); 304 timeout_del(&sc->amrr_to); 305 306 ieee80211_ifdetach(ifp); /* free all nodes */ 307 if_detach(ifp); 308 309 rt2560_free_tx_ring(sc, &sc->txq); 310 rt2560_free_tx_ring(sc, &sc->atimq); 311 rt2560_free_tx_ring(sc, &sc->prioq); 312 rt2560_free_tx_ring(sc, &sc->bcnq); 313 rt2560_free_rx_ring(sc, &sc->rxq); 314 315 return 0; 316} 317 318void 319rt2560_suspend(void *xsc) 320{ 321 struct rt2560_softc *sc = xsc; 322 struct ifnet *ifp = &sc->sc_ic.ic_if; 323 324 if (ifp->if_flags & IFF_RUNNING) 325 rt2560_stop(ifp, 1); 326} 327 328void 329rt2560_wakeup(void *xsc) 330{ 331 struct rt2560_softc *sc = xsc; 332 struct ifnet *ifp = &sc->sc_ic.ic_if; 333 334 if (ifp->if_flags & IFF_UP) 335 rt2560_init(ifp); 336} 337 338int 339rt2560_alloc_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring, 340 int count) 341{ 342 int i, nsegs, error; 343 344 ring->count = count; 345 ring->queued = 0; 346 ring->cur = ring->next = 0; 347 ring->cur_encrypt = ring->next_encrypt = 0; 348 349 error = bus_dmamap_create(sc->sc_dmat, count * RT2560_TX_DESC_SIZE, 1, 350 count * RT2560_TX_DESC_SIZE, 0, BUS_DMA_NOWAIT, &ring->map); 351 if (error != 0) { 352 printf("%s: could not create desc DMA map\n", 353 sc->sc_dev.dv_xname); 354 goto fail; 355 } 356 357 error = bus_dmamem_alloc(sc->sc_dmat, count * RT2560_TX_DESC_SIZE, 358 PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT | BUS_DMA_ZERO); 359 if (error != 0) { 360 printf("%s: could not allocate DMA memory\n", 361 sc->sc_dev.dv_xname); 362 goto fail; 363 } 364 365 error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs, 366 count * RT2560_TX_DESC_SIZE, (caddr_t *)&ring->desc, 367 BUS_DMA_NOWAIT); 368 if (error != 0) { 369 printf("%s: can't map desc DMA memory\n", 370 sc->sc_dev.dv_xname); 371 goto fail; 372 } 373 374 error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc, 375 count * RT2560_TX_DESC_SIZE, NULL, BUS_DMA_NOWAIT); 376 if (error != 0) { 377 printf("%s: could not load desc DMA map\n", 378 sc->sc_dev.dv_xname); 379 goto fail; 380 } 381 382 ring->physaddr = ring->map->dm_segs->ds_addr; 383 384 ring->data = mallocarray(count, sizeof (struct rt2560_tx_data), 385 M_DEVBUF, M_NOWAIT | M_ZERO); 386 if (ring->data == NULL) { 387 printf("%s: could not allocate soft data\n", 388 sc->sc_dev.dv_xname); 389 error = ENOMEM; 390 goto fail; 391 } 392 393 for (i = 0; i < count; i++) { 394 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 395 RT2560_MAX_SCATTER, MCLBYTES, 0, BUS_DMA_NOWAIT, 396 &ring->data[i].map); 397 if (error != 0) { 398 printf("%s: could not create DMA map\n", 399 sc->sc_dev.dv_xname); 400 goto fail; 401 } 402 } 403 404 return 0; 405 406fail: rt2560_free_tx_ring(sc, ring); 407 return error; 408} 409 410void 411rt2560_reset_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring) 412{ 413 int i; 414 415 for (i = 0; i < ring->count; i++) { 416 struct rt2560_tx_desc *desc = &ring->desc[i]; 417 struct rt2560_tx_data *data = &ring->data[i]; 418 419 if (data->m != NULL) { 420 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 421 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 422 bus_dmamap_unload(sc->sc_dmat, data->map); 423 m_freem(data->m); 424 data->m = NULL; 425 } 426 427 /* 428 * The node has already been freed at that point so don't call 429 * ieee80211_release_node() here. 430 */ 431 data->ni = NULL; 432 433 desc->flags = 0; 434 } 435 436 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 437 BUS_DMASYNC_PREWRITE); 438 439 ring->queued = 0; 440 ring->cur = ring->next = 0; 441 ring->cur_encrypt = ring->next_encrypt = 0; 442} 443 444void 445rt2560_free_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring) 446{ 447 int i; 448 449 if (ring->desc != NULL) { 450 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, 451 ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 452 bus_dmamap_unload(sc->sc_dmat, ring->map); 453 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)ring->desc, 454 ring->count * RT2560_TX_DESC_SIZE); 455 bus_dmamem_free(sc->sc_dmat, &ring->seg, 1); 456 } 457 458 if (ring->data != NULL) { 459 for (i = 0; i < ring->count; i++) { 460 struct rt2560_tx_data *data = &ring->data[i]; 461 462 if (data->m != NULL) { 463 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 464 data->map->dm_mapsize, 465 BUS_DMASYNC_POSTWRITE); 466 bus_dmamap_unload(sc->sc_dmat, data->map); 467 m_freem(data->m); 468 } 469 470 /* 471 * The node has already been freed at that point so 472 * don't call ieee80211_release_node() here. 473 */ 474 data->ni = NULL; 475 476 if (data->map != NULL) 477 bus_dmamap_destroy(sc->sc_dmat, data->map); 478 } 479 free(ring->data, M_DEVBUF, ring->count * sizeof *ring->data); 480 } 481} 482 483int 484rt2560_alloc_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring, 485 int count) 486{ 487 int i, nsegs, error; 488 489 ring->count = count; 490 ring->cur = ring->next = 0; 491 ring->cur_decrypt = 0; 492 493 error = bus_dmamap_create(sc->sc_dmat, count * RT2560_RX_DESC_SIZE, 1, 494 count * RT2560_RX_DESC_SIZE, 0, BUS_DMA_NOWAIT, &ring->map); 495 if (error != 0) { 496 printf("%s: could not create desc DMA map\n", 497 sc->sc_dev.dv_xname); 498 goto fail; 499 } 500 501 error = bus_dmamem_alloc(sc->sc_dmat, count * RT2560_RX_DESC_SIZE, 502 PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT | BUS_DMA_ZERO); 503 if (error != 0) { 504 printf("%s: could not allocate DMA memory\n", 505 sc->sc_dev.dv_xname); 506 goto fail; 507 } 508 509 error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs, 510 count * RT2560_RX_DESC_SIZE, (caddr_t *)&ring->desc, 511 BUS_DMA_NOWAIT); 512 if (error != 0) { 513 printf("%s: can't map desc DMA memory\n", 514 sc->sc_dev.dv_xname); 515 goto fail; 516 } 517 518 error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc, 519 count * RT2560_RX_DESC_SIZE, NULL, BUS_DMA_NOWAIT); 520 if (error != 0) { 521 printf("%s: could not load desc DMA map\n", 522 sc->sc_dev.dv_xname); 523 goto fail; 524 } 525 526 ring->physaddr = ring->map->dm_segs->ds_addr; 527 528 ring->data = mallocarray(count, sizeof (struct rt2560_rx_data), 529 M_DEVBUF, M_NOWAIT | M_ZERO); 530 if (ring->data == NULL) { 531 printf("%s: could not allocate soft data\n", 532 sc->sc_dev.dv_xname); 533 error = ENOMEM; 534 goto fail; 535 } 536 537 /* 538 * Pre-allocate Rx buffers and populate Rx ring. 539 */ 540 for (i = 0; i < count; i++) { 541 struct rt2560_rx_desc *desc = &sc->rxq.desc[i]; 542 struct rt2560_rx_data *data = &sc->rxq.data[i]; 543 544 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES, 545 0, BUS_DMA_NOWAIT, &data->map); 546 if (error != 0) { 547 printf("%s: could not create DMA map\n", 548 sc->sc_dev.dv_xname); 549 goto fail; 550 } 551 552 MGETHDR(data->m, M_DONTWAIT, MT_DATA); 553 if (data->m == NULL) { 554 printf("%s: could not allocate rx mbuf\n", 555 sc->sc_dev.dv_xname); 556 error = ENOMEM; 557 goto fail; 558 } 559 MCLGET(data->m, M_DONTWAIT); 560 if (!(data->m->m_flags & M_EXT)) { 561 printf("%s: could not allocate rx mbuf cluster\n", 562 sc->sc_dev.dv_xname); 563 error = ENOMEM; 564 goto fail; 565 } 566 567 error = bus_dmamap_load(sc->sc_dmat, data->map, 568 mtod(data->m, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT); 569 if (error != 0) { 570 printf("%s: could not load rx buf DMA map", 571 sc->sc_dev.dv_xname); 572 goto fail; 573 } 574 575 desc->flags = htole32(RT2560_RX_BUSY); 576 desc->physaddr = htole32(data->map->dm_segs->ds_addr); 577 } 578 579 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 580 BUS_DMASYNC_PREWRITE); 581 582 return 0; 583 584fail: rt2560_free_rx_ring(sc, ring); 585 return error; 586} 587 588void 589rt2560_reset_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring) 590{ 591 int i; 592 593 for (i = 0; i < ring->count; i++) { 594 ring->desc[i].flags = htole32(RT2560_RX_BUSY); 595 ring->data[i].drop = 0; 596 } 597 598 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 599 BUS_DMASYNC_PREWRITE); 600 601 ring->cur = ring->next = 0; 602 ring->cur_decrypt = 0; 603} 604 605void 606rt2560_free_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring) 607{ 608 int i; 609 610 if (ring->desc != NULL) { 611 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, 612 ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 613 bus_dmamap_unload(sc->sc_dmat, ring->map); 614 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)ring->desc, 615 ring->count * RT2560_RX_DESC_SIZE); 616 bus_dmamem_free(sc->sc_dmat, &ring->seg, 1); 617 } 618 619 if (ring->data != NULL) { 620 for (i = 0; i < ring->count; i++) { 621 struct rt2560_rx_data *data = &ring->data[i]; 622 623 if (data->m != NULL) { 624 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 625 data->map->dm_mapsize, 626 BUS_DMASYNC_POSTREAD); 627 bus_dmamap_unload(sc->sc_dmat, data->map); 628 m_freem(data->m); 629 } 630 631 if (data->map != NULL) 632 bus_dmamap_destroy(sc->sc_dmat, data->map); 633 } 634 free(ring->data, M_DEVBUF, ring->count * sizeof *ring->data); 635 } 636} 637 638struct ieee80211_node * 639rt2560_node_alloc(struct ieee80211com *ic) 640{ 641 return malloc(sizeof (struct rt2560_node), M_DEVBUF, 642 M_NOWAIT | M_ZERO); 643} 644 645int 646rt2560_media_change(struct ifnet *ifp) 647{ 648 int error; 649 650 error = ieee80211_media_change(ifp); 651 if (error != ENETRESET) 652 return error; 653 654 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 655 rt2560_init(ifp); 656 657 return 0; 658} 659 660/* 661 * This function is called periodically (every 200ms) during scanning to 662 * switch from one channel to another. 663 */ 664void 665rt2560_next_scan(void *arg) 666{ 667 struct rt2560_softc *sc = arg; 668 struct ieee80211com *ic = &sc->sc_ic; 669 struct ifnet *ifp = &ic->ic_if; 670 int s; 671 672 s = splnet(); 673 if (ic->ic_state == IEEE80211_S_SCAN) 674 ieee80211_next_scan(ifp); 675 splx(s); 676} 677 678/* 679 * This function is called for each neighbor node. 680 */ 681void 682rt2560_iter_func(void *arg, struct ieee80211_node *ni) 683{ 684 struct rt2560_softc *sc = arg; 685 struct rt2560_node *rn = (struct rt2560_node *)ni; 686 687 ieee80211_amrr_choose(&sc->amrr, ni, &rn->amn); 688} 689 690void 691rt2560_amrr_timeout(void *arg) 692{ 693 struct rt2560_softc *sc = arg; 694 struct ieee80211com *ic = &sc->sc_ic; 695 int s; 696 697 s = splnet(); 698 if (ic->ic_opmode == IEEE80211_M_STA) 699 rt2560_iter_func(sc, ic->ic_bss); 700#ifndef IEEE80211_STA_ONLY 701 else 702 ieee80211_iterate_nodes(ic, rt2560_iter_func, sc); 703#endif 704 splx(s); 705 706 timeout_add_msec(&sc->amrr_to, 500); 707} 708 709void 710rt2560_newassoc(struct ieee80211com *ic, struct ieee80211_node *ni, int isnew) 711{ 712 struct rt2560_softc *sc = ic->ic_softc; 713 int i; 714 715 ieee80211_amrr_node_init(&sc->amrr, &((struct rt2560_node *)ni)->amn); 716 717 /* set rate to some reasonable initial value */ 718 for (i = ni->ni_rates.rs_nrates - 1; 719 i > 0 && (ni->ni_rates.rs_rates[i] & IEEE80211_RATE_VAL) > 72; 720 i--); 721 ni->ni_txrate = i; 722} 723 724int 725rt2560_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg) 726{ 727 struct rt2560_softc *sc = ic->ic_if.if_softc; 728 enum ieee80211_state ostate; 729 struct ieee80211_node *ni; 730 int error = 0; 731 732 ostate = ic->ic_state; 733 timeout_del(&sc->scan_to); 734 timeout_del(&sc->amrr_to); 735 736 switch (nstate) { 737 case IEEE80211_S_INIT: 738 if (ostate == IEEE80211_S_RUN) { 739 /* abort TSF synchronization */ 740 RAL_WRITE(sc, RT2560_CSR14, 0); 741 742 /* turn association led off */ 743 rt2560_update_led(sc, 0, 0); 744 } 745 break; 746 747 case IEEE80211_S_SCAN: 748 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 749 timeout_add_msec(&sc->scan_to, 200); 750 break; 751 752 case IEEE80211_S_AUTH: 753 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 754 break; 755 756 case IEEE80211_S_ASSOC: 757 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 758 break; 759 760 case IEEE80211_S_RUN: 761 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 762 763 ni = ic->ic_bss; 764 765 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 766 rt2560_update_plcp(sc); 767 rt2560_set_slottime(sc); 768 rt2560_set_basicrates(sc); 769 rt2560_set_bssid(sc, ni->ni_bssid); 770 } 771 772#ifndef IEEE80211_STA_ONLY 773 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 774 ic->ic_opmode == IEEE80211_M_IBSS) { 775 struct mbuf *m = ieee80211_beacon_alloc(ic, ni); 776 if (m == NULL) { 777 printf("%s: could not allocate beacon\n", 778 sc->sc_dev.dv_xname); 779 error = ENOBUFS; 780 break; 781 } 782 783 error = rt2560_tx_bcn(sc, m, ni); 784 if (error != 0) 785 break; 786 } 787#endif 788 789 /* turn assocation led on */ 790 rt2560_update_led(sc, 1, 0); 791 792 if (ic->ic_opmode == IEEE80211_M_STA) { 793 /* fake a join to init the tx rate */ 794 rt2560_newassoc(ic, ni, 1); 795 } 796 797 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 798 /* start automatic rate control timer */ 799 if (ic->ic_fixed_rate == -1) 800 timeout_add_msec(&sc->amrr_to, 500); 801 802 rt2560_enable_tsf_sync(sc); 803 } 804 break; 805 } 806 807 return (error != 0) ? error : sc->sc_newstate(ic, nstate, arg); 808} 809 810/* 811 * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46 or 812 * 93C66). 813 */ 814uint16_t 815rt2560_eeprom_read(struct rt2560_softc *sc, uint8_t addr) 816{ 817 uint32_t tmp; 818 uint16_t val; 819 int n; 820 821 /* clock C once before the first command */ 822 RT2560_EEPROM_CTL(sc, 0); 823 824 RT2560_EEPROM_CTL(sc, RT2560_S); 825 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 826 RT2560_EEPROM_CTL(sc, RT2560_S); 827 828 /* write start bit (1) */ 829 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D); 830 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C); 831 832 /* write READ opcode (10) */ 833 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D); 834 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C); 835 RT2560_EEPROM_CTL(sc, RT2560_S); 836 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 837 838 /* write address (A5-A0 or A7-A0) */ 839 n = (RAL_READ(sc, RT2560_CSR21) & RT2560_93C46) ? 5 : 7; 840 for (; n >= 0; n--) { 841 RT2560_EEPROM_CTL(sc, RT2560_S | 842 (((addr >> n) & 1) << RT2560_SHIFT_D)); 843 RT2560_EEPROM_CTL(sc, RT2560_S | 844 (((addr >> n) & 1) << RT2560_SHIFT_D) | RT2560_C); 845 } 846 847 RT2560_EEPROM_CTL(sc, RT2560_S); 848 849 /* read data Q15-Q0 */ 850 val = 0; 851 for (n = 15; n >= 0; n--) { 852 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 853 tmp = RAL_READ(sc, RT2560_CSR21); 854 val |= ((tmp & RT2560_Q) >> RT2560_SHIFT_Q) << n; 855 RT2560_EEPROM_CTL(sc, RT2560_S); 856 } 857 858 RT2560_EEPROM_CTL(sc, 0); 859 860 /* clear Chip Select and clock C */ 861 RT2560_EEPROM_CTL(sc, RT2560_S); 862 RT2560_EEPROM_CTL(sc, 0); 863 RT2560_EEPROM_CTL(sc, RT2560_C); 864 865 return val; 866} 867 868/* 869 * Some frames were processed by the hardware cipher engine and are ready for 870 * transmission. 871 */ 872void 873rt2560_encryption_intr(struct rt2560_softc *sc) 874{ 875 int hw; 876 877 /* retrieve last descriptor index processed by cipher engine */ 878 hw = (RAL_READ(sc, RT2560_SECCSR1) - sc->txq.physaddr) / 879 RT2560_TX_DESC_SIZE; 880 881 for (; sc->txq.next_encrypt != hw;) { 882 struct rt2560_tx_desc *desc = 883 &sc->txq.desc[sc->txq.next_encrypt]; 884 885 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 886 sc->txq.next_encrypt * RT2560_TX_DESC_SIZE, 887 RT2560_TX_DESC_SIZE, BUS_DMASYNC_POSTREAD); 888 889 if (letoh32(desc->flags) & 890 (RT2560_TX_BUSY | RT2560_TX_CIPHER_BUSY)) 891 break; 892 893 /* for TKIP, swap eiv field to fix a bug in ASIC */ 894 if ((letoh32(desc->flags) & RT2560_TX_CIPHER_MASK) == 895 RT2560_TX_CIPHER_TKIP) 896 desc->eiv = swap32(desc->eiv); 897 898 /* mark the frame ready for transmission */ 899 desc->flags |= htole32(RT2560_TX_BUSY | RT2560_TX_VALID); 900 901 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 902 sc->txq.next_encrypt * RT2560_TX_DESC_SIZE, 903 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 904 905 DPRINTFN(15, ("encryption done idx=%u\n", 906 sc->txq.next_encrypt)); 907 908 sc->txq.next_encrypt = 909 (sc->txq.next_encrypt + 1) % RT2560_TX_RING_COUNT; 910 } 911 912 /* kick Tx */ 913 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_TX); 914} 915 916void 917rt2560_tx_intr(struct rt2560_softc *sc) 918{ 919 struct ieee80211com *ic = &sc->sc_ic; 920 struct ifnet *ifp = &ic->ic_if; 921 922 for (;;) { 923 struct rt2560_tx_desc *desc = &sc->txq.desc[sc->txq.next]; 924 struct rt2560_tx_data *data = &sc->txq.data[sc->txq.next]; 925 struct rt2560_node *rn; 926 927 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 928 sc->txq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 929 BUS_DMASYNC_POSTREAD); 930 931 if ((letoh32(desc->flags) & RT2560_TX_BUSY) || 932 (letoh32(desc->flags) & RT2560_TX_CIPHER_BUSY) || 933 !(letoh32(desc->flags) & RT2560_TX_VALID)) 934 break; 935 936 rn = (struct rt2560_node *)data->ni; 937 938 switch (letoh32(desc->flags) & RT2560_TX_RESULT_MASK) { 939 case RT2560_TX_SUCCESS: 940 DPRINTFN(10, ("data frame sent successfully\n")); 941 rn->amn.amn_txcnt++; 942 ifp->if_opackets++; 943 break; 944 945 case RT2560_TX_SUCCESS_RETRY: 946 DPRINTFN(9, ("data frame sent after %u retries\n", 947 (letoh32(desc->flags) >> 5) & 0x7)); 948 rn->amn.amn_txcnt++; 949 rn->amn.amn_retrycnt++; 950 ifp->if_opackets++; 951 break; 952 953 case RT2560_TX_FAIL_RETRY: 954 DPRINTFN(9, ("sending data frame failed (too much " 955 "retries)\n")); 956 rn->amn.amn_txcnt++; 957 rn->amn.amn_retrycnt++; 958 ifp->if_oerrors++; 959 break; 960 961 case RT2560_TX_FAIL_INVALID: 962 case RT2560_TX_FAIL_OTHER: 963 default: 964 printf("%s: sending data frame failed 0x%08x\n", 965 sc->sc_dev.dv_xname, letoh32(desc->flags)); 966 ifp->if_oerrors++; 967 } 968 969 /* descriptor is no longer valid */ 970 desc->flags &= ~htole32(RT2560_TX_VALID); 971 972 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 973 sc->txq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 974 BUS_DMASYNC_PREWRITE); 975 976 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 977 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 978 bus_dmamap_unload(sc->sc_dmat, data->map); 979 m_freem(data->m); 980 data->m = NULL; 981 ieee80211_release_node(ic, data->ni); 982 data->ni = NULL; 983 984 DPRINTFN(15, ("tx done idx=%u\n", sc->txq.next)); 985 986 sc->txq.queued--; 987 sc->txq.next = (sc->txq.next + 1) % RT2560_TX_RING_COUNT; 988 } 989 990 if (sc->txq.queued == 0 && sc->prioq.queued == 0) 991 sc->sc_tx_timer = 0; 992 if (sc->txq.queued < RT2560_TX_RING_COUNT - 1) { 993 sc->sc_flags &= ~RT2560_DATA_OACTIVE; 994 if (!(sc->sc_flags & (RT2560_DATA_OACTIVE|RT2560_PRIO_OACTIVE))) 995 ifp->if_flags &= ~IFF_OACTIVE; 996 rt2560_start(ifp); 997 } 998} 999 1000void 1001rt2560_prio_intr(struct rt2560_softc *sc) 1002{ 1003 struct ieee80211com *ic = &sc->sc_ic; 1004 struct ifnet *ifp = &ic->ic_if; 1005 1006 for (;;) { 1007 struct rt2560_tx_desc *desc = &sc->prioq.desc[sc->prioq.next]; 1008 struct rt2560_tx_data *data = &sc->prioq.data[sc->prioq.next]; 1009 1010 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1011 sc->prioq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1012 BUS_DMASYNC_POSTREAD); 1013 1014 if ((letoh32(desc->flags) & RT2560_TX_BUSY) || 1015 !(letoh32(desc->flags) & RT2560_TX_VALID)) 1016 break; 1017 1018 switch (letoh32(desc->flags) & RT2560_TX_RESULT_MASK) { 1019 case RT2560_TX_SUCCESS: 1020 DPRINTFN(10, ("mgt frame sent successfully\n")); 1021 break; 1022 1023 case RT2560_TX_SUCCESS_RETRY: 1024 DPRINTFN(9, ("mgt frame sent after %u retries\n", 1025 (letoh32(desc->flags) >> 5) & 0x7)); 1026 break; 1027 1028 case RT2560_TX_FAIL_RETRY: 1029 DPRINTFN(9, ("sending mgt frame failed (too much " 1030 "retries)\n")); 1031 break; 1032 1033 case RT2560_TX_FAIL_INVALID: 1034 case RT2560_TX_FAIL_OTHER: 1035 default: 1036 printf("%s: sending mgt frame failed 0x%08x\n", 1037 sc->sc_dev.dv_xname, letoh32(desc->flags)); 1038 } 1039 1040 /* descriptor is no longer valid */ 1041 desc->flags &= ~htole32(RT2560_TX_VALID); 1042 1043 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1044 sc->prioq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1045 BUS_DMASYNC_PREWRITE); 1046 1047 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1048 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 1049 bus_dmamap_unload(sc->sc_dmat, data->map); 1050 m_freem(data->m); 1051 data->m = NULL; 1052 ieee80211_release_node(ic, data->ni); 1053 data->ni = NULL; 1054 1055 DPRINTFN(15, ("prio done idx=%u\n", sc->prioq.next)); 1056 1057 sc->prioq.queued--; 1058 sc->prioq.next = (sc->prioq.next + 1) % RT2560_PRIO_RING_COUNT; 1059 } 1060 1061 if (sc->txq.queued == 0 && sc->prioq.queued == 0) 1062 sc->sc_tx_timer = 0; 1063 if (sc->prioq.queued < RT2560_PRIO_RING_COUNT) { 1064 sc->sc_flags &= ~RT2560_PRIO_OACTIVE; 1065 if (!(sc->sc_flags & (RT2560_DATA_OACTIVE|RT2560_PRIO_OACTIVE))) 1066 ifp->if_flags &= ~IFF_OACTIVE; 1067 rt2560_start(ifp); 1068 } 1069} 1070 1071/* 1072 * Some frames were processed by the hardware cipher engine and are ready for 1073 * transmission to the IEEE802.11 layer. 1074 */ 1075void 1076rt2560_decryption_intr(struct rt2560_softc *sc) 1077{ 1078 struct ieee80211com *ic = &sc->sc_ic; 1079 struct ifnet *ifp = &ic->ic_if; 1080 struct ieee80211_frame *wh; 1081 struct ieee80211_rxinfo rxi; 1082 struct ieee80211_node *ni; 1083 struct mbuf *mnew, *m; 1084 int hw, error; 1085 1086 /* retrieve last decriptor index processed by cipher engine */ 1087 hw = (RAL_READ(sc, RT2560_SECCSR0) - sc->rxq.physaddr) / 1088 RT2560_RX_DESC_SIZE; 1089 1090 for (; sc->rxq.cur_decrypt != hw;) { 1091 struct rt2560_rx_desc *desc = 1092 &sc->rxq.desc[sc->rxq.cur_decrypt]; 1093 struct rt2560_rx_data *data = 1094 &sc->rxq.data[sc->rxq.cur_decrypt]; 1095 1096 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1097 sc->rxq.cur_decrypt * RT2560_TX_DESC_SIZE, 1098 RT2560_TX_DESC_SIZE, BUS_DMASYNC_POSTREAD); 1099 1100 if (letoh32(desc->flags) & 1101 (RT2560_RX_BUSY | RT2560_RX_CIPHER_BUSY)) 1102 break; 1103 1104 if (data->drop) { 1105 ifp->if_ierrors++; 1106 goto skip; 1107 } 1108 1109 if ((letoh32(desc->flags) & RT2560_RX_CIPHER_MASK) != 0 && 1110 (letoh32(desc->flags) & RT2560_RX_ICV_ERROR)) { 1111 ifp->if_ierrors++; 1112 goto skip; 1113 } 1114 1115 /* 1116 * Try to allocate a new mbuf for this ring element and load it 1117 * before processing the current mbuf. If the ring element 1118 * cannot be loaded, drop the received packet and reuse the old 1119 * mbuf. In the unlikely case that the old mbuf can't be 1120 * reloaded either, explicitly panic. 1121 */ 1122 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 1123 if (mnew == NULL) { 1124 ifp->if_ierrors++; 1125 goto skip; 1126 } 1127 MCLGET(mnew, M_DONTWAIT); 1128 if (!(mnew->m_flags & M_EXT)) { 1129 m_freem(mnew); 1130 ifp->if_ierrors++; 1131 goto skip; 1132 } 1133 1134 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1135 data->map->dm_mapsize, BUS_DMASYNC_POSTREAD); 1136 bus_dmamap_unload(sc->sc_dmat, data->map); 1137 1138 error = bus_dmamap_load(sc->sc_dmat, data->map, 1139 mtod(mnew, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT); 1140 if (error != 0) { 1141 m_freem(mnew); 1142 1143 /* try to reload the old mbuf */ 1144 error = bus_dmamap_load(sc->sc_dmat, data->map, 1145 mtod(data->m, void *), MCLBYTES, NULL, 1146 BUS_DMA_NOWAIT); 1147 if (error != 0) { 1148 /* very unlikely that it will fail... */ 1149 panic("%s: could not load old rx mbuf", 1150 sc->sc_dev.dv_xname); 1151 } 1152 /* physical address may have changed */ 1153 desc->physaddr = htole32(data->map->dm_segs->ds_addr); 1154 ifp->if_ierrors++; 1155 goto skip; 1156 } 1157 1158 /* 1159 * New mbuf successfully loaded, update Rx ring and continue 1160 * processing. 1161 */ 1162 m = data->m; 1163 data->m = mnew; 1164 desc->physaddr = htole32(data->map->dm_segs->ds_addr); 1165 1166 /* finalize mbuf */ 1167 m->m_pkthdr.len = m->m_len = 1168 (letoh32(desc->flags) >> 16) & 0xfff; 1169 1170#if NBPFILTER > 0 1171 if (sc->sc_drvbpf != NULL) { 1172 struct mbuf mb; 1173 struct rt2560_rx_radiotap_header *tap = &sc->sc_rxtap; 1174 uint32_t tsf_lo, tsf_hi; 1175 1176 /* get timestamp (low and high 32 bits) */ 1177 tsf_hi = RAL_READ(sc, RT2560_CSR17); 1178 tsf_lo = RAL_READ(sc, RT2560_CSR16); 1179 1180 tap->wr_tsf = 1181 htole64(((uint64_t)tsf_hi << 32) | tsf_lo); 1182 tap->wr_flags = 0; 1183 tap->wr_rate = rt2560_rxrate(desc); 1184 tap->wr_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 1185 tap->wr_chan_flags = 1186 htole16(ic->ic_ibss_chan->ic_flags); 1187 tap->wr_antenna = sc->rx_ant; 1188 tap->wr_antsignal = desc->rssi; 1189 1190 mb.m_data = (caddr_t)tap; 1191 mb.m_len = sc->sc_txtap_len; 1192 mb.m_next = m; 1193 mb.m_nextpkt = NULL; 1194 mb.m_type = 0; 1195 mb.m_flags = 0; 1196 bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_IN); 1197 } 1198#endif 1199 wh = mtod(m, struct ieee80211_frame *); 1200 ni = ieee80211_find_rxnode(ic, wh); 1201 1202 /* send the frame to the 802.11 layer */ 1203 rxi.rxi_flags = 0; 1204 rxi.rxi_rssi = desc->rssi; 1205 rxi.rxi_tstamp = 0; /* unused */ 1206 ieee80211_input(ifp, m, ni, &rxi); 1207 1208 /* node is no longer needed */ 1209 ieee80211_release_node(ic, ni); 1210 1211skip: desc->flags = htole32(RT2560_RX_BUSY); 1212 1213 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1214 sc->rxq.cur_decrypt * RT2560_TX_DESC_SIZE, 1215 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 1216 1217 DPRINTFN(15, ("decryption done idx=%u\n", sc->rxq.cur_decrypt)); 1218 1219 sc->rxq.cur_decrypt = 1220 (sc->rxq.cur_decrypt + 1) % RT2560_RX_RING_COUNT; 1221 } 1222} 1223 1224/* 1225 * Some frames were received. Pass them to the hardware cipher engine before 1226 * sending them to the 802.11 layer. 1227 */ 1228void 1229rt2560_rx_intr(struct rt2560_softc *sc) 1230{ 1231 for (;;) { 1232 struct rt2560_rx_desc *desc = &sc->rxq.desc[sc->rxq.cur]; 1233 struct rt2560_rx_data *data = &sc->rxq.data[sc->rxq.cur]; 1234 1235 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1236 sc->rxq.cur * RT2560_RX_DESC_SIZE, RT2560_RX_DESC_SIZE, 1237 BUS_DMASYNC_POSTREAD); 1238 1239 if (letoh32(desc->flags) & 1240 (RT2560_RX_BUSY | RT2560_RX_CIPHER_BUSY)) 1241 break; 1242 1243 data->drop = 0; 1244 1245 if (letoh32(desc->flags) & 1246 (RT2560_RX_PHY_ERROR | RT2560_RX_CRC_ERROR)) { 1247 /* 1248 * This should not happen since we did not request 1249 * to receive those frames when we filled RXCSR0. 1250 */ 1251 DPRINTFN(5, ("PHY or CRC error flags 0x%08x\n", 1252 letoh32(desc->flags))); 1253 data->drop = 1; 1254 } 1255 1256 if (((letoh32(desc->flags) >> 16) & 0xfff) > MCLBYTES) { 1257 DPRINTFN(5, ("bad length\n")); 1258 data->drop = 1; 1259 } 1260 1261 /* mark the frame for decryption */ 1262 desc->flags |= htole32(RT2560_RX_CIPHER_BUSY); 1263 1264 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1265 sc->rxq.cur * RT2560_RX_DESC_SIZE, RT2560_RX_DESC_SIZE, 1266 BUS_DMASYNC_PREWRITE); 1267 1268 DPRINTFN(15, ("rx done idx=%u\n", sc->rxq.cur)); 1269 1270 sc->rxq.cur = (sc->rxq.cur + 1) % RT2560_RX_RING_COUNT; 1271 } 1272 1273 /* kick decrypt */ 1274 RAL_WRITE(sc, RT2560_SECCSR0, RT2560_KICK_DECRYPT); 1275} 1276 1277#ifndef IEEE80211_STA_ONLY 1278/* 1279 * This function is called in HostAP or IBSS modes when it's time to send a 1280 * new beacon (every ni_intval milliseconds). 1281 */ 1282void 1283rt2560_beacon_expire(struct rt2560_softc *sc) 1284{ 1285 struct ieee80211com *ic = &sc->sc_ic; 1286 struct rt2560_tx_data *data; 1287 1288 if (ic->ic_opmode != IEEE80211_M_IBSS && 1289 ic->ic_opmode != IEEE80211_M_HOSTAP) 1290 return; 1291 1292 data = &sc->bcnq.data[sc->bcnq.next]; 1293 1294 if (sc->sc_flags & RT2560_UPDATE_SLOT) { 1295 sc->sc_flags &= ~RT2560_UPDATE_SLOT; 1296 sc->sc_flags |= RT2560_SET_SLOTTIME; 1297 } else if (sc->sc_flags & RT2560_SET_SLOTTIME) { 1298 sc->sc_flags &= ~RT2560_SET_SLOTTIME; 1299 rt2560_set_slottime(sc); 1300 } 1301 1302 if (ic->ic_curmode == IEEE80211_MODE_11G) { 1303 /* update ERP Information Element */ 1304 *sc->erp = ic->ic_bss->ni_erp; 1305 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1306 data->map->dm_mapsize, BUS_DMASYNC_PREWRITE); 1307 } 1308 1309#if defined(RT2560_DEBUG) && NBPFILTER > 0 1310 if (ic->ic_rawbpf != NULL) 1311 bpf_mtap(ic->ic_rawbpf, data->m, BPF_DIRECTION_OUT); 1312#endif 1313 1314 DPRINTFN(15, ("beacon expired\n")); 1315} 1316#endif 1317 1318void 1319rt2560_wakeup_expire(struct rt2560_softc *sc) 1320{ 1321 DPRINTFN(15, ("wakeup expired\n")); 1322} 1323 1324int 1325rt2560_intr(void *arg) 1326{ 1327 struct rt2560_softc *sc = arg; 1328 struct ifnet *ifp = &sc->sc_ic.ic_if; 1329 uint32_t r; 1330 1331 r = RAL_READ(sc, RT2560_CSR7); 1332 if (__predict_false(r == 0xffffffff)) 1333 return 0; /* device likely went away */ 1334 if (r == 0) 1335 return 0; /* not for us */ 1336 1337 /* disable interrupts */ 1338 RAL_WRITE(sc, RT2560_CSR8, 0xffffffff); 1339 1340 /* acknowledge interrupts */ 1341 RAL_WRITE(sc, RT2560_CSR7, r); 1342 1343 /* don't re-enable interrupts if we're shutting down */ 1344 if (!(ifp->if_flags & IFF_RUNNING)) 1345 return 0; 1346 1347#ifndef IEEE80211_STA_ONLY 1348 if (r & RT2560_BEACON_EXPIRE) 1349 rt2560_beacon_expire(sc); 1350#endif 1351 1352 if (r & RT2560_WAKEUP_EXPIRE) 1353 rt2560_wakeup_expire(sc); 1354 1355 if (r & RT2560_ENCRYPTION_DONE) 1356 rt2560_encryption_intr(sc); 1357 1358 if (r & RT2560_TX_DONE) 1359 rt2560_tx_intr(sc); 1360 1361 if (r & RT2560_PRIO_DONE) 1362 rt2560_prio_intr(sc); 1363 1364 if (r & RT2560_DECRYPTION_DONE) 1365 rt2560_decryption_intr(sc); 1366 1367 if (r & RT2560_RX_DONE) 1368 rt2560_rx_intr(sc); 1369 1370 /* re-enable interrupts */ 1371 RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK); 1372 1373 return 1; 1374} 1375 1376/* quickly determine if a given rate is CCK or OFDM */ 1377#define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22) 1378 1379#define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */ 1380#define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */ 1381 1382#define RAL_SIFS 10 /* us */ 1383 1384#define RT2560_RXTX_TURNAROUND 10 /* us */ 1385 1386/* 1387 * This function is only used by the Rx radiotap code. It returns the rate at 1388 * which a given frame was received. 1389 */ 1390#if NBPFILTER > 0 1391uint8_t 1392rt2560_rxrate(const struct rt2560_rx_desc *desc) 1393{ 1394 if (letoh32(desc->flags) & RT2560_RX_OFDM) { 1395 /* reverse function of rt2560_plcp_signal */ 1396 switch (desc->rate) { 1397 case 0xb: return 12; 1398 case 0xf: return 18; 1399 case 0xa: return 24; 1400 case 0xe: return 36; 1401 case 0x9: return 48; 1402 case 0xd: return 72; 1403 case 0x8: return 96; 1404 case 0xc: return 108; 1405 } 1406 } else { 1407 if (desc->rate == 10) 1408 return 2; 1409 if (desc->rate == 20) 1410 return 4; 1411 if (desc->rate == 55) 1412 return 11; 1413 if (desc->rate == 110) 1414 return 22; 1415 } 1416 return 2; /* should not get there */ 1417} 1418#endif 1419 1420/* 1421 * Return the expected ack rate for a frame transmitted at rate `rate'. 1422 */ 1423int 1424rt2560_ack_rate(struct ieee80211com *ic, int rate) 1425{ 1426 switch (rate) { 1427 /* CCK rates */ 1428 case 2: 1429 return 2; 1430 case 4: 1431 case 11: 1432 case 22: 1433 return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate; 1434 1435 /* OFDM rates */ 1436 case 12: 1437 case 18: 1438 return 12; 1439 case 24: 1440 case 36: 1441 return 24; 1442 case 48: 1443 case 72: 1444 case 96: 1445 case 108: 1446 return 48; 1447 } 1448 1449 /* default to 1Mbps */ 1450 return 2; 1451} 1452 1453/* 1454 * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'. 1455 * The function automatically determines the operating mode depending on the 1456 * given rate. `flags' indicates whether short preamble is in use or not. 1457 */ 1458uint16_t 1459rt2560_txtime(int len, int rate, uint32_t flags) 1460{ 1461 uint16_t txtime; 1462 1463 if (RAL_RATE_IS_OFDM(rate)) { 1464 /* IEEE Std 802.11g-2003, pp. 44 */ 1465 txtime = (8 + 4 * len + 3 + rate - 1) / rate; 1466 txtime = 16 + 4 + 4 * txtime + 6; 1467 } else { 1468 /* IEEE Std 802.11b-1999, pp. 28 */ 1469 txtime = (16 * len + rate - 1) / rate; 1470 if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE)) 1471 txtime += 72 + 24; 1472 else 1473 txtime += 144 + 48; 1474 } 1475 return txtime; 1476} 1477 1478uint8_t 1479rt2560_plcp_signal(int rate) 1480{ 1481 switch (rate) { 1482 /* CCK rates (returned values are device-dependent) */ 1483 case 2: return 0x0; 1484 case 4: return 0x1; 1485 case 11: return 0x2; 1486 case 22: return 0x3; 1487 1488 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1489 case 12: return 0xb; 1490 case 18: return 0xf; 1491 case 24: return 0xa; 1492 case 36: return 0xe; 1493 case 48: return 0x9; 1494 case 72: return 0xd; 1495 case 96: return 0x8; 1496 case 108: return 0xc; 1497 1498 /* unsupported rates (should not get there) */ 1499 default: return 0xff; 1500 } 1501} 1502 1503void 1504rt2560_setup_tx_desc(struct rt2560_softc *sc, struct rt2560_tx_desc *desc, 1505 uint32_t flags, int len, int rate, int encrypt, bus_addr_t physaddr) 1506{ 1507 struct ieee80211com *ic = &sc->sc_ic; 1508 uint16_t plcp_length; 1509 int remainder; 1510 1511 desc->flags = htole32(flags); 1512 desc->flags |= htole32(len << 16); 1513 desc->flags |= encrypt ? htole32(RT2560_TX_CIPHER_BUSY) : 1514 htole32(RT2560_TX_BUSY | RT2560_TX_VALID); 1515 1516 desc->physaddr = htole32(physaddr); 1517 desc->wme = htole16( 1518 RT2560_AIFSN(2) | 1519 RT2560_LOGCWMIN(3) | 1520 RT2560_LOGCWMAX(8)); 1521 1522 /* setup PLCP fields */ 1523 desc->plcp_signal = rt2560_plcp_signal(rate); 1524 desc->plcp_service = 4; 1525 1526 len += IEEE80211_CRC_LEN; 1527 if (RAL_RATE_IS_OFDM(rate)) { 1528 desc->flags |= htole32(RT2560_TX_OFDM); 1529 1530 plcp_length = len & 0xfff; 1531 desc->plcp_length_hi = plcp_length >> 6; 1532 desc->plcp_length_lo = plcp_length & 0x3f; 1533 } else { 1534 plcp_length = (16 * len + rate - 1) / rate; 1535 if (rate == 22) { 1536 remainder = (16 * len) % 22; 1537 if (remainder != 0 && remainder < 7) 1538 desc->plcp_service |= RT2560_PLCP_LENGEXT; 1539 } 1540 desc->plcp_length_hi = plcp_length >> 8; 1541 desc->plcp_length_lo = plcp_length & 0xff; 1542 1543 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1544 desc->plcp_signal |= 0x08; 1545 } 1546} 1547 1548#ifndef IEEE80211_STA_ONLY 1549int 1550rt2560_tx_bcn(struct rt2560_softc *sc, struct mbuf *m0, 1551 struct ieee80211_node *ni) 1552{ 1553 struct ieee80211com *ic = &sc->sc_ic; 1554 struct rt2560_tx_desc *desc; 1555 struct rt2560_tx_data *data; 1556 int rate = 2, error; 1557 1558 desc = &sc->bcnq.desc[sc->bcnq.cur]; 1559 data = &sc->bcnq.data[sc->bcnq.cur]; 1560 1561 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1562 BUS_DMA_NOWAIT); 1563 if (error != 0) { 1564 printf("%s: can't map mbuf (error %d)\n", 1565 sc->sc_dev.dv_xname, error); 1566 m_freem(m0); 1567 return error; 1568 } 1569 1570 data->m = m0; 1571 data->ni = ni; 1572 1573 rt2560_setup_tx_desc(sc, desc, RT2560_TX_IFS_NEWBACKOFF | 1574 RT2560_TX_TIMESTAMP, m0->m_pkthdr.len, rate, 0, 1575 data->map->dm_segs->ds_addr); 1576 1577 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 1578 BUS_DMASYNC_PREWRITE); 1579 bus_dmamap_sync(sc->sc_dmat, sc->bcnq.map, 1580 sc->bcnq.cur * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1581 BUS_DMASYNC_PREWRITE); 1582 1583 /* 1584 * Store pointer to ERP Information Element so that we can update it 1585 * dynamically when the slot time changes. 1586 * XXX: this is ugly since it depends on how net80211 builds beacon 1587 * frames but ieee80211_beacon_alloc() don't store offsets for us. 1588 */ 1589 if (ic->ic_curmode == IEEE80211_MODE_11G) { 1590 sc->erp = 1591 mtod(m0, uint8_t *) + 1592 sizeof (struct ieee80211_frame) + 1593 8 + 2 + 2 + 1594 ((ic->ic_flags & IEEE80211_F_HIDENWID) ? 1595 1 : 2 + ni->ni_esslen) + 1596 2 + min(ni->ni_rates.rs_nrates, IEEE80211_RATE_SIZE) + 1597 2 + 1 + 1598 ((ic->ic_opmode == IEEE80211_M_IBSS) ? 4 : 6) + 1599 2; 1600 } 1601 1602 return 0; 1603} 1604#endif 1605 1606int 1607rt2560_tx_mgt(struct rt2560_softc *sc, struct mbuf *m0, 1608 struct ieee80211_node *ni) 1609{ 1610 struct ieee80211com *ic = &sc->sc_ic; 1611 struct rt2560_tx_desc *desc; 1612 struct rt2560_tx_data *data; 1613 struct ieee80211_frame *wh; 1614 uint16_t dur; 1615 uint32_t flags = 0; 1616 int rate = 2, error; 1617 1618 desc = &sc->prioq.desc[sc->prioq.cur]; 1619 data = &sc->prioq.data[sc->prioq.cur]; 1620 1621 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1622 BUS_DMA_NOWAIT); 1623 if (error != 0) { 1624 printf("%s: can't map mbuf (error %d)\n", 1625 sc->sc_dev.dv_xname, error); 1626 m_freem(m0); 1627 return error; 1628 } 1629 1630#if NBPFILTER > 0 1631 if (sc->sc_drvbpf != NULL) { 1632 struct mbuf mb; 1633 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap; 1634 1635 tap->wt_flags = 0; 1636 tap->wt_rate = rate; 1637 tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 1638 tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags); 1639 tap->wt_antenna = sc->tx_ant; 1640 1641 mb.m_data = (caddr_t)tap; 1642 mb.m_len = sc->sc_txtap_len; 1643 mb.m_next = m0; 1644 mb.m_nextpkt = NULL; 1645 mb.m_type = 0; 1646 mb.m_flags = 0; 1647 bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_OUT); 1648 } 1649#endif 1650 1651 data->m = m0; 1652 data->ni = ni; 1653 1654 wh = mtod(m0, struct ieee80211_frame *); 1655 1656 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1657 flags |= RT2560_TX_NEED_ACK; 1658 1659 dur = rt2560_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) + 1660 RAL_SIFS; 1661 *(uint16_t *)wh->i_dur = htole16(dur); 1662 1663#ifndef IEEE80211_STA_ONLY 1664 /* tell hardware to set timestamp for probe responses */ 1665 if ((wh->i_fc[0] & 1666 (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) == 1667 (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP)) 1668 flags |= RT2560_TX_TIMESTAMP; 1669#endif 1670 } 1671 1672 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 0, 1673 data->map->dm_segs->ds_addr); 1674 1675 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 1676 BUS_DMASYNC_PREWRITE); 1677 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1678 sc->prioq.cur * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1679 BUS_DMASYNC_PREWRITE); 1680 1681 DPRINTFN(10, ("sending mgt frame len=%u idx=%u rate=%u\n", 1682 m0->m_pkthdr.len, sc->prioq.cur, rate)); 1683 1684 /* kick prio */ 1685 sc->prioq.queued++; 1686 sc->prioq.cur = (sc->prioq.cur + 1) % RT2560_PRIO_RING_COUNT; 1687 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_PRIO); 1688 1689 return 0; 1690} 1691 1692int 1693rt2560_tx_data(struct rt2560_softc *sc, struct mbuf *m0, 1694 struct ieee80211_node *ni) 1695{ 1696 struct ieee80211com *ic = &sc->sc_ic; 1697 struct rt2560_tx_ring *txq = &sc->txq; 1698 struct rt2560_tx_desc *desc; 1699 struct rt2560_tx_data *data; 1700 struct ieee80211_frame *wh; 1701 struct ieee80211_key *k; 1702 struct mbuf *m1; 1703 uint16_t dur; 1704 uint32_t flags = 0; 1705 int pktlen, rate, needcts = 0, needrts = 0, error; 1706 1707 wh = mtod(m0, struct ieee80211_frame *); 1708 1709 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 1710 k = ieee80211_get_txkey(ic, wh, ni); 1711 1712 if ((m0 = ieee80211_encrypt(ic, m0, k)) == NULL) 1713 return ENOBUFS; 1714 1715 /* packet header may have moved, reset our local pointer */ 1716 wh = mtod(m0, struct ieee80211_frame *); 1717 } 1718 1719 /* compute actual packet length (including CRC and crypto overhead) */ 1720 pktlen = m0->m_pkthdr.len + IEEE80211_CRC_LEN; 1721 1722 /* pickup a rate */ 1723 if (IEEE80211_IS_MULTICAST(wh->i_addr1) || 1724 ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 1725 IEEE80211_FC0_TYPE_MGT)) { 1726 /* mgmt/multicast frames are sent at the lowest avail. rate */ 1727 rate = ni->ni_rates.rs_rates[0]; 1728 } else if (ic->ic_fixed_rate != -1) { 1729 rate = ic->ic_sup_rates[ic->ic_curmode]. 1730 rs_rates[ic->ic_fixed_rate]; 1731 } else 1732 rate = ni->ni_rates.rs_rates[ni->ni_txrate]; 1733 if (rate == 0) 1734 rate = 2; /* XXX should not happen */ 1735 rate &= IEEE80211_RATE_VAL; 1736 1737 /* 1738 * Packet Bursting: backoff after ppb=8 frames to give other STAs a 1739 * chance to contend for the wireless medium. 1740 */ 1741 if (ic->ic_opmode == IEEE80211_M_STA && (ni->ni_txseq & 7)) 1742 flags |= RT2560_TX_IFS_SIFS; 1743 1744 /* check if RTS/CTS or CTS-to-self protection must be used */ 1745 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1746 /* multicast frames are not sent at OFDM rates in 802.11b/g */ 1747 if (pktlen > ic->ic_rtsthreshold) { 1748 needrts = 1; /* RTS/CTS based on frame length */ 1749 } else if ((ic->ic_flags & IEEE80211_F_USEPROT) && 1750 RAL_RATE_IS_OFDM(rate)) { 1751 if (ic->ic_protmode == IEEE80211_PROT_CTSONLY) 1752 needcts = 1; /* CTS-to-self */ 1753 else if (ic->ic_protmode == IEEE80211_PROT_RTSCTS) 1754 needrts = 1; /* RTS/CTS */ 1755 } 1756 } 1757 if (needrts || needcts) { 1758 struct mbuf *mprot; 1759 int protrate, ackrate; 1760 1761 protrate = 2; /* XXX */ 1762 ackrate = rt2560_ack_rate(ic, rate); 1763 1764 dur = rt2560_txtime(pktlen, rate, ic->ic_flags) + 1765 rt2560_txtime(RAL_ACK_SIZE, ackrate, ic->ic_flags) + 1766 2 * RAL_SIFS; 1767 if (needrts) { 1768 dur += rt2560_txtime(RAL_CTS_SIZE, rt2560_ack_rate(ic, 1769 protrate), ic->ic_flags) + RAL_SIFS; 1770 mprot = ieee80211_get_rts(ic, wh, dur); 1771 } else { 1772 mprot = ieee80211_get_cts_to_self(ic, dur); 1773 } 1774 if (mprot == NULL) { 1775 printf("%s: could not allocate protection frame\n", 1776 sc->sc_dev.dv_xname); 1777 m_freem(m0); 1778 return ENOBUFS; 1779 } 1780 1781 desc = &txq->desc[txq->cur_encrypt]; 1782 data = &txq->data[txq->cur_encrypt]; 1783 1784 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, mprot, 1785 BUS_DMA_NOWAIT); 1786 if (error != 0) { 1787 printf("%s: can't map mbuf (error %d)\n", 1788 sc->sc_dev.dv_xname, error); 1789 m_freem(mprot); 1790 m_freem(m0); 1791 return error; 1792 } 1793 1794 data->m = mprot; 1795 /* avoid multiple free() of the same node for each fragment */ 1796 data->ni = ieee80211_ref_node(ni); 1797 1798 /* XXX may want to pass the protection frame to BPF */ 1799 1800 rt2560_setup_tx_desc(sc, desc, 1801 (needrts ? RT2560_TX_NEED_ACK : 0) | RT2560_TX_MORE_FRAG, 1802 mprot->m_pkthdr.len, protrate, 1, 1803 data->map->dm_segs->ds_addr); 1804 1805 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1806 data->map->dm_mapsize, BUS_DMASYNC_PREWRITE); 1807 bus_dmamap_sync(sc->sc_dmat, txq->map, 1808 txq->cur_encrypt * RT2560_TX_DESC_SIZE, 1809 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 1810 1811 txq->queued++; 1812 if (++txq->cur_encrypt >= txq->count) 1813 txq->cur_encrypt = 0; 1814 1815 flags |= RT2560_TX_LONG_RETRY | RT2560_TX_IFS_SIFS; 1816 } 1817 1818 data = &txq->data[txq->cur_encrypt]; 1819 desc = &txq->desc[txq->cur_encrypt]; 1820 1821 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1822 BUS_DMA_NOWAIT); 1823 if (error != 0 && error != EFBIG) { 1824 printf("%s: can't map mbuf (error %d)\n", 1825 sc->sc_dev.dv_xname, error); 1826 m_freem(m0); 1827 return error; 1828 } 1829 if (error != 0) { 1830 /* too many fragments, linearize */ 1831 MGETHDR(m1, M_DONTWAIT, MT_DATA); 1832 if (m1 == NULL) { 1833 m_freem(m0); 1834 return ENOBUFS; 1835 } 1836 if (m0->m_pkthdr.len > MHLEN) { 1837 MCLGET(m1, M_DONTWAIT); 1838 if (!(m1->m_flags & M_EXT)) { 1839 m_freem(m0); 1840 m_freem(m1); 1841 return ENOBUFS; 1842 } 1843 } 1844 m_copydata(m0, 0, m0->m_pkthdr.len, mtod(m1, caddr_t)); 1845 m1->m_pkthdr.len = m1->m_len = m0->m_pkthdr.len; 1846 m_freem(m0); 1847 m0 = m1; 1848 1849 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1850 BUS_DMA_NOWAIT); 1851 if (error != 0) { 1852 printf("%s: can't map mbuf (error %d)\n", 1853 sc->sc_dev.dv_xname, error); 1854 m_freem(m0); 1855 return error; 1856 } 1857 1858 /* packet header have moved, reset our local pointer */ 1859 wh = mtod(m0, struct ieee80211_frame *); 1860 } 1861 1862#if NBPFILTER > 0 1863 if (sc->sc_drvbpf != NULL) { 1864 struct mbuf mb; 1865 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap; 1866 1867 tap->wt_flags = 0; 1868 tap->wt_rate = rate; 1869 tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 1870 tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags); 1871 tap->wt_antenna = sc->tx_ant; 1872 1873 mb.m_data = (caddr_t)tap; 1874 mb.m_len = sc->sc_txtap_len; 1875 mb.m_next = m0; 1876 mb.m_nextpkt = NULL; 1877 mb.m_type = 0; 1878 mb.m_flags = 0; 1879 bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_OUT); 1880 } 1881#endif 1882 1883 data->m = m0; 1884 data->ni = ni; 1885 1886 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1887 flags |= RT2560_TX_NEED_ACK; 1888 1889 dur = rt2560_txtime(RAL_ACK_SIZE, rt2560_ack_rate(ic, rate), 1890 ic->ic_flags) + RAL_SIFS; 1891 *(uint16_t *)wh->i_dur = htole16(dur); 1892 } 1893 1894 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 1, 1895 data->map->dm_segs->ds_addr); 1896 1897 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 1898 BUS_DMASYNC_PREWRITE); 1899 bus_dmamap_sync(sc->sc_dmat, txq->map, 1900 txq->cur_encrypt * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1901 BUS_DMASYNC_PREWRITE); 1902 1903 DPRINTFN(10, ("sending frame len=%u idx=%u rate=%u\n", 1904 m0->m_pkthdr.len, txq->cur_encrypt, rate)); 1905 1906 /* kick encrypt */ 1907 txq->queued++; 1908 if (++txq->cur_encrypt >= txq->count) 1909 txq->cur_encrypt = 0; 1910 RAL_WRITE(sc, RT2560_SECCSR1, RT2560_KICK_ENCRYPT); 1911 1912 return 0; 1913} 1914 1915void 1916rt2560_start(struct ifnet *ifp) 1917{ 1918 struct rt2560_softc *sc = ifp->if_softc; 1919 struct ieee80211com *ic = &sc->sc_ic; 1920 struct mbuf *m0; 1921 struct ieee80211_node *ni; 1922 1923 /* 1924 * net80211 may still try to send management frames even if the 1925 * IFF_RUNNING flag is not set... 1926 */ 1927 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 1928 return; 1929 1930 for (;;) { 1931 IF_POLL(&ic->ic_mgtq, m0); 1932 if (m0 != NULL) { 1933 if (sc->prioq.queued >= RT2560_PRIO_RING_COUNT) { 1934 ifp->if_flags |= IFF_OACTIVE; 1935 sc->sc_flags |= RT2560_PRIO_OACTIVE; 1936 break; 1937 } 1938 IF_DEQUEUE(&ic->ic_mgtq, m0); 1939 1940 ni = m0->m_pkthdr.ph_cookie; 1941#if NBPFILTER > 0 1942 if (ic->ic_rawbpf != NULL) 1943 bpf_mtap(ic->ic_rawbpf, m0, BPF_DIRECTION_OUT); 1944#endif 1945 if (rt2560_tx_mgt(sc, m0, ni) != 0) 1946 break; 1947 1948 } else { 1949 if (ic->ic_state != IEEE80211_S_RUN) 1950 break; 1951 IFQ_POLL(&ifp->if_snd, m0); 1952 if (m0 == NULL) 1953 break; 1954 if (sc->txq.queued >= RT2560_TX_RING_COUNT - 1) { 1955 ifp->if_flags |= IFF_OACTIVE; 1956 sc->sc_flags |= RT2560_DATA_OACTIVE; 1957 break; 1958 } 1959 IFQ_DEQUEUE(&ifp->if_snd, m0); 1960#if NBPFILTER > 0 1961 if (ifp->if_bpf != NULL) 1962 bpf_mtap(ifp->if_bpf, m0, BPF_DIRECTION_OUT); 1963#endif 1964 m0 = ieee80211_encap(ifp, m0, &ni); 1965 if (m0 == NULL) 1966 continue; 1967#if NBPFILTER > 0 1968 if (ic->ic_rawbpf != NULL) 1969 bpf_mtap(ic->ic_rawbpf, m0, BPF_DIRECTION_OUT); 1970#endif 1971 if (rt2560_tx_data(sc, m0, ni) != 0) { 1972 if (ni != NULL) 1973 ieee80211_release_node(ic, ni); 1974 ifp->if_oerrors++; 1975 break; 1976 } 1977 } 1978 1979 sc->sc_tx_timer = 5; 1980 ifp->if_timer = 1; 1981 } 1982} 1983 1984void 1985rt2560_watchdog(struct ifnet *ifp) 1986{ 1987 struct rt2560_softc *sc = ifp->if_softc; 1988 1989 ifp->if_timer = 0; 1990 1991 if (sc->sc_tx_timer > 0) { 1992 if (--sc->sc_tx_timer == 0) { 1993 printf("%s: device timeout\n", sc->sc_dev.dv_xname); 1994 rt2560_init(ifp); 1995 ifp->if_oerrors++; 1996 return; 1997 } 1998 ifp->if_timer = 1; 1999 } 2000 2001 ieee80211_watchdog(ifp); 2002} 2003 2004int 2005rt2560_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 2006{ 2007 struct rt2560_softc *sc = ifp->if_softc; 2008 struct ieee80211com *ic = &sc->sc_ic; 2009 struct ifreq *ifr; 2010 int s, error = 0; 2011 2012 s = splnet(); 2013 2014 switch (cmd) { 2015 case SIOCSIFADDR: 2016 ifp->if_flags |= IFF_UP; 2017 /* FALLTHROUGH */ 2018 case SIOCSIFFLAGS: 2019 if (ifp->if_flags & IFF_UP) { 2020 if (ifp->if_flags & IFF_RUNNING) 2021 rt2560_update_promisc(sc); 2022 else 2023 rt2560_init(ifp); 2024 } else { 2025 if (ifp->if_flags & IFF_RUNNING) 2026 rt2560_stop(ifp, 1); 2027 } 2028 break; 2029 2030 case SIOCADDMULTI: 2031 case SIOCDELMULTI: 2032 ifr = (struct ifreq *)data; 2033 error = (cmd == SIOCADDMULTI) ? 2034 ether_addmulti(ifr, &ic->ic_ac) : 2035 ether_delmulti(ifr, &ic->ic_ac); 2036 2037 if (error == ENETRESET) 2038 error = 0; 2039 break; 2040 2041 case SIOCS80211CHANNEL: 2042 /* 2043 * This allows for fast channel switching in monitor mode 2044 * (used by kismet). In IBSS mode, we must explicitly reset 2045 * the interface to generate a new beacon frame. 2046 */ 2047 error = ieee80211_ioctl(ifp, cmd, data); 2048 if (error == ENETRESET && 2049 ic->ic_opmode == IEEE80211_M_MONITOR) { 2050 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 2051 (IFF_UP | IFF_RUNNING)) 2052 rt2560_set_chan(sc, ic->ic_ibss_chan); 2053 error = 0; 2054 } 2055 break; 2056 2057 default: 2058 error = ieee80211_ioctl(ifp, cmd, data); 2059 } 2060 2061 if (error == ENETRESET) { 2062 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 2063 (IFF_UP | IFF_RUNNING)) 2064 rt2560_init(ifp); 2065 error = 0; 2066 } 2067 2068 splx(s); 2069 2070 return error; 2071} 2072 2073void 2074rt2560_bbp_write(struct rt2560_softc *sc, uint8_t reg, uint8_t val) 2075{ 2076 uint32_t tmp; 2077 int ntries; 2078 2079 for (ntries = 0; ntries < 100; ntries++) { 2080 if (!(RAL_READ(sc, RT2560_BBPCSR) & RT2560_BBP_BUSY)) 2081 break; 2082 DELAY(1); 2083 } 2084 if (ntries == 100) { 2085 printf("%s: could not write to BBP\n", sc->sc_dev.dv_xname); 2086 return; 2087 } 2088 2089 tmp = RT2560_BBP_WRITE | RT2560_BBP_BUSY | reg << 8 | val; 2090 RAL_WRITE(sc, RT2560_BBPCSR, tmp); 2091 2092 DPRINTFN(15, ("BBP R%u <- 0x%02x\n", reg, val)); 2093} 2094 2095uint8_t 2096rt2560_bbp_read(struct rt2560_softc *sc, uint8_t reg) 2097{ 2098 uint32_t val; 2099 int ntries; 2100 2101 for (ntries = 0; ntries < 100; ntries++) { 2102 if (!(RAL_READ(sc, RT2560_BBPCSR) & RT2560_BBP_BUSY)) 2103 break; 2104 DELAY(1); 2105 } 2106 if (ntries == 100) { 2107 printf("%s: could not read from BBP\n", sc->sc_dev.dv_xname); 2108 return 0; 2109 } 2110 2111 val = RT2560_BBP_BUSY | reg << 8; 2112 RAL_WRITE(sc, RT2560_BBPCSR, val); 2113 2114 for (ntries = 0; ntries < 100; ntries++) { 2115 val = RAL_READ(sc, RT2560_BBPCSR); 2116 if (!(val & RT2560_BBP_BUSY)) 2117 return val & 0xff; 2118 DELAY(1); 2119 } 2120 2121 printf("%s: could not read from BBP\n", sc->sc_dev.dv_xname); 2122 return 0; 2123} 2124 2125void 2126rt2560_rf_write(struct rt2560_softc *sc, uint8_t reg, uint32_t val) 2127{ 2128 uint32_t tmp; 2129 int ntries; 2130 2131 for (ntries = 0; ntries < 100; ntries++) { 2132 if (!(RAL_READ(sc, RT2560_RFCSR) & RT2560_RF_BUSY)) 2133 break; 2134 DELAY(1); 2135 } 2136 if (ntries == 100) { 2137 printf("%s: could not write to RF\n", sc->sc_dev.dv_xname); 2138 return; 2139 } 2140 2141 tmp = RT2560_RF_BUSY | RT2560_RF_20BIT | (val & 0xfffff) << 2 | 2142 (reg & 0x3); 2143 RAL_WRITE(sc, RT2560_RFCSR, tmp); 2144 2145 /* remember last written value in sc */ 2146 sc->rf_regs[reg] = val; 2147 2148 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff)); 2149} 2150 2151void 2152rt2560_set_chan(struct rt2560_softc *sc, struct ieee80211_channel *c) 2153{ 2154 struct ieee80211com *ic = &sc->sc_ic; 2155 uint8_t power, tmp; 2156 u_int chan; 2157 2158 chan = ieee80211_chan2ieee(ic, c); 2159 if (chan == 0 || chan == IEEE80211_CHAN_ANY) 2160 return; 2161 2162 power = min(sc->txpow[chan - 1], 31); 2163 2164 DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power)); 2165 2166 switch (sc->rf_rev) { 2167 case RT2560_RF_2522: 2168 rt2560_rf_write(sc, RT2560_RF1, 0x00814); 2169 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2522_r2[chan - 1]); 2170 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040); 2171 break; 2172 2173 case RT2560_RF_2523: 2174 rt2560_rf_write(sc, RT2560_RF1, 0x08804); 2175 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2523_r2[chan - 1]); 2176 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x38044); 2177 rt2560_rf_write(sc, RT2560_RF4, 2178 (chan == 14) ? 0x00280 : 0x00286); 2179 break; 2180 2181 case RT2560_RF_2524: 2182 rt2560_rf_write(sc, RT2560_RF1, 0x0c808); 2183 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2524_r2[chan - 1]); 2184 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040); 2185 rt2560_rf_write(sc, RT2560_RF4, 2186 (chan == 14) ? 0x00280 : 0x00286); 2187 break; 2188 2189 case RT2560_RF_2525: 2190 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2191 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525_hi_r2[chan - 1]); 2192 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2193 rt2560_rf_write(sc, RT2560_RF4, 2194 (chan == 14) ? 0x00280 : 0x00286); 2195 2196 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2197 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525_r2[chan - 1]); 2198 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2199 rt2560_rf_write(sc, RT2560_RF4, 2200 (chan == 14) ? 0x00280 : 0x00286); 2201 break; 2202 2203 case RT2560_RF_2525E: 2204 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2205 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525e_r2[chan - 1]); 2206 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2207 rt2560_rf_write(sc, RT2560_RF4, 2208 (chan == 14) ? 0x00286 : 0x00282); 2209 break; 2210 2211 case RT2560_RF_2526: 2212 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2526_hi_r2[chan - 1]); 2213 rt2560_rf_write(sc, RT2560_RF4, 2214 (chan & 1) ? 0x00386 : 0x00381); 2215 rt2560_rf_write(sc, RT2560_RF1, 0x08804); 2216 2217 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2526_r2[chan - 1]); 2218 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2219 rt2560_rf_write(sc, RT2560_RF4, 2220 (chan & 1) ? 0x00386 : 0x00381); 2221 break; 2222 } 2223 2224 if (ic->ic_opmode != IEEE80211_M_MONITOR && 2225 ic->ic_state != IEEE80211_S_SCAN) { 2226 /* set Japan filter bit for channel 14 */ 2227 tmp = rt2560_bbp_read(sc, 70); 2228 2229 tmp &= ~RT2560_JAPAN_FILTER; 2230 if (chan == 14) 2231 tmp |= RT2560_JAPAN_FILTER; 2232 2233 rt2560_bbp_write(sc, 70, tmp); 2234 2235 DELAY(1000); /* RF needs a 1ms delay here */ 2236 rt2560_disable_rf_tune(sc); 2237 2238 /* clear CRC errors */ 2239 RAL_READ(sc, RT2560_CNT0); 2240 } 2241} 2242 2243/* 2244 * Disable RF auto-tuning. 2245 */ 2246void 2247rt2560_disable_rf_tune(struct rt2560_softc *sc) 2248{ 2249 uint32_t tmp; 2250 2251 if (sc->rf_rev != RT2560_RF_2523) { 2252 tmp = sc->rf_regs[RT2560_RF1] & ~RT2560_RF1_AUTOTUNE; 2253 rt2560_rf_write(sc, RT2560_RF1, tmp); 2254 } 2255 2256 tmp = sc->rf_regs[RT2560_RF3] & ~RT2560_RF3_AUTOTUNE; 2257 rt2560_rf_write(sc, RT2560_RF3, tmp); 2258 2259 DPRINTFN(2, ("disabling RF autotune\n")); 2260} 2261 2262/* 2263 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF 2264 * synchronization. 2265 */ 2266void 2267rt2560_enable_tsf_sync(struct rt2560_softc *sc) 2268{ 2269 struct ieee80211com *ic = &sc->sc_ic; 2270 uint16_t logcwmin, preload; 2271 uint32_t tmp; 2272 2273 /* first, disable TSF synchronization */ 2274 RAL_WRITE(sc, RT2560_CSR14, 0); 2275 2276 tmp = 16 * ic->ic_bss->ni_intval; 2277 RAL_WRITE(sc, RT2560_CSR12, tmp); 2278 2279 RAL_WRITE(sc, RT2560_CSR13, 0); 2280 2281 logcwmin = 5; 2282 preload = (ic->ic_opmode == IEEE80211_M_STA) ? 384 : 1024; 2283 tmp = logcwmin << 16 | preload; 2284 RAL_WRITE(sc, RT2560_BCNOCSR, tmp); 2285 2286 /* finally, enable TSF synchronization */ 2287 tmp = RT2560_ENABLE_TSF | RT2560_ENABLE_TBCN; 2288 if (ic->ic_opmode == IEEE80211_M_STA) 2289 tmp |= RT2560_ENABLE_TSF_SYNC(1); 2290#ifndef IEEE80211_STA_ONLY 2291 else 2292 tmp |= RT2560_ENABLE_TSF_SYNC(2) | 2293 RT2560_ENABLE_BEACON_GENERATOR; 2294#endif 2295 RAL_WRITE(sc, RT2560_CSR14, tmp); 2296 2297 DPRINTF(("enabling TSF synchronization\n")); 2298} 2299 2300void 2301rt2560_update_plcp(struct rt2560_softc *sc) 2302{ 2303 struct ieee80211com *ic = &sc->sc_ic; 2304 2305 /* no short preamble for 1Mbps */ 2306 RAL_WRITE(sc, RT2560_PLCP1MCSR, 0x00700400); 2307 2308 if (!(ic->ic_flags & IEEE80211_F_SHPREAMBLE)) { 2309 /* values taken from the reference driver */ 2310 RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380401); 2311 RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x00150402); 2312 RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b8403); 2313 } else { 2314 /* same values as above or'ed 0x8 */ 2315 RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380409); 2316 RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x0015040a); 2317 RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b840b); 2318 } 2319 2320 DPRINTF(("updating PLCP for %s preamble\n", 2321 (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ? "short" : "long")); 2322} 2323 2324void 2325rt2560_updateslot(struct ieee80211com *ic) 2326{ 2327 struct rt2560_softc *sc = ic->ic_if.if_softc; 2328 2329#ifndef IEEE80211_STA_ONLY 2330 if (ic->ic_opmode == IEEE80211_M_HOSTAP) { 2331 /* 2332 * In HostAP mode, we defer setting of new slot time until 2333 * updated ERP Information Element has propagated to all 2334 * associated STAs. 2335 */ 2336 sc->sc_flags |= RT2560_UPDATE_SLOT; 2337 } else 2338#endif 2339 rt2560_set_slottime(sc); 2340} 2341 2342/* 2343 * IEEE 802.11a (and possibly 802.11g) use short slot time. Refer to 2344 * IEEE Std 802.11-1999 pp. 85 to know how these values are computed. 2345 */ 2346void 2347rt2560_set_slottime(struct rt2560_softc *sc) 2348{ 2349 struct ieee80211com *ic = &sc->sc_ic; 2350 uint8_t slottime; 2351 uint16_t sifs, pifs, difs, eifs; 2352 uint32_t tmp; 2353 2354 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 2355 2356 /* define the MAC slot boundaries */ 2357 sifs = RAL_SIFS - RT2560_RXTX_TURNAROUND; 2358 pifs = sifs + slottime; 2359 difs = sifs + 2 * slottime; 2360 eifs = (ic->ic_curmode == IEEE80211_MODE_11B) ? 364 : 60; 2361 2362 tmp = RAL_READ(sc, RT2560_CSR11); 2363 tmp = (tmp & ~0x1f00) | slottime << 8; 2364 RAL_WRITE(sc, RT2560_CSR11, tmp); 2365 2366 tmp = pifs << 16 | sifs; 2367 RAL_WRITE(sc, RT2560_CSR18, tmp); 2368 2369 tmp = eifs << 16 | difs; 2370 RAL_WRITE(sc, RT2560_CSR19, tmp); 2371 2372 DPRINTF(("setting slottime to %uus\n", slottime)); 2373} 2374 2375void 2376rt2560_set_basicrates(struct rt2560_softc *sc) 2377{ 2378 struct ieee80211com *ic = &sc->sc_ic; 2379 2380 /* update basic rate set */ 2381 if (ic->ic_curmode == IEEE80211_MODE_11B) { 2382 /* 11b basic rates: 1, 2Mbps */ 2383 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x3); 2384 } else { 2385 /* 11b/g basic rates: 1, 2, 5.5, 11Mbps */ 2386 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0xf); 2387 } 2388} 2389 2390void 2391rt2560_update_led(struct rt2560_softc *sc, int led1, int led2) 2392{ 2393 uint32_t tmp; 2394 2395 /* set ON period to 70ms and OFF period to 30ms */ 2396 tmp = led1 << 16 | led2 << 17 | 70 << 8 | 30; 2397 RAL_WRITE(sc, RT2560_LEDCSR, tmp); 2398} 2399 2400void 2401rt2560_set_bssid(struct rt2560_softc *sc, uint8_t *bssid) 2402{ 2403 uint32_t tmp; 2404 2405 tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24; 2406 RAL_WRITE(sc, RT2560_CSR5, tmp); 2407 2408 tmp = bssid[4] | bssid[5] << 8; 2409 RAL_WRITE(sc, RT2560_CSR6, tmp); 2410 2411 DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid))); 2412} 2413 2414void 2415rt2560_set_macaddr(struct rt2560_softc *sc, uint8_t *addr) 2416{ 2417 uint32_t tmp; 2418 2419 tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24; 2420 RAL_WRITE(sc, RT2560_CSR3, tmp); 2421 2422 tmp = addr[4] | addr[5] << 8; 2423 RAL_WRITE(sc, RT2560_CSR4, tmp); 2424 2425 DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr))); 2426} 2427 2428void 2429rt2560_get_macaddr(struct rt2560_softc *sc, uint8_t *addr) 2430{ 2431 uint32_t tmp; 2432 2433 tmp = RAL_READ(sc, RT2560_CSR3); 2434 addr[0] = tmp & 0xff; 2435 addr[1] = (tmp >> 8) & 0xff; 2436 addr[2] = (tmp >> 16) & 0xff; 2437 addr[3] = (tmp >> 24); 2438 2439 tmp = RAL_READ(sc, RT2560_CSR4); 2440 addr[4] = tmp & 0xff; 2441 addr[5] = (tmp >> 8) & 0xff; 2442} 2443 2444void 2445rt2560_update_promisc(struct rt2560_softc *sc) 2446{ 2447 struct ifnet *ifp = &sc->sc_ic.ic_if; 2448 uint32_t tmp; 2449 2450 tmp = RAL_READ(sc, RT2560_RXCSR0); 2451 2452 tmp &= ~RT2560_DROP_NOT_TO_ME; 2453 if (!(ifp->if_flags & IFF_PROMISC)) 2454 tmp |= RT2560_DROP_NOT_TO_ME; 2455 2456 RAL_WRITE(sc, RT2560_RXCSR0, tmp); 2457 2458 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? 2459 "entering" : "leaving")); 2460} 2461 2462void 2463rt2560_set_txantenna(struct rt2560_softc *sc, int antenna) 2464{ 2465 uint32_t tmp; 2466 uint8_t tx; 2467 2468 tx = rt2560_bbp_read(sc, RT2560_BBP_TX) & ~RT2560_BBP_ANTMASK; 2469 if (antenna == 1) 2470 tx |= RT2560_BBP_ANTA; 2471 else if (antenna == 2) 2472 tx |= RT2560_BBP_ANTB; 2473 else 2474 tx |= RT2560_BBP_DIVERSITY; 2475 2476 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */ 2477 if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526 || 2478 sc->rf_rev == RT2560_RF_5222) 2479 tx |= RT2560_BBP_FLIPIQ; 2480 2481 rt2560_bbp_write(sc, RT2560_BBP_TX, tx); 2482 2483 /* update values for CCK and OFDM in BBPCSR1 */ 2484 tmp = RAL_READ(sc, RT2560_BBPCSR1) & ~0x00070007; 2485 tmp |= (tx & 0x7) << 16 | (tx & 0x7); 2486 RAL_WRITE(sc, RT2560_BBPCSR1, tmp); 2487} 2488 2489void 2490rt2560_set_rxantenna(struct rt2560_softc *sc, int antenna) 2491{ 2492 uint8_t rx; 2493 2494 rx = rt2560_bbp_read(sc, RT2560_BBP_RX) & ~RT2560_BBP_ANTMASK; 2495 if (antenna == 1) 2496 rx |= RT2560_BBP_ANTA; 2497 else if (antenna == 2) 2498 rx |= RT2560_BBP_ANTB; 2499 else 2500 rx |= RT2560_BBP_DIVERSITY; 2501 2502 /* need to force no I/Q flip for RF 2525e and 2526 */ 2503 if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526) 2504 rx &= ~RT2560_BBP_FLIPIQ; 2505 2506 rt2560_bbp_write(sc, RT2560_BBP_RX, rx); 2507} 2508 2509const char * 2510rt2560_get_rf(int rev) 2511{ 2512 switch (rev) { 2513 case RT2560_RF_2522: return "RT2522"; 2514 case RT2560_RF_2523: return "RT2523"; 2515 case RT2560_RF_2524: return "RT2524"; 2516 case RT2560_RF_2525: return "RT2525"; 2517 case RT2560_RF_2525E: return "RT2525e"; 2518 case RT2560_RF_2526: return "RT2526"; 2519 case RT2560_RF_5222: return "RT5222"; 2520 default: return "unknown"; 2521 } 2522} 2523 2524void 2525rt2560_read_eeprom(struct rt2560_softc *sc) 2526{ 2527 uint16_t val; 2528 int i; 2529 2530 val = rt2560_eeprom_read(sc, RT2560_EEPROM_CONFIG0); 2531 sc->rf_rev = (val >> 11) & 0x1f; 2532 sc->hw_radio = (val >> 10) & 0x1; 2533 sc->led_mode = (val >> 6) & 0x7; 2534 sc->rx_ant = (val >> 4) & 0x3; 2535 sc->tx_ant = (val >> 2) & 0x3; 2536 sc->nb_ant = val & 0x3; 2537 2538 /* read default values for BBP registers */ 2539 for (i = 0; i < 16; i++) { 2540 val = rt2560_eeprom_read(sc, RT2560_EEPROM_BBP_BASE + i); 2541 sc->bbp_prom[i].reg = val >> 8; 2542 sc->bbp_prom[i].val = val & 0xff; 2543 } 2544 2545 /* read Tx power for all b/g channels */ 2546 for (i = 0; i < 14 / 2; i++) { 2547 val = rt2560_eeprom_read(sc, RT2560_EEPROM_TXPOWER + i); 2548 sc->txpow[i * 2] = val >> 8; 2549 sc->txpow[i * 2 + 1] = val & 0xff; 2550 } 2551} 2552 2553int 2554rt2560_bbp_init(struct rt2560_softc *sc) 2555{ 2556 int i, ntries; 2557 2558 /* wait for BBP to be ready */ 2559 for (ntries = 0; ntries < 100; ntries++) { 2560 if (rt2560_bbp_read(sc, RT2560_BBP_VERSION) != 0) 2561 break; 2562 DELAY(1); 2563 } 2564 if (ntries == 100) { 2565 printf("%s: timeout waiting for BBP\n", sc->sc_dev.dv_xname); 2566 return EIO; 2567 } 2568 2569 /* initialize BBP registers to default values */ 2570 for (i = 0; i < nitems(rt2560_def_bbp); i++) { 2571 rt2560_bbp_write(sc, rt2560_def_bbp[i].reg, 2572 rt2560_def_bbp[i].val); 2573 } 2574#if 0 2575 /* initialize BBP registers to values stored in EEPROM */ 2576 for (i = 0; i < 16; i++) { 2577 if (sc->bbp_prom[i].reg == 0xff) 2578 continue; 2579 rt2560_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 2580 } 2581#endif 2582 2583 return 0; 2584} 2585 2586int 2587rt2560_init(struct ifnet *ifp) 2588{ 2589 struct rt2560_softc *sc = ifp->if_softc; 2590 struct ieee80211com *ic = &sc->sc_ic; 2591 uint32_t tmp; 2592 int i; 2593 2594 /* for CardBus, power on the socket */ 2595 if (!(sc->sc_flags & RT2560_ENABLED)) { 2596 if (sc->sc_enable != NULL && (*sc->sc_enable)(sc) != 0) { 2597 printf("%s: could not enable device\n", 2598 sc->sc_dev.dv_xname); 2599 return EIO; 2600 } 2601 sc->sc_flags |= RT2560_ENABLED; 2602 } 2603 2604 rt2560_stop(ifp, 0); 2605 2606 /* setup tx rings */ 2607 tmp = RT2560_PRIO_RING_COUNT << 24 | 2608 RT2560_ATIM_RING_COUNT << 16 | 2609 RT2560_TX_RING_COUNT << 8 | 2610 RT2560_TX_DESC_SIZE; 2611 2612 /* rings _must_ be initialized in this _exact_ order! */ 2613 RAL_WRITE(sc, RT2560_TXCSR2, tmp); 2614 RAL_WRITE(sc, RT2560_TXCSR3, sc->txq.physaddr); 2615 RAL_WRITE(sc, RT2560_TXCSR5, sc->prioq.physaddr); 2616 RAL_WRITE(sc, RT2560_TXCSR4, sc->atimq.physaddr); 2617 RAL_WRITE(sc, RT2560_TXCSR6, sc->bcnq.physaddr); 2618 2619 /* setup rx ring */ 2620 tmp = RT2560_RX_RING_COUNT << 8 | RT2560_RX_DESC_SIZE; 2621 2622 RAL_WRITE(sc, RT2560_RXCSR1, tmp); 2623 RAL_WRITE(sc, RT2560_RXCSR2, sc->rxq.physaddr); 2624 2625 /* initialize MAC registers to default values */ 2626 for (i = 0; i < nitems(rt2560_def_mac); i++) 2627 RAL_WRITE(sc, rt2560_def_mac[i].reg, rt2560_def_mac[i].val); 2628 2629 IEEE80211_ADDR_COPY(ic->ic_myaddr, LLADDR(ifp->if_sadl)); 2630 rt2560_set_macaddr(sc, ic->ic_myaddr); 2631 2632 /* set basic rate set (will be updated later) */ 2633 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x153); 2634 2635 rt2560_set_slottime(sc); 2636 rt2560_update_plcp(sc); 2637 rt2560_update_led(sc, 0, 0); 2638 2639 RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC); 2640 RAL_WRITE(sc, RT2560_CSR1, RT2560_HOST_READY); 2641 2642 if (rt2560_bbp_init(sc) != 0) { 2643 rt2560_stop(ifp, 1); 2644 return EIO; 2645 } 2646 2647 rt2560_set_txantenna(sc, 1); 2648 rt2560_set_rxantenna(sc, 1); 2649 2650 /* set default BSS channel */ 2651 ic->ic_bss->ni_chan = ic->ic_ibss_chan; 2652 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 2653 2654 /* kick Rx */ 2655 tmp = RT2560_DROP_PHY_ERROR | RT2560_DROP_CRC_ERROR; 2656 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2657 tmp |= RT2560_DROP_CTL | RT2560_DROP_VERSION_ERROR; 2658#ifndef IEEE80211_STA_ONLY 2659 if (ic->ic_opmode != IEEE80211_M_HOSTAP) 2660#endif 2661 tmp |= RT2560_DROP_TODS; 2662 if (!(ifp->if_flags & IFF_PROMISC)) 2663 tmp |= RT2560_DROP_NOT_TO_ME; 2664 } 2665 RAL_WRITE(sc, RT2560_RXCSR0, tmp); 2666 2667 /* clear old FCS and Rx FIFO errors */ 2668 RAL_READ(sc, RT2560_CNT0); 2669 RAL_READ(sc, RT2560_CNT4); 2670 2671 /* clear any pending interrupts */ 2672 RAL_WRITE(sc, RT2560_CSR7, 0xffffffff); 2673 2674 /* enable interrupts */ 2675 RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK); 2676 2677 ifp->if_flags &= ~IFF_OACTIVE; 2678 ifp->if_flags |= IFF_RUNNING; 2679 2680 if (ic->ic_opmode == IEEE80211_M_MONITOR) 2681 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 2682 else 2683 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 2684 2685 return 0; 2686} 2687 2688void 2689rt2560_stop(struct ifnet *ifp, int disable) 2690{ 2691 struct rt2560_softc *sc = ifp->if_softc; 2692 struct ieee80211com *ic = &sc->sc_ic; 2693 2694 sc->sc_tx_timer = 0; 2695 sc->sc_flags &= ~(RT2560_PRIO_OACTIVE|RT2560_DATA_OACTIVE); 2696 ifp->if_timer = 0; 2697 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 2698 2699 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); /* free all nodes */ 2700 2701 /* abort Tx */ 2702 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_ABORT_TX); 2703 2704 /* disable Rx */ 2705 RAL_WRITE(sc, RT2560_RXCSR0, RT2560_DISABLE_RX); 2706 2707 /* reset ASIC (and thus, BBP) */ 2708 RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC); 2709 RAL_WRITE(sc, RT2560_CSR1, 0); 2710 2711 /* disable interrupts */ 2712 RAL_WRITE(sc, RT2560_CSR8, 0xffffffff); 2713 2714 /* clear any pending interrupt */ 2715 RAL_WRITE(sc, RT2560_CSR7, 0xffffffff); 2716 2717 /* reset Tx and Rx rings */ 2718 rt2560_reset_tx_ring(sc, &sc->txq); 2719 rt2560_reset_tx_ring(sc, &sc->atimq); 2720 rt2560_reset_tx_ring(sc, &sc->prioq); 2721 rt2560_reset_tx_ring(sc, &sc->bcnq); 2722 rt2560_reset_rx_ring(sc, &sc->rxq); 2723 2724 /* for CardBus, power down the socket */ 2725 if (disable && sc->sc_disable != NULL) { 2726 if (sc->sc_flags & RT2560_ENABLED) { 2727 (*sc->sc_disable)(sc); 2728 sc->sc_flags &= ~RT2560_ENABLED; 2729 } 2730 } 2731} 2732 2733struct cfdriver ral_cd = { 2734 NULL, "ral", DV_IFNET 2735}; 2736