rt2560.c revision 1.67
1/* $OpenBSD: rt2560.c,v 1.67 2014/09/06 05:41:35 jsg Exp $ */ 2 3/*- 4 * Copyright (c) 2005, 2006 5 * Damien Bergamini <damien.bergamini@free.fr> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20/*- 21 * Ralink Technology RT2560 chipset driver 22 * http://www.ralinktech.com/ 23 */ 24 25#include "bpfilter.h" 26 27#include <sys/param.h> 28#include <sys/sockio.h> 29#include <sys/mbuf.h> 30#include <sys/kernel.h> 31#include <sys/socket.h> 32#include <sys/systm.h> 33#include <sys/malloc.h> 34#include <sys/timeout.h> 35#include <sys/conf.h> 36#include <sys/device.h> 37 38#include <machine/bus.h> 39#include <machine/endian.h> 40#include <machine/intr.h> 41 42#if NBPFILTER > 0 43#include <net/bpf.h> 44#endif 45#include <net/if.h> 46#include <net/if_arp.h> 47#include <net/if_dl.h> 48#include <net/if_media.h> 49#include <net/if_types.h> 50 51#include <netinet/in.h> 52#include <netinet/if_ether.h> 53 54#include <net80211/ieee80211_var.h> 55#include <net80211/ieee80211_amrr.h> 56#include <net80211/ieee80211_radiotap.h> 57 58#include <dev/ic/rt2560reg.h> 59#include <dev/ic/rt2560var.h> 60 61#ifdef RAL_DEBUG 62#define DPRINTF(x) do { if (rt2560_debug > 0) printf x; } while (0) 63#define DPRINTFN(n, x) do { if (rt2560_debug >= (n)) printf x; } while (0) 64int rt2560_debug = 1; 65#else 66#define DPRINTF(x) 67#define DPRINTFN(n, x) 68#endif 69 70int rt2560_alloc_tx_ring(struct rt2560_softc *, 71 struct rt2560_tx_ring *, int); 72void rt2560_reset_tx_ring(struct rt2560_softc *, 73 struct rt2560_tx_ring *); 74void rt2560_free_tx_ring(struct rt2560_softc *, 75 struct rt2560_tx_ring *); 76int rt2560_alloc_rx_ring(struct rt2560_softc *, 77 struct rt2560_rx_ring *, int); 78void rt2560_reset_rx_ring(struct rt2560_softc *, 79 struct rt2560_rx_ring *); 80void rt2560_free_rx_ring(struct rt2560_softc *, 81 struct rt2560_rx_ring *); 82struct ieee80211_node *rt2560_node_alloc(struct ieee80211com *); 83int rt2560_media_change(struct ifnet *); 84void rt2560_next_scan(void *); 85void rt2560_iter_func(void *, struct ieee80211_node *); 86void rt2560_amrr_timeout(void *); 87void rt2560_newassoc(struct ieee80211com *, struct ieee80211_node *, 88 int); 89int rt2560_newstate(struct ieee80211com *, enum ieee80211_state, 90 int); 91uint16_t rt2560_eeprom_read(struct rt2560_softc *, uint8_t); 92void rt2560_encryption_intr(struct rt2560_softc *); 93void rt2560_tx_intr(struct rt2560_softc *); 94void rt2560_prio_intr(struct rt2560_softc *); 95void rt2560_decryption_intr(struct rt2560_softc *); 96void rt2560_rx_intr(struct rt2560_softc *); 97#ifndef IEEE80211_STA_ONLY 98void rt2560_beacon_expire(struct rt2560_softc *); 99#endif 100void rt2560_wakeup_expire(struct rt2560_softc *); 101#if NBPFILTER > 0 102uint8_t rt2560_rxrate(const struct rt2560_rx_desc *); 103#endif 104int rt2560_ack_rate(struct ieee80211com *, int); 105uint16_t rt2560_txtime(int, int, uint32_t); 106uint8_t rt2560_plcp_signal(int); 107void rt2560_setup_tx_desc(struct rt2560_softc *, 108 struct rt2560_tx_desc *, uint32_t, int, int, int, 109 bus_addr_t); 110#ifndef IEEE80211_STA_ONLY 111int rt2560_tx_bcn(struct rt2560_softc *, struct mbuf *, 112 struct ieee80211_node *); 113#endif 114int rt2560_tx_mgt(struct rt2560_softc *, struct mbuf *, 115 struct ieee80211_node *); 116int rt2560_tx_data(struct rt2560_softc *, struct mbuf *, 117 struct ieee80211_node *); 118void rt2560_start(struct ifnet *); 119void rt2560_watchdog(struct ifnet *); 120int rt2560_ioctl(struct ifnet *, u_long, caddr_t); 121void rt2560_bbp_write(struct rt2560_softc *, uint8_t, uint8_t); 122uint8_t rt2560_bbp_read(struct rt2560_softc *, uint8_t); 123void rt2560_rf_write(struct rt2560_softc *, uint8_t, uint32_t); 124void rt2560_set_chan(struct rt2560_softc *, 125 struct ieee80211_channel *); 126void rt2560_disable_rf_tune(struct rt2560_softc *); 127void rt2560_enable_tsf_sync(struct rt2560_softc *); 128void rt2560_update_plcp(struct rt2560_softc *); 129void rt2560_updateslot(struct ieee80211com *); 130void rt2560_set_slottime(struct rt2560_softc *); 131void rt2560_set_basicrates(struct rt2560_softc *); 132void rt2560_update_led(struct rt2560_softc *, int, int); 133void rt2560_set_bssid(struct rt2560_softc *, uint8_t *); 134void rt2560_set_macaddr(struct rt2560_softc *, uint8_t *); 135void rt2560_get_macaddr(struct rt2560_softc *, uint8_t *); 136void rt2560_update_promisc(struct rt2560_softc *); 137void rt2560_set_txantenna(struct rt2560_softc *, int); 138void rt2560_set_rxantenna(struct rt2560_softc *, int); 139const char *rt2560_get_rf(int); 140void rt2560_read_eeprom(struct rt2560_softc *); 141int rt2560_bbp_init(struct rt2560_softc *); 142int rt2560_init(struct ifnet *); 143void rt2560_stop(struct ifnet *, int); 144 145static const struct { 146 uint32_t reg; 147 uint32_t val; 148} rt2560_def_mac[] = { 149 RT2560_DEF_MAC 150}; 151 152static const struct { 153 uint8_t reg; 154 uint8_t val; 155} rt2560_def_bbp[] = { 156 RT2560_DEF_BBP 157}; 158 159static const uint32_t rt2560_rf2522_r2[] = RT2560_RF2522_R2; 160static const uint32_t rt2560_rf2523_r2[] = RT2560_RF2523_R2; 161static const uint32_t rt2560_rf2524_r2[] = RT2560_RF2524_R2; 162static const uint32_t rt2560_rf2525_r2[] = RT2560_RF2525_R2; 163static const uint32_t rt2560_rf2525_hi_r2[] = RT2560_RF2525_HI_R2; 164static const uint32_t rt2560_rf2525e_r2[] = RT2560_RF2525E_R2; 165static const uint32_t rt2560_rf2526_r2[] = RT2560_RF2526_R2; 166static const uint32_t rt2560_rf2526_hi_r2[] = RT2560_RF2526_HI_R2; 167 168int 169rt2560_attach(void *xsc, int id) 170{ 171 struct rt2560_softc *sc = xsc; 172 struct ieee80211com *ic = &sc->sc_ic; 173 struct ifnet *ifp = &ic->ic_if; 174 int error, i; 175 176 sc->amrr.amrr_min_success_threshold = 1; 177 sc->amrr.amrr_max_success_threshold = 15; 178 timeout_set(&sc->amrr_to, rt2560_amrr_timeout, sc); 179 timeout_set(&sc->scan_to, rt2560_next_scan, sc); 180 181 /* retrieve RT2560 rev. no */ 182 sc->asic_rev = RAL_READ(sc, RT2560_CSR0); 183 184 /* retrieve MAC address */ 185 rt2560_get_macaddr(sc, ic->ic_myaddr); 186 printf(", address %s\n", ether_sprintf(ic->ic_myaddr)); 187 188 /* retrieve RF rev. no and various other things from EEPROM */ 189 rt2560_read_eeprom(sc); 190 191 printf("%s: MAC/BBP RT2560 (rev 0x%02x), RF %s\n", sc->sc_dev.dv_xname, 192 sc->asic_rev, rt2560_get_rf(sc->rf_rev)); 193 194 /* 195 * Allocate Tx and Rx rings. 196 */ 197 error = rt2560_alloc_tx_ring(sc, &sc->txq, RT2560_TX_RING_COUNT); 198 if (error != 0) { 199 printf("%s: could not allocate Tx ring\n", 200 sc->sc_dev.dv_xname); 201 goto fail1; 202 } 203 error = rt2560_alloc_tx_ring(sc, &sc->atimq, RT2560_ATIM_RING_COUNT); 204 if (error != 0) { 205 printf("%s: could not allocate ATIM ring\n", 206 sc->sc_dev.dv_xname); 207 goto fail2; 208 } 209 error = rt2560_alloc_tx_ring(sc, &sc->prioq, RT2560_PRIO_RING_COUNT); 210 if (error != 0) { 211 printf("%s: could not allocate Prio ring\n", 212 sc->sc_dev.dv_xname); 213 goto fail3; 214 } 215 error = rt2560_alloc_tx_ring(sc, &sc->bcnq, RT2560_BEACON_RING_COUNT); 216 if (error != 0) { 217 printf("%s: could not allocate Beacon ring\n", 218 sc->sc_dev.dv_xname); 219 goto fail4; 220 } 221 error = rt2560_alloc_rx_ring(sc, &sc->rxq, RT2560_RX_RING_COUNT); 222 if (error != 0) { 223 printf("%s: could not allocate Rx ring\n", 224 sc->sc_dev.dv_xname); 225 goto fail5; 226 } 227 228 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 229 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 230 ic->ic_state = IEEE80211_S_INIT; 231 232 /* set device capabilities */ 233 ic->ic_caps = 234 IEEE80211_C_MONITOR | /* monitor mode supported */ 235#ifndef IEEE80211_STA_ONLY 236 IEEE80211_C_IBSS | /* IBSS mode supported */ 237 IEEE80211_C_HOSTAP | /* HostAp mode supported */ 238#endif 239 IEEE80211_C_TXPMGT | /* tx power management */ 240 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 241 IEEE80211_C_SHSLOT | /* short slot time supported */ 242 IEEE80211_C_WEP | /* s/w WEP */ 243 IEEE80211_C_RSN; /* WPA/RSN */ 244 245 /* set supported .11b and .11g rates */ 246 ic->ic_sup_rates[IEEE80211_MODE_11B] = ieee80211_std_rateset_11b; 247 ic->ic_sup_rates[IEEE80211_MODE_11G] = ieee80211_std_rateset_11g; 248 249 /* set supported .11b and .11g channels (1 through 14) */ 250 for (i = 1; i <= 14; i++) { 251 ic->ic_channels[i].ic_freq = 252 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 253 ic->ic_channels[i].ic_flags = 254 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 255 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 256 } 257 258 ifp->if_softc = sc; 259 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 260 ifp->if_ioctl = rt2560_ioctl; 261 ifp->if_start = rt2560_start; 262 ifp->if_watchdog = rt2560_watchdog; 263 IFQ_SET_READY(&ifp->if_snd); 264 memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ); 265 266 if_attach(ifp); 267 ieee80211_ifattach(ifp); 268 ic->ic_node_alloc = rt2560_node_alloc; 269 ic->ic_newassoc = rt2560_newassoc; 270 ic->ic_updateslot = rt2560_updateslot; 271 272 /* override state transition machine */ 273 sc->sc_newstate = ic->ic_newstate; 274 ic->ic_newstate = rt2560_newstate; 275 ieee80211_media_init(ifp, rt2560_media_change, ieee80211_media_status); 276 277#if NBPFILTER > 0 278 bpfattach(&sc->sc_drvbpf, ifp, DLT_IEEE802_11_RADIO, 279 sizeof (struct ieee80211_frame) + 64); 280 281 sc->sc_rxtap_len = sizeof sc->sc_rxtapu; 282 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 283 sc->sc_rxtap.wr_ihdr.it_present = htole32(RT2560_RX_RADIOTAP_PRESENT); 284 285 sc->sc_txtap_len = sizeof sc->sc_txtapu; 286 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 287 sc->sc_txtap.wt_ihdr.it_present = htole32(RT2560_TX_RADIOTAP_PRESENT); 288#endif 289 return 0; 290 291fail5: rt2560_free_tx_ring(sc, &sc->bcnq); 292fail4: rt2560_free_tx_ring(sc, &sc->prioq); 293fail3: rt2560_free_tx_ring(sc, &sc->atimq); 294fail2: rt2560_free_tx_ring(sc, &sc->txq); 295fail1: return ENXIO; 296} 297 298int 299rt2560_detach(void *xsc) 300{ 301 struct rt2560_softc *sc = xsc; 302 struct ifnet *ifp = &sc->sc_ic.ic_if; 303 304 timeout_del(&sc->scan_to); 305 timeout_del(&sc->amrr_to); 306 307 ieee80211_ifdetach(ifp); /* free all nodes */ 308 if_detach(ifp); 309 310 rt2560_free_tx_ring(sc, &sc->txq); 311 rt2560_free_tx_ring(sc, &sc->atimq); 312 rt2560_free_tx_ring(sc, &sc->prioq); 313 rt2560_free_tx_ring(sc, &sc->bcnq); 314 rt2560_free_rx_ring(sc, &sc->rxq); 315 316 return 0; 317} 318 319void 320rt2560_suspend(void *xsc) 321{ 322 struct rt2560_softc *sc = xsc; 323 struct ifnet *ifp = &sc->sc_ic.ic_if; 324 325 if (ifp->if_flags & IFF_RUNNING) 326 rt2560_stop(ifp, 1); 327} 328 329void 330rt2560_wakeup(void *xsc) 331{ 332 struct rt2560_softc *sc = xsc; 333 struct ifnet *ifp = &sc->sc_ic.ic_if; 334 335 if (ifp->if_flags & IFF_UP) 336 rt2560_init(ifp); 337} 338 339int 340rt2560_alloc_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring, 341 int count) 342{ 343 int i, nsegs, error; 344 345 ring->count = count; 346 ring->queued = 0; 347 ring->cur = ring->next = 0; 348 ring->cur_encrypt = ring->next_encrypt = 0; 349 350 error = bus_dmamap_create(sc->sc_dmat, count * RT2560_TX_DESC_SIZE, 1, 351 count * RT2560_TX_DESC_SIZE, 0, BUS_DMA_NOWAIT, &ring->map); 352 if (error != 0) { 353 printf("%s: could not create desc DMA map\n", 354 sc->sc_dev.dv_xname); 355 goto fail; 356 } 357 358 error = bus_dmamem_alloc(sc->sc_dmat, count * RT2560_TX_DESC_SIZE, 359 PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT | BUS_DMA_ZERO); 360 if (error != 0) { 361 printf("%s: could not allocate DMA memory\n", 362 sc->sc_dev.dv_xname); 363 goto fail; 364 } 365 366 error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs, 367 count * RT2560_TX_DESC_SIZE, (caddr_t *)&ring->desc, 368 BUS_DMA_NOWAIT); 369 if (error != 0) { 370 printf("%s: can't map desc DMA memory\n", 371 sc->sc_dev.dv_xname); 372 goto fail; 373 } 374 375 error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc, 376 count * RT2560_TX_DESC_SIZE, NULL, BUS_DMA_NOWAIT); 377 if (error != 0) { 378 printf("%s: could not load desc DMA map\n", 379 sc->sc_dev.dv_xname); 380 goto fail; 381 } 382 383 ring->physaddr = ring->map->dm_segs->ds_addr; 384 385 ring->data = mallocarray(count, sizeof (struct rt2560_tx_data), 386 M_DEVBUF, M_NOWAIT | M_ZERO); 387 if (ring->data == NULL) { 388 printf("%s: could not allocate soft data\n", 389 sc->sc_dev.dv_xname); 390 error = ENOMEM; 391 goto fail; 392 } 393 394 for (i = 0; i < count; i++) { 395 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 396 RT2560_MAX_SCATTER, MCLBYTES, 0, BUS_DMA_NOWAIT, 397 &ring->data[i].map); 398 if (error != 0) { 399 printf("%s: could not create DMA map\n", 400 sc->sc_dev.dv_xname); 401 goto fail; 402 } 403 } 404 405 return 0; 406 407fail: rt2560_free_tx_ring(sc, ring); 408 return error; 409} 410 411void 412rt2560_reset_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring) 413{ 414 int i; 415 416 for (i = 0; i < ring->count; i++) { 417 struct rt2560_tx_desc *desc = &ring->desc[i]; 418 struct rt2560_tx_data *data = &ring->data[i]; 419 420 if (data->m != NULL) { 421 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 422 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 423 bus_dmamap_unload(sc->sc_dmat, data->map); 424 m_freem(data->m); 425 data->m = NULL; 426 } 427 428 /* 429 * The node has already been freed at that point so don't call 430 * ieee80211_release_node() here. 431 */ 432 data->ni = NULL; 433 434 desc->flags = 0; 435 } 436 437 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 438 BUS_DMASYNC_PREWRITE); 439 440 ring->queued = 0; 441 ring->cur = ring->next = 0; 442 ring->cur_encrypt = ring->next_encrypt = 0; 443} 444 445void 446rt2560_free_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring) 447{ 448 int i; 449 450 if (ring->desc != NULL) { 451 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, 452 ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 453 bus_dmamap_unload(sc->sc_dmat, ring->map); 454 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)ring->desc, 455 ring->count * RT2560_TX_DESC_SIZE); 456 bus_dmamem_free(sc->sc_dmat, &ring->seg, 1); 457 } 458 459 if (ring->data != NULL) { 460 for (i = 0; i < ring->count; i++) { 461 struct rt2560_tx_data *data = &ring->data[i]; 462 463 if (data->m != NULL) { 464 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 465 data->map->dm_mapsize, 466 BUS_DMASYNC_POSTWRITE); 467 bus_dmamap_unload(sc->sc_dmat, data->map); 468 m_freem(data->m); 469 } 470 471 /* 472 * The node has already been freed at that point so 473 * don't call ieee80211_release_node() here. 474 */ 475 data->ni = NULL; 476 477 if (data->map != NULL) 478 bus_dmamap_destroy(sc->sc_dmat, data->map); 479 } 480 free(ring->data, M_DEVBUF, 0); 481 } 482} 483 484int 485rt2560_alloc_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring, 486 int count) 487{ 488 int i, nsegs, error; 489 490 ring->count = count; 491 ring->cur = ring->next = 0; 492 ring->cur_decrypt = 0; 493 494 error = bus_dmamap_create(sc->sc_dmat, count * RT2560_RX_DESC_SIZE, 1, 495 count * RT2560_RX_DESC_SIZE, 0, BUS_DMA_NOWAIT, &ring->map); 496 if (error != 0) { 497 printf("%s: could not create desc DMA map\n", 498 sc->sc_dev.dv_xname); 499 goto fail; 500 } 501 502 error = bus_dmamem_alloc(sc->sc_dmat, count * RT2560_RX_DESC_SIZE, 503 PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT | BUS_DMA_ZERO); 504 if (error != 0) { 505 printf("%s: could not allocate DMA memory\n", 506 sc->sc_dev.dv_xname); 507 goto fail; 508 } 509 510 error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs, 511 count * RT2560_RX_DESC_SIZE, (caddr_t *)&ring->desc, 512 BUS_DMA_NOWAIT); 513 if (error != 0) { 514 printf("%s: can't map desc DMA memory\n", 515 sc->sc_dev.dv_xname); 516 goto fail; 517 } 518 519 error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc, 520 count * RT2560_RX_DESC_SIZE, NULL, BUS_DMA_NOWAIT); 521 if (error != 0) { 522 printf("%s: could not load desc DMA map\n", 523 sc->sc_dev.dv_xname); 524 goto fail; 525 } 526 527 ring->physaddr = ring->map->dm_segs->ds_addr; 528 529 ring->data = mallocarray(count, sizeof (struct rt2560_rx_data), 530 M_DEVBUF, M_NOWAIT | M_ZERO); 531 if (ring->data == NULL) { 532 printf("%s: could not allocate soft data\n", 533 sc->sc_dev.dv_xname); 534 error = ENOMEM; 535 goto fail; 536 } 537 538 /* 539 * Pre-allocate Rx buffers and populate Rx ring. 540 */ 541 for (i = 0; i < count; i++) { 542 struct rt2560_rx_desc *desc = &sc->rxq.desc[i]; 543 struct rt2560_rx_data *data = &sc->rxq.data[i]; 544 545 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES, 546 0, BUS_DMA_NOWAIT, &data->map); 547 if (error != 0) { 548 printf("%s: could not create DMA map\n", 549 sc->sc_dev.dv_xname); 550 goto fail; 551 } 552 553 MGETHDR(data->m, M_DONTWAIT, MT_DATA); 554 if (data->m == NULL) { 555 printf("%s: could not allocate rx mbuf\n", 556 sc->sc_dev.dv_xname); 557 error = ENOMEM; 558 goto fail; 559 } 560 MCLGET(data->m, M_DONTWAIT); 561 if (!(data->m->m_flags & M_EXT)) { 562 printf("%s: could not allocate rx mbuf cluster\n", 563 sc->sc_dev.dv_xname); 564 error = ENOMEM; 565 goto fail; 566 } 567 568 error = bus_dmamap_load(sc->sc_dmat, data->map, 569 mtod(data->m, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT); 570 if (error != 0) { 571 printf("%s: could not load rx buf DMA map", 572 sc->sc_dev.dv_xname); 573 goto fail; 574 } 575 576 desc->flags = htole32(RT2560_RX_BUSY); 577 desc->physaddr = htole32(data->map->dm_segs->ds_addr); 578 } 579 580 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 581 BUS_DMASYNC_PREWRITE); 582 583 return 0; 584 585fail: rt2560_free_rx_ring(sc, ring); 586 return error; 587} 588 589void 590rt2560_reset_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring) 591{ 592 int i; 593 594 for (i = 0; i < ring->count; i++) { 595 ring->desc[i].flags = htole32(RT2560_RX_BUSY); 596 ring->data[i].drop = 0; 597 } 598 599 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 600 BUS_DMASYNC_PREWRITE); 601 602 ring->cur = ring->next = 0; 603 ring->cur_decrypt = 0; 604} 605 606void 607rt2560_free_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring) 608{ 609 int i; 610 611 if (ring->desc != NULL) { 612 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, 613 ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 614 bus_dmamap_unload(sc->sc_dmat, ring->map); 615 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)ring->desc, 616 ring->count * RT2560_RX_DESC_SIZE); 617 bus_dmamem_free(sc->sc_dmat, &ring->seg, 1); 618 } 619 620 if (ring->data != NULL) { 621 for (i = 0; i < ring->count; i++) { 622 struct rt2560_rx_data *data = &ring->data[i]; 623 624 if (data->m != NULL) { 625 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 626 data->map->dm_mapsize, 627 BUS_DMASYNC_POSTREAD); 628 bus_dmamap_unload(sc->sc_dmat, data->map); 629 m_freem(data->m); 630 } 631 632 if (data->map != NULL) 633 bus_dmamap_destroy(sc->sc_dmat, data->map); 634 } 635 free(ring->data, M_DEVBUF, 0); 636 } 637} 638 639struct ieee80211_node * 640rt2560_node_alloc(struct ieee80211com *ic) 641{ 642 return malloc(sizeof (struct rt2560_node), M_DEVBUF, 643 M_NOWAIT | M_ZERO); 644} 645 646int 647rt2560_media_change(struct ifnet *ifp) 648{ 649 int error; 650 651 error = ieee80211_media_change(ifp); 652 if (error != ENETRESET) 653 return error; 654 655 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 656 rt2560_init(ifp); 657 658 return 0; 659} 660 661/* 662 * This function is called periodically (every 200ms) during scanning to 663 * switch from one channel to another. 664 */ 665void 666rt2560_next_scan(void *arg) 667{ 668 struct rt2560_softc *sc = arg; 669 struct ieee80211com *ic = &sc->sc_ic; 670 struct ifnet *ifp = &ic->ic_if; 671 int s; 672 673 s = splnet(); 674 if (ic->ic_state == IEEE80211_S_SCAN) 675 ieee80211_next_scan(ifp); 676 splx(s); 677} 678 679/* 680 * This function is called for each neighbor node. 681 */ 682void 683rt2560_iter_func(void *arg, struct ieee80211_node *ni) 684{ 685 struct rt2560_softc *sc = arg; 686 struct rt2560_node *rn = (struct rt2560_node *)ni; 687 688 ieee80211_amrr_choose(&sc->amrr, ni, &rn->amn); 689} 690 691void 692rt2560_amrr_timeout(void *arg) 693{ 694 struct rt2560_softc *sc = arg; 695 struct ieee80211com *ic = &sc->sc_ic; 696 int s; 697 698 s = splnet(); 699 if (ic->ic_opmode == IEEE80211_M_STA) 700 rt2560_iter_func(sc, ic->ic_bss); 701#ifndef IEEE80211_STA_ONLY 702 else 703 ieee80211_iterate_nodes(ic, rt2560_iter_func, sc); 704#endif 705 splx(s); 706 707 timeout_add_msec(&sc->amrr_to, 500); 708} 709 710void 711rt2560_newassoc(struct ieee80211com *ic, struct ieee80211_node *ni, int isnew) 712{ 713 struct rt2560_softc *sc = ic->ic_softc; 714 int i; 715 716 ieee80211_amrr_node_init(&sc->amrr, &((struct rt2560_node *)ni)->amn); 717 718 /* set rate to some reasonable initial value */ 719 for (i = ni->ni_rates.rs_nrates - 1; 720 i > 0 && (ni->ni_rates.rs_rates[i] & IEEE80211_RATE_VAL) > 72; 721 i--); 722 ni->ni_txrate = i; 723} 724 725int 726rt2560_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg) 727{ 728 struct rt2560_softc *sc = ic->ic_if.if_softc; 729 enum ieee80211_state ostate; 730 struct ieee80211_node *ni; 731 int error = 0; 732 733 ostate = ic->ic_state; 734 timeout_del(&sc->scan_to); 735 timeout_del(&sc->amrr_to); 736 737 switch (nstate) { 738 case IEEE80211_S_INIT: 739 if (ostate == IEEE80211_S_RUN) { 740 /* abort TSF synchronization */ 741 RAL_WRITE(sc, RT2560_CSR14, 0); 742 743 /* turn association led off */ 744 rt2560_update_led(sc, 0, 0); 745 } 746 break; 747 748 case IEEE80211_S_SCAN: 749 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 750 timeout_add_msec(&sc->scan_to, 200); 751 break; 752 753 case IEEE80211_S_AUTH: 754 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 755 break; 756 757 case IEEE80211_S_ASSOC: 758 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 759 break; 760 761 case IEEE80211_S_RUN: 762 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 763 764 ni = ic->ic_bss; 765 766 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 767 rt2560_update_plcp(sc); 768 rt2560_set_slottime(sc); 769 rt2560_set_basicrates(sc); 770 rt2560_set_bssid(sc, ni->ni_bssid); 771 } 772 773#ifndef IEEE80211_STA_ONLY 774 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 775 ic->ic_opmode == IEEE80211_M_IBSS) { 776 struct mbuf *m = ieee80211_beacon_alloc(ic, ni); 777 if (m == NULL) { 778 printf("%s: could not allocate beacon\n", 779 sc->sc_dev.dv_xname); 780 error = ENOBUFS; 781 break; 782 } 783 784 error = rt2560_tx_bcn(sc, m, ni); 785 if (error != 0) 786 break; 787 } 788#endif 789 790 /* turn assocation led on */ 791 rt2560_update_led(sc, 1, 0); 792 793 if (ic->ic_opmode == IEEE80211_M_STA) { 794 /* fake a join to init the tx rate */ 795 rt2560_newassoc(ic, ni, 1); 796 } 797 798 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 799 /* start automatic rate control timer */ 800 if (ic->ic_fixed_rate == -1) 801 timeout_add_msec(&sc->amrr_to, 500); 802 803 rt2560_enable_tsf_sync(sc); 804 } 805 break; 806 } 807 808 return (error != 0) ? error : sc->sc_newstate(ic, nstate, arg); 809} 810 811/* 812 * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46 or 813 * 93C66). 814 */ 815uint16_t 816rt2560_eeprom_read(struct rt2560_softc *sc, uint8_t addr) 817{ 818 uint32_t tmp; 819 uint16_t val; 820 int n; 821 822 /* clock C once before the first command */ 823 RT2560_EEPROM_CTL(sc, 0); 824 825 RT2560_EEPROM_CTL(sc, RT2560_S); 826 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 827 RT2560_EEPROM_CTL(sc, RT2560_S); 828 829 /* write start bit (1) */ 830 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D); 831 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C); 832 833 /* write READ opcode (10) */ 834 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D); 835 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C); 836 RT2560_EEPROM_CTL(sc, RT2560_S); 837 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 838 839 /* write address (A5-A0 or A7-A0) */ 840 n = (RAL_READ(sc, RT2560_CSR21) & RT2560_93C46) ? 5 : 7; 841 for (; n >= 0; n--) { 842 RT2560_EEPROM_CTL(sc, RT2560_S | 843 (((addr >> n) & 1) << RT2560_SHIFT_D)); 844 RT2560_EEPROM_CTL(sc, RT2560_S | 845 (((addr >> n) & 1) << RT2560_SHIFT_D) | RT2560_C); 846 } 847 848 RT2560_EEPROM_CTL(sc, RT2560_S); 849 850 /* read data Q15-Q0 */ 851 val = 0; 852 for (n = 15; n >= 0; n--) { 853 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 854 tmp = RAL_READ(sc, RT2560_CSR21); 855 val |= ((tmp & RT2560_Q) >> RT2560_SHIFT_Q) << n; 856 RT2560_EEPROM_CTL(sc, RT2560_S); 857 } 858 859 RT2560_EEPROM_CTL(sc, 0); 860 861 /* clear Chip Select and clock C */ 862 RT2560_EEPROM_CTL(sc, RT2560_S); 863 RT2560_EEPROM_CTL(sc, 0); 864 RT2560_EEPROM_CTL(sc, RT2560_C); 865 866 return val; 867} 868 869/* 870 * Some frames were processed by the hardware cipher engine and are ready for 871 * transmission. 872 */ 873void 874rt2560_encryption_intr(struct rt2560_softc *sc) 875{ 876 int hw; 877 878 /* retrieve last descriptor index processed by cipher engine */ 879 hw = (RAL_READ(sc, RT2560_SECCSR1) - sc->txq.physaddr) / 880 RT2560_TX_DESC_SIZE; 881 882 for (; sc->txq.next_encrypt != hw;) { 883 struct rt2560_tx_desc *desc = 884 &sc->txq.desc[sc->txq.next_encrypt]; 885 886 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 887 sc->txq.next_encrypt * RT2560_TX_DESC_SIZE, 888 RT2560_TX_DESC_SIZE, BUS_DMASYNC_POSTREAD); 889 890 if (letoh32(desc->flags) & 891 (RT2560_TX_BUSY | RT2560_TX_CIPHER_BUSY)) 892 break; 893 894 /* for TKIP, swap eiv field to fix a bug in ASIC */ 895 if ((letoh32(desc->flags) & RT2560_TX_CIPHER_MASK) == 896 RT2560_TX_CIPHER_TKIP) 897 desc->eiv = swap32(desc->eiv); 898 899 /* mark the frame ready for transmission */ 900 desc->flags |= htole32(RT2560_TX_BUSY | RT2560_TX_VALID); 901 902 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 903 sc->txq.next_encrypt * RT2560_TX_DESC_SIZE, 904 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 905 906 DPRINTFN(15, ("encryption done idx=%u\n", 907 sc->txq.next_encrypt)); 908 909 sc->txq.next_encrypt = 910 (sc->txq.next_encrypt + 1) % RT2560_TX_RING_COUNT; 911 } 912 913 /* kick Tx */ 914 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_TX); 915} 916 917void 918rt2560_tx_intr(struct rt2560_softc *sc) 919{ 920 struct ieee80211com *ic = &sc->sc_ic; 921 struct ifnet *ifp = &ic->ic_if; 922 923 for (;;) { 924 struct rt2560_tx_desc *desc = &sc->txq.desc[sc->txq.next]; 925 struct rt2560_tx_data *data = &sc->txq.data[sc->txq.next]; 926 struct rt2560_node *rn; 927 928 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 929 sc->txq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 930 BUS_DMASYNC_POSTREAD); 931 932 if ((letoh32(desc->flags) & RT2560_TX_BUSY) || 933 (letoh32(desc->flags) & RT2560_TX_CIPHER_BUSY) || 934 !(letoh32(desc->flags) & RT2560_TX_VALID)) 935 break; 936 937 rn = (struct rt2560_node *)data->ni; 938 939 switch (letoh32(desc->flags) & RT2560_TX_RESULT_MASK) { 940 case RT2560_TX_SUCCESS: 941 DPRINTFN(10, ("data frame sent successfully\n")); 942 rn->amn.amn_txcnt++; 943 ifp->if_opackets++; 944 break; 945 946 case RT2560_TX_SUCCESS_RETRY: 947 DPRINTFN(9, ("data frame sent after %u retries\n", 948 (letoh32(desc->flags) >> 5) & 0x7)); 949 rn->amn.amn_txcnt++; 950 rn->amn.amn_retrycnt++; 951 ifp->if_opackets++; 952 break; 953 954 case RT2560_TX_FAIL_RETRY: 955 DPRINTFN(9, ("sending data frame failed (too much " 956 "retries)\n")); 957 rn->amn.amn_txcnt++; 958 rn->amn.amn_retrycnt++; 959 ifp->if_oerrors++; 960 break; 961 962 case RT2560_TX_FAIL_INVALID: 963 case RT2560_TX_FAIL_OTHER: 964 default: 965 printf("%s: sending data frame failed 0x%08x\n", 966 sc->sc_dev.dv_xname, letoh32(desc->flags)); 967 ifp->if_oerrors++; 968 } 969 970 /* descriptor is no longer valid */ 971 desc->flags &= ~htole32(RT2560_TX_VALID); 972 973 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 974 sc->txq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 975 BUS_DMASYNC_PREWRITE); 976 977 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 978 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 979 bus_dmamap_unload(sc->sc_dmat, data->map); 980 m_freem(data->m); 981 data->m = NULL; 982 ieee80211_release_node(ic, data->ni); 983 data->ni = NULL; 984 985 DPRINTFN(15, ("tx done idx=%u\n", sc->txq.next)); 986 987 sc->txq.queued--; 988 sc->txq.next = (sc->txq.next + 1) % RT2560_TX_RING_COUNT; 989 } 990 991 if (sc->txq.queued == 0 && sc->prioq.queued == 0) 992 sc->sc_tx_timer = 0; 993 if (sc->txq.queued < RT2560_TX_RING_COUNT - 1) { 994 sc->sc_flags &= ~RT2560_DATA_OACTIVE; 995 if (!(sc->sc_flags & (RT2560_DATA_OACTIVE|RT2560_PRIO_OACTIVE))) 996 ifp->if_flags &= ~IFF_OACTIVE; 997 rt2560_start(ifp); 998 } 999} 1000 1001void 1002rt2560_prio_intr(struct rt2560_softc *sc) 1003{ 1004 struct ieee80211com *ic = &sc->sc_ic; 1005 struct ifnet *ifp = &ic->ic_if; 1006 1007 for (;;) { 1008 struct rt2560_tx_desc *desc = &sc->prioq.desc[sc->prioq.next]; 1009 struct rt2560_tx_data *data = &sc->prioq.data[sc->prioq.next]; 1010 1011 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1012 sc->prioq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1013 BUS_DMASYNC_POSTREAD); 1014 1015 if ((letoh32(desc->flags) & RT2560_TX_BUSY) || 1016 !(letoh32(desc->flags) & RT2560_TX_VALID)) 1017 break; 1018 1019 switch (letoh32(desc->flags) & RT2560_TX_RESULT_MASK) { 1020 case RT2560_TX_SUCCESS: 1021 DPRINTFN(10, ("mgt frame sent successfully\n")); 1022 break; 1023 1024 case RT2560_TX_SUCCESS_RETRY: 1025 DPRINTFN(9, ("mgt frame sent after %u retries\n", 1026 (letoh32(desc->flags) >> 5) & 0x7)); 1027 break; 1028 1029 case RT2560_TX_FAIL_RETRY: 1030 DPRINTFN(9, ("sending mgt frame failed (too much " 1031 "retries)\n")); 1032 break; 1033 1034 case RT2560_TX_FAIL_INVALID: 1035 case RT2560_TX_FAIL_OTHER: 1036 default: 1037 printf("%s: sending mgt frame failed 0x%08x\n", 1038 sc->sc_dev.dv_xname, letoh32(desc->flags)); 1039 } 1040 1041 /* descriptor is no longer valid */ 1042 desc->flags &= ~htole32(RT2560_TX_VALID); 1043 1044 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1045 sc->prioq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1046 BUS_DMASYNC_PREWRITE); 1047 1048 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1049 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 1050 bus_dmamap_unload(sc->sc_dmat, data->map); 1051 m_freem(data->m); 1052 data->m = NULL; 1053 ieee80211_release_node(ic, data->ni); 1054 data->ni = NULL; 1055 1056 DPRINTFN(15, ("prio done idx=%u\n", sc->prioq.next)); 1057 1058 sc->prioq.queued--; 1059 sc->prioq.next = (sc->prioq.next + 1) % RT2560_PRIO_RING_COUNT; 1060 } 1061 1062 if (sc->txq.queued == 0 && sc->prioq.queued == 0) 1063 sc->sc_tx_timer = 0; 1064 if (sc->prioq.queued < RT2560_PRIO_RING_COUNT) { 1065 sc->sc_flags &= ~RT2560_PRIO_OACTIVE; 1066 if (!(sc->sc_flags & (RT2560_DATA_OACTIVE|RT2560_PRIO_OACTIVE))) 1067 ifp->if_flags &= ~IFF_OACTIVE; 1068 rt2560_start(ifp); 1069 } 1070} 1071 1072/* 1073 * Some frames were processed by the hardware cipher engine and are ready for 1074 * transmission to the IEEE802.11 layer. 1075 */ 1076void 1077rt2560_decryption_intr(struct rt2560_softc *sc) 1078{ 1079 struct ieee80211com *ic = &sc->sc_ic; 1080 struct ifnet *ifp = &ic->ic_if; 1081 struct ieee80211_frame *wh; 1082 struct ieee80211_rxinfo rxi; 1083 struct ieee80211_node *ni; 1084 struct mbuf *mnew, *m; 1085 int hw, error; 1086 1087 /* retrieve last decriptor index processed by cipher engine */ 1088 hw = (RAL_READ(sc, RT2560_SECCSR0) - sc->rxq.physaddr) / 1089 RT2560_RX_DESC_SIZE; 1090 1091 for (; sc->rxq.cur_decrypt != hw;) { 1092 struct rt2560_rx_desc *desc = 1093 &sc->rxq.desc[sc->rxq.cur_decrypt]; 1094 struct rt2560_rx_data *data = 1095 &sc->rxq.data[sc->rxq.cur_decrypt]; 1096 1097 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1098 sc->rxq.cur_decrypt * RT2560_TX_DESC_SIZE, 1099 RT2560_TX_DESC_SIZE, BUS_DMASYNC_POSTREAD); 1100 1101 if (letoh32(desc->flags) & 1102 (RT2560_RX_BUSY | RT2560_RX_CIPHER_BUSY)) 1103 break; 1104 1105 if (data->drop) { 1106 ifp->if_ierrors++; 1107 goto skip; 1108 } 1109 1110 if ((letoh32(desc->flags) & RT2560_RX_CIPHER_MASK) != 0 && 1111 (letoh32(desc->flags) & RT2560_RX_ICV_ERROR)) { 1112 ifp->if_ierrors++; 1113 goto skip; 1114 } 1115 1116 /* 1117 * Try to allocate a new mbuf for this ring element and load it 1118 * before processing the current mbuf. If the ring element 1119 * cannot be loaded, drop the received packet and reuse the old 1120 * mbuf. In the unlikely case that the old mbuf can't be 1121 * reloaded either, explicitly panic. 1122 */ 1123 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 1124 if (mnew == NULL) { 1125 ifp->if_ierrors++; 1126 goto skip; 1127 } 1128 MCLGET(mnew, M_DONTWAIT); 1129 if (!(mnew->m_flags & M_EXT)) { 1130 m_freem(mnew); 1131 ifp->if_ierrors++; 1132 goto skip; 1133 } 1134 1135 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1136 data->map->dm_mapsize, BUS_DMASYNC_POSTREAD); 1137 bus_dmamap_unload(sc->sc_dmat, data->map); 1138 1139 error = bus_dmamap_load(sc->sc_dmat, data->map, 1140 mtod(mnew, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT); 1141 if (error != 0) { 1142 m_freem(mnew); 1143 1144 /* try to reload the old mbuf */ 1145 error = bus_dmamap_load(sc->sc_dmat, data->map, 1146 mtod(data->m, void *), MCLBYTES, NULL, 1147 BUS_DMA_NOWAIT); 1148 if (error != 0) { 1149 /* very unlikely that it will fail... */ 1150 panic("%s: could not load old rx mbuf", 1151 sc->sc_dev.dv_xname); 1152 } 1153 /* physical address may have changed */ 1154 desc->physaddr = htole32(data->map->dm_segs->ds_addr); 1155 ifp->if_ierrors++; 1156 goto skip; 1157 } 1158 1159 /* 1160 * New mbuf successfully loaded, update Rx ring and continue 1161 * processing. 1162 */ 1163 m = data->m; 1164 data->m = mnew; 1165 desc->physaddr = htole32(data->map->dm_segs->ds_addr); 1166 1167 /* finalize mbuf */ 1168 m->m_pkthdr.rcvif = ifp; 1169 m->m_pkthdr.len = m->m_len = 1170 (letoh32(desc->flags) >> 16) & 0xfff; 1171 1172#if NBPFILTER > 0 1173 if (sc->sc_drvbpf != NULL) { 1174 struct mbuf mb; 1175 struct rt2560_rx_radiotap_header *tap = &sc->sc_rxtap; 1176 uint32_t tsf_lo, tsf_hi; 1177 1178 /* get timestamp (low and high 32 bits) */ 1179 tsf_hi = RAL_READ(sc, RT2560_CSR17); 1180 tsf_lo = RAL_READ(sc, RT2560_CSR16); 1181 1182 tap->wr_tsf = 1183 htole64(((uint64_t)tsf_hi << 32) | tsf_lo); 1184 tap->wr_flags = 0; 1185 tap->wr_rate = rt2560_rxrate(desc); 1186 tap->wr_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 1187 tap->wr_chan_flags = 1188 htole16(ic->ic_ibss_chan->ic_flags); 1189 tap->wr_antenna = sc->rx_ant; 1190 tap->wr_antsignal = desc->rssi; 1191 1192 mb.m_data = (caddr_t)tap; 1193 mb.m_len = sc->sc_txtap_len; 1194 mb.m_next = m; 1195 mb.m_nextpkt = NULL; 1196 mb.m_type = 0; 1197 mb.m_flags = 0; 1198 bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_IN); 1199 } 1200#endif 1201 wh = mtod(m, struct ieee80211_frame *); 1202 ni = ieee80211_find_rxnode(ic, wh); 1203 1204 /* send the frame to the 802.11 layer */ 1205 rxi.rxi_flags = 0; 1206 rxi.rxi_rssi = desc->rssi; 1207 rxi.rxi_tstamp = 0; /* unused */ 1208 ieee80211_input(ifp, m, ni, &rxi); 1209 1210 /* node is no longer needed */ 1211 ieee80211_release_node(ic, ni); 1212 1213skip: desc->flags = htole32(RT2560_RX_BUSY); 1214 1215 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1216 sc->rxq.cur_decrypt * RT2560_TX_DESC_SIZE, 1217 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 1218 1219 DPRINTFN(15, ("decryption done idx=%u\n", sc->rxq.cur_decrypt)); 1220 1221 sc->rxq.cur_decrypt = 1222 (sc->rxq.cur_decrypt + 1) % RT2560_RX_RING_COUNT; 1223 } 1224} 1225 1226/* 1227 * Some frames were received. Pass them to the hardware cipher engine before 1228 * sending them to the 802.11 layer. 1229 */ 1230void 1231rt2560_rx_intr(struct rt2560_softc *sc) 1232{ 1233 for (;;) { 1234 struct rt2560_rx_desc *desc = &sc->rxq.desc[sc->rxq.cur]; 1235 struct rt2560_rx_data *data = &sc->rxq.data[sc->rxq.cur]; 1236 1237 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1238 sc->rxq.cur * RT2560_RX_DESC_SIZE, RT2560_RX_DESC_SIZE, 1239 BUS_DMASYNC_POSTREAD); 1240 1241 if (letoh32(desc->flags) & 1242 (RT2560_RX_BUSY | RT2560_RX_CIPHER_BUSY)) 1243 break; 1244 1245 data->drop = 0; 1246 1247 if (letoh32(desc->flags) & 1248 (RT2560_RX_PHY_ERROR | RT2560_RX_CRC_ERROR)) { 1249 /* 1250 * This should not happen since we did not request 1251 * to receive those frames when we filled RXCSR0. 1252 */ 1253 DPRINTFN(5, ("PHY or CRC error flags 0x%08x\n", 1254 letoh32(desc->flags))); 1255 data->drop = 1; 1256 } 1257 1258 if (((letoh32(desc->flags) >> 16) & 0xfff) > MCLBYTES) { 1259 DPRINTFN(5, ("bad length\n")); 1260 data->drop = 1; 1261 } 1262 1263 /* mark the frame for decryption */ 1264 desc->flags |= htole32(RT2560_RX_CIPHER_BUSY); 1265 1266 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1267 sc->rxq.cur * RT2560_RX_DESC_SIZE, RT2560_RX_DESC_SIZE, 1268 BUS_DMASYNC_PREWRITE); 1269 1270 DPRINTFN(15, ("rx done idx=%u\n", sc->rxq.cur)); 1271 1272 sc->rxq.cur = (sc->rxq.cur + 1) % RT2560_RX_RING_COUNT; 1273 } 1274 1275 /* kick decrypt */ 1276 RAL_WRITE(sc, RT2560_SECCSR0, RT2560_KICK_DECRYPT); 1277} 1278 1279#ifndef IEEE80211_STA_ONLY 1280/* 1281 * This function is called in HostAP or IBSS modes when it's time to send a 1282 * new beacon (every ni_intval milliseconds). 1283 */ 1284void 1285rt2560_beacon_expire(struct rt2560_softc *sc) 1286{ 1287 struct ieee80211com *ic = &sc->sc_ic; 1288 struct rt2560_tx_data *data; 1289 1290 if (ic->ic_opmode != IEEE80211_M_IBSS && 1291 ic->ic_opmode != IEEE80211_M_HOSTAP) 1292 return; 1293 1294 data = &sc->bcnq.data[sc->bcnq.next]; 1295 1296 if (sc->sc_flags & RT2560_UPDATE_SLOT) { 1297 sc->sc_flags &= ~RT2560_UPDATE_SLOT; 1298 sc->sc_flags |= RT2560_SET_SLOTTIME; 1299 } else if (sc->sc_flags & RT2560_SET_SLOTTIME) { 1300 sc->sc_flags &= ~RT2560_SET_SLOTTIME; 1301 rt2560_set_slottime(sc); 1302 } 1303 1304 if (ic->ic_curmode == IEEE80211_MODE_11G) { 1305 /* update ERP Information Element */ 1306 *sc->erp = ic->ic_bss->ni_erp; 1307 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1308 data->map->dm_mapsize, BUS_DMASYNC_PREWRITE); 1309 } 1310 1311#if defined(RT2560_DEBUG) && NBPFILTER > 0 1312 if (ic->ic_rawbpf != NULL) 1313 bpf_mtap(ic->ic_rawbpf, data->m, BPF_DIRECTION_OUT); 1314#endif 1315 1316 DPRINTFN(15, ("beacon expired\n")); 1317} 1318#endif 1319 1320void 1321rt2560_wakeup_expire(struct rt2560_softc *sc) 1322{ 1323 DPRINTFN(15, ("wakeup expired\n")); 1324} 1325 1326int 1327rt2560_intr(void *arg) 1328{ 1329 struct rt2560_softc *sc = arg; 1330 struct ifnet *ifp = &sc->sc_ic.ic_if; 1331 uint32_t r; 1332 1333 r = RAL_READ(sc, RT2560_CSR7); 1334 if (__predict_false(r == 0xffffffff)) 1335 return 0; /* device likely went away */ 1336 if (r == 0) 1337 return 0; /* not for us */ 1338 1339 /* disable interrupts */ 1340 RAL_WRITE(sc, RT2560_CSR8, 0xffffffff); 1341 1342 /* acknowledge interrupts */ 1343 RAL_WRITE(sc, RT2560_CSR7, r); 1344 1345 /* don't re-enable interrupts if we're shutting down */ 1346 if (!(ifp->if_flags & IFF_RUNNING)) 1347 return 0; 1348 1349#ifndef IEEE80211_STA_ONLY 1350 if (r & RT2560_BEACON_EXPIRE) 1351 rt2560_beacon_expire(sc); 1352#endif 1353 1354 if (r & RT2560_WAKEUP_EXPIRE) 1355 rt2560_wakeup_expire(sc); 1356 1357 if (r & RT2560_ENCRYPTION_DONE) 1358 rt2560_encryption_intr(sc); 1359 1360 if (r & RT2560_TX_DONE) 1361 rt2560_tx_intr(sc); 1362 1363 if (r & RT2560_PRIO_DONE) 1364 rt2560_prio_intr(sc); 1365 1366 if (r & RT2560_DECRYPTION_DONE) 1367 rt2560_decryption_intr(sc); 1368 1369 if (r & RT2560_RX_DONE) 1370 rt2560_rx_intr(sc); 1371 1372 /* re-enable interrupts */ 1373 RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK); 1374 1375 return 1; 1376} 1377 1378/* quickly determine if a given rate is CCK or OFDM */ 1379#define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22) 1380 1381#define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */ 1382#define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */ 1383 1384#define RAL_SIFS 10 /* us */ 1385 1386#define RT2560_RXTX_TURNAROUND 10 /* us */ 1387 1388/* 1389 * This function is only used by the Rx radiotap code. It returns the rate at 1390 * which a given frame was received. 1391 */ 1392#if NBPFILTER > 0 1393uint8_t 1394rt2560_rxrate(const struct rt2560_rx_desc *desc) 1395{ 1396 if (letoh32(desc->flags) & RT2560_RX_OFDM) { 1397 /* reverse function of rt2560_plcp_signal */ 1398 switch (desc->rate) { 1399 case 0xb: return 12; 1400 case 0xf: return 18; 1401 case 0xa: return 24; 1402 case 0xe: return 36; 1403 case 0x9: return 48; 1404 case 0xd: return 72; 1405 case 0x8: return 96; 1406 case 0xc: return 108; 1407 } 1408 } else { 1409 if (desc->rate == 10) 1410 return 2; 1411 if (desc->rate == 20) 1412 return 4; 1413 if (desc->rate == 55) 1414 return 11; 1415 if (desc->rate == 110) 1416 return 22; 1417 } 1418 return 2; /* should not get there */ 1419} 1420#endif 1421 1422/* 1423 * Return the expected ack rate for a frame transmitted at rate `rate'. 1424 */ 1425int 1426rt2560_ack_rate(struct ieee80211com *ic, int rate) 1427{ 1428 switch (rate) { 1429 /* CCK rates */ 1430 case 2: 1431 return 2; 1432 case 4: 1433 case 11: 1434 case 22: 1435 return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate; 1436 1437 /* OFDM rates */ 1438 case 12: 1439 case 18: 1440 return 12; 1441 case 24: 1442 case 36: 1443 return 24; 1444 case 48: 1445 case 72: 1446 case 96: 1447 case 108: 1448 return 48; 1449 } 1450 1451 /* default to 1Mbps */ 1452 return 2; 1453} 1454 1455/* 1456 * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'. 1457 * The function automatically determines the operating mode depending on the 1458 * given rate. `flags' indicates whether short preamble is in use or not. 1459 */ 1460uint16_t 1461rt2560_txtime(int len, int rate, uint32_t flags) 1462{ 1463 uint16_t txtime; 1464 1465 if (RAL_RATE_IS_OFDM(rate)) { 1466 /* IEEE Std 802.11g-2003, pp. 44 */ 1467 txtime = (8 + 4 * len + 3 + rate - 1) / rate; 1468 txtime = 16 + 4 + 4 * txtime + 6; 1469 } else { 1470 /* IEEE Std 802.11b-1999, pp. 28 */ 1471 txtime = (16 * len + rate - 1) / rate; 1472 if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE)) 1473 txtime += 72 + 24; 1474 else 1475 txtime += 144 + 48; 1476 } 1477 return txtime; 1478} 1479 1480uint8_t 1481rt2560_plcp_signal(int rate) 1482{ 1483 switch (rate) { 1484 /* CCK rates (returned values are device-dependent) */ 1485 case 2: return 0x0; 1486 case 4: return 0x1; 1487 case 11: return 0x2; 1488 case 22: return 0x3; 1489 1490 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1491 case 12: return 0xb; 1492 case 18: return 0xf; 1493 case 24: return 0xa; 1494 case 36: return 0xe; 1495 case 48: return 0x9; 1496 case 72: return 0xd; 1497 case 96: return 0x8; 1498 case 108: return 0xc; 1499 1500 /* unsupported rates (should not get there) */ 1501 default: return 0xff; 1502 } 1503} 1504 1505void 1506rt2560_setup_tx_desc(struct rt2560_softc *sc, struct rt2560_tx_desc *desc, 1507 uint32_t flags, int len, int rate, int encrypt, bus_addr_t physaddr) 1508{ 1509 struct ieee80211com *ic = &sc->sc_ic; 1510 uint16_t plcp_length; 1511 int remainder; 1512 1513 desc->flags = htole32(flags); 1514 desc->flags |= htole32(len << 16); 1515 desc->flags |= encrypt ? htole32(RT2560_TX_CIPHER_BUSY) : 1516 htole32(RT2560_TX_BUSY | RT2560_TX_VALID); 1517 1518 desc->physaddr = htole32(physaddr); 1519 desc->wme = htole16( 1520 RT2560_AIFSN(2) | 1521 RT2560_LOGCWMIN(3) | 1522 RT2560_LOGCWMAX(8)); 1523 1524 /* setup PLCP fields */ 1525 desc->plcp_signal = rt2560_plcp_signal(rate); 1526 desc->plcp_service = 4; 1527 1528 len += IEEE80211_CRC_LEN; 1529 if (RAL_RATE_IS_OFDM(rate)) { 1530 desc->flags |= htole32(RT2560_TX_OFDM); 1531 1532 plcp_length = len & 0xfff; 1533 desc->plcp_length_hi = plcp_length >> 6; 1534 desc->plcp_length_lo = plcp_length & 0x3f; 1535 } else { 1536 plcp_length = (16 * len + rate - 1) / rate; 1537 if (rate == 22) { 1538 remainder = (16 * len) % 22; 1539 if (remainder != 0 && remainder < 7) 1540 desc->plcp_service |= RT2560_PLCP_LENGEXT; 1541 } 1542 desc->plcp_length_hi = plcp_length >> 8; 1543 desc->plcp_length_lo = plcp_length & 0xff; 1544 1545 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1546 desc->plcp_signal |= 0x08; 1547 } 1548} 1549 1550#ifndef IEEE80211_STA_ONLY 1551int 1552rt2560_tx_bcn(struct rt2560_softc *sc, struct mbuf *m0, 1553 struct ieee80211_node *ni) 1554{ 1555 struct ieee80211com *ic = &sc->sc_ic; 1556 struct rt2560_tx_desc *desc; 1557 struct rt2560_tx_data *data; 1558 int rate = 2, error; 1559 1560 desc = &sc->bcnq.desc[sc->bcnq.cur]; 1561 data = &sc->bcnq.data[sc->bcnq.cur]; 1562 1563 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1564 BUS_DMA_NOWAIT); 1565 if (error != 0) { 1566 printf("%s: can't map mbuf (error %d)\n", 1567 sc->sc_dev.dv_xname, error); 1568 m_freem(m0); 1569 return error; 1570 } 1571 1572 data->m = m0; 1573 data->ni = ni; 1574 1575 rt2560_setup_tx_desc(sc, desc, RT2560_TX_IFS_NEWBACKOFF | 1576 RT2560_TX_TIMESTAMP, m0->m_pkthdr.len, rate, 0, 1577 data->map->dm_segs->ds_addr); 1578 1579 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 1580 BUS_DMASYNC_PREWRITE); 1581 bus_dmamap_sync(sc->sc_dmat, sc->bcnq.map, 1582 sc->bcnq.cur * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1583 BUS_DMASYNC_PREWRITE); 1584 1585 /* 1586 * Store pointer to ERP Information Element so that we can update it 1587 * dynamically when the slot time changes. 1588 * XXX: this is ugly since it depends on how net80211 builds beacon 1589 * frames but ieee80211_beacon_alloc() don't store offsets for us. 1590 */ 1591 if (ic->ic_curmode == IEEE80211_MODE_11G) { 1592 sc->erp = 1593 mtod(m0, uint8_t *) + 1594 sizeof (struct ieee80211_frame) + 1595 8 + 2 + 2 + 1596 ((ic->ic_flags & IEEE80211_F_HIDENWID) ? 1597 1 : 2 + ni->ni_esslen) + 1598 2 + min(ni->ni_rates.rs_nrates, IEEE80211_RATE_SIZE) + 1599 2 + 1 + 1600 ((ic->ic_opmode == IEEE80211_M_IBSS) ? 4 : 6) + 1601 2; 1602 } 1603 1604 return 0; 1605} 1606#endif 1607 1608int 1609rt2560_tx_mgt(struct rt2560_softc *sc, struct mbuf *m0, 1610 struct ieee80211_node *ni) 1611{ 1612 struct ieee80211com *ic = &sc->sc_ic; 1613 struct rt2560_tx_desc *desc; 1614 struct rt2560_tx_data *data; 1615 struct ieee80211_frame *wh; 1616 uint16_t dur; 1617 uint32_t flags = 0; 1618 int rate = 2, error; 1619 1620 desc = &sc->prioq.desc[sc->prioq.cur]; 1621 data = &sc->prioq.data[sc->prioq.cur]; 1622 1623 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1624 BUS_DMA_NOWAIT); 1625 if (error != 0) { 1626 printf("%s: can't map mbuf (error %d)\n", 1627 sc->sc_dev.dv_xname, error); 1628 m_freem(m0); 1629 return error; 1630 } 1631 1632#if NBPFILTER > 0 1633 if (sc->sc_drvbpf != NULL) { 1634 struct mbuf mb; 1635 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap; 1636 1637 tap->wt_flags = 0; 1638 tap->wt_rate = rate; 1639 tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 1640 tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags); 1641 tap->wt_antenna = sc->tx_ant; 1642 1643 mb.m_data = (caddr_t)tap; 1644 mb.m_len = sc->sc_txtap_len; 1645 mb.m_next = m0; 1646 mb.m_nextpkt = NULL; 1647 mb.m_type = 0; 1648 mb.m_flags = 0; 1649 bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_OUT); 1650 } 1651#endif 1652 1653 data->m = m0; 1654 data->ni = ni; 1655 1656 wh = mtod(m0, struct ieee80211_frame *); 1657 1658 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1659 flags |= RT2560_TX_NEED_ACK; 1660 1661 dur = rt2560_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) + 1662 RAL_SIFS; 1663 *(uint16_t *)wh->i_dur = htole16(dur); 1664 1665#ifndef IEEE80211_STA_ONLY 1666 /* tell hardware to set timestamp for probe responses */ 1667 if ((wh->i_fc[0] & 1668 (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) == 1669 (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP)) 1670 flags |= RT2560_TX_TIMESTAMP; 1671#endif 1672 } 1673 1674 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 0, 1675 data->map->dm_segs->ds_addr); 1676 1677 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 1678 BUS_DMASYNC_PREWRITE); 1679 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1680 sc->prioq.cur * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1681 BUS_DMASYNC_PREWRITE); 1682 1683 DPRINTFN(10, ("sending mgt frame len=%u idx=%u rate=%u\n", 1684 m0->m_pkthdr.len, sc->prioq.cur, rate)); 1685 1686 /* kick prio */ 1687 sc->prioq.queued++; 1688 sc->prioq.cur = (sc->prioq.cur + 1) % RT2560_PRIO_RING_COUNT; 1689 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_PRIO); 1690 1691 return 0; 1692} 1693 1694int 1695rt2560_tx_data(struct rt2560_softc *sc, struct mbuf *m0, 1696 struct ieee80211_node *ni) 1697{ 1698 struct ieee80211com *ic = &sc->sc_ic; 1699 struct rt2560_tx_ring *txq = &sc->txq; 1700 struct rt2560_tx_desc *desc; 1701 struct rt2560_tx_data *data; 1702 struct ieee80211_frame *wh; 1703 struct ieee80211_key *k; 1704 struct mbuf *m1; 1705 uint16_t dur; 1706 uint32_t flags = 0; 1707 int pktlen, rate, needcts = 0, needrts = 0, error; 1708 1709 wh = mtod(m0, struct ieee80211_frame *); 1710 1711 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 1712 k = ieee80211_get_txkey(ic, wh, ni); 1713 1714 if ((m0 = ieee80211_encrypt(ic, m0, k)) == NULL) 1715 return ENOBUFS; 1716 1717 /* packet header may have moved, reset our local pointer */ 1718 wh = mtod(m0, struct ieee80211_frame *); 1719 } 1720 1721 /* compute actual packet length (including CRC and crypto overhead) */ 1722 pktlen = m0->m_pkthdr.len + IEEE80211_CRC_LEN; 1723 1724 /* pickup a rate */ 1725 if (IEEE80211_IS_MULTICAST(wh->i_addr1) || 1726 ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 1727 IEEE80211_FC0_TYPE_MGT)) { 1728 /* mgmt/multicast frames are sent at the lowest avail. rate */ 1729 rate = ni->ni_rates.rs_rates[0]; 1730 } else if (ic->ic_fixed_rate != -1) { 1731 rate = ic->ic_sup_rates[ic->ic_curmode]. 1732 rs_rates[ic->ic_fixed_rate]; 1733 } else 1734 rate = ni->ni_rates.rs_rates[ni->ni_txrate]; 1735 if (rate == 0) 1736 rate = 2; /* XXX should not happen */ 1737 rate &= IEEE80211_RATE_VAL; 1738 1739 /* 1740 * Packet Bursting: backoff after ppb=8 frames to give other STAs a 1741 * chance to contend for the wireless medium. 1742 */ 1743 if (ic->ic_opmode == IEEE80211_M_STA && (ni->ni_txseq & 7)) 1744 flags |= RT2560_TX_IFS_SIFS; 1745 1746 /* check if RTS/CTS or CTS-to-self protection must be used */ 1747 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1748 /* multicast frames are not sent at OFDM rates in 802.11b/g */ 1749 if (pktlen > ic->ic_rtsthreshold) { 1750 needrts = 1; /* RTS/CTS based on frame length */ 1751 } else if ((ic->ic_flags & IEEE80211_F_USEPROT) && 1752 RAL_RATE_IS_OFDM(rate)) { 1753 if (ic->ic_protmode == IEEE80211_PROT_CTSONLY) 1754 needcts = 1; /* CTS-to-self */ 1755 else if (ic->ic_protmode == IEEE80211_PROT_RTSCTS) 1756 needrts = 1; /* RTS/CTS */ 1757 } 1758 } 1759 if (needrts || needcts) { 1760 struct mbuf *mprot; 1761 int protrate, ackrate; 1762 1763 protrate = 2; /* XXX */ 1764 ackrate = rt2560_ack_rate(ic, rate); 1765 1766 dur = rt2560_txtime(pktlen, rate, ic->ic_flags) + 1767 rt2560_txtime(RAL_ACK_SIZE, ackrate, ic->ic_flags) + 1768 2 * RAL_SIFS; 1769 if (needrts) { 1770 dur += rt2560_txtime(RAL_CTS_SIZE, rt2560_ack_rate(ic, 1771 protrate), ic->ic_flags) + RAL_SIFS; 1772 mprot = ieee80211_get_rts(ic, wh, dur); 1773 } else { 1774 mprot = ieee80211_get_cts_to_self(ic, dur); 1775 } 1776 if (mprot == NULL) { 1777 printf("%s: could not allocate protection frame\n", 1778 sc->sc_dev.dv_xname); 1779 m_freem(m0); 1780 return ENOBUFS; 1781 } 1782 1783 desc = &txq->desc[txq->cur_encrypt]; 1784 data = &txq->data[txq->cur_encrypt]; 1785 1786 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, mprot, 1787 BUS_DMA_NOWAIT); 1788 if (error != 0) { 1789 printf("%s: can't map mbuf (error %d)\n", 1790 sc->sc_dev.dv_xname, error); 1791 m_freem(mprot); 1792 m_freem(m0); 1793 return error; 1794 } 1795 1796 data->m = mprot; 1797 /* avoid multiple free() of the same node for each fragment */ 1798 data->ni = ieee80211_ref_node(ni); 1799 1800 /* XXX may want to pass the protection frame to BPF */ 1801 1802 rt2560_setup_tx_desc(sc, desc, 1803 (needrts ? RT2560_TX_NEED_ACK : 0) | RT2560_TX_MORE_FRAG, 1804 mprot->m_pkthdr.len, protrate, 1, 1805 data->map->dm_segs->ds_addr); 1806 1807 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1808 data->map->dm_mapsize, BUS_DMASYNC_PREWRITE); 1809 bus_dmamap_sync(sc->sc_dmat, txq->map, 1810 txq->cur_encrypt * RT2560_TX_DESC_SIZE, 1811 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 1812 1813 txq->queued++; 1814 if (++txq->cur_encrypt >= txq->count) 1815 txq->cur_encrypt = 0; 1816 1817 flags |= RT2560_TX_LONG_RETRY | RT2560_TX_IFS_SIFS; 1818 } 1819 1820 data = &txq->data[txq->cur_encrypt]; 1821 desc = &txq->desc[txq->cur_encrypt]; 1822 1823 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1824 BUS_DMA_NOWAIT); 1825 if (error != 0 && error != EFBIG) { 1826 printf("%s: can't map mbuf (error %d)\n", 1827 sc->sc_dev.dv_xname, error); 1828 m_freem(m0); 1829 return error; 1830 } 1831 if (error != 0) { 1832 /* too many fragments, linearize */ 1833 MGETHDR(m1, M_DONTWAIT, MT_DATA); 1834 if (m1 == NULL) { 1835 m_freem(m0); 1836 return ENOBUFS; 1837 } 1838 if (m0->m_pkthdr.len > MHLEN) { 1839 MCLGET(m1, M_DONTWAIT); 1840 if (!(m1->m_flags & M_EXT)) { 1841 m_freem(m0); 1842 m_freem(m1); 1843 return ENOBUFS; 1844 } 1845 } 1846 m_copydata(m0, 0, m0->m_pkthdr.len, mtod(m1, caddr_t)); 1847 m1->m_pkthdr.len = m1->m_len = m0->m_pkthdr.len; 1848 m_freem(m0); 1849 m0 = m1; 1850 1851 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1852 BUS_DMA_NOWAIT); 1853 if (error != 0) { 1854 printf("%s: can't map mbuf (error %d)\n", 1855 sc->sc_dev.dv_xname, error); 1856 m_freem(m0); 1857 return error; 1858 } 1859 1860 /* packet header have moved, reset our local pointer */ 1861 wh = mtod(m0, struct ieee80211_frame *); 1862 } 1863 1864#if NBPFILTER > 0 1865 if (sc->sc_drvbpf != NULL) { 1866 struct mbuf mb; 1867 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap; 1868 1869 tap->wt_flags = 0; 1870 tap->wt_rate = rate; 1871 tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 1872 tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags); 1873 tap->wt_antenna = sc->tx_ant; 1874 1875 mb.m_data = (caddr_t)tap; 1876 mb.m_len = sc->sc_txtap_len; 1877 mb.m_next = m0; 1878 mb.m_nextpkt = NULL; 1879 mb.m_type = 0; 1880 mb.m_flags = 0; 1881 bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_OUT); 1882 } 1883#endif 1884 1885 data->m = m0; 1886 data->ni = ni; 1887 1888 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1889 flags |= RT2560_TX_NEED_ACK; 1890 1891 dur = rt2560_txtime(RAL_ACK_SIZE, rt2560_ack_rate(ic, rate), 1892 ic->ic_flags) + RAL_SIFS; 1893 *(uint16_t *)wh->i_dur = htole16(dur); 1894 } 1895 1896 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 1, 1897 data->map->dm_segs->ds_addr); 1898 1899 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 1900 BUS_DMASYNC_PREWRITE); 1901 bus_dmamap_sync(sc->sc_dmat, txq->map, 1902 txq->cur_encrypt * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1903 BUS_DMASYNC_PREWRITE); 1904 1905 DPRINTFN(10, ("sending frame len=%u idx=%u rate=%u\n", 1906 m0->m_pkthdr.len, txq->cur_encrypt, rate)); 1907 1908 /* kick encrypt */ 1909 txq->queued++; 1910 if (++txq->cur_encrypt >= txq->count) 1911 txq->cur_encrypt = 0; 1912 RAL_WRITE(sc, RT2560_SECCSR1, RT2560_KICK_ENCRYPT); 1913 1914 return 0; 1915} 1916 1917void 1918rt2560_start(struct ifnet *ifp) 1919{ 1920 struct rt2560_softc *sc = ifp->if_softc; 1921 struct ieee80211com *ic = &sc->sc_ic; 1922 struct mbuf *m0; 1923 struct ieee80211_node *ni; 1924 1925 /* 1926 * net80211 may still try to send management frames even if the 1927 * IFF_RUNNING flag is not set... 1928 */ 1929 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 1930 return; 1931 1932 for (;;) { 1933 IF_POLL(&ic->ic_mgtq, m0); 1934 if (m0 != NULL) { 1935 if (sc->prioq.queued >= RT2560_PRIO_RING_COUNT) { 1936 ifp->if_flags |= IFF_OACTIVE; 1937 sc->sc_flags |= RT2560_PRIO_OACTIVE; 1938 break; 1939 } 1940 IF_DEQUEUE(&ic->ic_mgtq, m0); 1941 1942 ni = m0->m_pkthdr.ph_cookie; 1943#if NBPFILTER > 0 1944 if (ic->ic_rawbpf != NULL) 1945 bpf_mtap(ic->ic_rawbpf, m0, BPF_DIRECTION_OUT); 1946#endif 1947 if (rt2560_tx_mgt(sc, m0, ni) != 0) 1948 break; 1949 1950 } else { 1951 if (ic->ic_state != IEEE80211_S_RUN) 1952 break; 1953 IFQ_POLL(&ifp->if_snd, m0); 1954 if (m0 == NULL) 1955 break; 1956 if (sc->txq.queued >= RT2560_TX_RING_COUNT - 1) { 1957 ifp->if_flags |= IFF_OACTIVE; 1958 sc->sc_flags |= RT2560_DATA_OACTIVE; 1959 break; 1960 } 1961 IFQ_DEQUEUE(&ifp->if_snd, m0); 1962#if NBPFILTER > 0 1963 if (ifp->if_bpf != NULL) 1964 bpf_mtap(ifp->if_bpf, m0, BPF_DIRECTION_OUT); 1965#endif 1966 m0 = ieee80211_encap(ifp, m0, &ni); 1967 if (m0 == NULL) 1968 continue; 1969#if NBPFILTER > 0 1970 if (ic->ic_rawbpf != NULL) 1971 bpf_mtap(ic->ic_rawbpf, m0, BPF_DIRECTION_OUT); 1972#endif 1973 if (rt2560_tx_data(sc, m0, ni) != 0) { 1974 if (ni != NULL) 1975 ieee80211_release_node(ic, ni); 1976 ifp->if_oerrors++; 1977 break; 1978 } 1979 } 1980 1981 sc->sc_tx_timer = 5; 1982 ifp->if_timer = 1; 1983 } 1984} 1985 1986void 1987rt2560_watchdog(struct ifnet *ifp) 1988{ 1989 struct rt2560_softc *sc = ifp->if_softc; 1990 1991 ifp->if_timer = 0; 1992 1993 if (sc->sc_tx_timer > 0) { 1994 if (--sc->sc_tx_timer == 0) { 1995 printf("%s: device timeout\n", sc->sc_dev.dv_xname); 1996 rt2560_init(ifp); 1997 ifp->if_oerrors++; 1998 return; 1999 } 2000 ifp->if_timer = 1; 2001 } 2002 2003 ieee80211_watchdog(ifp); 2004} 2005 2006int 2007rt2560_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 2008{ 2009 struct rt2560_softc *sc = ifp->if_softc; 2010 struct ieee80211com *ic = &sc->sc_ic; 2011 struct ifaddr *ifa; 2012 struct ifreq *ifr; 2013 int s, error = 0; 2014 2015 s = splnet(); 2016 2017 switch (cmd) { 2018 case SIOCSIFADDR: 2019 ifa = (struct ifaddr *)data; 2020 ifp->if_flags |= IFF_UP; 2021#ifdef INET 2022 if (ifa->ifa_addr->sa_family == AF_INET) 2023 arp_ifinit(&ic->ic_ac, ifa); 2024#endif 2025 /* FALLTHROUGH */ 2026 case SIOCSIFFLAGS: 2027 if (ifp->if_flags & IFF_UP) { 2028 if (ifp->if_flags & IFF_RUNNING) 2029 rt2560_update_promisc(sc); 2030 else 2031 rt2560_init(ifp); 2032 } else { 2033 if (ifp->if_flags & IFF_RUNNING) 2034 rt2560_stop(ifp, 1); 2035 } 2036 break; 2037 2038 case SIOCADDMULTI: 2039 case SIOCDELMULTI: 2040 ifr = (struct ifreq *)data; 2041 error = (cmd == SIOCADDMULTI) ? 2042 ether_addmulti(ifr, &ic->ic_ac) : 2043 ether_delmulti(ifr, &ic->ic_ac); 2044 2045 if (error == ENETRESET) 2046 error = 0; 2047 break; 2048 2049 case SIOCS80211CHANNEL: 2050 /* 2051 * This allows for fast channel switching in monitor mode 2052 * (used by kismet). In IBSS mode, we must explicitly reset 2053 * the interface to generate a new beacon frame. 2054 */ 2055 error = ieee80211_ioctl(ifp, cmd, data); 2056 if (error == ENETRESET && 2057 ic->ic_opmode == IEEE80211_M_MONITOR) { 2058 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 2059 (IFF_UP | IFF_RUNNING)) 2060 rt2560_set_chan(sc, ic->ic_ibss_chan); 2061 error = 0; 2062 } 2063 break; 2064 2065 default: 2066 error = ieee80211_ioctl(ifp, cmd, data); 2067 } 2068 2069 if (error == ENETRESET) { 2070 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 2071 (IFF_UP | IFF_RUNNING)) 2072 rt2560_init(ifp); 2073 error = 0; 2074 } 2075 2076 splx(s); 2077 2078 return error; 2079} 2080 2081void 2082rt2560_bbp_write(struct rt2560_softc *sc, uint8_t reg, uint8_t val) 2083{ 2084 uint32_t tmp; 2085 int ntries; 2086 2087 for (ntries = 0; ntries < 100; ntries++) { 2088 if (!(RAL_READ(sc, RT2560_BBPCSR) & RT2560_BBP_BUSY)) 2089 break; 2090 DELAY(1); 2091 } 2092 if (ntries == 100) { 2093 printf("%s: could not write to BBP\n", sc->sc_dev.dv_xname); 2094 return; 2095 } 2096 2097 tmp = RT2560_BBP_WRITE | RT2560_BBP_BUSY | reg << 8 | val; 2098 RAL_WRITE(sc, RT2560_BBPCSR, tmp); 2099 2100 DPRINTFN(15, ("BBP R%u <- 0x%02x\n", reg, val)); 2101} 2102 2103uint8_t 2104rt2560_bbp_read(struct rt2560_softc *sc, uint8_t reg) 2105{ 2106 uint32_t val; 2107 int ntries; 2108 2109 for (ntries = 0; ntries < 100; ntries++) { 2110 if (!(RAL_READ(sc, RT2560_BBPCSR) & RT2560_BBP_BUSY)) 2111 break; 2112 DELAY(1); 2113 } 2114 if (ntries == 100) { 2115 printf("%s: could not read from BBP\n", sc->sc_dev.dv_xname); 2116 return 0; 2117 } 2118 2119 val = RT2560_BBP_BUSY | reg << 8; 2120 RAL_WRITE(sc, RT2560_BBPCSR, val); 2121 2122 for (ntries = 0; ntries < 100; ntries++) { 2123 val = RAL_READ(sc, RT2560_BBPCSR); 2124 if (!(val & RT2560_BBP_BUSY)) 2125 return val & 0xff; 2126 DELAY(1); 2127 } 2128 2129 printf("%s: could not read from BBP\n", sc->sc_dev.dv_xname); 2130 return 0; 2131} 2132 2133void 2134rt2560_rf_write(struct rt2560_softc *sc, uint8_t reg, uint32_t val) 2135{ 2136 uint32_t tmp; 2137 int ntries; 2138 2139 for (ntries = 0; ntries < 100; ntries++) { 2140 if (!(RAL_READ(sc, RT2560_RFCSR) & RT2560_RF_BUSY)) 2141 break; 2142 DELAY(1); 2143 } 2144 if (ntries == 100) { 2145 printf("%s: could not write to RF\n", sc->sc_dev.dv_xname); 2146 return; 2147 } 2148 2149 tmp = RT2560_RF_BUSY | RT2560_RF_20BIT | (val & 0xfffff) << 2 | 2150 (reg & 0x3); 2151 RAL_WRITE(sc, RT2560_RFCSR, tmp); 2152 2153 /* remember last written value in sc */ 2154 sc->rf_regs[reg] = val; 2155 2156 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff)); 2157} 2158 2159void 2160rt2560_set_chan(struct rt2560_softc *sc, struct ieee80211_channel *c) 2161{ 2162 struct ieee80211com *ic = &sc->sc_ic; 2163 uint8_t power, tmp; 2164 u_int chan; 2165 2166 chan = ieee80211_chan2ieee(ic, c); 2167 if (chan == 0 || chan == IEEE80211_CHAN_ANY) 2168 return; 2169 2170 power = min(sc->txpow[chan - 1], 31); 2171 2172 DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power)); 2173 2174 switch (sc->rf_rev) { 2175 case RT2560_RF_2522: 2176 rt2560_rf_write(sc, RT2560_RF1, 0x00814); 2177 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2522_r2[chan - 1]); 2178 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040); 2179 break; 2180 2181 case RT2560_RF_2523: 2182 rt2560_rf_write(sc, RT2560_RF1, 0x08804); 2183 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2523_r2[chan - 1]); 2184 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x38044); 2185 rt2560_rf_write(sc, RT2560_RF4, 2186 (chan == 14) ? 0x00280 : 0x00286); 2187 break; 2188 2189 case RT2560_RF_2524: 2190 rt2560_rf_write(sc, RT2560_RF1, 0x0c808); 2191 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2524_r2[chan - 1]); 2192 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040); 2193 rt2560_rf_write(sc, RT2560_RF4, 2194 (chan == 14) ? 0x00280 : 0x00286); 2195 break; 2196 2197 case RT2560_RF_2525: 2198 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2199 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525_hi_r2[chan - 1]); 2200 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2201 rt2560_rf_write(sc, RT2560_RF4, 2202 (chan == 14) ? 0x00280 : 0x00286); 2203 2204 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2205 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525_r2[chan - 1]); 2206 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2207 rt2560_rf_write(sc, RT2560_RF4, 2208 (chan == 14) ? 0x00280 : 0x00286); 2209 break; 2210 2211 case RT2560_RF_2525E: 2212 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2213 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525e_r2[chan - 1]); 2214 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2215 rt2560_rf_write(sc, RT2560_RF4, 2216 (chan == 14) ? 0x00286 : 0x00282); 2217 break; 2218 2219 case RT2560_RF_2526: 2220 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2526_hi_r2[chan - 1]); 2221 rt2560_rf_write(sc, RT2560_RF4, 2222 (chan & 1) ? 0x00386 : 0x00381); 2223 rt2560_rf_write(sc, RT2560_RF1, 0x08804); 2224 2225 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2526_r2[chan - 1]); 2226 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2227 rt2560_rf_write(sc, RT2560_RF4, 2228 (chan & 1) ? 0x00386 : 0x00381); 2229 break; 2230 } 2231 2232 if (ic->ic_opmode != IEEE80211_M_MONITOR && 2233 ic->ic_state != IEEE80211_S_SCAN) { 2234 /* set Japan filter bit for channel 14 */ 2235 tmp = rt2560_bbp_read(sc, 70); 2236 2237 tmp &= ~RT2560_JAPAN_FILTER; 2238 if (chan == 14) 2239 tmp |= RT2560_JAPAN_FILTER; 2240 2241 rt2560_bbp_write(sc, 70, tmp); 2242 2243 DELAY(1000); /* RF needs a 1ms delay here */ 2244 rt2560_disable_rf_tune(sc); 2245 2246 /* clear CRC errors */ 2247 RAL_READ(sc, RT2560_CNT0); 2248 } 2249} 2250 2251/* 2252 * Disable RF auto-tuning. 2253 */ 2254void 2255rt2560_disable_rf_tune(struct rt2560_softc *sc) 2256{ 2257 uint32_t tmp; 2258 2259 if (sc->rf_rev != RT2560_RF_2523) { 2260 tmp = sc->rf_regs[RT2560_RF1] & ~RT2560_RF1_AUTOTUNE; 2261 rt2560_rf_write(sc, RT2560_RF1, tmp); 2262 } 2263 2264 tmp = sc->rf_regs[RT2560_RF3] & ~RT2560_RF3_AUTOTUNE; 2265 rt2560_rf_write(sc, RT2560_RF3, tmp); 2266 2267 DPRINTFN(2, ("disabling RF autotune\n")); 2268} 2269 2270/* 2271 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF 2272 * synchronization. 2273 */ 2274void 2275rt2560_enable_tsf_sync(struct rt2560_softc *sc) 2276{ 2277 struct ieee80211com *ic = &sc->sc_ic; 2278 uint16_t logcwmin, preload; 2279 uint32_t tmp; 2280 2281 /* first, disable TSF synchronization */ 2282 RAL_WRITE(sc, RT2560_CSR14, 0); 2283 2284 tmp = 16 * ic->ic_bss->ni_intval; 2285 RAL_WRITE(sc, RT2560_CSR12, tmp); 2286 2287 RAL_WRITE(sc, RT2560_CSR13, 0); 2288 2289 logcwmin = 5; 2290 preload = (ic->ic_opmode == IEEE80211_M_STA) ? 384 : 1024; 2291 tmp = logcwmin << 16 | preload; 2292 RAL_WRITE(sc, RT2560_BCNOCSR, tmp); 2293 2294 /* finally, enable TSF synchronization */ 2295 tmp = RT2560_ENABLE_TSF | RT2560_ENABLE_TBCN; 2296 if (ic->ic_opmode == IEEE80211_M_STA) 2297 tmp |= RT2560_ENABLE_TSF_SYNC(1); 2298#ifndef IEEE80211_STA_ONLY 2299 else 2300 tmp |= RT2560_ENABLE_TSF_SYNC(2) | 2301 RT2560_ENABLE_BEACON_GENERATOR; 2302#endif 2303 RAL_WRITE(sc, RT2560_CSR14, tmp); 2304 2305 DPRINTF(("enabling TSF synchronization\n")); 2306} 2307 2308void 2309rt2560_update_plcp(struct rt2560_softc *sc) 2310{ 2311 struct ieee80211com *ic = &sc->sc_ic; 2312 2313 /* no short preamble for 1Mbps */ 2314 RAL_WRITE(sc, RT2560_PLCP1MCSR, 0x00700400); 2315 2316 if (!(ic->ic_flags & IEEE80211_F_SHPREAMBLE)) { 2317 /* values taken from the reference driver */ 2318 RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380401); 2319 RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x00150402); 2320 RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b8403); 2321 } else { 2322 /* same values as above or'ed 0x8 */ 2323 RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380409); 2324 RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x0015040a); 2325 RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b840b); 2326 } 2327 2328 DPRINTF(("updating PLCP for %s preamble\n", 2329 (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ? "short" : "long")); 2330} 2331 2332void 2333rt2560_updateslot(struct ieee80211com *ic) 2334{ 2335 struct rt2560_softc *sc = ic->ic_if.if_softc; 2336 2337#ifndef IEEE80211_STA_ONLY 2338 if (ic->ic_opmode == IEEE80211_M_HOSTAP) { 2339 /* 2340 * In HostAP mode, we defer setting of new slot time until 2341 * updated ERP Information Element has propagated to all 2342 * associated STAs. 2343 */ 2344 sc->sc_flags |= RT2560_UPDATE_SLOT; 2345 } else 2346#endif 2347 rt2560_set_slottime(sc); 2348} 2349 2350/* 2351 * IEEE 802.11a (and possibly 802.11g) use short slot time. Refer to 2352 * IEEE Std 802.11-1999 pp. 85 to know how these values are computed. 2353 */ 2354void 2355rt2560_set_slottime(struct rt2560_softc *sc) 2356{ 2357 struct ieee80211com *ic = &sc->sc_ic; 2358 uint8_t slottime; 2359 uint16_t sifs, pifs, difs, eifs; 2360 uint32_t tmp; 2361 2362 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 2363 2364 /* define the MAC slot boundaries */ 2365 sifs = RAL_SIFS - RT2560_RXTX_TURNAROUND; 2366 pifs = sifs + slottime; 2367 difs = sifs + 2 * slottime; 2368 eifs = (ic->ic_curmode == IEEE80211_MODE_11B) ? 364 : 60; 2369 2370 tmp = RAL_READ(sc, RT2560_CSR11); 2371 tmp = (tmp & ~0x1f00) | slottime << 8; 2372 RAL_WRITE(sc, RT2560_CSR11, tmp); 2373 2374 tmp = pifs << 16 | sifs; 2375 RAL_WRITE(sc, RT2560_CSR18, tmp); 2376 2377 tmp = eifs << 16 | difs; 2378 RAL_WRITE(sc, RT2560_CSR19, tmp); 2379 2380 DPRINTF(("setting slottime to %uus\n", slottime)); 2381} 2382 2383void 2384rt2560_set_basicrates(struct rt2560_softc *sc) 2385{ 2386 struct ieee80211com *ic = &sc->sc_ic; 2387 2388 /* update basic rate set */ 2389 if (ic->ic_curmode == IEEE80211_MODE_11B) { 2390 /* 11b basic rates: 1, 2Mbps */ 2391 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x3); 2392 } else { 2393 /* 11b/g basic rates: 1, 2, 5.5, 11Mbps */ 2394 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0xf); 2395 } 2396} 2397 2398void 2399rt2560_update_led(struct rt2560_softc *sc, int led1, int led2) 2400{ 2401 uint32_t tmp; 2402 2403 /* set ON period to 70ms and OFF period to 30ms */ 2404 tmp = led1 << 16 | led2 << 17 | 70 << 8 | 30; 2405 RAL_WRITE(sc, RT2560_LEDCSR, tmp); 2406} 2407 2408void 2409rt2560_set_bssid(struct rt2560_softc *sc, uint8_t *bssid) 2410{ 2411 uint32_t tmp; 2412 2413 tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24; 2414 RAL_WRITE(sc, RT2560_CSR5, tmp); 2415 2416 tmp = bssid[4] | bssid[5] << 8; 2417 RAL_WRITE(sc, RT2560_CSR6, tmp); 2418 2419 DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid))); 2420} 2421 2422void 2423rt2560_set_macaddr(struct rt2560_softc *sc, uint8_t *addr) 2424{ 2425 uint32_t tmp; 2426 2427 tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24; 2428 RAL_WRITE(sc, RT2560_CSR3, tmp); 2429 2430 tmp = addr[4] | addr[5] << 8; 2431 RAL_WRITE(sc, RT2560_CSR4, tmp); 2432 2433 DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr))); 2434} 2435 2436void 2437rt2560_get_macaddr(struct rt2560_softc *sc, uint8_t *addr) 2438{ 2439 uint32_t tmp; 2440 2441 tmp = RAL_READ(sc, RT2560_CSR3); 2442 addr[0] = tmp & 0xff; 2443 addr[1] = (tmp >> 8) & 0xff; 2444 addr[2] = (tmp >> 16) & 0xff; 2445 addr[3] = (tmp >> 24); 2446 2447 tmp = RAL_READ(sc, RT2560_CSR4); 2448 addr[4] = tmp & 0xff; 2449 addr[5] = (tmp >> 8) & 0xff; 2450} 2451 2452void 2453rt2560_update_promisc(struct rt2560_softc *sc) 2454{ 2455 struct ifnet *ifp = &sc->sc_ic.ic_if; 2456 uint32_t tmp; 2457 2458 tmp = RAL_READ(sc, RT2560_RXCSR0); 2459 2460 tmp &= ~RT2560_DROP_NOT_TO_ME; 2461 if (!(ifp->if_flags & IFF_PROMISC)) 2462 tmp |= RT2560_DROP_NOT_TO_ME; 2463 2464 RAL_WRITE(sc, RT2560_RXCSR0, tmp); 2465 2466 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? 2467 "entering" : "leaving")); 2468} 2469 2470void 2471rt2560_set_txantenna(struct rt2560_softc *sc, int antenna) 2472{ 2473 uint32_t tmp; 2474 uint8_t tx; 2475 2476 tx = rt2560_bbp_read(sc, RT2560_BBP_TX) & ~RT2560_BBP_ANTMASK; 2477 if (antenna == 1) 2478 tx |= RT2560_BBP_ANTA; 2479 else if (antenna == 2) 2480 tx |= RT2560_BBP_ANTB; 2481 else 2482 tx |= RT2560_BBP_DIVERSITY; 2483 2484 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */ 2485 if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526 || 2486 sc->rf_rev == RT2560_RF_5222) 2487 tx |= RT2560_BBP_FLIPIQ; 2488 2489 rt2560_bbp_write(sc, RT2560_BBP_TX, tx); 2490 2491 /* update values for CCK and OFDM in BBPCSR1 */ 2492 tmp = RAL_READ(sc, RT2560_BBPCSR1) & ~0x00070007; 2493 tmp |= (tx & 0x7) << 16 | (tx & 0x7); 2494 RAL_WRITE(sc, RT2560_BBPCSR1, tmp); 2495} 2496 2497void 2498rt2560_set_rxantenna(struct rt2560_softc *sc, int antenna) 2499{ 2500 uint8_t rx; 2501 2502 rx = rt2560_bbp_read(sc, RT2560_BBP_RX) & ~RT2560_BBP_ANTMASK; 2503 if (antenna == 1) 2504 rx |= RT2560_BBP_ANTA; 2505 else if (antenna == 2) 2506 rx |= RT2560_BBP_ANTB; 2507 else 2508 rx |= RT2560_BBP_DIVERSITY; 2509 2510 /* need to force no I/Q flip for RF 2525e and 2526 */ 2511 if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526) 2512 rx &= ~RT2560_BBP_FLIPIQ; 2513 2514 rt2560_bbp_write(sc, RT2560_BBP_RX, rx); 2515} 2516 2517const char * 2518rt2560_get_rf(int rev) 2519{ 2520 switch (rev) { 2521 case RT2560_RF_2522: return "RT2522"; 2522 case RT2560_RF_2523: return "RT2523"; 2523 case RT2560_RF_2524: return "RT2524"; 2524 case RT2560_RF_2525: return "RT2525"; 2525 case RT2560_RF_2525E: return "RT2525e"; 2526 case RT2560_RF_2526: return "RT2526"; 2527 case RT2560_RF_5222: return "RT5222"; 2528 default: return "unknown"; 2529 } 2530} 2531 2532void 2533rt2560_read_eeprom(struct rt2560_softc *sc) 2534{ 2535 uint16_t val; 2536 int i; 2537 2538 val = rt2560_eeprom_read(sc, RT2560_EEPROM_CONFIG0); 2539 sc->rf_rev = (val >> 11) & 0x1f; 2540 sc->hw_radio = (val >> 10) & 0x1; 2541 sc->led_mode = (val >> 6) & 0x7; 2542 sc->rx_ant = (val >> 4) & 0x3; 2543 sc->tx_ant = (val >> 2) & 0x3; 2544 sc->nb_ant = val & 0x3; 2545 2546 /* read default values for BBP registers */ 2547 for (i = 0; i < 16; i++) { 2548 val = rt2560_eeprom_read(sc, RT2560_EEPROM_BBP_BASE + i); 2549 sc->bbp_prom[i].reg = val >> 8; 2550 sc->bbp_prom[i].val = val & 0xff; 2551 } 2552 2553 /* read Tx power for all b/g channels */ 2554 for (i = 0; i < 14 / 2; i++) { 2555 val = rt2560_eeprom_read(sc, RT2560_EEPROM_TXPOWER + i); 2556 sc->txpow[i * 2] = val >> 8; 2557 sc->txpow[i * 2 + 1] = val & 0xff; 2558 } 2559} 2560 2561int 2562rt2560_bbp_init(struct rt2560_softc *sc) 2563{ 2564 int i, ntries; 2565 2566 /* wait for BBP to be ready */ 2567 for (ntries = 0; ntries < 100; ntries++) { 2568 if (rt2560_bbp_read(sc, RT2560_BBP_VERSION) != 0) 2569 break; 2570 DELAY(1); 2571 } 2572 if (ntries == 100) { 2573 printf("%s: timeout waiting for BBP\n", sc->sc_dev.dv_xname); 2574 return EIO; 2575 } 2576 2577 /* initialize BBP registers to default values */ 2578 for (i = 0; i < nitems(rt2560_def_bbp); i++) { 2579 rt2560_bbp_write(sc, rt2560_def_bbp[i].reg, 2580 rt2560_def_bbp[i].val); 2581 } 2582#if 0 2583 /* initialize BBP registers to values stored in EEPROM */ 2584 for (i = 0; i < 16; i++) { 2585 if (sc->bbp_prom[i].reg == 0xff) 2586 continue; 2587 rt2560_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 2588 } 2589#endif 2590 2591 return 0; 2592} 2593 2594int 2595rt2560_init(struct ifnet *ifp) 2596{ 2597 struct rt2560_softc *sc = ifp->if_softc; 2598 struct ieee80211com *ic = &sc->sc_ic; 2599 uint32_t tmp; 2600 int i; 2601 2602 /* for CardBus, power on the socket */ 2603 if (!(sc->sc_flags & RT2560_ENABLED)) { 2604 if (sc->sc_enable != NULL && (*sc->sc_enable)(sc) != 0) { 2605 printf("%s: could not enable device\n", 2606 sc->sc_dev.dv_xname); 2607 return EIO; 2608 } 2609 sc->sc_flags |= RT2560_ENABLED; 2610 } 2611 2612 rt2560_stop(ifp, 0); 2613 2614 /* setup tx rings */ 2615 tmp = RT2560_PRIO_RING_COUNT << 24 | 2616 RT2560_ATIM_RING_COUNT << 16 | 2617 RT2560_TX_RING_COUNT << 8 | 2618 RT2560_TX_DESC_SIZE; 2619 2620 /* rings _must_ be initialized in this _exact_ order! */ 2621 RAL_WRITE(sc, RT2560_TXCSR2, tmp); 2622 RAL_WRITE(sc, RT2560_TXCSR3, sc->txq.physaddr); 2623 RAL_WRITE(sc, RT2560_TXCSR5, sc->prioq.physaddr); 2624 RAL_WRITE(sc, RT2560_TXCSR4, sc->atimq.physaddr); 2625 RAL_WRITE(sc, RT2560_TXCSR6, sc->bcnq.physaddr); 2626 2627 /* setup rx ring */ 2628 tmp = RT2560_RX_RING_COUNT << 8 | RT2560_RX_DESC_SIZE; 2629 2630 RAL_WRITE(sc, RT2560_RXCSR1, tmp); 2631 RAL_WRITE(sc, RT2560_RXCSR2, sc->rxq.physaddr); 2632 2633 /* initialize MAC registers to default values */ 2634 for (i = 0; i < nitems(rt2560_def_mac); i++) 2635 RAL_WRITE(sc, rt2560_def_mac[i].reg, rt2560_def_mac[i].val); 2636 2637 IEEE80211_ADDR_COPY(ic->ic_myaddr, LLADDR(ifp->if_sadl)); 2638 rt2560_set_macaddr(sc, ic->ic_myaddr); 2639 2640 /* set basic rate set (will be updated later) */ 2641 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x153); 2642 2643 rt2560_set_slottime(sc); 2644 rt2560_update_plcp(sc); 2645 rt2560_update_led(sc, 0, 0); 2646 2647 RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC); 2648 RAL_WRITE(sc, RT2560_CSR1, RT2560_HOST_READY); 2649 2650 if (rt2560_bbp_init(sc) != 0) { 2651 rt2560_stop(ifp, 1); 2652 return EIO; 2653 } 2654 2655 rt2560_set_txantenna(sc, 1); 2656 rt2560_set_rxantenna(sc, 1); 2657 2658 /* set default BSS channel */ 2659 ic->ic_bss->ni_chan = ic->ic_ibss_chan; 2660 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 2661 2662 /* kick Rx */ 2663 tmp = RT2560_DROP_PHY_ERROR | RT2560_DROP_CRC_ERROR; 2664 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2665 tmp |= RT2560_DROP_CTL | RT2560_DROP_VERSION_ERROR; 2666#ifndef IEEE80211_STA_ONLY 2667 if (ic->ic_opmode != IEEE80211_M_HOSTAP) 2668#endif 2669 tmp |= RT2560_DROP_TODS; 2670 if (!(ifp->if_flags & IFF_PROMISC)) 2671 tmp |= RT2560_DROP_NOT_TO_ME; 2672 } 2673 RAL_WRITE(sc, RT2560_RXCSR0, tmp); 2674 2675 /* clear old FCS and Rx FIFO errors */ 2676 RAL_READ(sc, RT2560_CNT0); 2677 RAL_READ(sc, RT2560_CNT4); 2678 2679 /* clear any pending interrupts */ 2680 RAL_WRITE(sc, RT2560_CSR7, 0xffffffff); 2681 2682 /* enable interrupts */ 2683 RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK); 2684 2685 ifp->if_flags &= ~IFF_OACTIVE; 2686 ifp->if_flags |= IFF_RUNNING; 2687 2688 if (ic->ic_opmode == IEEE80211_M_MONITOR) 2689 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 2690 else 2691 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 2692 2693 return 0; 2694} 2695 2696void 2697rt2560_stop(struct ifnet *ifp, int disable) 2698{ 2699 struct rt2560_softc *sc = ifp->if_softc; 2700 struct ieee80211com *ic = &sc->sc_ic; 2701 2702 sc->sc_tx_timer = 0; 2703 sc->sc_flags &= ~(RT2560_PRIO_OACTIVE|RT2560_DATA_OACTIVE); 2704 ifp->if_timer = 0; 2705 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 2706 2707 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); /* free all nodes */ 2708 2709 /* abort Tx */ 2710 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_ABORT_TX); 2711 2712 /* disable Rx */ 2713 RAL_WRITE(sc, RT2560_RXCSR0, RT2560_DISABLE_RX); 2714 2715 /* reset ASIC (and thus, BBP) */ 2716 RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC); 2717 RAL_WRITE(sc, RT2560_CSR1, 0); 2718 2719 /* disable interrupts */ 2720 RAL_WRITE(sc, RT2560_CSR8, 0xffffffff); 2721 2722 /* clear any pending interrupt */ 2723 RAL_WRITE(sc, RT2560_CSR7, 0xffffffff); 2724 2725 /* reset Tx and Rx rings */ 2726 rt2560_reset_tx_ring(sc, &sc->txq); 2727 rt2560_reset_tx_ring(sc, &sc->atimq); 2728 rt2560_reset_tx_ring(sc, &sc->prioq); 2729 rt2560_reset_tx_ring(sc, &sc->bcnq); 2730 rt2560_reset_rx_ring(sc, &sc->rxq); 2731 2732 /* for CardBus, power down the socket */ 2733 if (disable && sc->sc_disable != NULL) { 2734 if (sc->sc_flags & RT2560_ENABLED) { 2735 (*sc->sc_disable)(sc); 2736 sc->sc_flags &= ~RT2560_ENABLED; 2737 } 2738 } 2739} 2740 2741struct cfdriver ral_cd = { 2742 NULL, "ral", DV_IFNET 2743}; 2744