rt2560.c revision 1.61
1/* $OpenBSD: rt2560.c,v 1.61 2013/08/07 01:06:30 bluhm Exp $ */ 2 3/*- 4 * Copyright (c) 2005, 2006 5 * Damien Bergamini <damien.bergamini@free.fr> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20/*- 21 * Ralink Technology RT2560 chipset driver 22 * http://www.ralinktech.com/ 23 */ 24 25#include "bpfilter.h" 26 27#include <sys/param.h> 28#include <sys/sockio.h> 29#include <sys/mbuf.h> 30#include <sys/kernel.h> 31#include <sys/socket.h> 32#include <sys/systm.h> 33#include <sys/malloc.h> 34#include <sys/timeout.h> 35#include <sys/conf.h> 36#include <sys/device.h> 37 38#include <machine/bus.h> 39#include <machine/endian.h> 40#include <machine/intr.h> 41 42#if NBPFILTER > 0 43#include <net/bpf.h> 44#endif 45#include <net/if.h> 46#include <net/if_arp.h> 47#include <net/if_dl.h> 48#include <net/if_media.h> 49#include <net/if_types.h> 50 51#include <netinet/in.h> 52#include <netinet/in_systm.h> 53#include <netinet/if_ether.h> 54#include <netinet/ip.h> 55 56#include <net80211/ieee80211_var.h> 57#include <net80211/ieee80211_amrr.h> 58#include <net80211/ieee80211_radiotap.h> 59 60#include <dev/ic/rt2560reg.h> 61#include <dev/ic/rt2560var.h> 62 63#include <dev/pci/pcireg.h> 64#include <dev/pci/pcivar.h> 65#include <dev/pci/pcidevs.h> 66 67#ifdef RAL_DEBUG 68#define DPRINTF(x) do { if (rt2560_debug > 0) printf x; } while (0) 69#define DPRINTFN(n, x) do { if (rt2560_debug >= (n)) printf x; } while (0) 70int rt2560_debug = 1; 71#else 72#define DPRINTF(x) 73#define DPRINTFN(n, x) 74#endif 75 76int rt2560_alloc_tx_ring(struct rt2560_softc *, 77 struct rt2560_tx_ring *, int); 78void rt2560_reset_tx_ring(struct rt2560_softc *, 79 struct rt2560_tx_ring *); 80void rt2560_free_tx_ring(struct rt2560_softc *, 81 struct rt2560_tx_ring *); 82int rt2560_alloc_rx_ring(struct rt2560_softc *, 83 struct rt2560_rx_ring *, int); 84void rt2560_reset_rx_ring(struct rt2560_softc *, 85 struct rt2560_rx_ring *); 86void rt2560_free_rx_ring(struct rt2560_softc *, 87 struct rt2560_rx_ring *); 88struct ieee80211_node *rt2560_node_alloc(struct ieee80211com *); 89int rt2560_media_change(struct ifnet *); 90void rt2560_next_scan(void *); 91void rt2560_iter_func(void *, struct ieee80211_node *); 92void rt2560_amrr_timeout(void *); 93void rt2560_newassoc(struct ieee80211com *, struct ieee80211_node *, 94 int); 95int rt2560_newstate(struct ieee80211com *, enum ieee80211_state, 96 int); 97uint16_t rt2560_eeprom_read(struct rt2560_softc *, uint8_t); 98void rt2560_encryption_intr(struct rt2560_softc *); 99void rt2560_tx_intr(struct rt2560_softc *); 100void rt2560_prio_intr(struct rt2560_softc *); 101void rt2560_decryption_intr(struct rt2560_softc *); 102void rt2560_rx_intr(struct rt2560_softc *); 103#ifndef IEEE80211_STA_ONLY 104void rt2560_beacon_expire(struct rt2560_softc *); 105#endif 106void rt2560_wakeup_expire(struct rt2560_softc *); 107#if NBPFILTER > 0 108uint8_t rt2560_rxrate(const struct rt2560_rx_desc *); 109#endif 110int rt2560_ack_rate(struct ieee80211com *, int); 111uint16_t rt2560_txtime(int, int, uint32_t); 112uint8_t rt2560_plcp_signal(int); 113void rt2560_setup_tx_desc(struct rt2560_softc *, 114 struct rt2560_tx_desc *, uint32_t, int, int, int, 115 bus_addr_t); 116#ifndef IEEE80211_STA_ONLY 117int rt2560_tx_bcn(struct rt2560_softc *, struct mbuf *, 118 struct ieee80211_node *); 119#endif 120int rt2560_tx_mgt(struct rt2560_softc *, struct mbuf *, 121 struct ieee80211_node *); 122int rt2560_tx_data(struct rt2560_softc *, struct mbuf *, 123 struct ieee80211_node *); 124void rt2560_start(struct ifnet *); 125void rt2560_watchdog(struct ifnet *); 126int rt2560_ioctl(struct ifnet *, u_long, caddr_t); 127void rt2560_bbp_write(struct rt2560_softc *, uint8_t, uint8_t); 128uint8_t rt2560_bbp_read(struct rt2560_softc *, uint8_t); 129void rt2560_rf_write(struct rt2560_softc *, uint8_t, uint32_t); 130void rt2560_set_chan(struct rt2560_softc *, 131 struct ieee80211_channel *); 132void rt2560_disable_rf_tune(struct rt2560_softc *); 133void rt2560_enable_tsf_sync(struct rt2560_softc *); 134void rt2560_update_plcp(struct rt2560_softc *); 135void rt2560_updateslot(struct ieee80211com *); 136void rt2560_set_slottime(struct rt2560_softc *); 137void rt2560_set_basicrates(struct rt2560_softc *); 138void rt2560_update_led(struct rt2560_softc *, int, int); 139void rt2560_set_bssid(struct rt2560_softc *, uint8_t *); 140void rt2560_set_macaddr(struct rt2560_softc *, uint8_t *); 141void rt2560_get_macaddr(struct rt2560_softc *, uint8_t *); 142void rt2560_update_promisc(struct rt2560_softc *); 143void rt2560_set_txantenna(struct rt2560_softc *, int); 144void rt2560_set_rxantenna(struct rt2560_softc *, int); 145const char *rt2560_get_rf(int); 146void rt2560_read_eeprom(struct rt2560_softc *); 147int rt2560_bbp_init(struct rt2560_softc *); 148int rt2560_init(struct ifnet *); 149void rt2560_stop(struct ifnet *, int); 150 151static const struct { 152 uint32_t reg; 153 uint32_t val; 154} rt2560_def_mac[] = { 155 RT2560_DEF_MAC 156}; 157 158static const struct { 159 uint8_t reg; 160 uint8_t val; 161} rt2560_def_bbp[] = { 162 RT2560_DEF_BBP 163}; 164 165static const uint32_t rt2560_rf2522_r2[] = RT2560_RF2522_R2; 166static const uint32_t rt2560_rf2523_r2[] = RT2560_RF2523_R2; 167static const uint32_t rt2560_rf2524_r2[] = RT2560_RF2524_R2; 168static const uint32_t rt2560_rf2525_r2[] = RT2560_RF2525_R2; 169static const uint32_t rt2560_rf2525_hi_r2[] = RT2560_RF2525_HI_R2; 170static const uint32_t rt2560_rf2525e_r2[] = RT2560_RF2525E_R2; 171static const uint32_t rt2560_rf2526_r2[] = RT2560_RF2526_R2; 172static const uint32_t rt2560_rf2526_hi_r2[] = RT2560_RF2526_HI_R2; 173 174int 175rt2560_attach(void *xsc, int id) 176{ 177 struct rt2560_softc *sc = xsc; 178 struct ieee80211com *ic = &sc->sc_ic; 179 struct ifnet *ifp = &ic->ic_if; 180 int error, i; 181 182 sc->amrr.amrr_min_success_threshold = 1; 183 sc->amrr.amrr_max_success_threshold = 15; 184 timeout_set(&sc->amrr_to, rt2560_amrr_timeout, sc); 185 timeout_set(&sc->scan_to, rt2560_next_scan, sc); 186 187 /* retrieve RT2560 rev. no */ 188 sc->asic_rev = RAL_READ(sc, RT2560_CSR0); 189 190 /* retrieve MAC address */ 191 rt2560_get_macaddr(sc, ic->ic_myaddr); 192 printf(", address %s\n", ether_sprintf(ic->ic_myaddr)); 193 194 /* retrieve RF rev. no and various other things from EEPROM */ 195 rt2560_read_eeprom(sc); 196 197 printf("%s: MAC/BBP RT2560 (rev 0x%02x), RF %s\n", sc->sc_dev.dv_xname, 198 sc->asic_rev, rt2560_get_rf(sc->rf_rev)); 199 200 /* 201 * Allocate Tx and Rx rings. 202 */ 203 error = rt2560_alloc_tx_ring(sc, &sc->txq, RT2560_TX_RING_COUNT); 204 if (error != 0) { 205 printf("%s: could not allocate Tx ring\n", 206 sc->sc_dev.dv_xname); 207 goto fail1; 208 } 209 error = rt2560_alloc_tx_ring(sc, &sc->atimq, RT2560_ATIM_RING_COUNT); 210 if (error != 0) { 211 printf("%s: could not allocate ATIM ring\n", 212 sc->sc_dev.dv_xname); 213 goto fail2; 214 } 215 error = rt2560_alloc_tx_ring(sc, &sc->prioq, RT2560_PRIO_RING_COUNT); 216 if (error != 0) { 217 printf("%s: could not allocate Prio ring\n", 218 sc->sc_dev.dv_xname); 219 goto fail3; 220 } 221 error = rt2560_alloc_tx_ring(sc, &sc->bcnq, RT2560_BEACON_RING_COUNT); 222 if (error != 0) { 223 printf("%s: could not allocate Beacon ring\n", 224 sc->sc_dev.dv_xname); 225 goto fail4; 226 } 227 error = rt2560_alloc_rx_ring(sc, &sc->rxq, RT2560_RX_RING_COUNT); 228 if (error != 0) { 229 printf("%s: could not allocate Rx ring\n", 230 sc->sc_dev.dv_xname); 231 goto fail5; 232 } 233 234 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 235 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 236 ic->ic_state = IEEE80211_S_INIT; 237 238 /* set device capabilities */ 239 ic->ic_caps = 240 IEEE80211_C_MONITOR | /* monitor mode supported */ 241#ifndef IEEE80211_STA_ONLY 242 IEEE80211_C_IBSS | /* IBSS mode supported */ 243 IEEE80211_C_HOSTAP | /* HostAp mode supported */ 244#endif 245 IEEE80211_C_TXPMGT | /* tx power management */ 246 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 247 IEEE80211_C_SHSLOT | /* short slot time supported */ 248 IEEE80211_C_WEP | /* s/w WEP */ 249 IEEE80211_C_RSN; /* WPA/RSN */ 250 251 /* set supported .11b and .11g rates */ 252 ic->ic_sup_rates[IEEE80211_MODE_11B] = ieee80211_std_rateset_11b; 253 ic->ic_sup_rates[IEEE80211_MODE_11G] = ieee80211_std_rateset_11g; 254 255 /* set supported .11b and .11g channels (1 through 14) */ 256 for (i = 1; i <= 14; i++) { 257 ic->ic_channels[i].ic_freq = 258 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 259 ic->ic_channels[i].ic_flags = 260 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 261 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 262 } 263 264 ifp->if_softc = sc; 265 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 266 ifp->if_ioctl = rt2560_ioctl; 267 ifp->if_start = rt2560_start; 268 ifp->if_watchdog = rt2560_watchdog; 269 IFQ_SET_READY(&ifp->if_snd); 270 memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ); 271 272 if_attach(ifp); 273 ieee80211_ifattach(ifp); 274 ic->ic_node_alloc = rt2560_node_alloc; 275 ic->ic_newassoc = rt2560_newassoc; 276 ic->ic_updateslot = rt2560_updateslot; 277 278 /* override state transition machine */ 279 sc->sc_newstate = ic->ic_newstate; 280 ic->ic_newstate = rt2560_newstate; 281 ieee80211_media_init(ifp, rt2560_media_change, ieee80211_media_status); 282 283#if NBPFILTER > 0 284 bpfattach(&sc->sc_drvbpf, ifp, DLT_IEEE802_11_RADIO, 285 sizeof (struct ieee80211_frame) + 64); 286 287 sc->sc_rxtap_len = sizeof sc->sc_rxtapu; 288 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 289 sc->sc_rxtap.wr_ihdr.it_present = htole32(RT2560_RX_RADIOTAP_PRESENT); 290 291 sc->sc_txtap_len = sizeof sc->sc_txtapu; 292 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 293 sc->sc_txtap.wt_ihdr.it_present = htole32(RT2560_TX_RADIOTAP_PRESENT); 294#endif 295 return 0; 296 297fail5: rt2560_free_tx_ring(sc, &sc->bcnq); 298fail4: rt2560_free_tx_ring(sc, &sc->prioq); 299fail3: rt2560_free_tx_ring(sc, &sc->atimq); 300fail2: rt2560_free_tx_ring(sc, &sc->txq); 301fail1: return ENXIO; 302} 303 304int 305rt2560_detach(void *xsc) 306{ 307 struct rt2560_softc *sc = xsc; 308 struct ifnet *ifp = &sc->sc_ic.ic_if; 309 310 timeout_del(&sc->scan_to); 311 timeout_del(&sc->amrr_to); 312 313 ieee80211_ifdetach(ifp); /* free all nodes */ 314 if_detach(ifp); 315 316 rt2560_free_tx_ring(sc, &sc->txq); 317 rt2560_free_tx_ring(sc, &sc->atimq); 318 rt2560_free_tx_ring(sc, &sc->prioq); 319 rt2560_free_tx_ring(sc, &sc->bcnq); 320 rt2560_free_rx_ring(sc, &sc->rxq); 321 322 return 0; 323} 324 325void 326rt2560_suspend(void *xsc) 327{ 328 struct rt2560_softc *sc = xsc; 329 struct ifnet *ifp = &sc->sc_ic.ic_if; 330 331 if (ifp->if_flags & IFF_RUNNING) 332 rt2560_stop(ifp, 1); 333} 334 335void 336rt2560_resume(void *xsc) 337{ 338 struct rt2560_softc *sc = xsc; 339 struct ifnet *ifp = &sc->sc_ic.ic_if; 340 341 if (ifp->if_flags & IFF_UP) 342 rt2560_init(ifp); 343} 344 345int 346rt2560_alloc_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring, 347 int count) 348{ 349 int i, nsegs, error; 350 351 ring->count = count; 352 ring->queued = 0; 353 ring->cur = ring->next = 0; 354 ring->cur_encrypt = ring->next_encrypt = 0; 355 356 error = bus_dmamap_create(sc->sc_dmat, count * RT2560_TX_DESC_SIZE, 1, 357 count * RT2560_TX_DESC_SIZE, 0, BUS_DMA_NOWAIT, &ring->map); 358 if (error != 0) { 359 printf("%s: could not create desc DMA map\n", 360 sc->sc_dev.dv_xname); 361 goto fail; 362 } 363 364 error = bus_dmamem_alloc(sc->sc_dmat, count * RT2560_TX_DESC_SIZE, 365 PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT | BUS_DMA_ZERO); 366 if (error != 0) { 367 printf("%s: could not allocate DMA memory\n", 368 sc->sc_dev.dv_xname); 369 goto fail; 370 } 371 372 error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs, 373 count * RT2560_TX_DESC_SIZE, (caddr_t *)&ring->desc, 374 BUS_DMA_NOWAIT); 375 if (error != 0) { 376 printf("%s: can't map desc DMA memory\n", 377 sc->sc_dev.dv_xname); 378 goto fail; 379 } 380 381 error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc, 382 count * RT2560_TX_DESC_SIZE, NULL, BUS_DMA_NOWAIT); 383 if (error != 0) { 384 printf("%s: could not load desc DMA map\n", 385 sc->sc_dev.dv_xname); 386 goto fail; 387 } 388 389 ring->physaddr = ring->map->dm_segs->ds_addr; 390 391 ring->data = malloc(count * sizeof (struct rt2560_tx_data), M_DEVBUF, 392 M_NOWAIT | M_ZERO); 393 if (ring->data == NULL) { 394 printf("%s: could not allocate soft data\n", 395 sc->sc_dev.dv_xname); 396 error = ENOMEM; 397 goto fail; 398 } 399 400 for (i = 0; i < count; i++) { 401 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 402 RT2560_MAX_SCATTER, MCLBYTES, 0, BUS_DMA_NOWAIT, 403 &ring->data[i].map); 404 if (error != 0) { 405 printf("%s: could not create DMA map\n", 406 sc->sc_dev.dv_xname); 407 goto fail; 408 } 409 } 410 411 return 0; 412 413fail: rt2560_free_tx_ring(sc, ring); 414 return error; 415} 416 417void 418rt2560_reset_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring) 419{ 420 int i; 421 422 for (i = 0; i < ring->count; i++) { 423 struct rt2560_tx_desc *desc = &ring->desc[i]; 424 struct rt2560_tx_data *data = &ring->data[i]; 425 426 if (data->m != NULL) { 427 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 428 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 429 bus_dmamap_unload(sc->sc_dmat, data->map); 430 m_freem(data->m); 431 data->m = NULL; 432 } 433 434 /* 435 * The node has already been freed at that point so don't call 436 * ieee80211_release_node() here. 437 */ 438 data->ni = NULL; 439 440 desc->flags = 0; 441 } 442 443 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 444 BUS_DMASYNC_PREWRITE); 445 446 ring->queued = 0; 447 ring->cur = ring->next = 0; 448 ring->cur_encrypt = ring->next_encrypt = 0; 449} 450 451void 452rt2560_free_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring) 453{ 454 int i; 455 456 if (ring->desc != NULL) { 457 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, 458 ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 459 bus_dmamap_unload(sc->sc_dmat, ring->map); 460 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)ring->desc, 461 ring->count * RT2560_TX_DESC_SIZE); 462 bus_dmamem_free(sc->sc_dmat, &ring->seg, 1); 463 } 464 465 if (ring->data != NULL) { 466 for (i = 0; i < ring->count; i++) { 467 struct rt2560_tx_data *data = &ring->data[i]; 468 469 if (data->m != NULL) { 470 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 471 data->map->dm_mapsize, 472 BUS_DMASYNC_POSTWRITE); 473 bus_dmamap_unload(sc->sc_dmat, data->map); 474 m_freem(data->m); 475 } 476 477 /* 478 * The node has already been freed at that point so 479 * don't call ieee80211_release_node() here. 480 */ 481 data->ni = NULL; 482 483 if (data->map != NULL) 484 bus_dmamap_destroy(sc->sc_dmat, data->map); 485 } 486 free(ring->data, M_DEVBUF); 487 } 488} 489 490int 491rt2560_alloc_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring, 492 int count) 493{ 494 int i, nsegs, error; 495 496 ring->count = count; 497 ring->cur = ring->next = 0; 498 ring->cur_decrypt = 0; 499 500 error = bus_dmamap_create(sc->sc_dmat, count * RT2560_RX_DESC_SIZE, 1, 501 count * RT2560_RX_DESC_SIZE, 0, BUS_DMA_NOWAIT, &ring->map); 502 if (error != 0) { 503 printf("%s: could not create desc DMA map\n", 504 sc->sc_dev.dv_xname); 505 goto fail; 506 } 507 508 error = bus_dmamem_alloc(sc->sc_dmat, count * RT2560_RX_DESC_SIZE, 509 PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT | BUS_DMA_ZERO); 510 if (error != 0) { 511 printf("%s: could not allocate DMA memory\n", 512 sc->sc_dev.dv_xname); 513 goto fail; 514 } 515 516 error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs, 517 count * RT2560_RX_DESC_SIZE, (caddr_t *)&ring->desc, 518 BUS_DMA_NOWAIT); 519 if (error != 0) { 520 printf("%s: can't map desc DMA memory\n", 521 sc->sc_dev.dv_xname); 522 goto fail; 523 } 524 525 error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc, 526 count * RT2560_RX_DESC_SIZE, NULL, BUS_DMA_NOWAIT); 527 if (error != 0) { 528 printf("%s: could not load desc DMA map\n", 529 sc->sc_dev.dv_xname); 530 goto fail; 531 } 532 533 ring->physaddr = ring->map->dm_segs->ds_addr; 534 535 ring->data = malloc(count * sizeof (struct rt2560_rx_data), M_DEVBUF, 536 M_NOWAIT | M_ZERO); 537 if (ring->data == NULL) { 538 printf("%s: could not allocate soft data\n", 539 sc->sc_dev.dv_xname); 540 error = ENOMEM; 541 goto fail; 542 } 543 544 /* 545 * Pre-allocate Rx buffers and populate Rx ring. 546 */ 547 for (i = 0; i < count; i++) { 548 struct rt2560_rx_desc *desc = &sc->rxq.desc[i]; 549 struct rt2560_rx_data *data = &sc->rxq.data[i]; 550 551 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES, 552 0, BUS_DMA_NOWAIT, &data->map); 553 if (error != 0) { 554 printf("%s: could not create DMA map\n", 555 sc->sc_dev.dv_xname); 556 goto fail; 557 } 558 559 MGETHDR(data->m, M_DONTWAIT, MT_DATA); 560 if (data->m == NULL) { 561 printf("%s: could not allocate rx mbuf\n", 562 sc->sc_dev.dv_xname); 563 error = ENOMEM; 564 goto fail; 565 } 566 MCLGET(data->m, M_DONTWAIT); 567 if (!(data->m->m_flags & M_EXT)) { 568 printf("%s: could not allocate rx mbuf cluster\n", 569 sc->sc_dev.dv_xname); 570 error = ENOMEM; 571 goto fail; 572 } 573 574 error = bus_dmamap_load(sc->sc_dmat, data->map, 575 mtod(data->m, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT); 576 if (error != 0) { 577 printf("%s: could not load rx buf DMA map", 578 sc->sc_dev.dv_xname); 579 goto fail; 580 } 581 582 desc->flags = htole32(RT2560_RX_BUSY); 583 desc->physaddr = htole32(data->map->dm_segs->ds_addr); 584 } 585 586 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 587 BUS_DMASYNC_PREWRITE); 588 589 return 0; 590 591fail: rt2560_free_rx_ring(sc, ring); 592 return error; 593} 594 595void 596rt2560_reset_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring) 597{ 598 int i; 599 600 for (i = 0; i < ring->count; i++) { 601 ring->desc[i].flags = htole32(RT2560_RX_BUSY); 602 ring->data[i].drop = 0; 603 } 604 605 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 606 BUS_DMASYNC_PREWRITE); 607 608 ring->cur = ring->next = 0; 609 ring->cur_decrypt = 0; 610} 611 612void 613rt2560_free_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring) 614{ 615 int i; 616 617 if (ring->desc != NULL) { 618 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, 619 ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 620 bus_dmamap_unload(sc->sc_dmat, ring->map); 621 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)ring->desc, 622 ring->count * RT2560_RX_DESC_SIZE); 623 bus_dmamem_free(sc->sc_dmat, &ring->seg, 1); 624 } 625 626 if (ring->data != NULL) { 627 for (i = 0; i < ring->count; i++) { 628 struct rt2560_rx_data *data = &ring->data[i]; 629 630 if (data->m != NULL) { 631 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 632 data->map->dm_mapsize, 633 BUS_DMASYNC_POSTREAD); 634 bus_dmamap_unload(sc->sc_dmat, data->map); 635 m_freem(data->m); 636 } 637 638 if (data->map != NULL) 639 bus_dmamap_destroy(sc->sc_dmat, data->map); 640 } 641 free(ring->data, M_DEVBUF); 642 } 643} 644 645struct ieee80211_node * 646rt2560_node_alloc(struct ieee80211com *ic) 647{ 648 return malloc(sizeof (struct rt2560_node), M_DEVBUF, 649 M_NOWAIT | M_ZERO); 650} 651 652int 653rt2560_media_change(struct ifnet *ifp) 654{ 655 int error; 656 657 error = ieee80211_media_change(ifp); 658 if (error != ENETRESET) 659 return error; 660 661 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 662 rt2560_init(ifp); 663 664 return 0; 665} 666 667/* 668 * This function is called periodically (every 200ms) during scanning to 669 * switch from one channel to another. 670 */ 671void 672rt2560_next_scan(void *arg) 673{ 674 struct rt2560_softc *sc = arg; 675 struct ieee80211com *ic = &sc->sc_ic; 676 struct ifnet *ifp = &ic->ic_if; 677 int s; 678 679 s = splnet(); 680 if (ic->ic_state == IEEE80211_S_SCAN) 681 ieee80211_next_scan(ifp); 682 splx(s); 683} 684 685/* 686 * This function is called for each neighbor node. 687 */ 688void 689rt2560_iter_func(void *arg, struct ieee80211_node *ni) 690{ 691 struct rt2560_softc *sc = arg; 692 struct rt2560_node *rn = (struct rt2560_node *)ni; 693 694 ieee80211_amrr_choose(&sc->amrr, ni, &rn->amn); 695} 696 697void 698rt2560_amrr_timeout(void *arg) 699{ 700 struct rt2560_softc *sc = arg; 701 struct ieee80211com *ic = &sc->sc_ic; 702 int s; 703 704 s = splnet(); 705 if (ic->ic_opmode == IEEE80211_M_STA) 706 rt2560_iter_func(sc, ic->ic_bss); 707#ifndef IEEE80211_STA_ONLY 708 else 709 ieee80211_iterate_nodes(ic, rt2560_iter_func, sc); 710#endif 711 splx(s); 712 713 timeout_add_msec(&sc->amrr_to, 500); 714} 715 716void 717rt2560_newassoc(struct ieee80211com *ic, struct ieee80211_node *ni, int isnew) 718{ 719 struct rt2560_softc *sc = ic->ic_softc; 720 int i; 721 722 ieee80211_amrr_node_init(&sc->amrr, &((struct rt2560_node *)ni)->amn); 723 724 /* set rate to some reasonable initial value */ 725 for (i = ni->ni_rates.rs_nrates - 1; 726 i > 0 && (ni->ni_rates.rs_rates[i] & IEEE80211_RATE_VAL) > 72; 727 i--); 728 ni->ni_txrate = i; 729} 730 731int 732rt2560_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg) 733{ 734 struct rt2560_softc *sc = ic->ic_if.if_softc; 735 enum ieee80211_state ostate; 736 struct ieee80211_node *ni; 737 int error = 0; 738 739 ostate = ic->ic_state; 740 timeout_del(&sc->scan_to); 741 timeout_del(&sc->amrr_to); 742 743 switch (nstate) { 744 case IEEE80211_S_INIT: 745 if (ostate == IEEE80211_S_RUN) { 746 /* abort TSF synchronization */ 747 RAL_WRITE(sc, RT2560_CSR14, 0); 748 749 /* turn association led off */ 750 rt2560_update_led(sc, 0, 0); 751 } 752 break; 753 754 case IEEE80211_S_SCAN: 755 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 756 timeout_add_msec(&sc->scan_to, 200); 757 break; 758 759 case IEEE80211_S_AUTH: 760 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 761 break; 762 763 case IEEE80211_S_ASSOC: 764 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 765 break; 766 767 case IEEE80211_S_RUN: 768 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 769 770 ni = ic->ic_bss; 771 772 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 773 rt2560_update_plcp(sc); 774 rt2560_set_slottime(sc); 775 rt2560_set_basicrates(sc); 776 rt2560_set_bssid(sc, ni->ni_bssid); 777 } 778 779#ifndef IEEE80211_STA_ONLY 780 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 781 ic->ic_opmode == IEEE80211_M_IBSS) { 782 struct mbuf *m = ieee80211_beacon_alloc(ic, ni); 783 if (m == NULL) { 784 printf("%s: could not allocate beacon\n", 785 sc->sc_dev.dv_xname); 786 error = ENOBUFS; 787 break; 788 } 789 790 error = rt2560_tx_bcn(sc, m, ni); 791 if (error != 0) 792 break; 793 } 794#endif 795 796 /* turn assocation led on */ 797 rt2560_update_led(sc, 1, 0); 798 799 if (ic->ic_opmode == IEEE80211_M_STA) { 800 /* fake a join to init the tx rate */ 801 rt2560_newassoc(ic, ni, 1); 802 } 803 804 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 805 /* start automatic rate control timer */ 806 if (ic->ic_fixed_rate == -1) 807 timeout_add_msec(&sc->amrr_to, 500); 808 809 rt2560_enable_tsf_sync(sc); 810 } 811 break; 812 } 813 814 return (error != 0) ? error : sc->sc_newstate(ic, nstate, arg); 815} 816 817/* 818 * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46 or 819 * 93C66). 820 */ 821uint16_t 822rt2560_eeprom_read(struct rt2560_softc *sc, uint8_t addr) 823{ 824 uint32_t tmp; 825 uint16_t val; 826 int n; 827 828 /* clock C once before the first command */ 829 RT2560_EEPROM_CTL(sc, 0); 830 831 RT2560_EEPROM_CTL(sc, RT2560_S); 832 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 833 RT2560_EEPROM_CTL(sc, RT2560_S); 834 835 /* write start bit (1) */ 836 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D); 837 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C); 838 839 /* write READ opcode (10) */ 840 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D); 841 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C); 842 RT2560_EEPROM_CTL(sc, RT2560_S); 843 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 844 845 /* write address (A5-A0 or A7-A0) */ 846 n = (RAL_READ(sc, RT2560_CSR21) & RT2560_93C46) ? 5 : 7; 847 for (; n >= 0; n--) { 848 RT2560_EEPROM_CTL(sc, RT2560_S | 849 (((addr >> n) & 1) << RT2560_SHIFT_D)); 850 RT2560_EEPROM_CTL(sc, RT2560_S | 851 (((addr >> n) & 1) << RT2560_SHIFT_D) | RT2560_C); 852 } 853 854 RT2560_EEPROM_CTL(sc, RT2560_S); 855 856 /* read data Q15-Q0 */ 857 val = 0; 858 for (n = 15; n >= 0; n--) { 859 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 860 tmp = RAL_READ(sc, RT2560_CSR21); 861 val |= ((tmp & RT2560_Q) >> RT2560_SHIFT_Q) << n; 862 RT2560_EEPROM_CTL(sc, RT2560_S); 863 } 864 865 RT2560_EEPROM_CTL(sc, 0); 866 867 /* clear Chip Select and clock C */ 868 RT2560_EEPROM_CTL(sc, RT2560_S); 869 RT2560_EEPROM_CTL(sc, 0); 870 RT2560_EEPROM_CTL(sc, RT2560_C); 871 872 return val; 873} 874 875/* 876 * Some frames were processed by the hardware cipher engine and are ready for 877 * transmission. 878 */ 879void 880rt2560_encryption_intr(struct rt2560_softc *sc) 881{ 882 int hw; 883 884 /* retrieve last descriptor index processed by cipher engine */ 885 hw = (RAL_READ(sc, RT2560_SECCSR1) - sc->txq.physaddr) / 886 RT2560_TX_DESC_SIZE; 887 888 for (; sc->txq.next_encrypt != hw;) { 889 struct rt2560_tx_desc *desc = 890 &sc->txq.desc[sc->txq.next_encrypt]; 891 892 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 893 sc->txq.next_encrypt * RT2560_TX_DESC_SIZE, 894 RT2560_TX_DESC_SIZE, BUS_DMASYNC_POSTREAD); 895 896 if (letoh32(desc->flags) & 897 (RT2560_TX_BUSY | RT2560_TX_CIPHER_BUSY)) 898 break; 899 900 /* for TKIP, swap eiv field to fix a bug in ASIC */ 901 if ((letoh32(desc->flags) & RT2560_TX_CIPHER_MASK) == 902 RT2560_TX_CIPHER_TKIP) 903 desc->eiv = swap32(desc->eiv); 904 905 /* mark the frame ready for transmission */ 906 desc->flags |= htole32(RT2560_TX_BUSY | RT2560_TX_VALID); 907 908 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 909 sc->txq.next_encrypt * RT2560_TX_DESC_SIZE, 910 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 911 912 DPRINTFN(15, ("encryption done idx=%u\n", 913 sc->txq.next_encrypt)); 914 915 sc->txq.next_encrypt = 916 (sc->txq.next_encrypt + 1) % RT2560_TX_RING_COUNT; 917 } 918 919 /* kick Tx */ 920 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_TX); 921} 922 923void 924rt2560_tx_intr(struct rt2560_softc *sc) 925{ 926 struct ieee80211com *ic = &sc->sc_ic; 927 struct ifnet *ifp = &ic->ic_if; 928 929 for (;;) { 930 struct rt2560_tx_desc *desc = &sc->txq.desc[sc->txq.next]; 931 struct rt2560_tx_data *data = &sc->txq.data[sc->txq.next]; 932 struct rt2560_node *rn; 933 934 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 935 sc->txq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 936 BUS_DMASYNC_POSTREAD); 937 938 if ((letoh32(desc->flags) & RT2560_TX_BUSY) || 939 (letoh32(desc->flags) & RT2560_TX_CIPHER_BUSY) || 940 !(letoh32(desc->flags) & RT2560_TX_VALID)) 941 break; 942 943 rn = (struct rt2560_node *)data->ni; 944 945 switch (letoh32(desc->flags) & RT2560_TX_RESULT_MASK) { 946 case RT2560_TX_SUCCESS: 947 DPRINTFN(10, ("data frame sent successfully\n")); 948 rn->amn.amn_txcnt++; 949 ifp->if_opackets++; 950 break; 951 952 case RT2560_TX_SUCCESS_RETRY: 953 DPRINTFN(9, ("data frame sent after %u retries\n", 954 (letoh32(desc->flags) >> 5) & 0x7)); 955 rn->amn.amn_txcnt++; 956 rn->amn.amn_retrycnt++; 957 ifp->if_opackets++; 958 break; 959 960 case RT2560_TX_FAIL_RETRY: 961 DPRINTFN(9, ("sending data frame failed (too much " 962 "retries)\n")); 963 rn->amn.amn_txcnt++; 964 rn->amn.amn_retrycnt++; 965 ifp->if_oerrors++; 966 break; 967 968 case RT2560_TX_FAIL_INVALID: 969 case RT2560_TX_FAIL_OTHER: 970 default: 971 printf("%s: sending data frame failed 0x%08x\n", 972 sc->sc_dev.dv_xname, letoh32(desc->flags)); 973 ifp->if_oerrors++; 974 } 975 976 /* descriptor is no longer valid */ 977 desc->flags &= ~htole32(RT2560_TX_VALID); 978 979 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 980 sc->txq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 981 BUS_DMASYNC_PREWRITE); 982 983 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 984 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 985 bus_dmamap_unload(sc->sc_dmat, data->map); 986 m_freem(data->m); 987 data->m = NULL; 988 ieee80211_release_node(ic, data->ni); 989 data->ni = NULL; 990 991 DPRINTFN(15, ("tx done idx=%u\n", sc->txq.next)); 992 993 sc->txq.queued--; 994 sc->txq.next = (sc->txq.next + 1) % RT2560_TX_RING_COUNT; 995 } 996 997 if (sc->txq.queued == 0 && sc->prioq.queued == 0) 998 sc->sc_tx_timer = 0; 999 if (sc->txq.queued < RT2560_TX_RING_COUNT - 1) { 1000 sc->sc_flags &= ~RT2560_DATA_OACTIVE; 1001 if (!(sc->sc_flags & (RT2560_DATA_OACTIVE|RT2560_PRIO_OACTIVE))) 1002 ifp->if_flags &= ~IFF_OACTIVE; 1003 rt2560_start(ifp); 1004 } 1005} 1006 1007void 1008rt2560_prio_intr(struct rt2560_softc *sc) 1009{ 1010 struct ieee80211com *ic = &sc->sc_ic; 1011 struct ifnet *ifp = &ic->ic_if; 1012 1013 for (;;) { 1014 struct rt2560_tx_desc *desc = &sc->prioq.desc[sc->prioq.next]; 1015 struct rt2560_tx_data *data = &sc->prioq.data[sc->prioq.next]; 1016 1017 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1018 sc->prioq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1019 BUS_DMASYNC_POSTREAD); 1020 1021 if ((letoh32(desc->flags) & RT2560_TX_BUSY) || 1022 !(letoh32(desc->flags) & RT2560_TX_VALID)) 1023 break; 1024 1025 switch (letoh32(desc->flags) & RT2560_TX_RESULT_MASK) { 1026 case RT2560_TX_SUCCESS: 1027 DPRINTFN(10, ("mgt frame sent successfully\n")); 1028 break; 1029 1030 case RT2560_TX_SUCCESS_RETRY: 1031 DPRINTFN(9, ("mgt frame sent after %u retries\n", 1032 (letoh32(desc->flags) >> 5) & 0x7)); 1033 break; 1034 1035 case RT2560_TX_FAIL_RETRY: 1036 DPRINTFN(9, ("sending mgt frame failed (too much " 1037 "retries)\n")); 1038 break; 1039 1040 case RT2560_TX_FAIL_INVALID: 1041 case RT2560_TX_FAIL_OTHER: 1042 default: 1043 printf("%s: sending mgt frame failed 0x%08x\n", 1044 sc->sc_dev.dv_xname, letoh32(desc->flags)); 1045 } 1046 1047 /* descriptor is no longer valid */ 1048 desc->flags &= ~htole32(RT2560_TX_VALID); 1049 1050 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1051 sc->prioq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1052 BUS_DMASYNC_PREWRITE); 1053 1054 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1055 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 1056 bus_dmamap_unload(sc->sc_dmat, data->map); 1057 m_freem(data->m); 1058 data->m = NULL; 1059 ieee80211_release_node(ic, data->ni); 1060 data->ni = NULL; 1061 1062 DPRINTFN(15, ("prio done idx=%u\n", sc->prioq.next)); 1063 1064 sc->prioq.queued--; 1065 sc->prioq.next = (sc->prioq.next + 1) % RT2560_PRIO_RING_COUNT; 1066 } 1067 1068 if (sc->txq.queued == 0 && sc->prioq.queued == 0) 1069 sc->sc_tx_timer = 0; 1070 if (sc->prioq.queued < RT2560_PRIO_RING_COUNT) { 1071 sc->sc_flags &= ~RT2560_PRIO_OACTIVE; 1072 if (!(sc->sc_flags & (RT2560_DATA_OACTIVE|RT2560_PRIO_OACTIVE))) 1073 ifp->if_flags &= ~IFF_OACTIVE; 1074 rt2560_start(ifp); 1075 } 1076} 1077 1078/* 1079 * Some frames were processed by the hardware cipher engine and are ready for 1080 * transmission to the IEEE802.11 layer. 1081 */ 1082void 1083rt2560_decryption_intr(struct rt2560_softc *sc) 1084{ 1085 struct ieee80211com *ic = &sc->sc_ic; 1086 struct ifnet *ifp = &ic->ic_if; 1087 struct ieee80211_frame *wh; 1088 struct ieee80211_rxinfo rxi; 1089 struct ieee80211_node *ni; 1090 struct mbuf *mnew, *m; 1091 int hw, error; 1092 1093 /* retrieve last decriptor index processed by cipher engine */ 1094 hw = (RAL_READ(sc, RT2560_SECCSR0) - sc->rxq.physaddr) / 1095 RT2560_RX_DESC_SIZE; 1096 1097 for (; sc->rxq.cur_decrypt != hw;) { 1098 struct rt2560_rx_desc *desc = 1099 &sc->rxq.desc[sc->rxq.cur_decrypt]; 1100 struct rt2560_rx_data *data = 1101 &sc->rxq.data[sc->rxq.cur_decrypt]; 1102 1103 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1104 sc->rxq.cur_decrypt * RT2560_TX_DESC_SIZE, 1105 RT2560_TX_DESC_SIZE, BUS_DMASYNC_POSTREAD); 1106 1107 if (letoh32(desc->flags) & 1108 (RT2560_RX_BUSY | RT2560_RX_CIPHER_BUSY)) 1109 break; 1110 1111 if (data->drop) { 1112 ifp->if_ierrors++; 1113 goto skip; 1114 } 1115 1116 if ((letoh32(desc->flags) & RT2560_RX_CIPHER_MASK) != 0 && 1117 (letoh32(desc->flags) & RT2560_RX_ICV_ERROR)) { 1118 ifp->if_ierrors++; 1119 goto skip; 1120 } 1121 1122 /* 1123 * Try to allocate a new mbuf for this ring element and load it 1124 * before processing the current mbuf. If the ring element 1125 * cannot be loaded, drop the received packet and reuse the old 1126 * mbuf. In the unlikely case that the old mbuf can't be 1127 * reloaded either, explicitly panic. 1128 */ 1129 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 1130 if (mnew == NULL) { 1131 ifp->if_ierrors++; 1132 goto skip; 1133 } 1134 MCLGET(mnew, M_DONTWAIT); 1135 if (!(mnew->m_flags & M_EXT)) { 1136 m_freem(mnew); 1137 ifp->if_ierrors++; 1138 goto skip; 1139 } 1140 1141 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1142 data->map->dm_mapsize, BUS_DMASYNC_POSTREAD); 1143 bus_dmamap_unload(sc->sc_dmat, data->map); 1144 1145 error = bus_dmamap_load(sc->sc_dmat, data->map, 1146 mtod(mnew, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT); 1147 if (error != 0) { 1148 m_freem(mnew); 1149 1150 /* try to reload the old mbuf */ 1151 error = bus_dmamap_load(sc->sc_dmat, data->map, 1152 mtod(data->m, void *), MCLBYTES, NULL, 1153 BUS_DMA_NOWAIT); 1154 if (error != 0) { 1155 /* very unlikely that it will fail... */ 1156 panic("%s: could not load old rx mbuf", 1157 sc->sc_dev.dv_xname); 1158 } 1159 /* physical address may have changed */ 1160 desc->physaddr = htole32(data->map->dm_segs->ds_addr); 1161 ifp->if_ierrors++; 1162 goto skip; 1163 } 1164 1165 /* 1166 * New mbuf successfully loaded, update Rx ring and continue 1167 * processing. 1168 */ 1169 m = data->m; 1170 data->m = mnew; 1171 desc->physaddr = htole32(data->map->dm_segs->ds_addr); 1172 1173 /* finalize mbuf */ 1174 m->m_pkthdr.rcvif = ifp; 1175 m->m_pkthdr.len = m->m_len = 1176 (letoh32(desc->flags) >> 16) & 0xfff; 1177 1178#if NBPFILTER > 0 1179 if (sc->sc_drvbpf != NULL) { 1180 struct mbuf mb; 1181 struct rt2560_rx_radiotap_header *tap = &sc->sc_rxtap; 1182 uint32_t tsf_lo, tsf_hi; 1183 1184 /* get timestamp (low and high 32 bits) */ 1185 tsf_hi = RAL_READ(sc, RT2560_CSR17); 1186 tsf_lo = RAL_READ(sc, RT2560_CSR16); 1187 1188 tap->wr_tsf = 1189 htole64(((uint64_t)tsf_hi << 32) | tsf_lo); 1190 tap->wr_flags = 0; 1191 tap->wr_rate = rt2560_rxrate(desc); 1192 tap->wr_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 1193 tap->wr_chan_flags = 1194 htole16(ic->ic_ibss_chan->ic_flags); 1195 tap->wr_antenna = sc->rx_ant; 1196 tap->wr_antsignal = desc->rssi; 1197 1198 mb.m_data = (caddr_t)tap; 1199 mb.m_len = sc->sc_txtap_len; 1200 mb.m_next = m; 1201 mb.m_nextpkt = NULL; 1202 mb.m_type = 0; 1203 mb.m_flags = 0; 1204 bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_IN); 1205 } 1206#endif 1207 wh = mtod(m, struct ieee80211_frame *); 1208 ni = ieee80211_find_rxnode(ic, wh); 1209 1210 /* send the frame to the 802.11 layer */ 1211 rxi.rxi_flags = 0; 1212 rxi.rxi_rssi = desc->rssi; 1213 rxi.rxi_tstamp = 0; /* unused */ 1214 ieee80211_input(ifp, m, ni, &rxi); 1215 1216 /* node is no longer needed */ 1217 ieee80211_release_node(ic, ni); 1218 1219skip: desc->flags = htole32(RT2560_RX_BUSY); 1220 1221 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1222 sc->rxq.cur_decrypt * RT2560_TX_DESC_SIZE, 1223 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 1224 1225 DPRINTFN(15, ("decryption done idx=%u\n", sc->rxq.cur_decrypt)); 1226 1227 sc->rxq.cur_decrypt = 1228 (sc->rxq.cur_decrypt + 1) % RT2560_RX_RING_COUNT; 1229 } 1230} 1231 1232/* 1233 * Some frames were received. Pass them to the hardware cipher engine before 1234 * sending them to the 802.11 layer. 1235 */ 1236void 1237rt2560_rx_intr(struct rt2560_softc *sc) 1238{ 1239 for (;;) { 1240 struct rt2560_rx_desc *desc = &sc->rxq.desc[sc->rxq.cur]; 1241 struct rt2560_rx_data *data = &sc->rxq.data[sc->rxq.cur]; 1242 1243 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1244 sc->rxq.cur * RT2560_RX_DESC_SIZE, RT2560_RX_DESC_SIZE, 1245 BUS_DMASYNC_POSTREAD); 1246 1247 if (letoh32(desc->flags) & 1248 (RT2560_RX_BUSY | RT2560_RX_CIPHER_BUSY)) 1249 break; 1250 1251 data->drop = 0; 1252 1253 if (letoh32(desc->flags) & 1254 (RT2560_RX_PHY_ERROR | RT2560_RX_CRC_ERROR)) { 1255 /* 1256 * This should not happen since we did not request 1257 * to receive those frames when we filled RXCSR0. 1258 */ 1259 DPRINTFN(5, ("PHY or CRC error flags 0x%08x\n", 1260 letoh32(desc->flags))); 1261 data->drop = 1; 1262 } 1263 1264 if (((letoh32(desc->flags) >> 16) & 0xfff) > MCLBYTES) { 1265 DPRINTFN(5, ("bad length\n")); 1266 data->drop = 1; 1267 } 1268 1269 /* mark the frame for decryption */ 1270 desc->flags |= htole32(RT2560_RX_CIPHER_BUSY); 1271 1272 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1273 sc->rxq.cur * RT2560_RX_DESC_SIZE, RT2560_RX_DESC_SIZE, 1274 BUS_DMASYNC_PREWRITE); 1275 1276 DPRINTFN(15, ("rx done idx=%u\n", sc->rxq.cur)); 1277 1278 sc->rxq.cur = (sc->rxq.cur + 1) % RT2560_RX_RING_COUNT; 1279 } 1280 1281 /* kick decrypt */ 1282 RAL_WRITE(sc, RT2560_SECCSR0, RT2560_KICK_DECRYPT); 1283} 1284 1285#ifndef IEEE80211_STA_ONLY 1286/* 1287 * This function is called in HostAP or IBSS modes when it's time to send a 1288 * new beacon (every ni_intval milliseconds). 1289 */ 1290void 1291rt2560_beacon_expire(struct rt2560_softc *sc) 1292{ 1293 struct ieee80211com *ic = &sc->sc_ic; 1294 struct rt2560_tx_data *data; 1295 1296 if (ic->ic_opmode != IEEE80211_M_IBSS && 1297 ic->ic_opmode != IEEE80211_M_HOSTAP) 1298 return; 1299 1300 data = &sc->bcnq.data[sc->bcnq.next]; 1301 1302 if (sc->sc_flags & RT2560_UPDATE_SLOT) { 1303 sc->sc_flags &= ~RT2560_UPDATE_SLOT; 1304 sc->sc_flags |= RT2560_SET_SLOTTIME; 1305 } else if (sc->sc_flags & RT2560_SET_SLOTTIME) { 1306 sc->sc_flags &= ~RT2560_SET_SLOTTIME; 1307 rt2560_set_slottime(sc); 1308 } 1309 1310 if (ic->ic_curmode == IEEE80211_MODE_11G) { 1311 /* update ERP Information Element */ 1312 *sc->erp = ic->ic_bss->ni_erp; 1313 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1314 data->map->dm_mapsize, BUS_DMASYNC_PREWRITE); 1315 } 1316 1317#if defined(RT2560_DEBUG) && NBPFILTER > 0 1318 if (ic->ic_rawbpf != NULL) 1319 bpf_mtap(ic->ic_rawbpf, data->m, BPF_DIRECTION_OUT); 1320#endif 1321 1322 DPRINTFN(15, ("beacon expired\n")); 1323} 1324#endif 1325 1326void 1327rt2560_wakeup_expire(struct rt2560_softc *sc) 1328{ 1329 DPRINTFN(15, ("wakeup expired\n")); 1330} 1331 1332int 1333rt2560_intr(void *arg) 1334{ 1335 struct rt2560_softc *sc = arg; 1336 struct ifnet *ifp = &sc->sc_ic.ic_if; 1337 uint32_t r; 1338 1339 r = RAL_READ(sc, RT2560_CSR7); 1340 if (__predict_false(r == 0xffffffff)) 1341 return 0; /* device likely went away */ 1342 if (r == 0) 1343 return 0; /* not for us */ 1344 1345 /* disable interrupts */ 1346 RAL_WRITE(sc, RT2560_CSR8, 0xffffffff); 1347 1348 /* acknowledge interrupts */ 1349 RAL_WRITE(sc, RT2560_CSR7, r); 1350 1351 /* don't re-enable interrupts if we're shutting down */ 1352 if (!(ifp->if_flags & IFF_RUNNING)) 1353 return 0; 1354 1355#ifndef IEEE80211_STA_ONLY 1356 if (r & RT2560_BEACON_EXPIRE) 1357 rt2560_beacon_expire(sc); 1358#endif 1359 1360 if (r & RT2560_WAKEUP_EXPIRE) 1361 rt2560_wakeup_expire(sc); 1362 1363 if (r & RT2560_ENCRYPTION_DONE) 1364 rt2560_encryption_intr(sc); 1365 1366 if (r & RT2560_TX_DONE) 1367 rt2560_tx_intr(sc); 1368 1369 if (r & RT2560_PRIO_DONE) 1370 rt2560_prio_intr(sc); 1371 1372 if (r & RT2560_DECRYPTION_DONE) 1373 rt2560_decryption_intr(sc); 1374 1375 if (r & RT2560_RX_DONE) 1376 rt2560_rx_intr(sc); 1377 1378 /* re-enable interrupts */ 1379 RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK); 1380 1381 return 1; 1382} 1383 1384/* quickly determine if a given rate is CCK or OFDM */ 1385#define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22) 1386 1387#define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */ 1388#define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */ 1389 1390#define RAL_SIFS 10 /* us */ 1391 1392#define RT2560_RXTX_TURNAROUND 10 /* us */ 1393 1394/* 1395 * This function is only used by the Rx radiotap code. It returns the rate at 1396 * which a given frame was received. 1397 */ 1398#if NBPFILTER > 0 1399uint8_t 1400rt2560_rxrate(const struct rt2560_rx_desc *desc) 1401{ 1402 if (letoh32(desc->flags) & RT2560_RX_OFDM) { 1403 /* reverse function of rt2560_plcp_signal */ 1404 switch (desc->rate) { 1405 case 0xb: return 12; 1406 case 0xf: return 18; 1407 case 0xa: return 24; 1408 case 0xe: return 36; 1409 case 0x9: return 48; 1410 case 0xd: return 72; 1411 case 0x8: return 96; 1412 case 0xc: return 108; 1413 } 1414 } else { 1415 if (desc->rate == 10) 1416 return 2; 1417 if (desc->rate == 20) 1418 return 4; 1419 if (desc->rate == 55) 1420 return 11; 1421 if (desc->rate == 110) 1422 return 22; 1423 } 1424 return 2; /* should not get there */ 1425} 1426#endif 1427 1428/* 1429 * Return the expected ack rate for a frame transmitted at rate `rate'. 1430 */ 1431int 1432rt2560_ack_rate(struct ieee80211com *ic, int rate) 1433{ 1434 switch (rate) { 1435 /* CCK rates */ 1436 case 2: 1437 return 2; 1438 case 4: 1439 case 11: 1440 case 22: 1441 return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate; 1442 1443 /* OFDM rates */ 1444 case 12: 1445 case 18: 1446 return 12; 1447 case 24: 1448 case 36: 1449 return 24; 1450 case 48: 1451 case 72: 1452 case 96: 1453 case 108: 1454 return 48; 1455 } 1456 1457 /* default to 1Mbps */ 1458 return 2; 1459} 1460 1461/* 1462 * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'. 1463 * The function automatically determines the operating mode depending on the 1464 * given rate. `flags' indicates whether short preamble is in use or not. 1465 */ 1466uint16_t 1467rt2560_txtime(int len, int rate, uint32_t flags) 1468{ 1469 uint16_t txtime; 1470 1471 if (RAL_RATE_IS_OFDM(rate)) { 1472 /* IEEE Std 802.11g-2003, pp. 44 */ 1473 txtime = (8 + 4 * len + 3 + rate - 1) / rate; 1474 txtime = 16 + 4 + 4 * txtime + 6; 1475 } else { 1476 /* IEEE Std 802.11b-1999, pp. 28 */ 1477 txtime = (16 * len + rate - 1) / rate; 1478 if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE)) 1479 txtime += 72 + 24; 1480 else 1481 txtime += 144 + 48; 1482 } 1483 return txtime; 1484} 1485 1486uint8_t 1487rt2560_plcp_signal(int rate) 1488{ 1489 switch (rate) { 1490 /* CCK rates (returned values are device-dependent) */ 1491 case 2: return 0x0; 1492 case 4: return 0x1; 1493 case 11: return 0x2; 1494 case 22: return 0x3; 1495 1496 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1497 case 12: return 0xb; 1498 case 18: return 0xf; 1499 case 24: return 0xa; 1500 case 36: return 0xe; 1501 case 48: return 0x9; 1502 case 72: return 0xd; 1503 case 96: return 0x8; 1504 case 108: return 0xc; 1505 1506 /* unsupported rates (should not get there) */ 1507 default: return 0xff; 1508 } 1509} 1510 1511void 1512rt2560_setup_tx_desc(struct rt2560_softc *sc, struct rt2560_tx_desc *desc, 1513 uint32_t flags, int len, int rate, int encrypt, bus_addr_t physaddr) 1514{ 1515 struct ieee80211com *ic = &sc->sc_ic; 1516 uint16_t plcp_length; 1517 int remainder; 1518 1519 desc->flags = htole32(flags); 1520 desc->flags |= htole32(len << 16); 1521 desc->flags |= encrypt ? htole32(RT2560_TX_CIPHER_BUSY) : 1522 htole32(RT2560_TX_BUSY | RT2560_TX_VALID); 1523 1524 desc->physaddr = htole32(physaddr); 1525 desc->wme = htole16( 1526 RT2560_AIFSN(2) | 1527 RT2560_LOGCWMIN(3) | 1528 RT2560_LOGCWMAX(8)); 1529 1530 /* setup PLCP fields */ 1531 desc->plcp_signal = rt2560_plcp_signal(rate); 1532 desc->plcp_service = 4; 1533 1534 len += IEEE80211_CRC_LEN; 1535 if (RAL_RATE_IS_OFDM(rate)) { 1536 desc->flags |= htole32(RT2560_TX_OFDM); 1537 1538 plcp_length = len & 0xfff; 1539 desc->plcp_length_hi = plcp_length >> 6; 1540 desc->plcp_length_lo = plcp_length & 0x3f; 1541 } else { 1542 plcp_length = (16 * len + rate - 1) / rate; 1543 if (rate == 22) { 1544 remainder = (16 * len) % 22; 1545 if (remainder != 0 && remainder < 7) 1546 desc->plcp_service |= RT2560_PLCP_LENGEXT; 1547 } 1548 desc->plcp_length_hi = plcp_length >> 8; 1549 desc->plcp_length_lo = plcp_length & 0xff; 1550 1551 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1552 desc->plcp_signal |= 0x08; 1553 } 1554} 1555 1556#ifndef IEEE80211_STA_ONLY 1557int 1558rt2560_tx_bcn(struct rt2560_softc *sc, struct mbuf *m0, 1559 struct ieee80211_node *ni) 1560{ 1561 struct ieee80211com *ic = &sc->sc_ic; 1562 struct rt2560_tx_desc *desc; 1563 struct rt2560_tx_data *data; 1564 int rate = 2, error; 1565 1566 desc = &sc->bcnq.desc[sc->bcnq.cur]; 1567 data = &sc->bcnq.data[sc->bcnq.cur]; 1568 1569 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1570 BUS_DMA_NOWAIT); 1571 if (error != 0) { 1572 printf("%s: can't map mbuf (error %d)\n", 1573 sc->sc_dev.dv_xname, error); 1574 m_freem(m0); 1575 return error; 1576 } 1577 1578 data->m = m0; 1579 data->ni = ni; 1580 1581 rt2560_setup_tx_desc(sc, desc, RT2560_TX_IFS_NEWBACKOFF | 1582 RT2560_TX_TIMESTAMP, m0->m_pkthdr.len, rate, 0, 1583 data->map->dm_segs->ds_addr); 1584 1585 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 1586 BUS_DMASYNC_PREWRITE); 1587 bus_dmamap_sync(sc->sc_dmat, sc->bcnq.map, 1588 sc->bcnq.cur * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1589 BUS_DMASYNC_PREWRITE); 1590 1591 /* 1592 * Store pointer to ERP Information Element so that we can update it 1593 * dynamically when the slot time changes. 1594 * XXX: this is ugly since it depends on how net80211 builds beacon 1595 * frames but ieee80211_beacon_alloc() don't store offsets for us. 1596 */ 1597 if (ic->ic_curmode == IEEE80211_MODE_11G) { 1598 sc->erp = 1599 mtod(m0, uint8_t *) + 1600 sizeof (struct ieee80211_frame) + 1601 8 + 2 + 2 + 1602 ((ic->ic_flags & IEEE80211_F_HIDENWID) ? 1603 1 : 2 + ni->ni_esslen) + 1604 2 + min(ni->ni_rates.rs_nrates, IEEE80211_RATE_SIZE) + 1605 2 + 1 + 1606 ((ic->ic_opmode == IEEE80211_M_IBSS) ? 4 : 6) + 1607 2; 1608 } 1609 1610 return 0; 1611} 1612#endif 1613 1614int 1615rt2560_tx_mgt(struct rt2560_softc *sc, struct mbuf *m0, 1616 struct ieee80211_node *ni) 1617{ 1618 struct ieee80211com *ic = &sc->sc_ic; 1619 struct rt2560_tx_desc *desc; 1620 struct rt2560_tx_data *data; 1621 struct ieee80211_frame *wh; 1622 uint16_t dur; 1623 uint32_t flags = 0; 1624 int rate = 2, error; 1625 1626 desc = &sc->prioq.desc[sc->prioq.cur]; 1627 data = &sc->prioq.data[sc->prioq.cur]; 1628 1629 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1630 BUS_DMA_NOWAIT); 1631 if (error != 0) { 1632 printf("%s: can't map mbuf (error %d)\n", 1633 sc->sc_dev.dv_xname, error); 1634 m_freem(m0); 1635 return error; 1636 } 1637 1638#if NBPFILTER > 0 1639 if (sc->sc_drvbpf != NULL) { 1640 struct mbuf mb; 1641 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap; 1642 1643 tap->wt_flags = 0; 1644 tap->wt_rate = rate; 1645 tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 1646 tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags); 1647 tap->wt_antenna = sc->tx_ant; 1648 1649 mb.m_data = (caddr_t)tap; 1650 mb.m_len = sc->sc_txtap_len; 1651 mb.m_next = m0; 1652 mb.m_nextpkt = NULL; 1653 mb.m_type = 0; 1654 mb.m_flags = 0; 1655 bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_OUT); 1656 } 1657#endif 1658 1659 data->m = m0; 1660 data->ni = ni; 1661 1662 wh = mtod(m0, struct ieee80211_frame *); 1663 1664 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1665 flags |= RT2560_TX_NEED_ACK; 1666 1667 dur = rt2560_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) + 1668 RAL_SIFS; 1669 *(uint16_t *)wh->i_dur = htole16(dur); 1670 1671#ifndef IEEE80211_STA_ONLY 1672 /* tell hardware to set timestamp for probe responses */ 1673 if ((wh->i_fc[0] & 1674 (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) == 1675 (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP)) 1676 flags |= RT2560_TX_TIMESTAMP; 1677#endif 1678 } 1679 1680 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 0, 1681 data->map->dm_segs->ds_addr); 1682 1683 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 1684 BUS_DMASYNC_PREWRITE); 1685 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1686 sc->prioq.cur * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1687 BUS_DMASYNC_PREWRITE); 1688 1689 DPRINTFN(10, ("sending mgt frame len=%u idx=%u rate=%u\n", 1690 m0->m_pkthdr.len, sc->prioq.cur, rate)); 1691 1692 /* kick prio */ 1693 sc->prioq.queued++; 1694 sc->prioq.cur = (sc->prioq.cur + 1) % RT2560_PRIO_RING_COUNT; 1695 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_PRIO); 1696 1697 return 0; 1698} 1699 1700int 1701rt2560_tx_data(struct rt2560_softc *sc, struct mbuf *m0, 1702 struct ieee80211_node *ni) 1703{ 1704 struct ieee80211com *ic = &sc->sc_ic; 1705 struct rt2560_tx_ring *txq = &sc->txq; 1706 struct rt2560_tx_desc *desc; 1707 struct rt2560_tx_data *data; 1708 struct ieee80211_frame *wh; 1709 struct ieee80211_key *k; 1710 struct mbuf *m1; 1711 uint16_t dur; 1712 uint32_t flags = 0; 1713 int pktlen, rate, needcts = 0, needrts = 0, error; 1714 1715 wh = mtod(m0, struct ieee80211_frame *); 1716 1717 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 1718 k = ieee80211_get_txkey(ic, wh, ni); 1719 1720 if ((m0 = ieee80211_encrypt(ic, m0, k)) == NULL) 1721 return ENOBUFS; 1722 1723 /* packet header may have moved, reset our local pointer */ 1724 wh = mtod(m0, struct ieee80211_frame *); 1725 } 1726 1727 /* compute actual packet length (including CRC and crypto overhead) */ 1728 pktlen = m0->m_pkthdr.len + IEEE80211_CRC_LEN; 1729 1730 /* pickup a rate */ 1731 if (IEEE80211_IS_MULTICAST(wh->i_addr1) || 1732 ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 1733 IEEE80211_FC0_TYPE_MGT)) { 1734 /* mgmt/multicast frames are sent at the lowest avail. rate */ 1735 rate = ni->ni_rates.rs_rates[0]; 1736 } else if (ic->ic_fixed_rate != -1) { 1737 rate = ic->ic_sup_rates[ic->ic_curmode]. 1738 rs_rates[ic->ic_fixed_rate]; 1739 } else 1740 rate = ni->ni_rates.rs_rates[ni->ni_txrate]; 1741 if (rate == 0) 1742 rate = 2; /* XXX should not happen */ 1743 rate &= IEEE80211_RATE_VAL; 1744 1745 /* 1746 * Packet Bursting: backoff after ppb=8 frames to give other STAs a 1747 * chance to contend for the wireless medium. 1748 */ 1749 if (ic->ic_opmode == IEEE80211_M_STA && (ni->ni_txseq & 7)) 1750 flags |= RT2560_TX_IFS_SIFS; 1751 1752 /* check if RTS/CTS or CTS-to-self protection must be used */ 1753 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1754 /* multicast frames are not sent at OFDM rates in 802.11b/g */ 1755 if (pktlen > ic->ic_rtsthreshold) { 1756 needrts = 1; /* RTS/CTS based on frame length */ 1757 } else if ((ic->ic_flags & IEEE80211_F_USEPROT) && 1758 RAL_RATE_IS_OFDM(rate)) { 1759 if (ic->ic_protmode == IEEE80211_PROT_CTSONLY) 1760 needcts = 1; /* CTS-to-self */ 1761 else if (ic->ic_protmode == IEEE80211_PROT_RTSCTS) 1762 needrts = 1; /* RTS/CTS */ 1763 } 1764 } 1765 if (needrts || needcts) { 1766 struct mbuf *mprot; 1767 int protrate, ackrate; 1768 1769 protrate = 2; /* XXX */ 1770 ackrate = rt2560_ack_rate(ic, rate); 1771 1772 dur = rt2560_txtime(pktlen, rate, ic->ic_flags) + 1773 rt2560_txtime(RAL_ACK_SIZE, ackrate, ic->ic_flags) + 1774 2 * RAL_SIFS; 1775 if (needrts) { 1776 dur += rt2560_txtime(RAL_CTS_SIZE, rt2560_ack_rate(ic, 1777 protrate), ic->ic_flags) + RAL_SIFS; 1778 mprot = ieee80211_get_rts(ic, wh, dur); 1779 } else { 1780 mprot = ieee80211_get_cts_to_self(ic, dur); 1781 } 1782 if (mprot == NULL) { 1783 printf("%s: could not allocate protection frame\n", 1784 sc->sc_dev.dv_xname); 1785 m_freem(m0); 1786 return ENOBUFS; 1787 } 1788 1789 desc = &txq->desc[txq->cur_encrypt]; 1790 data = &txq->data[txq->cur_encrypt]; 1791 1792 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, mprot, 1793 BUS_DMA_NOWAIT); 1794 if (error != 0) { 1795 printf("%s: can't map mbuf (error %d)\n", 1796 sc->sc_dev.dv_xname, error); 1797 m_freem(mprot); 1798 m_freem(m0); 1799 return error; 1800 } 1801 1802 data->m = mprot; 1803 /* avoid multiple free() of the same node for each fragment */ 1804 data->ni = ieee80211_ref_node(ni); 1805 1806 /* XXX may want to pass the protection frame to BPF */ 1807 1808 rt2560_setup_tx_desc(sc, desc, 1809 (needrts ? RT2560_TX_NEED_ACK : 0) | RT2560_TX_MORE_FRAG, 1810 mprot->m_pkthdr.len, protrate, 1, 1811 data->map->dm_segs->ds_addr); 1812 1813 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1814 data->map->dm_mapsize, BUS_DMASYNC_PREWRITE); 1815 bus_dmamap_sync(sc->sc_dmat, txq->map, 1816 txq->cur_encrypt * RT2560_TX_DESC_SIZE, 1817 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 1818 1819 txq->queued++; 1820 if (++txq->cur_encrypt >= txq->count) 1821 txq->cur_encrypt = 0; 1822 1823 flags |= RT2560_TX_LONG_RETRY | RT2560_TX_IFS_SIFS; 1824 } 1825 1826 data = &txq->data[txq->cur_encrypt]; 1827 desc = &txq->desc[txq->cur_encrypt]; 1828 1829 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1830 BUS_DMA_NOWAIT); 1831 if (error != 0 && error != EFBIG) { 1832 printf("%s: can't map mbuf (error %d)\n", 1833 sc->sc_dev.dv_xname, error); 1834 m_freem(m0); 1835 return error; 1836 } 1837 if (error != 0) { 1838 /* too many fragments, linearize */ 1839 MGETHDR(m1, M_DONTWAIT, MT_DATA); 1840 if (m1 == NULL) { 1841 m_freem(m0); 1842 return ENOBUFS; 1843 } 1844 if (m0->m_pkthdr.len > MHLEN) { 1845 MCLGET(m1, M_DONTWAIT); 1846 if (!(m1->m_flags & M_EXT)) { 1847 m_freem(m0); 1848 m_freem(m1); 1849 return ENOBUFS; 1850 } 1851 } 1852 m_copydata(m0, 0, m0->m_pkthdr.len, mtod(m1, caddr_t)); 1853 m1->m_pkthdr.len = m1->m_len = m0->m_pkthdr.len; 1854 m_freem(m0); 1855 m0 = m1; 1856 1857 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1858 BUS_DMA_NOWAIT); 1859 if (error != 0) { 1860 printf("%s: can't map mbuf (error %d)\n", 1861 sc->sc_dev.dv_xname, error); 1862 m_freem(m0); 1863 return error; 1864 } 1865 1866 /* packet header have moved, reset our local pointer */ 1867 wh = mtod(m0, struct ieee80211_frame *); 1868 } 1869 1870#if NBPFILTER > 0 1871 if (sc->sc_drvbpf != NULL) { 1872 struct mbuf mb; 1873 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap; 1874 1875 tap->wt_flags = 0; 1876 tap->wt_rate = rate; 1877 tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 1878 tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags); 1879 tap->wt_antenna = sc->tx_ant; 1880 1881 mb.m_data = (caddr_t)tap; 1882 mb.m_len = sc->sc_txtap_len; 1883 mb.m_next = m0; 1884 mb.m_nextpkt = NULL; 1885 mb.m_type = 0; 1886 mb.m_flags = 0; 1887 bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_OUT); 1888 } 1889#endif 1890 1891 data->m = m0; 1892 data->ni = ni; 1893 1894 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1895 flags |= RT2560_TX_NEED_ACK; 1896 1897 dur = rt2560_txtime(RAL_ACK_SIZE, rt2560_ack_rate(ic, rate), 1898 ic->ic_flags) + RAL_SIFS; 1899 *(uint16_t *)wh->i_dur = htole16(dur); 1900 } 1901 1902 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 1, 1903 data->map->dm_segs->ds_addr); 1904 1905 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 1906 BUS_DMASYNC_PREWRITE); 1907 bus_dmamap_sync(sc->sc_dmat, txq->map, 1908 txq->cur_encrypt * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1909 BUS_DMASYNC_PREWRITE); 1910 1911 DPRINTFN(10, ("sending frame len=%u idx=%u rate=%u\n", 1912 m0->m_pkthdr.len, txq->cur_encrypt, rate)); 1913 1914 /* kick encrypt */ 1915 txq->queued++; 1916 if (++txq->cur_encrypt >= txq->count) 1917 txq->cur_encrypt = 0; 1918 RAL_WRITE(sc, RT2560_SECCSR1, RT2560_KICK_ENCRYPT); 1919 1920 return 0; 1921} 1922 1923void 1924rt2560_start(struct ifnet *ifp) 1925{ 1926 struct rt2560_softc *sc = ifp->if_softc; 1927 struct ieee80211com *ic = &sc->sc_ic; 1928 struct mbuf *m0; 1929 struct ieee80211_node *ni; 1930 1931 /* 1932 * net80211 may still try to send management frames even if the 1933 * IFF_RUNNING flag is not set... 1934 */ 1935 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 1936 return; 1937 1938 for (;;) { 1939 IF_POLL(&ic->ic_mgtq, m0); 1940 if (m0 != NULL) { 1941 if (sc->prioq.queued >= RT2560_PRIO_RING_COUNT) { 1942 ifp->if_flags |= IFF_OACTIVE; 1943 sc->sc_flags |= RT2560_PRIO_OACTIVE; 1944 break; 1945 } 1946 IF_DEQUEUE(&ic->ic_mgtq, m0); 1947 1948 ni = (struct ieee80211_node *)m0->m_pkthdr.rcvif; 1949 m0->m_pkthdr.rcvif = NULL; 1950#if NBPFILTER > 0 1951 if (ic->ic_rawbpf != NULL) 1952 bpf_mtap(ic->ic_rawbpf, m0, BPF_DIRECTION_OUT); 1953#endif 1954 if (rt2560_tx_mgt(sc, m0, ni) != 0) 1955 break; 1956 1957 } else { 1958 if (ic->ic_state != IEEE80211_S_RUN) 1959 break; 1960 IFQ_POLL(&ifp->if_snd, m0); 1961 if (m0 == NULL) 1962 break; 1963 if (sc->txq.queued >= RT2560_TX_RING_COUNT - 1) { 1964 ifp->if_flags |= IFF_OACTIVE; 1965 sc->sc_flags |= RT2560_DATA_OACTIVE; 1966 break; 1967 } 1968 IFQ_DEQUEUE(&ifp->if_snd, m0); 1969#if NBPFILTER > 0 1970 if (ifp->if_bpf != NULL) 1971 bpf_mtap(ifp->if_bpf, m0, BPF_DIRECTION_OUT); 1972#endif 1973 m0 = ieee80211_encap(ifp, m0, &ni); 1974 if (m0 == NULL) 1975 continue; 1976#if NBPFILTER > 0 1977 if (ic->ic_rawbpf != NULL) 1978 bpf_mtap(ic->ic_rawbpf, m0, BPF_DIRECTION_OUT); 1979#endif 1980 if (rt2560_tx_data(sc, m0, ni) != 0) { 1981 if (ni != NULL) 1982 ieee80211_release_node(ic, ni); 1983 ifp->if_oerrors++; 1984 break; 1985 } 1986 } 1987 1988 sc->sc_tx_timer = 5; 1989 ifp->if_timer = 1; 1990 } 1991} 1992 1993void 1994rt2560_watchdog(struct ifnet *ifp) 1995{ 1996 struct rt2560_softc *sc = ifp->if_softc; 1997 1998 ifp->if_timer = 0; 1999 2000 if (sc->sc_tx_timer > 0) { 2001 if (--sc->sc_tx_timer == 0) { 2002 printf("%s: device timeout\n", sc->sc_dev.dv_xname); 2003 rt2560_init(ifp); 2004 ifp->if_oerrors++; 2005 return; 2006 } 2007 ifp->if_timer = 1; 2008 } 2009 2010 ieee80211_watchdog(ifp); 2011} 2012 2013int 2014rt2560_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 2015{ 2016 struct rt2560_softc *sc = ifp->if_softc; 2017 struct ieee80211com *ic = &sc->sc_ic; 2018 struct ifaddr *ifa; 2019 struct ifreq *ifr; 2020 int s, error = 0; 2021 2022 s = splnet(); 2023 2024 switch (cmd) { 2025 case SIOCSIFADDR: 2026 ifa = (struct ifaddr *)data; 2027 ifp->if_flags |= IFF_UP; 2028#ifdef INET 2029 if (ifa->ifa_addr->sa_family == AF_INET) 2030 arp_ifinit(&ic->ic_ac, ifa); 2031#endif 2032 /* FALLTHROUGH */ 2033 case SIOCSIFFLAGS: 2034 if (ifp->if_flags & IFF_UP) { 2035 if (ifp->if_flags & IFF_RUNNING) 2036 rt2560_update_promisc(sc); 2037 else 2038 rt2560_init(ifp); 2039 } else { 2040 if (ifp->if_flags & IFF_RUNNING) 2041 rt2560_stop(ifp, 1); 2042 } 2043 break; 2044 2045 case SIOCADDMULTI: 2046 case SIOCDELMULTI: 2047 ifr = (struct ifreq *)data; 2048 error = (cmd == SIOCADDMULTI) ? 2049 ether_addmulti(ifr, &ic->ic_ac) : 2050 ether_delmulti(ifr, &ic->ic_ac); 2051 2052 if (error == ENETRESET) 2053 error = 0; 2054 break; 2055 2056 case SIOCS80211CHANNEL: 2057 /* 2058 * This allows for fast channel switching in monitor mode 2059 * (used by kismet). In IBSS mode, we must explicitly reset 2060 * the interface to generate a new beacon frame. 2061 */ 2062 error = ieee80211_ioctl(ifp, cmd, data); 2063 if (error == ENETRESET && 2064 ic->ic_opmode == IEEE80211_M_MONITOR) { 2065 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 2066 (IFF_UP | IFF_RUNNING)) 2067 rt2560_set_chan(sc, ic->ic_ibss_chan); 2068 error = 0; 2069 } 2070 break; 2071 2072 default: 2073 error = ieee80211_ioctl(ifp, cmd, data); 2074 } 2075 2076 if (error == ENETRESET) { 2077 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 2078 (IFF_UP | IFF_RUNNING)) 2079 rt2560_init(ifp); 2080 error = 0; 2081 } 2082 2083 splx(s); 2084 2085 return error; 2086} 2087 2088void 2089rt2560_bbp_write(struct rt2560_softc *sc, uint8_t reg, uint8_t val) 2090{ 2091 uint32_t tmp; 2092 int ntries; 2093 2094 for (ntries = 0; ntries < 100; ntries++) { 2095 if (!(RAL_READ(sc, RT2560_BBPCSR) & RT2560_BBP_BUSY)) 2096 break; 2097 DELAY(1); 2098 } 2099 if (ntries == 100) { 2100 printf("%s: could not write to BBP\n", sc->sc_dev.dv_xname); 2101 return; 2102 } 2103 2104 tmp = RT2560_BBP_WRITE | RT2560_BBP_BUSY | reg << 8 | val; 2105 RAL_WRITE(sc, RT2560_BBPCSR, tmp); 2106 2107 DPRINTFN(15, ("BBP R%u <- 0x%02x\n", reg, val)); 2108} 2109 2110uint8_t 2111rt2560_bbp_read(struct rt2560_softc *sc, uint8_t reg) 2112{ 2113 uint32_t val; 2114 int ntries; 2115 2116 for (ntries = 0; ntries < 100; ntries++) { 2117 if (!(RAL_READ(sc, RT2560_BBPCSR) & RT2560_BBP_BUSY)) 2118 break; 2119 DELAY(1); 2120 } 2121 if (ntries == 100) { 2122 printf("%s: could not read from BBP\n", sc->sc_dev.dv_xname); 2123 return 0; 2124 } 2125 2126 val = RT2560_BBP_BUSY | reg << 8; 2127 RAL_WRITE(sc, RT2560_BBPCSR, val); 2128 2129 for (ntries = 0; ntries < 100; ntries++) { 2130 val = RAL_READ(sc, RT2560_BBPCSR); 2131 if (!(val & RT2560_BBP_BUSY)) 2132 return val & 0xff; 2133 DELAY(1); 2134 } 2135 2136 printf("%s: could not read from BBP\n", sc->sc_dev.dv_xname); 2137 return 0; 2138} 2139 2140void 2141rt2560_rf_write(struct rt2560_softc *sc, uint8_t reg, uint32_t val) 2142{ 2143 uint32_t tmp; 2144 int ntries; 2145 2146 for (ntries = 0; ntries < 100; ntries++) { 2147 if (!(RAL_READ(sc, RT2560_RFCSR) & RT2560_RF_BUSY)) 2148 break; 2149 DELAY(1); 2150 } 2151 if (ntries == 100) { 2152 printf("%s: could not write to RF\n", sc->sc_dev.dv_xname); 2153 return; 2154 } 2155 2156 tmp = RT2560_RF_BUSY | RT2560_RF_20BIT | (val & 0xfffff) << 2 | 2157 (reg & 0x3); 2158 RAL_WRITE(sc, RT2560_RFCSR, tmp); 2159 2160 /* remember last written value in sc */ 2161 sc->rf_regs[reg] = val; 2162 2163 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff)); 2164} 2165 2166void 2167rt2560_set_chan(struct rt2560_softc *sc, struct ieee80211_channel *c) 2168{ 2169 struct ieee80211com *ic = &sc->sc_ic; 2170 uint8_t power, tmp; 2171 u_int chan; 2172 2173 chan = ieee80211_chan2ieee(ic, c); 2174 if (chan == 0 || chan == IEEE80211_CHAN_ANY) 2175 return; 2176 2177 power = min(sc->txpow[chan - 1], 31); 2178 2179 DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power)); 2180 2181 switch (sc->rf_rev) { 2182 case RT2560_RF_2522: 2183 rt2560_rf_write(sc, RT2560_RF1, 0x00814); 2184 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2522_r2[chan - 1]); 2185 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040); 2186 break; 2187 2188 case RT2560_RF_2523: 2189 rt2560_rf_write(sc, RT2560_RF1, 0x08804); 2190 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2523_r2[chan - 1]); 2191 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x38044); 2192 rt2560_rf_write(sc, RT2560_RF4, 2193 (chan == 14) ? 0x00280 : 0x00286); 2194 break; 2195 2196 case RT2560_RF_2524: 2197 rt2560_rf_write(sc, RT2560_RF1, 0x0c808); 2198 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2524_r2[chan - 1]); 2199 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040); 2200 rt2560_rf_write(sc, RT2560_RF4, 2201 (chan == 14) ? 0x00280 : 0x00286); 2202 break; 2203 2204 case RT2560_RF_2525: 2205 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2206 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525_hi_r2[chan - 1]); 2207 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2208 rt2560_rf_write(sc, RT2560_RF4, 2209 (chan == 14) ? 0x00280 : 0x00286); 2210 2211 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2212 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525_r2[chan - 1]); 2213 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2214 rt2560_rf_write(sc, RT2560_RF4, 2215 (chan == 14) ? 0x00280 : 0x00286); 2216 break; 2217 2218 case RT2560_RF_2525E: 2219 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2220 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525e_r2[chan - 1]); 2221 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2222 rt2560_rf_write(sc, RT2560_RF4, 2223 (chan == 14) ? 0x00286 : 0x00282); 2224 break; 2225 2226 case RT2560_RF_2526: 2227 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2526_hi_r2[chan - 1]); 2228 rt2560_rf_write(sc, RT2560_RF4, 2229 (chan & 1) ? 0x00386 : 0x00381); 2230 rt2560_rf_write(sc, RT2560_RF1, 0x08804); 2231 2232 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2526_r2[chan - 1]); 2233 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2234 rt2560_rf_write(sc, RT2560_RF4, 2235 (chan & 1) ? 0x00386 : 0x00381); 2236 break; 2237 } 2238 2239 if (ic->ic_opmode != IEEE80211_M_MONITOR && 2240 ic->ic_state != IEEE80211_S_SCAN) { 2241 /* set Japan filter bit for channel 14 */ 2242 tmp = rt2560_bbp_read(sc, 70); 2243 2244 tmp &= ~RT2560_JAPAN_FILTER; 2245 if (chan == 14) 2246 tmp |= RT2560_JAPAN_FILTER; 2247 2248 rt2560_bbp_write(sc, 70, tmp); 2249 2250 DELAY(1000); /* RF needs a 1ms delay here */ 2251 rt2560_disable_rf_tune(sc); 2252 2253 /* clear CRC errors */ 2254 RAL_READ(sc, RT2560_CNT0); 2255 } 2256} 2257 2258/* 2259 * Disable RF auto-tuning. 2260 */ 2261void 2262rt2560_disable_rf_tune(struct rt2560_softc *sc) 2263{ 2264 uint32_t tmp; 2265 2266 if (sc->rf_rev != RT2560_RF_2523) { 2267 tmp = sc->rf_regs[RT2560_RF1] & ~RT2560_RF1_AUTOTUNE; 2268 rt2560_rf_write(sc, RT2560_RF1, tmp); 2269 } 2270 2271 tmp = sc->rf_regs[RT2560_RF3] & ~RT2560_RF3_AUTOTUNE; 2272 rt2560_rf_write(sc, RT2560_RF3, tmp); 2273 2274 DPRINTFN(2, ("disabling RF autotune\n")); 2275} 2276 2277/* 2278 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF 2279 * synchronization. 2280 */ 2281void 2282rt2560_enable_tsf_sync(struct rt2560_softc *sc) 2283{ 2284 struct ieee80211com *ic = &sc->sc_ic; 2285 uint16_t logcwmin, preload; 2286 uint32_t tmp; 2287 2288 /* first, disable TSF synchronization */ 2289 RAL_WRITE(sc, RT2560_CSR14, 0); 2290 2291 tmp = 16 * ic->ic_bss->ni_intval; 2292 RAL_WRITE(sc, RT2560_CSR12, tmp); 2293 2294 RAL_WRITE(sc, RT2560_CSR13, 0); 2295 2296 logcwmin = 5; 2297 preload = (ic->ic_opmode == IEEE80211_M_STA) ? 384 : 1024; 2298 tmp = logcwmin << 16 | preload; 2299 RAL_WRITE(sc, RT2560_BCNOCSR, tmp); 2300 2301 /* finally, enable TSF synchronization */ 2302 tmp = RT2560_ENABLE_TSF | RT2560_ENABLE_TBCN; 2303 if (ic->ic_opmode == IEEE80211_M_STA) 2304 tmp |= RT2560_ENABLE_TSF_SYNC(1); 2305#ifndef IEEE80211_STA_ONLY 2306 else 2307 tmp |= RT2560_ENABLE_TSF_SYNC(2) | 2308 RT2560_ENABLE_BEACON_GENERATOR; 2309#endif 2310 RAL_WRITE(sc, RT2560_CSR14, tmp); 2311 2312 DPRINTF(("enabling TSF synchronization\n")); 2313} 2314 2315void 2316rt2560_update_plcp(struct rt2560_softc *sc) 2317{ 2318 struct ieee80211com *ic = &sc->sc_ic; 2319 2320 /* no short preamble for 1Mbps */ 2321 RAL_WRITE(sc, RT2560_PLCP1MCSR, 0x00700400); 2322 2323 if (!(ic->ic_flags & IEEE80211_F_SHPREAMBLE)) { 2324 /* values taken from the reference driver */ 2325 RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380401); 2326 RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x00150402); 2327 RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b8403); 2328 } else { 2329 /* same values as above or'ed 0x8 */ 2330 RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380409); 2331 RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x0015040a); 2332 RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b840b); 2333 } 2334 2335 DPRINTF(("updating PLCP for %s preamble\n", 2336 (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ? "short" : "long")); 2337} 2338 2339void 2340rt2560_updateslot(struct ieee80211com *ic) 2341{ 2342 struct rt2560_softc *sc = ic->ic_if.if_softc; 2343 2344#ifndef IEEE80211_STA_ONLY 2345 if (ic->ic_opmode == IEEE80211_M_HOSTAP) { 2346 /* 2347 * In HostAP mode, we defer setting of new slot time until 2348 * updated ERP Information Element has propagated to all 2349 * associated STAs. 2350 */ 2351 sc->sc_flags |= RT2560_UPDATE_SLOT; 2352 } else 2353#endif 2354 rt2560_set_slottime(sc); 2355} 2356 2357/* 2358 * IEEE 802.11a (and possibly 802.11g) use short slot time. Refer to 2359 * IEEE Std 802.11-1999 pp. 85 to know how these values are computed. 2360 */ 2361void 2362rt2560_set_slottime(struct rt2560_softc *sc) 2363{ 2364 struct ieee80211com *ic = &sc->sc_ic; 2365 uint8_t slottime; 2366 uint16_t sifs, pifs, difs, eifs; 2367 uint32_t tmp; 2368 2369 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 2370 2371 /* define the MAC slot boundaries */ 2372 sifs = RAL_SIFS - RT2560_RXTX_TURNAROUND; 2373 pifs = sifs + slottime; 2374 difs = sifs + 2 * slottime; 2375 eifs = (ic->ic_curmode == IEEE80211_MODE_11B) ? 364 : 60; 2376 2377 tmp = RAL_READ(sc, RT2560_CSR11); 2378 tmp = (tmp & ~0x1f00) | slottime << 8; 2379 RAL_WRITE(sc, RT2560_CSR11, tmp); 2380 2381 tmp = pifs << 16 | sifs; 2382 RAL_WRITE(sc, RT2560_CSR18, tmp); 2383 2384 tmp = eifs << 16 | difs; 2385 RAL_WRITE(sc, RT2560_CSR19, tmp); 2386 2387 DPRINTF(("setting slottime to %uus\n", slottime)); 2388} 2389 2390void 2391rt2560_set_basicrates(struct rt2560_softc *sc) 2392{ 2393 struct ieee80211com *ic = &sc->sc_ic; 2394 2395 /* update basic rate set */ 2396 if (ic->ic_curmode == IEEE80211_MODE_11B) { 2397 /* 11b basic rates: 1, 2Mbps */ 2398 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x3); 2399 } else { 2400 /* 11b/g basic rates: 1, 2, 5.5, 11Mbps */ 2401 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0xf); 2402 } 2403} 2404 2405void 2406rt2560_update_led(struct rt2560_softc *sc, int led1, int led2) 2407{ 2408 uint32_t tmp; 2409 2410 /* set ON period to 70ms and OFF period to 30ms */ 2411 tmp = led1 << 16 | led2 << 17 | 70 << 8 | 30; 2412 RAL_WRITE(sc, RT2560_LEDCSR, tmp); 2413} 2414 2415void 2416rt2560_set_bssid(struct rt2560_softc *sc, uint8_t *bssid) 2417{ 2418 uint32_t tmp; 2419 2420 tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24; 2421 RAL_WRITE(sc, RT2560_CSR5, tmp); 2422 2423 tmp = bssid[4] | bssid[5] << 8; 2424 RAL_WRITE(sc, RT2560_CSR6, tmp); 2425 2426 DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid))); 2427} 2428 2429void 2430rt2560_set_macaddr(struct rt2560_softc *sc, uint8_t *addr) 2431{ 2432 uint32_t tmp; 2433 2434 tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24; 2435 RAL_WRITE(sc, RT2560_CSR3, tmp); 2436 2437 tmp = addr[4] | addr[5] << 8; 2438 RAL_WRITE(sc, RT2560_CSR4, tmp); 2439 2440 DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr))); 2441} 2442 2443void 2444rt2560_get_macaddr(struct rt2560_softc *sc, uint8_t *addr) 2445{ 2446 uint32_t tmp; 2447 2448 tmp = RAL_READ(sc, RT2560_CSR3); 2449 addr[0] = tmp & 0xff; 2450 addr[1] = (tmp >> 8) & 0xff; 2451 addr[2] = (tmp >> 16) & 0xff; 2452 addr[3] = (tmp >> 24); 2453 2454 tmp = RAL_READ(sc, RT2560_CSR4); 2455 addr[4] = tmp & 0xff; 2456 addr[5] = (tmp >> 8) & 0xff; 2457} 2458 2459void 2460rt2560_update_promisc(struct rt2560_softc *sc) 2461{ 2462 struct ifnet *ifp = &sc->sc_ic.ic_if; 2463 uint32_t tmp; 2464 2465 tmp = RAL_READ(sc, RT2560_RXCSR0); 2466 2467 tmp &= ~RT2560_DROP_NOT_TO_ME; 2468 if (!(ifp->if_flags & IFF_PROMISC)) 2469 tmp |= RT2560_DROP_NOT_TO_ME; 2470 2471 RAL_WRITE(sc, RT2560_RXCSR0, tmp); 2472 2473 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? 2474 "entering" : "leaving")); 2475} 2476 2477void 2478rt2560_set_txantenna(struct rt2560_softc *sc, int antenna) 2479{ 2480 uint32_t tmp; 2481 uint8_t tx; 2482 2483 tx = rt2560_bbp_read(sc, RT2560_BBP_TX) & ~RT2560_BBP_ANTMASK; 2484 if (antenna == 1) 2485 tx |= RT2560_BBP_ANTA; 2486 else if (antenna == 2) 2487 tx |= RT2560_BBP_ANTB; 2488 else 2489 tx |= RT2560_BBP_DIVERSITY; 2490 2491 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */ 2492 if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526 || 2493 sc->rf_rev == RT2560_RF_5222) 2494 tx |= RT2560_BBP_FLIPIQ; 2495 2496 rt2560_bbp_write(sc, RT2560_BBP_TX, tx); 2497 2498 /* update values for CCK and OFDM in BBPCSR1 */ 2499 tmp = RAL_READ(sc, RT2560_BBPCSR1) & ~0x00070007; 2500 tmp |= (tx & 0x7) << 16 | (tx & 0x7); 2501 RAL_WRITE(sc, RT2560_BBPCSR1, tmp); 2502} 2503 2504void 2505rt2560_set_rxantenna(struct rt2560_softc *sc, int antenna) 2506{ 2507 uint8_t rx; 2508 2509 rx = rt2560_bbp_read(sc, RT2560_BBP_RX) & ~RT2560_BBP_ANTMASK; 2510 if (antenna == 1) 2511 rx |= RT2560_BBP_ANTA; 2512 else if (antenna == 2) 2513 rx |= RT2560_BBP_ANTB; 2514 else 2515 rx |= RT2560_BBP_DIVERSITY; 2516 2517 /* need to force no I/Q flip for RF 2525e and 2526 */ 2518 if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526) 2519 rx &= ~RT2560_BBP_FLIPIQ; 2520 2521 rt2560_bbp_write(sc, RT2560_BBP_RX, rx); 2522} 2523 2524const char * 2525rt2560_get_rf(int rev) 2526{ 2527 switch (rev) { 2528 case RT2560_RF_2522: return "RT2522"; 2529 case RT2560_RF_2523: return "RT2523"; 2530 case RT2560_RF_2524: return "RT2524"; 2531 case RT2560_RF_2525: return "RT2525"; 2532 case RT2560_RF_2525E: return "RT2525e"; 2533 case RT2560_RF_2526: return "RT2526"; 2534 case RT2560_RF_5222: return "RT5222"; 2535 default: return "unknown"; 2536 } 2537} 2538 2539void 2540rt2560_read_eeprom(struct rt2560_softc *sc) 2541{ 2542 uint16_t val; 2543 int i; 2544 2545 val = rt2560_eeprom_read(sc, RT2560_EEPROM_CONFIG0); 2546 sc->rf_rev = (val >> 11) & 0x1f; 2547 sc->hw_radio = (val >> 10) & 0x1; 2548 sc->led_mode = (val >> 6) & 0x7; 2549 sc->rx_ant = (val >> 4) & 0x3; 2550 sc->tx_ant = (val >> 2) & 0x3; 2551 sc->nb_ant = val & 0x3; 2552 2553 /* read default values for BBP registers */ 2554 for (i = 0; i < 16; i++) { 2555 val = rt2560_eeprom_read(sc, RT2560_EEPROM_BBP_BASE + i); 2556 sc->bbp_prom[i].reg = val >> 8; 2557 sc->bbp_prom[i].val = val & 0xff; 2558 } 2559 2560 /* read Tx power for all b/g channels */ 2561 for (i = 0; i < 14 / 2; i++) { 2562 val = rt2560_eeprom_read(sc, RT2560_EEPROM_TXPOWER + i); 2563 sc->txpow[i * 2] = val >> 8; 2564 sc->txpow[i * 2 + 1] = val & 0xff; 2565 } 2566} 2567 2568int 2569rt2560_bbp_init(struct rt2560_softc *sc) 2570{ 2571 int i, ntries; 2572 2573 /* wait for BBP to be ready */ 2574 for (ntries = 0; ntries < 100; ntries++) { 2575 if (rt2560_bbp_read(sc, RT2560_BBP_VERSION) != 0) 2576 break; 2577 DELAY(1); 2578 } 2579 if (ntries == 100) { 2580 printf("%s: timeout waiting for BBP\n", sc->sc_dev.dv_xname); 2581 return EIO; 2582 } 2583 2584 /* initialize BBP registers to default values */ 2585 for (i = 0; i < nitems(rt2560_def_bbp); i++) { 2586 rt2560_bbp_write(sc, rt2560_def_bbp[i].reg, 2587 rt2560_def_bbp[i].val); 2588 } 2589#if 0 2590 /* initialize BBP registers to values stored in EEPROM */ 2591 for (i = 0; i < 16; i++) { 2592 if (sc->bbp_prom[i].reg == 0xff) 2593 continue; 2594 rt2560_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 2595 } 2596#endif 2597 2598 return 0; 2599} 2600 2601int 2602rt2560_init(struct ifnet *ifp) 2603{ 2604 struct rt2560_softc *sc = ifp->if_softc; 2605 struct ieee80211com *ic = &sc->sc_ic; 2606 uint32_t tmp; 2607 int i; 2608 2609 /* for CardBus, power on the socket */ 2610 if (!(sc->sc_flags & RT2560_ENABLED)) { 2611 if (sc->sc_enable != NULL && (*sc->sc_enable)(sc) != 0) { 2612 printf("%s: could not enable device\n", 2613 sc->sc_dev.dv_xname); 2614 return EIO; 2615 } 2616 sc->sc_flags |= RT2560_ENABLED; 2617 } 2618 2619 rt2560_stop(ifp, 0); 2620 2621 /* setup tx rings */ 2622 tmp = RT2560_PRIO_RING_COUNT << 24 | 2623 RT2560_ATIM_RING_COUNT << 16 | 2624 RT2560_TX_RING_COUNT << 8 | 2625 RT2560_TX_DESC_SIZE; 2626 2627 /* rings _must_ be initialized in this _exact_ order! */ 2628 RAL_WRITE(sc, RT2560_TXCSR2, tmp); 2629 RAL_WRITE(sc, RT2560_TXCSR3, sc->txq.physaddr); 2630 RAL_WRITE(sc, RT2560_TXCSR5, sc->prioq.physaddr); 2631 RAL_WRITE(sc, RT2560_TXCSR4, sc->atimq.physaddr); 2632 RAL_WRITE(sc, RT2560_TXCSR6, sc->bcnq.physaddr); 2633 2634 /* setup rx ring */ 2635 tmp = RT2560_RX_RING_COUNT << 8 | RT2560_RX_DESC_SIZE; 2636 2637 RAL_WRITE(sc, RT2560_RXCSR1, tmp); 2638 RAL_WRITE(sc, RT2560_RXCSR2, sc->rxq.physaddr); 2639 2640 /* initialize MAC registers to default values */ 2641 for (i = 0; i < nitems(rt2560_def_mac); i++) 2642 RAL_WRITE(sc, rt2560_def_mac[i].reg, rt2560_def_mac[i].val); 2643 2644 IEEE80211_ADDR_COPY(ic->ic_myaddr, LLADDR(ifp->if_sadl)); 2645 rt2560_set_macaddr(sc, ic->ic_myaddr); 2646 2647 /* set basic rate set (will be updated later) */ 2648 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x153); 2649 2650 rt2560_set_slottime(sc); 2651 rt2560_update_plcp(sc); 2652 rt2560_update_led(sc, 0, 0); 2653 2654 RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC); 2655 RAL_WRITE(sc, RT2560_CSR1, RT2560_HOST_READY); 2656 2657 if (rt2560_bbp_init(sc) != 0) { 2658 rt2560_stop(ifp, 1); 2659 return EIO; 2660 } 2661 2662 rt2560_set_txantenna(sc, 1); 2663 rt2560_set_rxantenna(sc, 1); 2664 2665 /* set default BSS channel */ 2666 ic->ic_bss->ni_chan = ic->ic_ibss_chan; 2667 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 2668 2669 /* kick Rx */ 2670 tmp = RT2560_DROP_PHY_ERROR | RT2560_DROP_CRC_ERROR; 2671 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2672 tmp |= RT2560_DROP_CTL | RT2560_DROP_VERSION_ERROR; 2673#ifndef IEEE80211_STA_ONLY 2674 if (ic->ic_opmode != IEEE80211_M_HOSTAP) 2675#endif 2676 tmp |= RT2560_DROP_TODS; 2677 if (!(ifp->if_flags & IFF_PROMISC)) 2678 tmp |= RT2560_DROP_NOT_TO_ME; 2679 } 2680 RAL_WRITE(sc, RT2560_RXCSR0, tmp); 2681 2682 /* clear old FCS and Rx FIFO errors */ 2683 RAL_READ(sc, RT2560_CNT0); 2684 RAL_READ(sc, RT2560_CNT4); 2685 2686 /* clear any pending interrupts */ 2687 RAL_WRITE(sc, RT2560_CSR7, 0xffffffff); 2688 2689 /* enable interrupts */ 2690 RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK); 2691 2692 ifp->if_flags &= ~IFF_OACTIVE; 2693 ifp->if_flags |= IFF_RUNNING; 2694 2695 if (ic->ic_opmode == IEEE80211_M_MONITOR) 2696 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 2697 else 2698 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 2699 2700 return 0; 2701} 2702 2703void 2704rt2560_stop(struct ifnet *ifp, int disable) 2705{ 2706 struct rt2560_softc *sc = ifp->if_softc; 2707 struct ieee80211com *ic = &sc->sc_ic; 2708 2709 sc->sc_tx_timer = 0; 2710 sc->sc_flags &= ~(RT2560_PRIO_OACTIVE|RT2560_DATA_OACTIVE); 2711 ifp->if_timer = 0; 2712 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 2713 2714 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); /* free all nodes */ 2715 2716 /* abort Tx */ 2717 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_ABORT_TX); 2718 2719 /* disable Rx */ 2720 RAL_WRITE(sc, RT2560_RXCSR0, RT2560_DISABLE_RX); 2721 2722 /* reset ASIC (and thus, BBP) */ 2723 RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC); 2724 RAL_WRITE(sc, RT2560_CSR1, 0); 2725 2726 /* disable interrupts */ 2727 RAL_WRITE(sc, RT2560_CSR8, 0xffffffff); 2728 2729 /* clear any pending interrupt */ 2730 RAL_WRITE(sc, RT2560_CSR7, 0xffffffff); 2731 2732 /* reset Tx and Rx rings */ 2733 rt2560_reset_tx_ring(sc, &sc->txq); 2734 rt2560_reset_tx_ring(sc, &sc->atimq); 2735 rt2560_reset_tx_ring(sc, &sc->prioq); 2736 rt2560_reset_tx_ring(sc, &sc->bcnq); 2737 rt2560_reset_rx_ring(sc, &sc->rxq); 2738 2739 /* for CardBus, power down the socket */ 2740 if (disable && sc->sc_disable != NULL) { 2741 if (sc->sc_flags & RT2560_ENABLED) { 2742 (*sc->sc_disable)(sc); 2743 sc->sc_flags &= ~RT2560_ENABLED; 2744 } 2745 } 2746} 2747 2748struct cfdriver ral_cd = { 2749 NULL, "ral", DV_IFNET 2750}; 2751