rt2560.c revision 1.47
1/* $OpenBSD: rt2560.c,v 1.47 2010/04/20 22:05:43 tedu Exp $ */ 2 3/*- 4 * Copyright (c) 2005, 2006 5 * Damien Bergamini <damien.bergamini@free.fr> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20/*- 21 * Ralink Technology RT2560 chipset driver 22 * http://www.ralinktech.com/ 23 */ 24 25#include "bpfilter.h" 26 27#include <sys/param.h> 28#include <sys/sockio.h> 29#include <sys/mbuf.h> 30#include <sys/kernel.h> 31#include <sys/socket.h> 32#include <sys/systm.h> 33#include <sys/malloc.h> 34#include <sys/timeout.h> 35#include <sys/conf.h> 36#include <sys/device.h> 37 38#include <machine/bus.h> 39#include <machine/endian.h> 40#include <machine/intr.h> 41 42#if NBPFILTER > 0 43#include <net/bpf.h> 44#endif 45#include <net/if.h> 46#include <net/if_arp.h> 47#include <net/if_dl.h> 48#include <net/if_media.h> 49#include <net/if_types.h> 50 51#include <netinet/in.h> 52#include <netinet/in_systm.h> 53#include <netinet/in_var.h> 54#include <netinet/if_ether.h> 55#include <netinet/ip.h> 56 57#include <net80211/ieee80211_var.h> 58#include <net80211/ieee80211_amrr.h> 59#include <net80211/ieee80211_radiotap.h> 60 61#include <dev/ic/rt2560reg.h> 62#include <dev/ic/rt2560var.h> 63 64#include <dev/pci/pcireg.h> 65#include <dev/pci/pcivar.h> 66#include <dev/pci/pcidevs.h> 67 68#ifdef RAL_DEBUG 69#define DPRINTF(x) do { if (rt2560_debug > 0) printf x; } while (0) 70#define DPRINTFN(n, x) do { if (rt2560_debug >= (n)) printf x; } while (0) 71int rt2560_debug = 1; 72#else 73#define DPRINTF(x) 74#define DPRINTFN(n, x) 75#endif 76 77int rt2560_alloc_tx_ring(struct rt2560_softc *, 78 struct rt2560_tx_ring *, int); 79void rt2560_reset_tx_ring(struct rt2560_softc *, 80 struct rt2560_tx_ring *); 81void rt2560_free_tx_ring(struct rt2560_softc *, 82 struct rt2560_tx_ring *); 83int rt2560_alloc_rx_ring(struct rt2560_softc *, 84 struct rt2560_rx_ring *, int); 85void rt2560_reset_rx_ring(struct rt2560_softc *, 86 struct rt2560_rx_ring *); 87void rt2560_free_rx_ring(struct rt2560_softc *, 88 struct rt2560_rx_ring *); 89struct ieee80211_node *rt2560_node_alloc(struct ieee80211com *); 90int rt2560_media_change(struct ifnet *); 91void rt2560_next_scan(void *); 92void rt2560_iter_func(void *, struct ieee80211_node *); 93void rt2560_amrr_timeout(void *); 94void rt2560_newassoc(struct ieee80211com *, struct ieee80211_node *, 95 int); 96int rt2560_newstate(struct ieee80211com *, enum ieee80211_state, 97 int); 98uint16_t rt2560_eeprom_read(struct rt2560_softc *, uint8_t); 99void rt2560_encryption_intr(struct rt2560_softc *); 100void rt2560_tx_intr(struct rt2560_softc *); 101void rt2560_prio_intr(struct rt2560_softc *); 102void rt2560_decryption_intr(struct rt2560_softc *); 103void rt2560_rx_intr(struct rt2560_softc *); 104#ifndef IEEE80211_STA_ONLY 105void rt2560_beacon_expire(struct rt2560_softc *); 106#endif 107void rt2560_wakeup_expire(struct rt2560_softc *); 108#if NBPFILTER > 0 109uint8_t rt2560_rxrate(const struct rt2560_rx_desc *); 110#endif 111int rt2560_ack_rate(struct ieee80211com *, int); 112uint16_t rt2560_txtime(int, int, uint32_t); 113uint8_t rt2560_plcp_signal(int); 114void rt2560_setup_tx_desc(struct rt2560_softc *, 115 struct rt2560_tx_desc *, uint32_t, int, int, int, 116 bus_addr_t); 117#ifndef IEEE80211_STA_ONLY 118int rt2560_tx_bcn(struct rt2560_softc *, struct mbuf *, 119 struct ieee80211_node *); 120#endif 121int rt2560_tx_mgt(struct rt2560_softc *, struct mbuf *, 122 struct ieee80211_node *); 123int rt2560_tx_data(struct rt2560_softc *, struct mbuf *, 124 struct ieee80211_node *); 125void rt2560_start(struct ifnet *); 126void rt2560_watchdog(struct ifnet *); 127int rt2560_ioctl(struct ifnet *, u_long, caddr_t); 128void rt2560_bbp_write(struct rt2560_softc *, uint8_t, uint8_t); 129uint8_t rt2560_bbp_read(struct rt2560_softc *, uint8_t); 130void rt2560_rf_write(struct rt2560_softc *, uint8_t, uint32_t); 131void rt2560_set_chan(struct rt2560_softc *, 132 struct ieee80211_channel *); 133void rt2560_disable_rf_tune(struct rt2560_softc *); 134void rt2560_enable_tsf_sync(struct rt2560_softc *); 135void rt2560_update_plcp(struct rt2560_softc *); 136void rt2560_updateslot(struct ieee80211com *); 137void rt2560_set_slottime(struct rt2560_softc *); 138void rt2560_set_basicrates(struct rt2560_softc *); 139void rt2560_update_led(struct rt2560_softc *, int, int); 140void rt2560_set_bssid(struct rt2560_softc *, uint8_t *); 141void rt2560_set_macaddr(struct rt2560_softc *, uint8_t *); 142void rt2560_get_macaddr(struct rt2560_softc *, uint8_t *); 143void rt2560_update_promisc(struct rt2560_softc *); 144void rt2560_set_txantenna(struct rt2560_softc *, int); 145void rt2560_set_rxantenna(struct rt2560_softc *, int); 146const char *rt2560_get_rf(int); 147void rt2560_read_eeprom(struct rt2560_softc *); 148int rt2560_bbp_init(struct rt2560_softc *); 149int rt2560_init(struct ifnet *); 150void rt2560_stop(struct ifnet *, int); 151void rt2560_power(int, void *); 152 153static const struct { 154 uint32_t reg; 155 uint32_t val; 156} rt2560_def_mac[] = { 157 RT2560_DEF_MAC 158}; 159 160static const struct { 161 uint8_t reg; 162 uint8_t val; 163} rt2560_def_bbp[] = { 164 RT2560_DEF_BBP 165}; 166 167static const uint32_t rt2560_rf2522_r2[] = RT2560_RF2522_R2; 168static const uint32_t rt2560_rf2523_r2[] = RT2560_RF2523_R2; 169static const uint32_t rt2560_rf2524_r2[] = RT2560_RF2524_R2; 170static const uint32_t rt2560_rf2525_r2[] = RT2560_RF2525_R2; 171static const uint32_t rt2560_rf2525_hi_r2[] = RT2560_RF2525_HI_R2; 172static const uint32_t rt2560_rf2525e_r2[] = RT2560_RF2525E_R2; 173static const uint32_t rt2560_rf2526_r2[] = RT2560_RF2526_R2; 174static const uint32_t rt2560_rf2526_hi_r2[] = RT2560_RF2526_HI_R2; 175 176int 177rt2560_attach(void *xsc, int id) 178{ 179 struct rt2560_softc *sc = xsc; 180 struct ieee80211com *ic = &sc->sc_ic; 181 struct ifnet *ifp = &ic->ic_if; 182 int error, i; 183 184 sc->amrr.amrr_min_success_threshold = 1; 185 sc->amrr.amrr_max_success_threshold = 15; 186 timeout_set(&sc->amrr_to, rt2560_amrr_timeout, sc); 187 timeout_set(&sc->scan_to, rt2560_next_scan, sc); 188 189 /* retrieve RT2560 rev. no */ 190 sc->asic_rev = RAL_READ(sc, RT2560_CSR0); 191 192 /* retrieve MAC address */ 193 rt2560_get_macaddr(sc, ic->ic_myaddr); 194 printf(", address %s\n", ether_sprintf(ic->ic_myaddr)); 195 196 /* retrieve RF rev. no and various other things from EEPROM */ 197 rt2560_read_eeprom(sc); 198 199 printf("%s: MAC/BBP RT2560 (rev 0x%02x), RF %s\n", sc->sc_dev.dv_xname, 200 sc->asic_rev, rt2560_get_rf(sc->rf_rev)); 201 202 /* 203 * Allocate Tx and Rx rings. 204 */ 205 error = rt2560_alloc_tx_ring(sc, &sc->txq, RT2560_TX_RING_COUNT); 206 if (error != 0) { 207 printf("%s: could not allocate Tx ring\n", 208 sc->sc_dev.dv_xname); 209 goto fail1; 210 } 211 error = rt2560_alloc_tx_ring(sc, &sc->atimq, RT2560_ATIM_RING_COUNT); 212 if (error != 0) { 213 printf("%s: could not allocate ATIM ring\n", 214 sc->sc_dev.dv_xname); 215 goto fail2; 216 } 217 error = rt2560_alloc_tx_ring(sc, &sc->prioq, RT2560_PRIO_RING_COUNT); 218 if (error != 0) { 219 printf("%s: could not allocate Prio ring\n", 220 sc->sc_dev.dv_xname); 221 goto fail3; 222 } 223 error = rt2560_alloc_tx_ring(sc, &sc->bcnq, RT2560_BEACON_RING_COUNT); 224 if (error != 0) { 225 printf("%s: could not allocate Beacon ring\n", 226 sc->sc_dev.dv_xname); 227 goto fail4; 228 } 229 error = rt2560_alloc_rx_ring(sc, &sc->rxq, RT2560_RX_RING_COUNT); 230 if (error != 0) { 231 printf("%s: could not allocate Rx ring\n", 232 sc->sc_dev.dv_xname); 233 goto fail5; 234 } 235 236 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 237 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 238 ic->ic_state = IEEE80211_S_INIT; 239 240 /* set device capabilities */ 241 ic->ic_caps = 242 IEEE80211_C_MONITOR | /* monitor mode supported */ 243#ifndef IEEE80211_STA_ONLY 244 IEEE80211_C_IBSS | /* IBSS mode supported */ 245 IEEE80211_C_HOSTAP | /* HostAp mode supported */ 246#endif 247 IEEE80211_C_TXPMGT | /* tx power management */ 248 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 249 IEEE80211_C_SHSLOT | /* short slot time supported */ 250 IEEE80211_C_WEP | /* s/w WEP */ 251 IEEE80211_C_RSN; /* WPA/RSN */ 252 253 /* set supported .11b and .11g rates */ 254 ic->ic_sup_rates[IEEE80211_MODE_11B] = ieee80211_std_rateset_11b; 255 ic->ic_sup_rates[IEEE80211_MODE_11G] = ieee80211_std_rateset_11g; 256 257 /* set supported .11b and .11g channels (1 through 14) */ 258 for (i = 1; i <= 14; i++) { 259 ic->ic_channels[i].ic_freq = 260 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 261 ic->ic_channels[i].ic_flags = 262 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 263 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 264 } 265 266 ifp->if_softc = sc; 267 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 268 ifp->if_init = rt2560_init; 269 ifp->if_ioctl = rt2560_ioctl; 270 ifp->if_start = rt2560_start; 271 ifp->if_watchdog = rt2560_watchdog; 272 IFQ_SET_READY(&ifp->if_snd); 273 memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ); 274 275 if_attach(ifp); 276 ieee80211_ifattach(ifp); 277 ic->ic_node_alloc = rt2560_node_alloc; 278 ic->ic_newassoc = rt2560_newassoc; 279 ic->ic_updateslot = rt2560_updateslot; 280 281 /* override state transition machine */ 282 sc->sc_newstate = ic->ic_newstate; 283 ic->ic_newstate = rt2560_newstate; 284 ieee80211_media_init(ifp, rt2560_media_change, ieee80211_media_status); 285 286#if NBPFILTER > 0 287 bpfattach(&sc->sc_drvbpf, ifp, DLT_IEEE802_11_RADIO, 288 sizeof (struct ieee80211_frame) + 64); 289 290 sc->sc_rxtap_len = sizeof sc->sc_rxtapu; 291 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 292 sc->sc_rxtap.wr_ihdr.it_present = htole32(RT2560_RX_RADIOTAP_PRESENT); 293 294 sc->sc_txtap_len = sizeof sc->sc_txtapu; 295 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 296 sc->sc_txtap.wt_ihdr.it_present = htole32(RT2560_TX_RADIOTAP_PRESENT); 297#endif 298 299 sc->sc_powerhook = powerhook_establish(rt2560_power, sc); 300 if (sc->sc_powerhook == NULL) { 301 printf("%s: WARNING: unable to establish power hook\n", 302 sc->sc_dev.dv_xname); 303 } 304 return 0; 305 306fail5: rt2560_free_tx_ring(sc, &sc->bcnq); 307fail4: rt2560_free_tx_ring(sc, &sc->prioq); 308fail3: rt2560_free_tx_ring(sc, &sc->atimq); 309fail2: rt2560_free_tx_ring(sc, &sc->txq); 310fail1: return ENXIO; 311} 312 313int 314rt2560_detach(void *xsc) 315{ 316 struct rt2560_softc *sc = xsc; 317 struct ifnet *ifp = &sc->sc_ic.ic_if; 318 319 timeout_del(&sc->scan_to); 320 timeout_del(&sc->amrr_to); 321 322 if (sc->sc_powerhook != NULL) 323 powerhook_disestablish(sc->sc_powerhook); 324 325 ieee80211_ifdetach(ifp); /* free all nodes */ 326 if_detach(ifp); 327 328 rt2560_free_tx_ring(sc, &sc->txq); 329 rt2560_free_tx_ring(sc, &sc->atimq); 330 rt2560_free_tx_ring(sc, &sc->prioq); 331 rt2560_free_tx_ring(sc, &sc->bcnq); 332 rt2560_free_rx_ring(sc, &sc->rxq); 333 334 return 0; 335} 336 337int 338rt2560_alloc_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring, 339 int count) 340{ 341 int i, nsegs, error; 342 343 ring->count = count; 344 ring->queued = 0; 345 ring->cur = ring->next = 0; 346 ring->cur_encrypt = ring->next_encrypt = 0; 347 348 error = bus_dmamap_create(sc->sc_dmat, count * RT2560_TX_DESC_SIZE, 1, 349 count * RT2560_TX_DESC_SIZE, 0, BUS_DMA_NOWAIT, &ring->map); 350 if (error != 0) { 351 printf("%s: could not create desc DMA map\n", 352 sc->sc_dev.dv_xname); 353 goto fail; 354 } 355 356 error = bus_dmamem_alloc(sc->sc_dmat, count * RT2560_TX_DESC_SIZE, 357 PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT); 358 if (error != 0) { 359 printf("%s: could not allocate DMA memory\n", 360 sc->sc_dev.dv_xname); 361 goto fail; 362 } 363 364 error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs, 365 count * RT2560_TX_DESC_SIZE, (caddr_t *)&ring->desc, 366 BUS_DMA_NOWAIT); 367 if (error != 0) { 368 printf("%s: can't map desc DMA memory\n", 369 sc->sc_dev.dv_xname); 370 goto fail; 371 } 372 373 error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc, 374 count * RT2560_TX_DESC_SIZE, NULL, BUS_DMA_NOWAIT); 375 if (error != 0) { 376 printf("%s: could not load desc DMA map\n", 377 sc->sc_dev.dv_xname); 378 goto fail; 379 } 380 381 memset(ring->desc, 0, count * RT2560_TX_DESC_SIZE); 382 ring->physaddr = ring->map->dm_segs->ds_addr; 383 384 ring->data = malloc(count * sizeof (struct rt2560_tx_data), M_DEVBUF, 385 M_NOWAIT | M_ZERO); 386 if (ring->data == NULL) { 387 printf("%s: could not allocate soft data\n", 388 sc->sc_dev.dv_xname); 389 error = ENOMEM; 390 goto fail; 391 } 392 393 for (i = 0; i < count; i++) { 394 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 395 RT2560_MAX_SCATTER, MCLBYTES, 0, BUS_DMA_NOWAIT, 396 &ring->data[i].map); 397 if (error != 0) { 398 printf("%s: could not create DMA map\n", 399 sc->sc_dev.dv_xname); 400 goto fail; 401 } 402 } 403 404 return 0; 405 406fail: rt2560_free_tx_ring(sc, ring); 407 return error; 408} 409 410void 411rt2560_reset_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring) 412{ 413 int i; 414 415 for (i = 0; i < ring->count; i++) { 416 struct rt2560_tx_desc *desc = &ring->desc[i]; 417 struct rt2560_tx_data *data = &ring->data[i]; 418 419 if (data->m != NULL) { 420 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 421 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 422 bus_dmamap_unload(sc->sc_dmat, data->map); 423 m_freem(data->m); 424 data->m = NULL; 425 } 426 427 /* 428 * The node has already been freed at that point so don't call 429 * ieee80211_release_node() here. 430 */ 431 data->ni = NULL; 432 433 desc->flags = 0; 434 } 435 436 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 437 BUS_DMASYNC_PREWRITE); 438 439 ring->queued = 0; 440 ring->cur = ring->next = 0; 441 ring->cur_encrypt = ring->next_encrypt = 0; 442} 443 444void 445rt2560_free_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring) 446{ 447 int i; 448 449 if (ring->desc != NULL) { 450 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, 451 ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 452 bus_dmamap_unload(sc->sc_dmat, ring->map); 453 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)ring->desc, 454 ring->count * RT2560_TX_DESC_SIZE); 455 bus_dmamem_free(sc->sc_dmat, &ring->seg, 1); 456 } 457 458 if (ring->data != NULL) { 459 for (i = 0; i < ring->count; i++) { 460 struct rt2560_tx_data *data = &ring->data[i]; 461 462 if (data->m != NULL) { 463 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 464 data->map->dm_mapsize, 465 BUS_DMASYNC_POSTWRITE); 466 bus_dmamap_unload(sc->sc_dmat, data->map); 467 m_freem(data->m); 468 } 469 470 /* 471 * The node has already been freed at that point so 472 * don't call ieee80211_release_node() here. 473 */ 474 data->ni = NULL; 475 476 if (data->map != NULL) 477 bus_dmamap_destroy(sc->sc_dmat, data->map); 478 } 479 free(ring->data, M_DEVBUF); 480 } 481} 482 483int 484rt2560_alloc_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring, 485 int count) 486{ 487 int i, nsegs, error; 488 489 ring->count = count; 490 ring->cur = ring->next = 0; 491 ring->cur_decrypt = 0; 492 493 error = bus_dmamap_create(sc->sc_dmat, count * RT2560_RX_DESC_SIZE, 1, 494 count * RT2560_RX_DESC_SIZE, 0, BUS_DMA_NOWAIT, &ring->map); 495 if (error != 0) { 496 printf("%s: could not create desc DMA map\n", 497 sc->sc_dev.dv_xname); 498 goto fail; 499 } 500 501 error = bus_dmamem_alloc(sc->sc_dmat, count * RT2560_RX_DESC_SIZE, 502 PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT); 503 if (error != 0) { 504 printf("%s: could not allocate DMA memory\n", 505 sc->sc_dev.dv_xname); 506 goto fail; 507 } 508 509 error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs, 510 count * RT2560_RX_DESC_SIZE, (caddr_t *)&ring->desc, 511 BUS_DMA_NOWAIT); 512 if (error != 0) { 513 printf("%s: can't map desc DMA memory\n", 514 sc->sc_dev.dv_xname); 515 goto fail; 516 } 517 518 error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc, 519 count * RT2560_RX_DESC_SIZE, NULL, BUS_DMA_NOWAIT); 520 if (error != 0) { 521 printf("%s: could not load desc DMA map\n", 522 sc->sc_dev.dv_xname); 523 goto fail; 524 } 525 526 memset(ring->desc, 0, count * RT2560_RX_DESC_SIZE); 527 ring->physaddr = ring->map->dm_segs->ds_addr; 528 529 ring->data = malloc(count * sizeof (struct rt2560_rx_data), M_DEVBUF, 530 M_NOWAIT | M_ZERO); 531 if (ring->data == NULL) { 532 printf("%s: could not allocate soft data\n", 533 sc->sc_dev.dv_xname); 534 error = ENOMEM; 535 goto fail; 536 } 537 538 /* 539 * Pre-allocate Rx buffers and populate Rx ring. 540 */ 541 for (i = 0; i < count; i++) { 542 struct rt2560_rx_desc *desc = &sc->rxq.desc[i]; 543 struct rt2560_rx_data *data = &sc->rxq.data[i]; 544 545 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES, 546 0, BUS_DMA_NOWAIT, &data->map); 547 if (error != 0) { 548 printf("%s: could not create DMA map\n", 549 sc->sc_dev.dv_xname); 550 goto fail; 551 } 552 553 MGETHDR(data->m, M_DONTWAIT, MT_DATA); 554 if (data->m == NULL) { 555 printf("%s: could not allocate rx mbuf\n", 556 sc->sc_dev.dv_xname); 557 error = ENOMEM; 558 goto fail; 559 } 560 MCLGET(data->m, M_DONTWAIT); 561 if (!(data->m->m_flags & M_EXT)) { 562 printf("%s: could not allocate rx mbuf cluster\n", 563 sc->sc_dev.dv_xname); 564 error = ENOMEM; 565 goto fail; 566 } 567 568 error = bus_dmamap_load(sc->sc_dmat, data->map, 569 mtod(data->m, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT); 570 if (error != 0) { 571 printf("%s: could not load rx buf DMA map", 572 sc->sc_dev.dv_xname); 573 goto fail; 574 } 575 576 desc->flags = htole32(RT2560_RX_BUSY); 577 desc->physaddr = htole32(data->map->dm_segs->ds_addr); 578 } 579 580 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 581 BUS_DMASYNC_PREWRITE); 582 583 return 0; 584 585fail: rt2560_free_rx_ring(sc, ring); 586 return error; 587} 588 589void 590rt2560_reset_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring) 591{ 592 int i; 593 594 for (i = 0; i < ring->count; i++) { 595 ring->desc[i].flags = htole32(RT2560_RX_BUSY); 596 ring->data[i].drop = 0; 597 } 598 599 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 600 BUS_DMASYNC_PREWRITE); 601 602 ring->cur = ring->next = 0; 603 ring->cur_decrypt = 0; 604} 605 606void 607rt2560_free_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring) 608{ 609 int i; 610 611 if (ring->desc != NULL) { 612 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, 613 ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 614 bus_dmamap_unload(sc->sc_dmat, ring->map); 615 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)ring->desc, 616 ring->count * RT2560_RX_DESC_SIZE); 617 bus_dmamem_free(sc->sc_dmat, &ring->seg, 1); 618 } 619 620 if (ring->data != NULL) { 621 for (i = 0; i < ring->count; i++) { 622 struct rt2560_rx_data *data = &ring->data[i]; 623 624 if (data->m != NULL) { 625 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 626 data->map->dm_mapsize, 627 BUS_DMASYNC_POSTREAD); 628 bus_dmamap_unload(sc->sc_dmat, data->map); 629 m_freem(data->m); 630 } 631 632 if (data->map != NULL) 633 bus_dmamap_destroy(sc->sc_dmat, data->map); 634 } 635 free(ring->data, M_DEVBUF); 636 } 637} 638 639struct ieee80211_node * 640rt2560_node_alloc(struct ieee80211com *ic) 641{ 642 return malloc(sizeof (struct rt2560_node), M_DEVBUF, 643 M_NOWAIT | M_ZERO); 644} 645 646int 647rt2560_media_change(struct ifnet *ifp) 648{ 649 int error; 650 651 error = ieee80211_media_change(ifp); 652 if (error != ENETRESET) 653 return error; 654 655 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 656 rt2560_init(ifp); 657 658 return 0; 659} 660 661/* 662 * This function is called periodically (every 200ms) during scanning to 663 * switch from one channel to another. 664 */ 665void 666rt2560_next_scan(void *arg) 667{ 668 struct rt2560_softc *sc = arg; 669 struct ieee80211com *ic = &sc->sc_ic; 670 struct ifnet *ifp = &ic->ic_if; 671 int s; 672 673 s = splnet(); 674 if (ic->ic_state == IEEE80211_S_SCAN) 675 ieee80211_next_scan(ifp); 676 splx(s); 677} 678 679/* 680 * This function is called for each neighbor node. 681 */ 682void 683rt2560_iter_func(void *arg, struct ieee80211_node *ni) 684{ 685 struct rt2560_softc *sc = arg; 686 struct rt2560_node *rn = (struct rt2560_node *)ni; 687 688 ieee80211_amrr_choose(&sc->amrr, ni, &rn->amn); 689} 690 691void 692rt2560_amrr_timeout(void *arg) 693{ 694 struct rt2560_softc *sc = arg; 695 struct ieee80211com *ic = &sc->sc_ic; 696 int s; 697 698 s = splnet(); 699 if (ic->ic_opmode == IEEE80211_M_STA) 700 rt2560_iter_func(sc, ic->ic_bss); 701#ifndef IEEE80211_STA_ONLY 702 else 703 ieee80211_iterate_nodes(ic, rt2560_iter_func, sc); 704#endif 705 splx(s); 706 707 timeout_add_msec(&sc->amrr_to, 500); 708} 709 710void 711rt2560_newassoc(struct ieee80211com *ic, struct ieee80211_node *ni, int isnew) 712{ 713 struct rt2560_softc *sc = ic->ic_softc; 714 int i; 715 716 ieee80211_amrr_node_init(&sc->amrr, &((struct rt2560_node *)ni)->amn); 717 718 /* set rate to some reasonable initial value */ 719 for (i = ni->ni_rates.rs_nrates - 1; 720 i > 0 && (ni->ni_rates.rs_rates[i] & IEEE80211_RATE_VAL) > 72; 721 i--); 722 ni->ni_txrate = i; 723} 724 725int 726rt2560_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg) 727{ 728 struct rt2560_softc *sc = ic->ic_if.if_softc; 729 enum ieee80211_state ostate; 730 struct ieee80211_node *ni; 731 int error = 0; 732 733 ostate = ic->ic_state; 734 timeout_del(&sc->scan_to); 735 timeout_del(&sc->amrr_to); 736 737 switch (nstate) { 738 case IEEE80211_S_INIT: 739 if (ostate == IEEE80211_S_RUN) { 740 /* abort TSF synchronization */ 741 RAL_WRITE(sc, RT2560_CSR14, 0); 742 743 /* turn association led off */ 744 rt2560_update_led(sc, 0, 0); 745 } 746 break; 747 748 case IEEE80211_S_SCAN: 749 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 750 timeout_add_msec(&sc->scan_to, 200); 751 break; 752 753 case IEEE80211_S_AUTH: 754 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 755 break; 756 757 case IEEE80211_S_ASSOC: 758 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 759 break; 760 761 case IEEE80211_S_RUN: 762 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 763 764 ni = ic->ic_bss; 765 766 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 767 rt2560_update_plcp(sc); 768 rt2560_set_slottime(sc); 769 rt2560_set_basicrates(sc); 770 rt2560_set_bssid(sc, ni->ni_bssid); 771 } 772 773#ifndef IEEE80211_STA_ONLY 774 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 775 ic->ic_opmode == IEEE80211_M_IBSS) { 776 struct mbuf *m = ieee80211_beacon_alloc(ic, ni); 777 if (m == NULL) { 778 printf("%s: could not allocate beacon\n", 779 sc->sc_dev.dv_xname); 780 error = ENOBUFS; 781 break; 782 } 783 784 error = rt2560_tx_bcn(sc, m, ni); 785 if (error != 0) 786 break; 787 } 788#endif 789 790 /* turn assocation led on */ 791 rt2560_update_led(sc, 1, 0); 792 793 if (ic->ic_opmode == IEEE80211_M_STA) { 794 /* fake a join to init the tx rate */ 795 rt2560_newassoc(ic, ni, 1); 796 } 797 798 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 799 /* start automatic rate control timer */ 800 if (ic->ic_fixed_rate == -1) 801 timeout_add_msec(&sc->amrr_to, 500); 802 803 rt2560_enable_tsf_sync(sc); 804 } 805 break; 806 } 807 808 return (error != 0) ? error : sc->sc_newstate(ic, nstate, arg); 809} 810 811/* 812 * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46 or 813 * 93C66). 814 */ 815uint16_t 816rt2560_eeprom_read(struct rt2560_softc *sc, uint8_t addr) 817{ 818 uint32_t tmp; 819 uint16_t val; 820 int n; 821 822 /* clock C once before the first command */ 823 RT2560_EEPROM_CTL(sc, 0); 824 825 RT2560_EEPROM_CTL(sc, RT2560_S); 826 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 827 RT2560_EEPROM_CTL(sc, RT2560_S); 828 829 /* write start bit (1) */ 830 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D); 831 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C); 832 833 /* write READ opcode (10) */ 834 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D); 835 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C); 836 RT2560_EEPROM_CTL(sc, RT2560_S); 837 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 838 839 /* write address (A5-A0 or A7-A0) */ 840 n = (RAL_READ(sc, RT2560_CSR21) & RT2560_93C46) ? 5 : 7; 841 for (; n >= 0; n--) { 842 RT2560_EEPROM_CTL(sc, RT2560_S | 843 (((addr >> n) & 1) << RT2560_SHIFT_D)); 844 RT2560_EEPROM_CTL(sc, RT2560_S | 845 (((addr >> n) & 1) << RT2560_SHIFT_D) | RT2560_C); 846 } 847 848 RT2560_EEPROM_CTL(sc, RT2560_S); 849 850 /* read data Q15-Q0 */ 851 val = 0; 852 for (n = 15; n >= 0; n--) { 853 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 854 tmp = RAL_READ(sc, RT2560_CSR21); 855 val |= ((tmp & RT2560_Q) >> RT2560_SHIFT_Q) << n; 856 RT2560_EEPROM_CTL(sc, RT2560_S); 857 } 858 859 RT2560_EEPROM_CTL(sc, 0); 860 861 /* clear Chip Select and clock C */ 862 RT2560_EEPROM_CTL(sc, RT2560_S); 863 RT2560_EEPROM_CTL(sc, 0); 864 RT2560_EEPROM_CTL(sc, RT2560_C); 865 866 return val; 867} 868 869/* 870 * Some frames were processed by the hardware cipher engine and are ready for 871 * transmission. 872 */ 873void 874rt2560_encryption_intr(struct rt2560_softc *sc) 875{ 876 int hw; 877 878 /* retrieve last descriptor index processed by cipher engine */ 879 hw = (RAL_READ(sc, RT2560_SECCSR1) - sc->txq.physaddr) / 880 RT2560_TX_DESC_SIZE; 881 882 for (; sc->txq.next_encrypt != hw;) { 883 struct rt2560_tx_desc *desc = 884 &sc->txq.desc[sc->txq.next_encrypt]; 885 886 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 887 sc->txq.next_encrypt * RT2560_TX_DESC_SIZE, 888 RT2560_TX_DESC_SIZE, BUS_DMASYNC_POSTREAD); 889 890 if (letoh32(desc->flags) & 891 (RT2560_TX_BUSY | RT2560_TX_CIPHER_BUSY)) 892 break; 893 894 /* for TKIP, swap eiv field to fix a bug in ASIC */ 895 if ((letoh32(desc->flags) & RT2560_TX_CIPHER_MASK) == 896 RT2560_TX_CIPHER_TKIP) 897 desc->eiv = swap32(desc->eiv); 898 899 /* mark the frame ready for transmission */ 900 desc->flags |= htole32(RT2560_TX_BUSY | RT2560_TX_VALID); 901 902 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 903 sc->txq.next_encrypt * RT2560_TX_DESC_SIZE, 904 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 905 906 DPRINTFN(15, ("encryption done idx=%u\n", 907 sc->txq.next_encrypt)); 908 909 sc->txq.next_encrypt = 910 (sc->txq.next_encrypt + 1) % RT2560_TX_RING_COUNT; 911 } 912 913 /* kick Tx */ 914 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_TX); 915} 916 917void 918rt2560_tx_intr(struct rt2560_softc *sc) 919{ 920 struct ieee80211com *ic = &sc->sc_ic; 921 struct ifnet *ifp = &ic->ic_if; 922 923 for (;;) { 924 struct rt2560_tx_desc *desc = &sc->txq.desc[sc->txq.next]; 925 struct rt2560_tx_data *data = &sc->txq.data[sc->txq.next]; 926 struct rt2560_node *rn; 927 928 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 929 sc->txq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 930 BUS_DMASYNC_POSTREAD); 931 932 if ((letoh32(desc->flags) & RT2560_TX_BUSY) || 933 (letoh32(desc->flags) & RT2560_TX_CIPHER_BUSY) || 934 !(letoh32(desc->flags) & RT2560_TX_VALID)) 935 break; 936 937 rn = (struct rt2560_node *)data->ni; 938 939 switch (letoh32(desc->flags) & RT2560_TX_RESULT_MASK) { 940 case RT2560_TX_SUCCESS: 941 DPRINTFN(10, ("data frame sent successfully\n")); 942 rn->amn.amn_txcnt++; 943 ifp->if_opackets++; 944 break; 945 946 case RT2560_TX_SUCCESS_RETRY: 947 DPRINTFN(9, ("data frame sent after %u retries\n", 948 (letoh32(desc->flags) >> 5) & 0x7)); 949 rn->amn.amn_txcnt++; 950 rn->amn.amn_retrycnt++; 951 ifp->if_opackets++; 952 break; 953 954 case RT2560_TX_FAIL_RETRY: 955 DPRINTFN(9, ("sending data frame failed (too much " 956 "retries)\n")); 957 rn->amn.amn_txcnt++; 958 rn->amn.amn_retrycnt++; 959 ifp->if_oerrors++; 960 break; 961 962 case RT2560_TX_FAIL_INVALID: 963 case RT2560_TX_FAIL_OTHER: 964 default: 965 printf("%s: sending data frame failed 0x%08x\n", 966 sc->sc_dev.dv_xname, letoh32(desc->flags)); 967 ifp->if_oerrors++; 968 } 969 970 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 971 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 972 bus_dmamap_unload(sc->sc_dmat, data->map); 973 m_freem(data->m); 974 data->m = NULL; 975 ieee80211_release_node(ic, data->ni); 976 data->ni = NULL; 977 978 /* descriptor is no longer valid */ 979 desc->flags &= ~htole32(RT2560_TX_VALID); 980 981 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 982 sc->txq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 983 BUS_DMASYNC_PREWRITE); 984 985 DPRINTFN(15, ("tx done idx=%u\n", sc->txq.next)); 986 987 sc->txq.queued--; 988 sc->txq.next = (sc->txq.next + 1) % RT2560_TX_RING_COUNT; 989 } 990 991 sc->sc_tx_timer = 0; 992 ifp->if_flags &= ~IFF_OACTIVE; 993 rt2560_start(ifp); 994} 995 996void 997rt2560_prio_intr(struct rt2560_softc *sc) 998{ 999 struct ieee80211com *ic = &sc->sc_ic; 1000 struct ifnet *ifp = &ic->ic_if; 1001 1002 for (;;) { 1003 struct rt2560_tx_desc *desc = &sc->prioq.desc[sc->prioq.next]; 1004 struct rt2560_tx_data *data = &sc->prioq.data[sc->prioq.next]; 1005 1006 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1007 sc->prioq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1008 BUS_DMASYNC_POSTREAD); 1009 1010 if ((letoh32(desc->flags) & RT2560_TX_BUSY) || 1011 !(letoh32(desc->flags) & RT2560_TX_VALID)) 1012 break; 1013 1014 switch (letoh32(desc->flags) & RT2560_TX_RESULT_MASK) { 1015 case RT2560_TX_SUCCESS: 1016 DPRINTFN(10, ("mgt frame sent successfully\n")); 1017 break; 1018 1019 case RT2560_TX_SUCCESS_RETRY: 1020 DPRINTFN(9, ("mgt frame sent after %u retries\n", 1021 (letoh32(desc->flags) >> 5) & 0x7)); 1022 break; 1023 1024 case RT2560_TX_FAIL_RETRY: 1025 DPRINTFN(9, ("sending mgt frame failed (too much " 1026 "retries)\n")); 1027 break; 1028 1029 case RT2560_TX_FAIL_INVALID: 1030 case RT2560_TX_FAIL_OTHER: 1031 default: 1032 printf("%s: sending mgt frame failed 0x%08x\n", 1033 sc->sc_dev.dv_xname, letoh32(desc->flags)); 1034 } 1035 1036 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1037 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 1038 bus_dmamap_unload(sc->sc_dmat, data->map); 1039 m_freem(data->m); 1040 data->m = NULL; 1041 ieee80211_release_node(ic, data->ni); 1042 data->ni = NULL; 1043 1044 /* descriptor is no longer valid */ 1045 desc->flags &= ~htole32(RT2560_TX_VALID); 1046 1047 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1048 sc->prioq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1049 BUS_DMASYNC_PREWRITE); 1050 1051 DPRINTFN(15, ("prio done idx=%u\n", sc->prioq.next)); 1052 1053 sc->prioq.queued--; 1054 sc->prioq.next = (sc->prioq.next + 1) % RT2560_PRIO_RING_COUNT; 1055 } 1056 1057 sc->sc_tx_timer = 0; 1058 ifp->if_flags &= ~IFF_OACTIVE; 1059 rt2560_start(ifp); 1060} 1061 1062/* 1063 * Some frames were processed by the hardware cipher engine and are ready for 1064 * transmission to the IEEE802.11 layer. 1065 */ 1066void 1067rt2560_decryption_intr(struct rt2560_softc *sc) 1068{ 1069 struct ieee80211com *ic = &sc->sc_ic; 1070 struct ifnet *ifp = &ic->ic_if; 1071 struct ieee80211_frame *wh; 1072 struct ieee80211_rxinfo rxi; 1073 struct ieee80211_node *ni; 1074 struct mbuf *mnew, *m; 1075 int hw, error; 1076 1077 /* retrieve last decriptor index processed by cipher engine */ 1078 hw = (RAL_READ(sc, RT2560_SECCSR0) - sc->rxq.physaddr) / 1079 RT2560_RX_DESC_SIZE; 1080 1081 for (; sc->rxq.cur_decrypt != hw;) { 1082 struct rt2560_rx_desc *desc = 1083 &sc->rxq.desc[sc->rxq.cur_decrypt]; 1084 struct rt2560_rx_data *data = 1085 &sc->rxq.data[sc->rxq.cur_decrypt]; 1086 1087 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1088 sc->rxq.cur_decrypt * RT2560_TX_DESC_SIZE, 1089 RT2560_TX_DESC_SIZE, BUS_DMASYNC_POSTREAD); 1090 1091 if (letoh32(desc->flags) & 1092 (RT2560_RX_BUSY | RT2560_RX_CIPHER_BUSY)) 1093 break; 1094 1095 if (data->drop) { 1096 ifp->if_ierrors++; 1097 goto skip; 1098 } 1099 1100 if ((letoh32(desc->flags) & RT2560_RX_CIPHER_MASK) != 0 && 1101 (letoh32(desc->flags) & RT2560_RX_ICV_ERROR)) { 1102 ifp->if_ierrors++; 1103 goto skip; 1104 } 1105 1106 /* 1107 * Try to allocate a new mbuf for this ring element and load it 1108 * before processing the current mbuf. If the ring element 1109 * cannot be loaded, drop the received packet and reuse the old 1110 * mbuf. In the unlikely case that the old mbuf can't be 1111 * reloaded either, explicitly panic. 1112 */ 1113 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 1114 if (mnew == NULL) { 1115 ifp->if_ierrors++; 1116 goto skip; 1117 } 1118 MCLGET(mnew, M_DONTWAIT); 1119 if (!(mnew->m_flags & M_EXT)) { 1120 m_freem(mnew); 1121 ifp->if_ierrors++; 1122 goto skip; 1123 } 1124 1125 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1126 data->map->dm_mapsize, BUS_DMASYNC_POSTREAD); 1127 bus_dmamap_unload(sc->sc_dmat, data->map); 1128 1129 error = bus_dmamap_load(sc->sc_dmat, data->map, 1130 mtod(mnew, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT); 1131 if (error != 0) { 1132 m_freem(mnew); 1133 1134 /* try to reload the old mbuf */ 1135 error = bus_dmamap_load(sc->sc_dmat, data->map, 1136 mtod(data->m, void *), MCLBYTES, NULL, 1137 BUS_DMA_NOWAIT); 1138 if (error != 0) { 1139 /* very unlikely that it will fail... */ 1140 panic("%s: could not load old rx mbuf", 1141 sc->sc_dev.dv_xname); 1142 } 1143 /* physical address may have changed */ 1144 desc->physaddr = htole32(data->map->dm_segs->ds_addr); 1145 ifp->if_ierrors++; 1146 goto skip; 1147 } 1148 1149 /* 1150 * New mbuf successfully loaded, update Rx ring and continue 1151 * processing. 1152 */ 1153 m = data->m; 1154 data->m = mnew; 1155 desc->physaddr = htole32(data->map->dm_segs->ds_addr); 1156 1157 /* finalize mbuf */ 1158 m->m_pkthdr.rcvif = ifp; 1159 m->m_pkthdr.len = m->m_len = 1160 (letoh32(desc->flags) >> 16) & 0xfff; 1161 1162#if NBPFILTER > 0 1163 if (sc->sc_drvbpf != NULL) { 1164 struct mbuf mb; 1165 struct rt2560_rx_radiotap_header *tap = &sc->sc_rxtap; 1166 uint32_t tsf_lo, tsf_hi; 1167 1168 /* get timestamp (low and high 32 bits) */ 1169 tsf_hi = RAL_READ(sc, RT2560_CSR17); 1170 tsf_lo = RAL_READ(sc, RT2560_CSR16); 1171 1172 tap->wr_tsf = 1173 htole64(((uint64_t)tsf_hi << 32) | tsf_lo); 1174 tap->wr_flags = 0; 1175 tap->wr_rate = rt2560_rxrate(desc); 1176 tap->wr_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 1177 tap->wr_chan_flags = 1178 htole16(ic->ic_ibss_chan->ic_flags); 1179 tap->wr_antenna = sc->rx_ant; 1180 tap->wr_antsignal = desc->rssi; 1181 1182 mb.m_data = (caddr_t)tap; 1183 mb.m_len = sc->sc_txtap_len; 1184 mb.m_next = m; 1185 mb.m_nextpkt = NULL; 1186 mb.m_type = 0; 1187 mb.m_flags = 0; 1188 bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_IN); 1189 } 1190#endif 1191 wh = mtod(m, struct ieee80211_frame *); 1192 ni = ieee80211_find_rxnode(ic, wh); 1193 1194 /* send the frame to the 802.11 layer */ 1195 rxi.rxi_flags = 0; 1196 rxi.rxi_rssi = desc->rssi; 1197 rxi.rxi_tstamp = 0; /* unused */ 1198 ieee80211_input(ifp, m, ni, &rxi); 1199 1200 /* node is no longer needed */ 1201 ieee80211_release_node(ic, ni); 1202 1203skip: desc->flags = htole32(RT2560_RX_BUSY); 1204 1205 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1206 sc->rxq.cur_decrypt * RT2560_TX_DESC_SIZE, 1207 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 1208 1209 DPRINTFN(15, ("decryption done idx=%u\n", sc->rxq.cur_decrypt)); 1210 1211 sc->rxq.cur_decrypt = 1212 (sc->rxq.cur_decrypt + 1) % RT2560_RX_RING_COUNT; 1213 } 1214} 1215 1216/* 1217 * Some frames were received. Pass them to the hardware cipher engine before 1218 * sending them to the 802.11 layer. 1219 */ 1220void 1221rt2560_rx_intr(struct rt2560_softc *sc) 1222{ 1223 for (;;) { 1224 struct rt2560_rx_desc *desc = &sc->rxq.desc[sc->rxq.cur]; 1225 struct rt2560_rx_data *data = &sc->rxq.data[sc->rxq.cur]; 1226 1227 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1228 sc->rxq.cur * RT2560_RX_DESC_SIZE, RT2560_RX_DESC_SIZE, 1229 BUS_DMASYNC_POSTREAD); 1230 1231 if (letoh32(desc->flags) & 1232 (RT2560_RX_BUSY | RT2560_RX_CIPHER_BUSY)) 1233 break; 1234 1235 data->drop = 0; 1236 1237 if (letoh32(desc->flags) & 1238 (RT2560_RX_PHY_ERROR | RT2560_RX_CRC_ERROR)) { 1239 /* 1240 * This should not happen since we did not request 1241 * to receive those frames when we filled RXCSR0. 1242 */ 1243 DPRINTFN(5, ("PHY or CRC error flags 0x%08x\n", 1244 letoh32(desc->flags))); 1245 data->drop = 1; 1246 } 1247 1248 if (((letoh32(desc->flags) >> 16) & 0xfff) > MCLBYTES) { 1249 DPRINTFN(5, ("bad length\n")); 1250 data->drop = 1; 1251 } 1252 1253 /* mark the frame for decryption */ 1254 desc->flags |= htole32(RT2560_RX_CIPHER_BUSY); 1255 1256 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1257 sc->rxq.cur * RT2560_RX_DESC_SIZE, RT2560_RX_DESC_SIZE, 1258 BUS_DMASYNC_PREWRITE); 1259 1260 DPRINTFN(15, ("rx done idx=%u\n", sc->rxq.cur)); 1261 1262 sc->rxq.cur = (sc->rxq.cur + 1) % RT2560_RX_RING_COUNT; 1263 } 1264 1265 /* kick decrypt */ 1266 RAL_WRITE(sc, RT2560_SECCSR0, RT2560_KICK_DECRYPT); 1267} 1268 1269#ifndef IEEE80211_STA_ONLY 1270/* 1271 * This function is called in HostAP or IBSS modes when it's time to send a 1272 * new beacon (every ni_intval milliseconds). 1273 */ 1274void 1275rt2560_beacon_expire(struct rt2560_softc *sc) 1276{ 1277 struct ieee80211com *ic = &sc->sc_ic; 1278 struct rt2560_tx_data *data; 1279 1280 if (ic->ic_opmode != IEEE80211_M_IBSS && 1281 ic->ic_opmode != IEEE80211_M_HOSTAP) 1282 return; 1283 1284 data = &sc->bcnq.data[sc->bcnq.next]; 1285 1286 if (sc->sc_flags & RT2560_UPDATE_SLOT) { 1287 sc->sc_flags &= ~RT2560_UPDATE_SLOT; 1288 sc->sc_flags |= RT2560_SET_SLOTTIME; 1289 } else if (sc->sc_flags & RT2560_SET_SLOTTIME) { 1290 sc->sc_flags &= ~RT2560_SET_SLOTTIME; 1291 rt2560_set_slottime(sc); 1292 } 1293 1294 if (ic->ic_curmode == IEEE80211_MODE_11G) { 1295 /* update ERP Information Element */ 1296 *sc->erp = ic->ic_bss->ni_erp; 1297 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1298 data->map->dm_mapsize, BUS_DMASYNC_PREWRITE); 1299 } 1300 1301#if defined(RT2560_DEBUG) && NBPFILTER > 0 1302 if (ic->ic_rawbpf != NULL) 1303 bpf_mtap(ic->ic_rawbpf, data->m, BPF_DIRECTION_OUT); 1304#endif 1305 1306 DPRINTFN(15, ("beacon expired\n")); 1307} 1308#endif 1309 1310void 1311rt2560_wakeup_expire(struct rt2560_softc *sc) 1312{ 1313 DPRINTFN(15, ("wakeup expired\n")); 1314} 1315 1316int 1317rt2560_intr(void *arg) 1318{ 1319 struct rt2560_softc *sc = arg; 1320 struct ifnet *ifp = &sc->sc_ic.ic_if; 1321 uint32_t r; 1322 1323 if ((r = RAL_READ(sc, RT2560_CSR7)) == 0) 1324 return 0; /* not for us */ 1325 1326 /* disable interrupts */ 1327 RAL_WRITE(sc, RT2560_CSR8, 0xffffffff); 1328 1329 /* acknowledge interrupts */ 1330 RAL_WRITE(sc, RT2560_CSR7, r); 1331 1332 /* don't re-enable interrupts if we're shutting down */ 1333 if (!(ifp->if_flags & IFF_RUNNING)) 1334 return 0; 1335 1336#ifndef IEEE80211_STA_ONLY 1337 if (r & RT2560_BEACON_EXPIRE) 1338 rt2560_beacon_expire(sc); 1339#endif 1340 1341 if (r & RT2560_WAKEUP_EXPIRE) 1342 rt2560_wakeup_expire(sc); 1343 1344 if (r & RT2560_ENCRYPTION_DONE) 1345 rt2560_encryption_intr(sc); 1346 1347 if (r & RT2560_TX_DONE) 1348 rt2560_tx_intr(sc); 1349 1350 if (r & RT2560_PRIO_DONE) 1351 rt2560_prio_intr(sc); 1352 1353 if (r & RT2560_DECRYPTION_DONE) 1354 rt2560_decryption_intr(sc); 1355 1356 if (r & RT2560_RX_DONE) 1357 rt2560_rx_intr(sc); 1358 1359 /* re-enable interrupts */ 1360 RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK); 1361 1362 return 1; 1363} 1364 1365/* quickly determine if a given rate is CCK or OFDM */ 1366#define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22) 1367 1368#define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */ 1369#define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */ 1370 1371#define RAL_SIFS 10 /* us */ 1372 1373#define RT2560_RXTX_TURNAROUND 10 /* us */ 1374 1375/* 1376 * This function is only used by the Rx radiotap code. It returns the rate at 1377 * which a given frame was received. 1378 */ 1379#if NBPFILTER > 0 1380uint8_t 1381rt2560_rxrate(const struct rt2560_rx_desc *desc) 1382{ 1383 if (letoh32(desc->flags) & RT2560_RX_OFDM) { 1384 /* reverse function of rt2560_plcp_signal */ 1385 switch (desc->rate) { 1386 case 0xb: return 12; 1387 case 0xf: return 18; 1388 case 0xa: return 24; 1389 case 0xe: return 36; 1390 case 0x9: return 48; 1391 case 0xd: return 72; 1392 case 0x8: return 96; 1393 case 0xc: return 108; 1394 } 1395 } else { 1396 if (desc->rate == 10) 1397 return 2; 1398 if (desc->rate == 20) 1399 return 4; 1400 if (desc->rate == 55) 1401 return 11; 1402 if (desc->rate == 110) 1403 return 22; 1404 } 1405 return 2; /* should not get there */ 1406} 1407#endif 1408 1409/* 1410 * Return the expected ack rate for a frame transmitted at rate `rate'. 1411 */ 1412int 1413rt2560_ack_rate(struct ieee80211com *ic, int rate) 1414{ 1415 switch (rate) { 1416 /* CCK rates */ 1417 case 2: 1418 return 2; 1419 case 4: 1420 case 11: 1421 case 22: 1422 return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate; 1423 1424 /* OFDM rates */ 1425 case 12: 1426 case 18: 1427 return 12; 1428 case 24: 1429 case 36: 1430 return 24; 1431 case 48: 1432 case 72: 1433 case 96: 1434 case 108: 1435 return 48; 1436 } 1437 1438 /* default to 1Mbps */ 1439 return 2; 1440} 1441 1442/* 1443 * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'. 1444 * The function automatically determines the operating mode depending on the 1445 * given rate. `flags' indicates whether short preamble is in use or not. 1446 */ 1447uint16_t 1448rt2560_txtime(int len, int rate, uint32_t flags) 1449{ 1450 uint16_t txtime; 1451 1452 if (RAL_RATE_IS_OFDM(rate)) { 1453 /* IEEE Std 802.11g-2003, pp. 44 */ 1454 txtime = (8 + 4 * len + 3 + rate - 1) / rate; 1455 txtime = 16 + 4 + 4 * txtime + 6; 1456 } else { 1457 /* IEEE Std 802.11b-1999, pp. 28 */ 1458 txtime = (16 * len + rate - 1) / rate; 1459 if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE)) 1460 txtime += 72 + 24; 1461 else 1462 txtime += 144 + 48; 1463 } 1464 return txtime; 1465} 1466 1467uint8_t 1468rt2560_plcp_signal(int rate) 1469{ 1470 switch (rate) { 1471 /* CCK rates (returned values are device-dependent) */ 1472 case 2: return 0x0; 1473 case 4: return 0x1; 1474 case 11: return 0x2; 1475 case 22: return 0x3; 1476 1477 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1478 case 12: return 0xb; 1479 case 18: return 0xf; 1480 case 24: return 0xa; 1481 case 36: return 0xe; 1482 case 48: return 0x9; 1483 case 72: return 0xd; 1484 case 96: return 0x8; 1485 case 108: return 0xc; 1486 1487 /* unsupported rates (should not get there) */ 1488 default: return 0xff; 1489 } 1490} 1491 1492void 1493rt2560_setup_tx_desc(struct rt2560_softc *sc, struct rt2560_tx_desc *desc, 1494 uint32_t flags, int len, int rate, int encrypt, bus_addr_t physaddr) 1495{ 1496 struct ieee80211com *ic = &sc->sc_ic; 1497 uint16_t plcp_length; 1498 int remainder; 1499 1500 desc->flags = htole32(flags); 1501 desc->flags |= htole32(len << 16); 1502 desc->flags |= encrypt ? htole32(RT2560_TX_CIPHER_BUSY) : 1503 htole32(RT2560_TX_BUSY | RT2560_TX_VALID); 1504 1505 desc->physaddr = htole32(physaddr); 1506 desc->wme = htole16( 1507 RT2560_AIFSN(2) | 1508 RT2560_LOGCWMIN(3) | 1509 RT2560_LOGCWMAX(8)); 1510 1511 /* setup PLCP fields */ 1512 desc->plcp_signal = rt2560_plcp_signal(rate); 1513 desc->plcp_service = 4; 1514 1515 len += IEEE80211_CRC_LEN; 1516 if (RAL_RATE_IS_OFDM(rate)) { 1517 desc->flags |= htole32(RT2560_TX_OFDM); 1518 1519 plcp_length = len & 0xfff; 1520 desc->plcp_length_hi = plcp_length >> 6; 1521 desc->plcp_length_lo = plcp_length & 0x3f; 1522 } else { 1523 plcp_length = (16 * len + rate - 1) / rate; 1524 if (rate == 22) { 1525 remainder = (16 * len) % 22; 1526 if (remainder != 0 && remainder < 7) 1527 desc->plcp_service |= RT2560_PLCP_LENGEXT; 1528 } 1529 desc->plcp_length_hi = plcp_length >> 8; 1530 desc->plcp_length_lo = plcp_length & 0xff; 1531 1532 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1533 desc->plcp_signal |= 0x08; 1534 } 1535} 1536 1537#ifndef IEEE80211_STA_ONLY 1538int 1539rt2560_tx_bcn(struct rt2560_softc *sc, struct mbuf *m0, 1540 struct ieee80211_node *ni) 1541{ 1542 struct ieee80211com *ic = &sc->sc_ic; 1543 struct rt2560_tx_desc *desc; 1544 struct rt2560_tx_data *data; 1545 int rate = 2, error; 1546 1547 desc = &sc->bcnq.desc[sc->bcnq.cur]; 1548 data = &sc->bcnq.data[sc->bcnq.cur]; 1549 1550 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1551 BUS_DMA_NOWAIT); 1552 if (error != 0) { 1553 printf("%s: can't map mbuf (error %d)\n", 1554 sc->sc_dev.dv_xname, error); 1555 m_freem(m0); 1556 return error; 1557 } 1558 1559 data->m = m0; 1560 data->ni = ni; 1561 1562 rt2560_setup_tx_desc(sc, desc, RT2560_TX_IFS_NEWBACKOFF | 1563 RT2560_TX_TIMESTAMP, m0->m_pkthdr.len, rate, 0, 1564 data->map->dm_segs->ds_addr); 1565 1566 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 1567 BUS_DMASYNC_PREWRITE); 1568 bus_dmamap_sync(sc->sc_dmat, sc->bcnq.map, 1569 sc->bcnq.cur * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1570 BUS_DMASYNC_PREWRITE); 1571 1572 /* 1573 * Store pointer to ERP Information Element so that we can update it 1574 * dynamically when the slot time changes. 1575 * XXX: this is ugly since it depends on how net80211 builds beacon 1576 * frames but ieee80211_beacon_alloc() don't store offsets for us. 1577 */ 1578 if (ic->ic_curmode == IEEE80211_MODE_11G) { 1579 sc->erp = 1580 mtod(m0, uint8_t *) + 1581 sizeof (struct ieee80211_frame) + 1582 8 + 2 + 2 + 1583 ((ic->ic_flags & IEEE80211_F_HIDENWID) ? 1584 1 : 2 + ni->ni_esslen) + 1585 2 + min(ni->ni_rates.rs_nrates, IEEE80211_RATE_SIZE) + 1586 2 + 1 + 1587 ((ic->ic_opmode == IEEE80211_M_IBSS) ? 4 : 6) + 1588 2; 1589 } 1590 1591 return 0; 1592} 1593#endif 1594 1595int 1596rt2560_tx_mgt(struct rt2560_softc *sc, struct mbuf *m0, 1597 struct ieee80211_node *ni) 1598{ 1599 struct ieee80211com *ic = &sc->sc_ic; 1600 struct rt2560_tx_desc *desc; 1601 struct rt2560_tx_data *data; 1602 struct ieee80211_frame *wh; 1603 uint16_t dur; 1604 uint32_t flags = 0; 1605 int rate = 2, error; 1606 1607 desc = &sc->prioq.desc[sc->prioq.cur]; 1608 data = &sc->prioq.data[sc->prioq.cur]; 1609 1610 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1611 BUS_DMA_NOWAIT); 1612 if (error != 0) { 1613 printf("%s: can't map mbuf (error %d)\n", 1614 sc->sc_dev.dv_xname, error); 1615 m_freem(m0); 1616 return error; 1617 } 1618 1619#if NBPFILTER > 0 1620 if (sc->sc_drvbpf != NULL) { 1621 struct mbuf mb; 1622 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap; 1623 1624 tap->wt_flags = 0; 1625 tap->wt_rate = rate; 1626 tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 1627 tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags); 1628 tap->wt_antenna = sc->tx_ant; 1629 1630 mb.m_data = (caddr_t)tap; 1631 mb.m_len = sc->sc_txtap_len; 1632 mb.m_next = m0; 1633 mb.m_nextpkt = NULL; 1634 mb.m_type = 0; 1635 mb.m_flags = 0; 1636 bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_OUT); 1637 } 1638#endif 1639 1640 data->m = m0; 1641 data->ni = ni; 1642 1643 wh = mtod(m0, struct ieee80211_frame *); 1644 1645 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1646 flags |= RT2560_TX_NEED_ACK; 1647 1648 dur = rt2560_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) + 1649 RAL_SIFS; 1650 *(uint16_t *)wh->i_dur = htole16(dur); 1651 1652#ifndef IEEE80211_STA_ONLY 1653 /* tell hardware to set timestamp for probe responses */ 1654 if ((wh->i_fc[0] & 1655 (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) == 1656 (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP)) 1657 flags |= RT2560_TX_TIMESTAMP; 1658#endif 1659 } 1660 1661 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 0, 1662 data->map->dm_segs->ds_addr); 1663 1664 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 1665 BUS_DMASYNC_PREWRITE); 1666 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1667 sc->prioq.cur * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1668 BUS_DMASYNC_PREWRITE); 1669 1670 DPRINTFN(10, ("sending mgt frame len=%u idx=%u rate=%u\n", 1671 m0->m_pkthdr.len, sc->prioq.cur, rate)); 1672 1673 /* kick prio */ 1674 sc->prioq.queued++; 1675 sc->prioq.cur = (sc->prioq.cur + 1) % RT2560_PRIO_RING_COUNT; 1676 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_PRIO); 1677 1678 return 0; 1679} 1680 1681int 1682rt2560_tx_data(struct rt2560_softc *sc, struct mbuf *m0, 1683 struct ieee80211_node *ni) 1684{ 1685 struct ieee80211com *ic = &sc->sc_ic; 1686 struct rt2560_tx_ring *txq = &sc->txq; 1687 struct rt2560_tx_desc *desc; 1688 struct rt2560_tx_data *data; 1689 struct ieee80211_frame *wh; 1690 struct ieee80211_key *k; 1691 struct mbuf *m1; 1692 uint16_t dur; 1693 uint32_t flags = 0; 1694 int pktlen, rate, needcts = 0, needrts = 0, error; 1695 1696 wh = mtod(m0, struct ieee80211_frame *); 1697 1698 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 1699 k = ieee80211_get_txkey(ic, wh, ni); 1700 1701 if ((m0 = ieee80211_encrypt(ic, m0, k)) == NULL) 1702 return ENOBUFS; 1703 1704 /* packet header may have moved, reset our local pointer */ 1705 wh = mtod(m0, struct ieee80211_frame *); 1706 } 1707 1708 /* compute actual packet length (including CRC and crypto overhead) */ 1709 pktlen = m0->m_pkthdr.len + IEEE80211_CRC_LEN; 1710 1711 /* pickup a rate */ 1712 if (IEEE80211_IS_MULTICAST(wh->i_addr1) || 1713 ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 1714 IEEE80211_FC0_TYPE_MGT)) { 1715 /* mgmt/multicast frames are sent at the lowest avail. rate */ 1716 rate = ni->ni_rates.rs_rates[0]; 1717 } else if (ic->ic_fixed_rate != -1) { 1718 rate = ic->ic_sup_rates[ic->ic_curmode]. 1719 rs_rates[ic->ic_fixed_rate]; 1720 } else 1721 rate = ni->ni_rates.rs_rates[ni->ni_txrate]; 1722 if (rate == 0) 1723 rate = 2; /* XXX should not happen */ 1724 rate &= IEEE80211_RATE_VAL; 1725 1726 /* 1727 * Packet Bursting: backoff after ppb=8 frames to give other STAs a 1728 * chance to contend for the wireless medium. 1729 */ 1730 if (ic->ic_opmode == IEEE80211_M_STA && (ni->ni_txseq & 7)) 1731 flags |= RT2560_TX_IFS_SIFS; 1732 1733 /* check if RTS/CTS or CTS-to-self protection must be used */ 1734 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1735 /* multicast frames are not sent at OFDM rates in 802.11b/g */ 1736 if (pktlen > ic->ic_rtsthreshold) { 1737 needrts = 1; /* RTS/CTS based on frame length */ 1738 } else if ((ic->ic_flags & IEEE80211_F_USEPROT) && 1739 RAL_RATE_IS_OFDM(rate)) { 1740 if (ic->ic_protmode == IEEE80211_PROT_CTSONLY) 1741 needcts = 1; /* CTS-to-self */ 1742 else if (ic->ic_protmode == IEEE80211_PROT_RTSCTS) 1743 needrts = 1; /* RTS/CTS */ 1744 } 1745 } 1746 if (needrts || needcts) { 1747 struct mbuf *mprot; 1748 int protrate, ackrate; 1749 1750 protrate = 2; /* XXX */ 1751 ackrate = rt2560_ack_rate(ic, rate); 1752 1753 dur = rt2560_txtime(pktlen, rate, ic->ic_flags) + 1754 rt2560_txtime(RAL_ACK_SIZE, ackrate, ic->ic_flags) + 1755 2 * RAL_SIFS; 1756 if (needrts) { 1757 dur += rt2560_txtime(RAL_CTS_SIZE, rt2560_ack_rate(ic, 1758 protrate), ic->ic_flags) + RAL_SIFS; 1759 mprot = ieee80211_get_rts(ic, wh, dur); 1760 } else { 1761 mprot = ieee80211_get_cts_to_self(ic, dur); 1762 } 1763 if (mprot == NULL) { 1764 printf("%s: could not allocate protection frame\n", 1765 sc->sc_dev.dv_xname); 1766 m_freem(m0); 1767 return ENOBUFS; 1768 } 1769 1770 desc = &txq->desc[txq->cur_encrypt]; 1771 data = &txq->data[txq->cur_encrypt]; 1772 1773 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, mprot, 1774 BUS_DMA_NOWAIT); 1775 if (error != 0) { 1776 printf("%s: can't map mbuf (error %d)\n", 1777 sc->sc_dev.dv_xname, error); 1778 m_freem(mprot); 1779 m_freem(m0); 1780 return error; 1781 } 1782 1783 data->m = mprot; 1784 /* avoid multiple free() of the same node for each fragment */ 1785 data->ni = ieee80211_ref_node(ni); 1786 1787 /* XXX may want to pass the protection frame to BPF */ 1788 1789 rt2560_setup_tx_desc(sc, desc, 1790 (needrts ? RT2560_TX_NEED_ACK : 0) | RT2560_TX_MORE_FRAG, 1791 mprot->m_pkthdr.len, protrate, 1, 1792 data->map->dm_segs->ds_addr); 1793 1794 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1795 data->map->dm_mapsize, BUS_DMASYNC_PREWRITE); 1796 bus_dmamap_sync(sc->sc_dmat, txq->map, 1797 txq->cur_encrypt * RT2560_TX_DESC_SIZE, 1798 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 1799 1800 txq->queued++; 1801 if (++txq->cur_encrypt >= txq->count) 1802 txq->cur_encrypt = 0; 1803 1804 flags |= RT2560_TX_LONG_RETRY | RT2560_TX_IFS_SIFS; 1805 } 1806 1807 data = &txq->data[txq->cur_encrypt]; 1808 desc = &txq->desc[txq->cur_encrypt]; 1809 1810 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1811 BUS_DMA_NOWAIT); 1812 if (error != 0 && error != EFBIG) { 1813 printf("%s: can't map mbuf (error %d)\n", 1814 sc->sc_dev.dv_xname, error); 1815 m_freem(m0); 1816 return error; 1817 } 1818 if (error != 0) { 1819 /* too many fragments, linearize */ 1820 MGETHDR(m1, M_DONTWAIT, MT_DATA); 1821 if (m1 == NULL) { 1822 m_freem(m0); 1823 return ENOBUFS; 1824 } 1825 if (m0->m_pkthdr.len > MHLEN) { 1826 MCLGET(m1, M_DONTWAIT); 1827 if (!(m1->m_flags & M_EXT)) { 1828 m_freem(m0); 1829 m_freem(m1); 1830 return ENOBUFS; 1831 } 1832 } 1833 m_copydata(m0, 0, m0->m_pkthdr.len, mtod(m1, caddr_t)); 1834 m1->m_pkthdr.len = m1->m_len = m0->m_pkthdr.len; 1835 m_freem(m0); 1836 m0 = m1; 1837 1838 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1839 BUS_DMA_NOWAIT); 1840 if (error != 0) { 1841 printf("%s: can't map mbuf (error %d)\n", 1842 sc->sc_dev.dv_xname, error); 1843 m_freem(m0); 1844 return error; 1845 } 1846 1847 /* packet header have moved, reset our local pointer */ 1848 wh = mtod(m0, struct ieee80211_frame *); 1849 } 1850 1851#if NBPFILTER > 0 1852 if (sc->sc_drvbpf != NULL) { 1853 struct mbuf mb; 1854 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap; 1855 1856 tap->wt_flags = 0; 1857 tap->wt_rate = rate; 1858 tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 1859 tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags); 1860 tap->wt_antenna = sc->tx_ant; 1861 1862 mb.m_data = (caddr_t)tap; 1863 mb.m_len = sc->sc_txtap_len; 1864 mb.m_next = m0; 1865 mb.m_nextpkt = NULL; 1866 mb.m_type = 0; 1867 mb.m_flags = 0; 1868 bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_OUT); 1869 } 1870#endif 1871 1872 data->m = m0; 1873 data->ni = ni; 1874 1875 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1876 flags |= RT2560_TX_NEED_ACK; 1877 1878 dur = rt2560_txtime(RAL_ACK_SIZE, rt2560_ack_rate(ic, rate), 1879 ic->ic_flags) + RAL_SIFS; 1880 *(uint16_t *)wh->i_dur = htole16(dur); 1881 } 1882 1883 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 1, 1884 data->map->dm_segs->ds_addr); 1885 1886 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 1887 BUS_DMASYNC_PREWRITE); 1888 bus_dmamap_sync(sc->sc_dmat, txq->map, 1889 txq->cur_encrypt * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1890 BUS_DMASYNC_PREWRITE); 1891 1892 DPRINTFN(10, ("sending frame len=%u idx=%u rate=%u\n", 1893 m0->m_pkthdr.len, txq->cur_encrypt, rate)); 1894 1895 /* kick encrypt */ 1896 txq->queued++; 1897 if (++txq->cur_encrypt >= txq->count) 1898 txq->cur_encrypt = 0; 1899 RAL_WRITE(sc, RT2560_SECCSR1, RT2560_KICK_ENCRYPT); 1900 1901 return 0; 1902} 1903 1904void 1905rt2560_start(struct ifnet *ifp) 1906{ 1907 struct rt2560_softc *sc = ifp->if_softc; 1908 struct ieee80211com *ic = &sc->sc_ic; 1909 struct mbuf *m0; 1910 struct ieee80211_node *ni; 1911 1912 /* 1913 * net80211 may still try to send management frames even if the 1914 * IFF_RUNNING flag is not set... 1915 */ 1916 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 1917 return; 1918 1919 for (;;) { 1920 IF_POLL(&ic->ic_mgtq, m0); 1921 if (m0 != NULL) { 1922 if (sc->prioq.queued >= RT2560_PRIO_RING_COUNT) { 1923 ifp->if_flags |= IFF_OACTIVE; 1924 break; 1925 } 1926 IF_DEQUEUE(&ic->ic_mgtq, m0); 1927 1928 ni = (struct ieee80211_node *)m0->m_pkthdr.rcvif; 1929 m0->m_pkthdr.rcvif = NULL; 1930#if NBPFILTER > 0 1931 if (ic->ic_rawbpf != NULL) 1932 bpf_mtap(ic->ic_rawbpf, m0, BPF_DIRECTION_OUT); 1933#endif 1934 if (rt2560_tx_mgt(sc, m0, ni) != 0) 1935 break; 1936 1937 } else { 1938 if (ic->ic_state != IEEE80211_S_RUN) 1939 break; 1940 IFQ_POLL(&ifp->if_snd, m0); 1941 if (m0 == NULL) 1942 break; 1943 if (sc->txq.queued >= RT2560_TX_RING_COUNT - 1) { 1944 ifp->if_flags |= IFF_OACTIVE; 1945 break; 1946 } 1947 IFQ_DEQUEUE(&ifp->if_snd, m0); 1948#if NBPFILTER > 0 1949 if (ifp->if_bpf != NULL) 1950 bpf_mtap(ifp->if_bpf, m0, BPF_DIRECTION_OUT); 1951#endif 1952 m0 = ieee80211_encap(ifp, m0, &ni); 1953 if (m0 == NULL) 1954 continue; 1955#if NBPFILTER > 0 1956 if (ic->ic_rawbpf != NULL) 1957 bpf_mtap(ic->ic_rawbpf, m0, BPF_DIRECTION_OUT); 1958#endif 1959 if (rt2560_tx_data(sc, m0, ni) != 0) { 1960 if (ni != NULL) 1961 ieee80211_release_node(ic, ni); 1962 ifp->if_oerrors++; 1963 break; 1964 } 1965 } 1966 1967 sc->sc_tx_timer = 5; 1968 ifp->if_timer = 1; 1969 } 1970} 1971 1972void 1973rt2560_watchdog(struct ifnet *ifp) 1974{ 1975 struct rt2560_softc *sc = ifp->if_softc; 1976 1977 ifp->if_timer = 0; 1978 1979 if (sc->sc_tx_timer > 0) { 1980 if (--sc->sc_tx_timer == 0) { 1981 printf("%s: device timeout\n", sc->sc_dev.dv_xname); 1982 rt2560_init(ifp); 1983 ifp->if_oerrors++; 1984 return; 1985 } 1986 ifp->if_timer = 1; 1987 } 1988 1989 ieee80211_watchdog(ifp); 1990} 1991 1992int 1993rt2560_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1994{ 1995 struct rt2560_softc *sc = ifp->if_softc; 1996 struct ieee80211com *ic = &sc->sc_ic; 1997 struct ifaddr *ifa; 1998 struct ifreq *ifr; 1999 int s, error = 0; 2000 2001 s = splnet(); 2002 2003 switch (cmd) { 2004 case SIOCSIFADDR: 2005 ifa = (struct ifaddr *)data; 2006 ifp->if_flags |= IFF_UP; 2007#ifdef INET 2008 if (ifa->ifa_addr->sa_family == AF_INET) 2009 arp_ifinit(&ic->ic_ac, ifa); 2010#endif 2011 /* FALLTHROUGH */ 2012 case SIOCSIFFLAGS: 2013 if (ifp->if_flags & IFF_UP) { 2014 if (ifp->if_flags & IFF_RUNNING) 2015 rt2560_update_promisc(sc); 2016 else 2017 rt2560_init(ifp); 2018 } else { 2019 if (ifp->if_flags & IFF_RUNNING) 2020 rt2560_stop(ifp, 1); 2021 } 2022 break; 2023 2024 case SIOCADDMULTI: 2025 case SIOCDELMULTI: 2026 ifr = (struct ifreq *)data; 2027 error = (cmd == SIOCADDMULTI) ? 2028 ether_addmulti(ifr, &ic->ic_ac) : 2029 ether_delmulti(ifr, &ic->ic_ac); 2030 2031 if (error == ENETRESET) 2032 error = 0; 2033 break; 2034 2035 case SIOCS80211CHANNEL: 2036 /* 2037 * This allows for fast channel switching in monitor mode 2038 * (used by kismet). In IBSS mode, we must explicitly reset 2039 * the interface to generate a new beacon frame. 2040 */ 2041 error = ieee80211_ioctl(ifp, cmd, data); 2042 if (error == ENETRESET && 2043 ic->ic_opmode == IEEE80211_M_MONITOR) { 2044 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 2045 (IFF_UP | IFF_RUNNING)) 2046 rt2560_set_chan(sc, ic->ic_ibss_chan); 2047 error = 0; 2048 } 2049 break; 2050 2051 default: 2052 error = ieee80211_ioctl(ifp, cmd, data); 2053 } 2054 2055 if (error == ENETRESET) { 2056 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 2057 (IFF_UP | IFF_RUNNING)) 2058 rt2560_init(ifp); 2059 error = 0; 2060 } 2061 2062 splx(s); 2063 2064 return error; 2065} 2066 2067void 2068rt2560_bbp_write(struct rt2560_softc *sc, uint8_t reg, uint8_t val) 2069{ 2070 uint32_t tmp; 2071 int ntries; 2072 2073 for (ntries = 0; ntries < 100; ntries++) { 2074 if (!(RAL_READ(sc, RT2560_BBPCSR) & RT2560_BBP_BUSY)) 2075 break; 2076 DELAY(1); 2077 } 2078 if (ntries == 100) { 2079 printf("%s: could not write to BBP\n", sc->sc_dev.dv_xname); 2080 return; 2081 } 2082 2083 tmp = RT2560_BBP_WRITE | RT2560_BBP_BUSY | reg << 8 | val; 2084 RAL_WRITE(sc, RT2560_BBPCSR, tmp); 2085 2086 DPRINTFN(15, ("BBP R%u <- 0x%02x\n", reg, val)); 2087} 2088 2089uint8_t 2090rt2560_bbp_read(struct rt2560_softc *sc, uint8_t reg) 2091{ 2092 uint32_t val; 2093 int ntries; 2094 2095 val = RT2560_BBP_BUSY | reg << 8; 2096 RAL_WRITE(sc, RT2560_BBPCSR, val); 2097 2098 for (ntries = 0; ntries < 100; ntries++) { 2099 val = RAL_READ(sc, RT2560_BBPCSR); 2100 if (!(val & RT2560_BBP_BUSY)) 2101 return val & 0xff; 2102 DELAY(1); 2103 } 2104 2105 printf("%s: could not read from BBP\n", sc->sc_dev.dv_xname); 2106 return 0; 2107} 2108 2109void 2110rt2560_rf_write(struct rt2560_softc *sc, uint8_t reg, uint32_t val) 2111{ 2112 uint32_t tmp; 2113 int ntries; 2114 2115 for (ntries = 0; ntries < 100; ntries++) { 2116 if (!(RAL_READ(sc, RT2560_RFCSR) & RT2560_RF_BUSY)) 2117 break; 2118 DELAY(1); 2119 } 2120 if (ntries == 100) { 2121 printf("%s: could not write to RF\n", sc->sc_dev.dv_xname); 2122 return; 2123 } 2124 2125 tmp = RT2560_RF_BUSY | RT2560_RF_20BIT | (val & 0xfffff) << 2 | 2126 (reg & 0x3); 2127 RAL_WRITE(sc, RT2560_RFCSR, tmp); 2128 2129 /* remember last written value in sc */ 2130 sc->rf_regs[reg] = val; 2131 2132 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff)); 2133} 2134 2135void 2136rt2560_set_chan(struct rt2560_softc *sc, struct ieee80211_channel *c) 2137{ 2138 struct ieee80211com *ic = &sc->sc_ic; 2139 uint8_t power, tmp; 2140 u_int chan; 2141 2142 chan = ieee80211_chan2ieee(ic, c); 2143 if (chan == 0 || chan == IEEE80211_CHAN_ANY) 2144 return; 2145 2146 power = min(sc->txpow[chan - 1], 31); 2147 2148 DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power)); 2149 2150 switch (sc->rf_rev) { 2151 case RT2560_RF_2522: 2152 rt2560_rf_write(sc, RT2560_RF1, 0x00814); 2153 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2522_r2[chan - 1]); 2154 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040); 2155 break; 2156 2157 case RT2560_RF_2523: 2158 rt2560_rf_write(sc, RT2560_RF1, 0x08804); 2159 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2523_r2[chan - 1]); 2160 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x38044); 2161 rt2560_rf_write(sc, RT2560_RF4, 2162 (chan == 14) ? 0x00280 : 0x00286); 2163 break; 2164 2165 case RT2560_RF_2524: 2166 rt2560_rf_write(sc, RT2560_RF1, 0x0c808); 2167 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2524_r2[chan - 1]); 2168 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040); 2169 rt2560_rf_write(sc, RT2560_RF4, 2170 (chan == 14) ? 0x00280 : 0x00286); 2171 break; 2172 2173 case RT2560_RF_2525: 2174 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2175 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525_hi_r2[chan - 1]); 2176 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2177 rt2560_rf_write(sc, RT2560_RF4, 2178 (chan == 14) ? 0x00280 : 0x00286); 2179 2180 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2181 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525_r2[chan - 1]); 2182 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2183 rt2560_rf_write(sc, RT2560_RF4, 2184 (chan == 14) ? 0x00280 : 0x00286); 2185 break; 2186 2187 case RT2560_RF_2525E: 2188 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2189 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525e_r2[chan - 1]); 2190 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2191 rt2560_rf_write(sc, RT2560_RF4, 2192 (chan == 14) ? 0x00286 : 0x00282); 2193 break; 2194 2195 case RT2560_RF_2526: 2196 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2526_hi_r2[chan - 1]); 2197 rt2560_rf_write(sc, RT2560_RF4, 2198 (chan & 1) ? 0x00386 : 0x00381); 2199 rt2560_rf_write(sc, RT2560_RF1, 0x08804); 2200 2201 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2526_r2[chan - 1]); 2202 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2203 rt2560_rf_write(sc, RT2560_RF4, 2204 (chan & 1) ? 0x00386 : 0x00381); 2205 break; 2206 } 2207 2208 if (ic->ic_opmode != IEEE80211_M_MONITOR && 2209 ic->ic_state != IEEE80211_S_SCAN) { 2210 /* set Japan filter bit for channel 14 */ 2211 tmp = rt2560_bbp_read(sc, 70); 2212 2213 tmp &= ~RT2560_JAPAN_FILTER; 2214 if (chan == 14) 2215 tmp |= RT2560_JAPAN_FILTER; 2216 2217 rt2560_bbp_write(sc, 70, tmp); 2218 2219 DELAY(1000); /* RF needs a 1ms delay here */ 2220 rt2560_disable_rf_tune(sc); 2221 2222 /* clear CRC errors */ 2223 RAL_READ(sc, RT2560_CNT0); 2224 } 2225} 2226 2227/* 2228 * Disable RF auto-tuning. 2229 */ 2230void 2231rt2560_disable_rf_tune(struct rt2560_softc *sc) 2232{ 2233 uint32_t tmp; 2234 2235 if (sc->rf_rev != RT2560_RF_2523) { 2236 tmp = sc->rf_regs[RT2560_RF1] & ~RT2560_RF1_AUTOTUNE; 2237 rt2560_rf_write(sc, RT2560_RF1, tmp); 2238 } 2239 2240 tmp = sc->rf_regs[RT2560_RF3] & ~RT2560_RF3_AUTOTUNE; 2241 rt2560_rf_write(sc, RT2560_RF3, tmp); 2242 2243 DPRINTFN(2, ("disabling RF autotune\n")); 2244} 2245 2246/* 2247 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF 2248 * synchronization. 2249 */ 2250void 2251rt2560_enable_tsf_sync(struct rt2560_softc *sc) 2252{ 2253 struct ieee80211com *ic = &sc->sc_ic; 2254 uint16_t logcwmin, preload; 2255 uint32_t tmp; 2256 2257 /* first, disable TSF synchronization */ 2258 RAL_WRITE(sc, RT2560_CSR14, 0); 2259 2260 tmp = 16 * ic->ic_bss->ni_intval; 2261 RAL_WRITE(sc, RT2560_CSR12, tmp); 2262 2263 RAL_WRITE(sc, RT2560_CSR13, 0); 2264 2265 logcwmin = 5; 2266 preload = (ic->ic_opmode == IEEE80211_M_STA) ? 384 : 1024; 2267 tmp = logcwmin << 16 | preload; 2268 RAL_WRITE(sc, RT2560_BCNOCSR, tmp); 2269 2270 /* finally, enable TSF synchronization */ 2271 tmp = RT2560_ENABLE_TSF | RT2560_ENABLE_TBCN; 2272 if (ic->ic_opmode == IEEE80211_M_STA) 2273 tmp |= RT2560_ENABLE_TSF_SYNC(1); 2274#ifndef IEEE80211_STA_ONLY 2275 else 2276 tmp |= RT2560_ENABLE_TSF_SYNC(2) | 2277 RT2560_ENABLE_BEACON_GENERATOR; 2278#endif 2279 RAL_WRITE(sc, RT2560_CSR14, tmp); 2280 2281 DPRINTF(("enabling TSF synchronization\n")); 2282} 2283 2284void 2285rt2560_update_plcp(struct rt2560_softc *sc) 2286{ 2287 struct ieee80211com *ic = &sc->sc_ic; 2288 2289 /* no short preamble for 1Mbps */ 2290 RAL_WRITE(sc, RT2560_PLCP1MCSR, 0x00700400); 2291 2292 if (!(ic->ic_flags & IEEE80211_F_SHPREAMBLE)) { 2293 /* values taken from the reference driver */ 2294 RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380401); 2295 RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x00150402); 2296 RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b8403); 2297 } else { 2298 /* same values as above or'ed 0x8 */ 2299 RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380409); 2300 RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x0015040a); 2301 RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b840b); 2302 } 2303 2304 DPRINTF(("updating PLCP for %s preamble\n", 2305 (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ? "short" : "long")); 2306} 2307 2308void 2309rt2560_updateslot(struct ieee80211com *ic) 2310{ 2311 struct rt2560_softc *sc = ic->ic_if.if_softc; 2312 2313#ifndef IEEE80211_STA_ONLY 2314 if (ic->ic_opmode == IEEE80211_M_HOSTAP) { 2315 /* 2316 * In HostAP mode, we defer setting of new slot time until 2317 * updated ERP Information Element has propagated to all 2318 * associated STAs. 2319 */ 2320 sc->sc_flags |= RT2560_UPDATE_SLOT; 2321 } else 2322#endif 2323 rt2560_set_slottime(sc); 2324} 2325 2326/* 2327 * IEEE 802.11a (and possibly 802.11g) use short slot time. Refer to 2328 * IEEE Std 802.11-1999 pp. 85 to know how these values are computed. 2329 */ 2330void 2331rt2560_set_slottime(struct rt2560_softc *sc) 2332{ 2333 struct ieee80211com *ic = &sc->sc_ic; 2334 uint8_t slottime; 2335 uint16_t sifs, pifs, difs, eifs; 2336 uint32_t tmp; 2337 2338 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 2339 2340 /* define the MAC slot boundaries */ 2341 sifs = RAL_SIFS - RT2560_RXTX_TURNAROUND; 2342 pifs = sifs + slottime; 2343 difs = sifs + 2 * slottime; 2344 eifs = (ic->ic_curmode == IEEE80211_MODE_11B) ? 364 : 60; 2345 2346 tmp = RAL_READ(sc, RT2560_CSR11); 2347 tmp = (tmp & ~0x1f00) | slottime << 8; 2348 RAL_WRITE(sc, RT2560_CSR11, tmp); 2349 2350 tmp = pifs << 16 | sifs; 2351 RAL_WRITE(sc, RT2560_CSR18, tmp); 2352 2353 tmp = eifs << 16 | difs; 2354 RAL_WRITE(sc, RT2560_CSR19, tmp); 2355 2356 DPRINTF(("setting slottime to %uus\n", slottime)); 2357} 2358 2359void 2360rt2560_set_basicrates(struct rt2560_softc *sc) 2361{ 2362 struct ieee80211com *ic = &sc->sc_ic; 2363 2364 /* update basic rate set */ 2365 if (ic->ic_curmode == IEEE80211_MODE_11B) { 2366 /* 11b basic rates: 1, 2Mbps */ 2367 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x3); 2368 } else { 2369 /* 11b/g basic rates: 1, 2, 5.5, 11Mbps */ 2370 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0xf); 2371 } 2372} 2373 2374void 2375rt2560_update_led(struct rt2560_softc *sc, int led1, int led2) 2376{ 2377 uint32_t tmp; 2378 2379 /* set ON period to 70ms and OFF period to 30ms */ 2380 tmp = led1 << 16 | led2 << 17 | 70 << 8 | 30; 2381 RAL_WRITE(sc, RT2560_LEDCSR, tmp); 2382} 2383 2384void 2385rt2560_set_bssid(struct rt2560_softc *sc, uint8_t *bssid) 2386{ 2387 uint32_t tmp; 2388 2389 tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24; 2390 RAL_WRITE(sc, RT2560_CSR5, tmp); 2391 2392 tmp = bssid[4] | bssid[5] << 8; 2393 RAL_WRITE(sc, RT2560_CSR6, tmp); 2394 2395 DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid))); 2396} 2397 2398void 2399rt2560_set_macaddr(struct rt2560_softc *sc, uint8_t *addr) 2400{ 2401 uint32_t tmp; 2402 2403 tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24; 2404 RAL_WRITE(sc, RT2560_CSR3, tmp); 2405 2406 tmp = addr[4] | addr[5] << 8; 2407 RAL_WRITE(sc, RT2560_CSR4, tmp); 2408 2409 DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr))); 2410} 2411 2412void 2413rt2560_get_macaddr(struct rt2560_softc *sc, uint8_t *addr) 2414{ 2415 uint32_t tmp; 2416 2417 tmp = RAL_READ(sc, RT2560_CSR3); 2418 addr[0] = tmp & 0xff; 2419 addr[1] = (tmp >> 8) & 0xff; 2420 addr[2] = (tmp >> 16) & 0xff; 2421 addr[3] = (tmp >> 24); 2422 2423 tmp = RAL_READ(sc, RT2560_CSR4); 2424 addr[4] = tmp & 0xff; 2425 addr[5] = (tmp >> 8) & 0xff; 2426} 2427 2428void 2429rt2560_update_promisc(struct rt2560_softc *sc) 2430{ 2431 struct ifnet *ifp = &sc->sc_ic.ic_if; 2432 uint32_t tmp; 2433 2434 tmp = RAL_READ(sc, RT2560_RXCSR0); 2435 2436 tmp &= ~RT2560_DROP_NOT_TO_ME; 2437 if (!(ifp->if_flags & IFF_PROMISC)) 2438 tmp |= RT2560_DROP_NOT_TO_ME; 2439 2440 RAL_WRITE(sc, RT2560_RXCSR0, tmp); 2441 2442 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? 2443 "entering" : "leaving")); 2444} 2445 2446void 2447rt2560_set_txantenna(struct rt2560_softc *sc, int antenna) 2448{ 2449 uint32_t tmp; 2450 uint8_t tx; 2451 2452 tx = rt2560_bbp_read(sc, RT2560_BBP_TX) & ~RT2560_BBP_ANTMASK; 2453 if (antenna == 1) 2454 tx |= RT2560_BBP_ANTA; 2455 else if (antenna == 2) 2456 tx |= RT2560_BBP_ANTB; 2457 else 2458 tx |= RT2560_BBP_DIVERSITY; 2459 2460 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */ 2461 if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526 || 2462 sc->rf_rev == RT2560_RF_5222) 2463 tx |= RT2560_BBP_FLIPIQ; 2464 2465 rt2560_bbp_write(sc, RT2560_BBP_TX, tx); 2466 2467 /* update values for CCK and OFDM in BBPCSR1 */ 2468 tmp = RAL_READ(sc, RT2560_BBPCSR1) & ~0x00070007; 2469 tmp |= (tx & 0x7) << 16 | (tx & 0x7); 2470 RAL_WRITE(sc, RT2560_BBPCSR1, tmp); 2471} 2472 2473void 2474rt2560_set_rxantenna(struct rt2560_softc *sc, int antenna) 2475{ 2476 uint8_t rx; 2477 2478 rx = rt2560_bbp_read(sc, RT2560_BBP_RX) & ~RT2560_BBP_ANTMASK; 2479 if (antenna == 1) 2480 rx |= RT2560_BBP_ANTA; 2481 else if (antenna == 2) 2482 rx |= RT2560_BBP_ANTB; 2483 else 2484 rx |= RT2560_BBP_DIVERSITY; 2485 2486 /* need to force no I/Q flip for RF 2525e and 2526 */ 2487 if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526) 2488 rx &= ~RT2560_BBP_FLIPIQ; 2489 2490 rt2560_bbp_write(sc, RT2560_BBP_RX, rx); 2491} 2492 2493const char * 2494rt2560_get_rf(int rev) 2495{ 2496 switch (rev) { 2497 case RT2560_RF_2522: return "RT2522"; 2498 case RT2560_RF_2523: return "RT2523"; 2499 case RT2560_RF_2524: return "RT2524"; 2500 case RT2560_RF_2525: return "RT2525"; 2501 case RT2560_RF_2525E: return "RT2525e"; 2502 case RT2560_RF_2526: return "RT2526"; 2503 case RT2560_RF_5222: return "RT5222"; 2504 default: return "unknown"; 2505 } 2506} 2507 2508void 2509rt2560_read_eeprom(struct rt2560_softc *sc) 2510{ 2511 uint16_t val; 2512 int i; 2513 2514 val = rt2560_eeprom_read(sc, RT2560_EEPROM_CONFIG0); 2515 sc->rf_rev = (val >> 11) & 0x1f; 2516 sc->hw_radio = (val >> 10) & 0x1; 2517 sc->led_mode = (val >> 6) & 0x7; 2518 sc->rx_ant = (val >> 4) & 0x3; 2519 sc->tx_ant = (val >> 2) & 0x3; 2520 sc->nb_ant = val & 0x3; 2521 2522 /* read default values for BBP registers */ 2523 for (i = 0; i < 16; i++) { 2524 val = rt2560_eeprom_read(sc, RT2560_EEPROM_BBP_BASE + i); 2525 sc->bbp_prom[i].reg = val >> 8; 2526 sc->bbp_prom[i].val = val & 0xff; 2527 } 2528 2529 /* read Tx power for all b/g channels */ 2530 for (i = 0; i < 14 / 2; i++) { 2531 val = rt2560_eeprom_read(sc, RT2560_EEPROM_TXPOWER + i); 2532 sc->txpow[i * 2] = val >> 8; 2533 sc->txpow[i * 2 + 1] = val & 0xff; 2534 } 2535} 2536 2537int 2538rt2560_bbp_init(struct rt2560_softc *sc) 2539{ 2540 int i, ntries; 2541 2542 /* wait for BBP to be ready */ 2543 for (ntries = 0; ntries < 100; ntries++) { 2544 if (rt2560_bbp_read(sc, RT2560_BBP_VERSION) != 0) 2545 break; 2546 DELAY(1); 2547 } 2548 if (ntries == 100) { 2549 printf("%s: timeout waiting for BBP\n", sc->sc_dev.dv_xname); 2550 return EIO; 2551 } 2552 2553 /* initialize BBP registers to default values */ 2554 for (i = 0; i < nitems(rt2560_def_bbp); i++) { 2555 rt2560_bbp_write(sc, rt2560_def_bbp[i].reg, 2556 rt2560_def_bbp[i].val); 2557 } 2558#if 0 2559 /* initialize BBP registers to values stored in EEPROM */ 2560 for (i = 0; i < 16; i++) { 2561 if (sc->bbp_prom[i].reg == 0xff) 2562 continue; 2563 rt2560_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 2564 } 2565#endif 2566 2567 return 0; 2568} 2569 2570int 2571rt2560_init(struct ifnet *ifp) 2572{ 2573 struct rt2560_softc *sc = ifp->if_softc; 2574 struct ieee80211com *ic = &sc->sc_ic; 2575 uint32_t tmp; 2576 int i; 2577 2578 /* for CardBus, power on the socket */ 2579 if (!(sc->sc_flags & RT2560_ENABLED)) { 2580 if (sc->sc_enable != NULL && (*sc->sc_enable)(sc) != 0) { 2581 printf("%s: could not enable device\n", 2582 sc->sc_dev.dv_xname); 2583 return EIO; 2584 } 2585 sc->sc_flags |= RT2560_ENABLED; 2586 } 2587 2588 rt2560_stop(ifp, 0); 2589 2590 /* setup tx rings */ 2591 tmp = RT2560_PRIO_RING_COUNT << 24 | 2592 RT2560_ATIM_RING_COUNT << 16 | 2593 RT2560_TX_RING_COUNT << 8 | 2594 RT2560_TX_DESC_SIZE; 2595 2596 /* rings _must_ be initialized in this _exact_ order! */ 2597 RAL_WRITE(sc, RT2560_TXCSR2, tmp); 2598 RAL_WRITE(sc, RT2560_TXCSR3, sc->txq.physaddr); 2599 RAL_WRITE(sc, RT2560_TXCSR5, sc->prioq.physaddr); 2600 RAL_WRITE(sc, RT2560_TXCSR4, sc->atimq.physaddr); 2601 RAL_WRITE(sc, RT2560_TXCSR6, sc->bcnq.physaddr); 2602 2603 /* setup rx ring */ 2604 tmp = RT2560_RX_RING_COUNT << 8 | RT2560_RX_DESC_SIZE; 2605 2606 RAL_WRITE(sc, RT2560_RXCSR1, tmp); 2607 RAL_WRITE(sc, RT2560_RXCSR2, sc->rxq.physaddr); 2608 2609 /* initialize MAC registers to default values */ 2610 for (i = 0; i < nitems(rt2560_def_mac); i++) 2611 RAL_WRITE(sc, rt2560_def_mac[i].reg, rt2560_def_mac[i].val); 2612 2613 IEEE80211_ADDR_COPY(ic->ic_myaddr, LLADDR(ifp->if_sadl)); 2614 rt2560_set_macaddr(sc, ic->ic_myaddr); 2615 2616 /* set basic rate set (will be updated later) */ 2617 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x153); 2618 2619 rt2560_set_txantenna(sc, 1); 2620 rt2560_set_rxantenna(sc, 1); 2621 rt2560_set_slottime(sc); 2622 rt2560_update_plcp(sc); 2623 rt2560_update_led(sc, 0, 0); 2624 2625 RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC); 2626 RAL_WRITE(sc, RT2560_CSR1, RT2560_HOST_READY); 2627 2628 if (rt2560_bbp_init(sc) != 0) { 2629 rt2560_stop(ifp, 1); 2630 return EIO; 2631 } 2632 2633 /* set default BSS channel */ 2634 ic->ic_bss->ni_chan = ic->ic_ibss_chan; 2635 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 2636 2637 /* kick Rx */ 2638 tmp = RT2560_DROP_PHY_ERROR | RT2560_DROP_CRC_ERROR; 2639 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2640 tmp |= RT2560_DROP_CTL | RT2560_DROP_VERSION_ERROR; 2641#ifndef IEEE80211_STA_ONLY 2642 if (ic->ic_opmode != IEEE80211_M_HOSTAP) 2643#endif 2644 tmp |= RT2560_DROP_TODS; 2645 if (!(ifp->if_flags & IFF_PROMISC)) 2646 tmp |= RT2560_DROP_NOT_TO_ME; 2647 } 2648 RAL_WRITE(sc, RT2560_RXCSR0, tmp); 2649 2650 /* clear old FCS and Rx FIFO errors */ 2651 RAL_READ(sc, RT2560_CNT0); 2652 RAL_READ(sc, RT2560_CNT4); 2653 2654 /* clear any pending interrupts */ 2655 RAL_WRITE(sc, RT2560_CSR7, 0xffffffff); 2656 2657 /* enable interrupts */ 2658 RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK); 2659 2660 ifp->if_flags &= ~IFF_OACTIVE; 2661 ifp->if_flags |= IFF_RUNNING; 2662 2663 if (ic->ic_opmode == IEEE80211_M_MONITOR) 2664 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 2665 else 2666 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 2667 2668 return 0; 2669} 2670 2671void 2672rt2560_stop(struct ifnet *ifp, int disable) 2673{ 2674 struct rt2560_softc *sc = ifp->if_softc; 2675 struct ieee80211com *ic = &sc->sc_ic; 2676 2677 sc->sc_tx_timer = 0; 2678 ifp->if_timer = 0; 2679 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 2680 2681 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); /* free all nodes */ 2682 2683 /* abort Tx */ 2684 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_ABORT_TX); 2685 2686 /* disable Rx */ 2687 RAL_WRITE(sc, RT2560_RXCSR0, RT2560_DISABLE_RX); 2688 2689 /* reset ASIC (and thus, BBP) */ 2690 RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC); 2691 RAL_WRITE(sc, RT2560_CSR1, 0); 2692 2693 /* disable interrupts */ 2694 RAL_WRITE(sc, RT2560_CSR8, 0xffffffff); 2695 2696 /* clear any pending interrupt */ 2697 RAL_WRITE(sc, RT2560_CSR7, 0xffffffff); 2698 2699 /* reset Tx and Rx rings */ 2700 rt2560_reset_tx_ring(sc, &sc->txq); 2701 rt2560_reset_tx_ring(sc, &sc->atimq); 2702 rt2560_reset_tx_ring(sc, &sc->prioq); 2703 rt2560_reset_tx_ring(sc, &sc->bcnq); 2704 rt2560_reset_rx_ring(sc, &sc->rxq); 2705 2706 /* for CardBus, power down the socket */ 2707 if (disable && sc->sc_disable != NULL) { 2708 if (sc->sc_flags & RT2560_ENABLED) { 2709 (*sc->sc_disable)(sc); 2710 sc->sc_flags &= ~RT2560_ENABLED; 2711 } 2712 } 2713} 2714 2715void 2716rt2560_power(int why, void *arg) 2717{ 2718 struct rt2560_softc *sc = arg; 2719 struct ifnet *ifp = &sc->sc_ic.ic_if; 2720 int s; 2721 2722 DPRINTF(("%s: rt2560_power(%d)\n", sc->sc_dev.dv_xname, why)); 2723 2724 s = splnet(); 2725 switch (why) { 2726 case PWR_SUSPEND: 2727 case PWR_STANDBY: 2728 rt2560_stop(ifp, 1); 2729 if (sc->sc_power != NULL) 2730 (*sc->sc_power)(sc, why); 2731 break; 2732 case PWR_RESUME: 2733 if (ifp->if_flags & IFF_UP) { 2734 rt2560_init(ifp); 2735 if (sc->sc_power != NULL) 2736 (*sc->sc_power)(sc, why); 2737 if (ifp->if_flags & IFF_RUNNING) 2738 rt2560_start(ifp); 2739 } 2740 break; 2741 } 2742 splx(s); 2743} 2744 2745struct cfdriver ral_cd = { 2746 NULL, "ral", DV_IFNET 2747}; 2748