rt2560.c revision 1.45
1/* $OpenBSD: rt2560.c,v 1.45 2009/08/10 17:47:23 damien Exp $ */ 2 3/*- 4 * Copyright (c) 2005, 2006 5 * Damien Bergamini <damien.bergamini@free.fr> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20/*- 21 * Ralink Technology RT2560 chipset driver 22 * http://www.ralinktech.com/ 23 */ 24 25#include "bpfilter.h" 26 27#include <sys/param.h> 28#include <sys/sockio.h> 29#include <sys/sysctl.h> 30#include <sys/mbuf.h> 31#include <sys/kernel.h> 32#include <sys/socket.h> 33#include <sys/systm.h> 34#include <sys/malloc.h> 35#include <sys/timeout.h> 36#include <sys/conf.h> 37#include <sys/device.h> 38 39#include <machine/bus.h> 40#include <machine/endian.h> 41#include <machine/intr.h> 42 43#if NBPFILTER > 0 44#include <net/bpf.h> 45#endif 46#include <net/if.h> 47#include <net/if_arp.h> 48#include <net/if_dl.h> 49#include <net/if_media.h> 50#include <net/if_types.h> 51 52#include <netinet/in.h> 53#include <netinet/in_systm.h> 54#include <netinet/in_var.h> 55#include <netinet/if_ether.h> 56#include <netinet/ip.h> 57 58#include <net80211/ieee80211_var.h> 59#include <net80211/ieee80211_amrr.h> 60#include <net80211/ieee80211_radiotap.h> 61 62#include <dev/ic/rt2560reg.h> 63#include <dev/ic/rt2560var.h> 64 65#include <dev/pci/pcireg.h> 66#include <dev/pci/pcivar.h> 67#include <dev/pci/pcidevs.h> 68 69#ifdef RAL_DEBUG 70#define DPRINTF(x) do { if (rt2560_debug > 0) printf x; } while (0) 71#define DPRINTFN(n, x) do { if (rt2560_debug >= (n)) printf x; } while (0) 72int rt2560_debug = 1; 73#else 74#define DPRINTF(x) 75#define DPRINTFN(n, x) 76#endif 77 78int rt2560_alloc_tx_ring(struct rt2560_softc *, 79 struct rt2560_tx_ring *, int); 80void rt2560_reset_tx_ring(struct rt2560_softc *, 81 struct rt2560_tx_ring *); 82void rt2560_free_tx_ring(struct rt2560_softc *, 83 struct rt2560_tx_ring *); 84int rt2560_alloc_rx_ring(struct rt2560_softc *, 85 struct rt2560_rx_ring *, int); 86void rt2560_reset_rx_ring(struct rt2560_softc *, 87 struct rt2560_rx_ring *); 88void rt2560_free_rx_ring(struct rt2560_softc *, 89 struct rt2560_rx_ring *); 90struct ieee80211_node *rt2560_node_alloc(struct ieee80211com *); 91int rt2560_media_change(struct ifnet *); 92void rt2560_next_scan(void *); 93void rt2560_iter_func(void *, struct ieee80211_node *); 94void rt2560_amrr_timeout(void *); 95void rt2560_newassoc(struct ieee80211com *, struct ieee80211_node *, 96 int); 97int rt2560_newstate(struct ieee80211com *, enum ieee80211_state, 98 int); 99uint16_t rt2560_eeprom_read(struct rt2560_softc *, uint8_t); 100void rt2560_encryption_intr(struct rt2560_softc *); 101void rt2560_tx_intr(struct rt2560_softc *); 102void rt2560_prio_intr(struct rt2560_softc *); 103void rt2560_decryption_intr(struct rt2560_softc *); 104void rt2560_rx_intr(struct rt2560_softc *); 105#ifndef IEEE80211_STA_ONLY 106void rt2560_beacon_expire(struct rt2560_softc *); 107#endif 108void rt2560_wakeup_expire(struct rt2560_softc *); 109#if NBPFILTER > 0 110uint8_t rt2560_rxrate(const struct rt2560_rx_desc *); 111#endif 112int rt2560_ack_rate(struct ieee80211com *, int); 113uint16_t rt2560_txtime(int, int, uint32_t); 114uint8_t rt2560_plcp_signal(int); 115void rt2560_setup_tx_desc(struct rt2560_softc *, 116 struct rt2560_tx_desc *, uint32_t, int, int, int, 117 bus_addr_t); 118#ifndef IEEE80211_STA_ONLY 119int rt2560_tx_bcn(struct rt2560_softc *, struct mbuf *, 120 struct ieee80211_node *); 121#endif 122int rt2560_tx_mgt(struct rt2560_softc *, struct mbuf *, 123 struct ieee80211_node *); 124int rt2560_tx_data(struct rt2560_softc *, struct mbuf *, 125 struct ieee80211_node *); 126void rt2560_start(struct ifnet *); 127void rt2560_watchdog(struct ifnet *); 128int rt2560_ioctl(struct ifnet *, u_long, caddr_t); 129void rt2560_bbp_write(struct rt2560_softc *, uint8_t, uint8_t); 130uint8_t rt2560_bbp_read(struct rt2560_softc *, uint8_t); 131void rt2560_rf_write(struct rt2560_softc *, uint8_t, uint32_t); 132void rt2560_set_chan(struct rt2560_softc *, 133 struct ieee80211_channel *); 134void rt2560_disable_rf_tune(struct rt2560_softc *); 135void rt2560_enable_tsf_sync(struct rt2560_softc *); 136void rt2560_update_plcp(struct rt2560_softc *); 137void rt2560_updateslot(struct ieee80211com *); 138void rt2560_set_slottime(struct rt2560_softc *); 139void rt2560_set_basicrates(struct rt2560_softc *); 140void rt2560_update_led(struct rt2560_softc *, int, int); 141void rt2560_set_bssid(struct rt2560_softc *, uint8_t *); 142void rt2560_set_macaddr(struct rt2560_softc *, uint8_t *); 143void rt2560_get_macaddr(struct rt2560_softc *, uint8_t *); 144void rt2560_update_promisc(struct rt2560_softc *); 145void rt2560_set_txantenna(struct rt2560_softc *, int); 146void rt2560_set_rxantenna(struct rt2560_softc *, int); 147const char *rt2560_get_rf(int); 148void rt2560_read_eeprom(struct rt2560_softc *); 149int rt2560_bbp_init(struct rt2560_softc *); 150int rt2560_init(struct ifnet *); 151void rt2560_stop(struct ifnet *, int); 152void rt2560_power(int, void *); 153 154static const struct { 155 uint32_t reg; 156 uint32_t val; 157} rt2560_def_mac[] = { 158 RT2560_DEF_MAC 159}; 160 161static const struct { 162 uint8_t reg; 163 uint8_t val; 164} rt2560_def_bbp[] = { 165 RT2560_DEF_BBP 166}; 167 168static const uint32_t rt2560_rf2522_r2[] = RT2560_RF2522_R2; 169static const uint32_t rt2560_rf2523_r2[] = RT2560_RF2523_R2; 170static const uint32_t rt2560_rf2524_r2[] = RT2560_RF2524_R2; 171static const uint32_t rt2560_rf2525_r2[] = RT2560_RF2525_R2; 172static const uint32_t rt2560_rf2525_hi_r2[] = RT2560_RF2525_HI_R2; 173static const uint32_t rt2560_rf2525e_r2[] = RT2560_RF2525E_R2; 174static const uint32_t rt2560_rf2526_r2[] = RT2560_RF2526_R2; 175static const uint32_t rt2560_rf2526_hi_r2[] = RT2560_RF2526_HI_R2; 176 177int 178rt2560_attach(void *xsc, int id) 179{ 180 struct rt2560_softc *sc = xsc; 181 struct ieee80211com *ic = &sc->sc_ic; 182 struct ifnet *ifp = &ic->ic_if; 183 int error, i; 184 185 sc->amrr.amrr_min_success_threshold = 1; 186 sc->amrr.amrr_max_success_threshold = 15; 187 timeout_set(&sc->amrr_to, rt2560_amrr_timeout, sc); 188 timeout_set(&sc->scan_to, rt2560_next_scan, sc); 189 190 /* retrieve RT2560 rev. no */ 191 sc->asic_rev = RAL_READ(sc, RT2560_CSR0); 192 193 /* retrieve MAC address */ 194 rt2560_get_macaddr(sc, ic->ic_myaddr); 195 printf(", address %s\n", ether_sprintf(ic->ic_myaddr)); 196 197 /* retrieve RF rev. no and various other things from EEPROM */ 198 rt2560_read_eeprom(sc); 199 200 printf("%s: MAC/BBP RT2560 (rev 0x%02x), RF %s\n", sc->sc_dev.dv_xname, 201 sc->asic_rev, rt2560_get_rf(sc->rf_rev)); 202 203 /* 204 * Allocate Tx and Rx rings. 205 */ 206 error = rt2560_alloc_tx_ring(sc, &sc->txq, RT2560_TX_RING_COUNT); 207 if (error != 0) { 208 printf("%s: could not allocate Tx ring\n", 209 sc->sc_dev.dv_xname); 210 goto fail1; 211 } 212 error = rt2560_alloc_tx_ring(sc, &sc->atimq, RT2560_ATIM_RING_COUNT); 213 if (error != 0) { 214 printf("%s: could not allocate ATIM ring\n", 215 sc->sc_dev.dv_xname); 216 goto fail2; 217 } 218 error = rt2560_alloc_tx_ring(sc, &sc->prioq, RT2560_PRIO_RING_COUNT); 219 if (error != 0) { 220 printf("%s: could not allocate Prio ring\n", 221 sc->sc_dev.dv_xname); 222 goto fail3; 223 } 224 error = rt2560_alloc_tx_ring(sc, &sc->bcnq, RT2560_BEACON_RING_COUNT); 225 if (error != 0) { 226 printf("%s: could not allocate Beacon ring\n", 227 sc->sc_dev.dv_xname); 228 goto fail4; 229 } 230 error = rt2560_alloc_rx_ring(sc, &sc->rxq, RT2560_RX_RING_COUNT); 231 if (error != 0) { 232 printf("%s: could not allocate Rx ring\n", 233 sc->sc_dev.dv_xname); 234 goto fail5; 235 } 236 237 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 238 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 239 ic->ic_state = IEEE80211_S_INIT; 240 241 /* set device capabilities */ 242 ic->ic_caps = 243 IEEE80211_C_MONITOR | /* monitor mode supported */ 244#ifndef IEEE80211_STA_ONLY 245 IEEE80211_C_IBSS | /* IBSS mode supported */ 246 IEEE80211_C_HOSTAP | /* HostAp mode supported */ 247#endif 248 IEEE80211_C_TXPMGT | /* tx power management */ 249 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 250 IEEE80211_C_SHSLOT | /* short slot time supported */ 251 IEEE80211_C_WEP | /* s/w WEP */ 252 IEEE80211_C_RSN; /* WPA/RSN */ 253 254 /* set supported .11b and .11g rates */ 255 ic->ic_sup_rates[IEEE80211_MODE_11B] = ieee80211_std_rateset_11b; 256 ic->ic_sup_rates[IEEE80211_MODE_11G] = ieee80211_std_rateset_11g; 257 258 /* set supported .11b and .11g channels (1 through 14) */ 259 for (i = 1; i <= 14; i++) { 260 ic->ic_channels[i].ic_freq = 261 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 262 ic->ic_channels[i].ic_flags = 263 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 264 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 265 } 266 267 ifp->if_softc = sc; 268 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 269 ifp->if_init = rt2560_init; 270 ifp->if_ioctl = rt2560_ioctl; 271 ifp->if_start = rt2560_start; 272 ifp->if_watchdog = rt2560_watchdog; 273 IFQ_SET_READY(&ifp->if_snd); 274 memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ); 275 276 if_attach(ifp); 277 ieee80211_ifattach(ifp); 278 ic->ic_node_alloc = rt2560_node_alloc; 279 ic->ic_newassoc = rt2560_newassoc; 280 ic->ic_updateslot = rt2560_updateslot; 281 282 /* override state transition machine */ 283 sc->sc_newstate = ic->ic_newstate; 284 ic->ic_newstate = rt2560_newstate; 285 ieee80211_media_init(ifp, rt2560_media_change, ieee80211_media_status); 286 287#if NBPFILTER > 0 288 bpfattach(&sc->sc_drvbpf, ifp, DLT_IEEE802_11_RADIO, 289 sizeof (struct ieee80211_frame) + 64); 290 291 sc->sc_rxtap_len = sizeof sc->sc_rxtapu; 292 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 293 sc->sc_rxtap.wr_ihdr.it_present = htole32(RT2560_RX_RADIOTAP_PRESENT); 294 295 sc->sc_txtap_len = sizeof sc->sc_txtapu; 296 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 297 sc->sc_txtap.wt_ihdr.it_present = htole32(RT2560_TX_RADIOTAP_PRESENT); 298#endif 299 300 sc->sc_powerhook = powerhook_establish(rt2560_power, sc); 301 if (sc->sc_powerhook == NULL) { 302 printf("%s: WARNING: unable to establish power hook\n", 303 sc->sc_dev.dv_xname); 304 } 305 return 0; 306 307fail5: rt2560_free_tx_ring(sc, &sc->bcnq); 308fail4: rt2560_free_tx_ring(sc, &sc->prioq); 309fail3: rt2560_free_tx_ring(sc, &sc->atimq); 310fail2: rt2560_free_tx_ring(sc, &sc->txq); 311fail1: return ENXIO; 312} 313 314int 315rt2560_detach(void *xsc) 316{ 317 struct rt2560_softc *sc = xsc; 318 struct ifnet *ifp = &sc->sc_ic.ic_if; 319 320 timeout_del(&sc->scan_to); 321 timeout_del(&sc->amrr_to); 322 323 ieee80211_ifdetach(ifp); /* free all nodes */ 324 if_detach(ifp); 325 326 if (sc->sc_powerhook != NULL) 327 powerhook_disestablish(sc->sc_powerhook); 328 329 rt2560_free_tx_ring(sc, &sc->txq); 330 rt2560_free_tx_ring(sc, &sc->atimq); 331 rt2560_free_tx_ring(sc, &sc->prioq); 332 rt2560_free_tx_ring(sc, &sc->bcnq); 333 rt2560_free_rx_ring(sc, &sc->rxq); 334 335 return 0; 336} 337 338int 339rt2560_alloc_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring, 340 int count) 341{ 342 int i, nsegs, error; 343 344 ring->count = count; 345 ring->queued = 0; 346 ring->cur = ring->next = 0; 347 ring->cur_encrypt = ring->next_encrypt = 0; 348 349 error = bus_dmamap_create(sc->sc_dmat, count * RT2560_TX_DESC_SIZE, 1, 350 count * RT2560_TX_DESC_SIZE, 0, BUS_DMA_NOWAIT, &ring->map); 351 if (error != 0) { 352 printf("%s: could not create desc DMA map\n", 353 sc->sc_dev.dv_xname); 354 goto fail; 355 } 356 357 error = bus_dmamem_alloc(sc->sc_dmat, count * RT2560_TX_DESC_SIZE, 358 PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT); 359 if (error != 0) { 360 printf("%s: could not allocate DMA memory\n", 361 sc->sc_dev.dv_xname); 362 goto fail; 363 } 364 365 error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs, 366 count * RT2560_TX_DESC_SIZE, (caddr_t *)&ring->desc, 367 BUS_DMA_NOWAIT); 368 if (error != 0) { 369 printf("%s: can't map desc DMA memory\n", 370 sc->sc_dev.dv_xname); 371 goto fail; 372 } 373 374 error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc, 375 count * RT2560_TX_DESC_SIZE, NULL, BUS_DMA_NOWAIT); 376 if (error != 0) { 377 printf("%s: could not load desc DMA map\n", 378 sc->sc_dev.dv_xname); 379 goto fail; 380 } 381 382 memset(ring->desc, 0, count * RT2560_TX_DESC_SIZE); 383 ring->physaddr = ring->map->dm_segs->ds_addr; 384 385 ring->data = malloc(count * sizeof (struct rt2560_tx_data), M_DEVBUF, 386 M_NOWAIT | M_ZERO); 387 if (ring->data == NULL) { 388 printf("%s: could not allocate soft data\n", 389 sc->sc_dev.dv_xname); 390 error = ENOMEM; 391 goto fail; 392 } 393 394 for (i = 0; i < count; i++) { 395 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 396 RT2560_MAX_SCATTER, MCLBYTES, 0, BUS_DMA_NOWAIT, 397 &ring->data[i].map); 398 if (error != 0) { 399 printf("%s: could not create DMA map\n", 400 sc->sc_dev.dv_xname); 401 goto fail; 402 } 403 } 404 405 return 0; 406 407fail: rt2560_free_tx_ring(sc, ring); 408 return error; 409} 410 411void 412rt2560_reset_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring) 413{ 414 int i; 415 416 for (i = 0; i < ring->count; i++) { 417 struct rt2560_tx_desc *desc = &ring->desc[i]; 418 struct rt2560_tx_data *data = &ring->data[i]; 419 420 if (data->m != NULL) { 421 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 422 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 423 bus_dmamap_unload(sc->sc_dmat, data->map); 424 m_freem(data->m); 425 data->m = NULL; 426 } 427 428 /* 429 * The node has already been freed at that point so don't call 430 * ieee80211_release_node() here. 431 */ 432 data->ni = NULL; 433 434 desc->flags = 0; 435 } 436 437 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 438 BUS_DMASYNC_PREWRITE); 439 440 ring->queued = 0; 441 ring->cur = ring->next = 0; 442 ring->cur_encrypt = ring->next_encrypt = 0; 443} 444 445void 446rt2560_free_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring) 447{ 448 int i; 449 450 if (ring->desc != NULL) { 451 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, 452 ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 453 bus_dmamap_unload(sc->sc_dmat, ring->map); 454 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)ring->desc, 455 ring->count * RT2560_TX_DESC_SIZE); 456 bus_dmamem_free(sc->sc_dmat, &ring->seg, 1); 457 } 458 459 if (ring->data != NULL) { 460 for (i = 0; i < ring->count; i++) { 461 struct rt2560_tx_data *data = &ring->data[i]; 462 463 if (data->m != NULL) { 464 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 465 data->map->dm_mapsize, 466 BUS_DMASYNC_POSTWRITE); 467 bus_dmamap_unload(sc->sc_dmat, data->map); 468 m_freem(data->m); 469 } 470 471 /* 472 * The node has already been freed at that point so 473 * don't call ieee80211_release_node() here. 474 */ 475 data->ni = NULL; 476 477 if (data->map != NULL) 478 bus_dmamap_destroy(sc->sc_dmat, data->map); 479 } 480 free(ring->data, M_DEVBUF); 481 } 482} 483 484int 485rt2560_alloc_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring, 486 int count) 487{ 488 int i, nsegs, error; 489 490 ring->count = count; 491 ring->cur = ring->next = 0; 492 ring->cur_decrypt = 0; 493 494 error = bus_dmamap_create(sc->sc_dmat, count * RT2560_RX_DESC_SIZE, 1, 495 count * RT2560_RX_DESC_SIZE, 0, BUS_DMA_NOWAIT, &ring->map); 496 if (error != 0) { 497 printf("%s: could not create desc DMA map\n", 498 sc->sc_dev.dv_xname); 499 goto fail; 500 } 501 502 error = bus_dmamem_alloc(sc->sc_dmat, count * RT2560_RX_DESC_SIZE, 503 PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT); 504 if (error != 0) { 505 printf("%s: could not allocate DMA memory\n", 506 sc->sc_dev.dv_xname); 507 goto fail; 508 } 509 510 error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs, 511 count * RT2560_RX_DESC_SIZE, (caddr_t *)&ring->desc, 512 BUS_DMA_NOWAIT); 513 if (error != 0) { 514 printf("%s: can't map desc DMA memory\n", 515 sc->sc_dev.dv_xname); 516 goto fail; 517 } 518 519 error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc, 520 count * RT2560_RX_DESC_SIZE, NULL, BUS_DMA_NOWAIT); 521 if (error != 0) { 522 printf("%s: could not load desc DMA map\n", 523 sc->sc_dev.dv_xname); 524 goto fail; 525 } 526 527 memset(ring->desc, 0, count * RT2560_RX_DESC_SIZE); 528 ring->physaddr = ring->map->dm_segs->ds_addr; 529 530 ring->data = malloc(count * sizeof (struct rt2560_rx_data), M_DEVBUF, 531 M_NOWAIT | M_ZERO); 532 if (ring->data == NULL) { 533 printf("%s: could not allocate soft data\n", 534 sc->sc_dev.dv_xname); 535 error = ENOMEM; 536 goto fail; 537 } 538 539 /* 540 * Pre-allocate Rx buffers and populate Rx ring. 541 */ 542 for (i = 0; i < count; i++) { 543 struct rt2560_rx_desc *desc = &sc->rxq.desc[i]; 544 struct rt2560_rx_data *data = &sc->rxq.data[i]; 545 546 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES, 547 0, BUS_DMA_NOWAIT, &data->map); 548 if (error != 0) { 549 printf("%s: could not create DMA map\n", 550 sc->sc_dev.dv_xname); 551 goto fail; 552 } 553 554 MGETHDR(data->m, M_DONTWAIT, MT_DATA); 555 if (data->m == NULL) { 556 printf("%s: could not allocate rx mbuf\n", 557 sc->sc_dev.dv_xname); 558 error = ENOMEM; 559 goto fail; 560 } 561 MCLGET(data->m, M_DONTWAIT); 562 if (!(data->m->m_flags & M_EXT)) { 563 printf("%s: could not allocate rx mbuf cluster\n", 564 sc->sc_dev.dv_xname); 565 error = ENOMEM; 566 goto fail; 567 } 568 569 error = bus_dmamap_load(sc->sc_dmat, data->map, 570 mtod(data->m, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT); 571 if (error != 0) { 572 printf("%s: could not load rx buf DMA map", 573 sc->sc_dev.dv_xname); 574 goto fail; 575 } 576 577 desc->flags = htole32(RT2560_RX_BUSY); 578 desc->physaddr = htole32(data->map->dm_segs->ds_addr); 579 } 580 581 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 582 BUS_DMASYNC_PREWRITE); 583 584 return 0; 585 586fail: rt2560_free_rx_ring(sc, ring); 587 return error; 588} 589 590void 591rt2560_reset_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring) 592{ 593 int i; 594 595 for (i = 0; i < ring->count; i++) { 596 ring->desc[i].flags = htole32(RT2560_RX_BUSY); 597 ring->data[i].drop = 0; 598 } 599 600 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 601 BUS_DMASYNC_PREWRITE); 602 603 ring->cur = ring->next = 0; 604 ring->cur_decrypt = 0; 605} 606 607void 608rt2560_free_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring) 609{ 610 int i; 611 612 if (ring->desc != NULL) { 613 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, 614 ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 615 bus_dmamap_unload(sc->sc_dmat, ring->map); 616 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)ring->desc, 617 ring->count * RT2560_RX_DESC_SIZE); 618 bus_dmamem_free(sc->sc_dmat, &ring->seg, 1); 619 } 620 621 if (ring->data != NULL) { 622 for (i = 0; i < ring->count; i++) { 623 struct rt2560_rx_data *data = &ring->data[i]; 624 625 if (data->m != NULL) { 626 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 627 data->map->dm_mapsize, 628 BUS_DMASYNC_POSTREAD); 629 bus_dmamap_unload(sc->sc_dmat, data->map); 630 m_freem(data->m); 631 } 632 633 if (data->map != NULL) 634 bus_dmamap_destroy(sc->sc_dmat, data->map); 635 } 636 free(ring->data, M_DEVBUF); 637 } 638} 639 640struct ieee80211_node * 641rt2560_node_alloc(struct ieee80211com *ic) 642{ 643 return malloc(sizeof (struct rt2560_node), M_DEVBUF, 644 M_NOWAIT | M_ZERO); 645} 646 647int 648rt2560_media_change(struct ifnet *ifp) 649{ 650 int error; 651 652 error = ieee80211_media_change(ifp); 653 if (error != ENETRESET) 654 return error; 655 656 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 657 rt2560_init(ifp); 658 659 return 0; 660} 661 662/* 663 * This function is called periodically (every 200ms) during scanning to 664 * switch from one channel to another. 665 */ 666void 667rt2560_next_scan(void *arg) 668{ 669 struct rt2560_softc *sc = arg; 670 struct ieee80211com *ic = &sc->sc_ic; 671 struct ifnet *ifp = &ic->ic_if; 672 int s; 673 674 s = splnet(); 675 if (ic->ic_state == IEEE80211_S_SCAN) 676 ieee80211_next_scan(ifp); 677 splx(s); 678} 679 680/* 681 * This function is called for each neighbor node. 682 */ 683void 684rt2560_iter_func(void *arg, struct ieee80211_node *ni) 685{ 686 struct rt2560_softc *sc = arg; 687 struct rt2560_node *rn = (struct rt2560_node *)ni; 688 689 ieee80211_amrr_choose(&sc->amrr, ni, &rn->amn); 690} 691 692void 693rt2560_amrr_timeout(void *arg) 694{ 695 struct rt2560_softc *sc = arg; 696 struct ieee80211com *ic = &sc->sc_ic; 697 int s; 698 699 s = splnet(); 700 if (ic->ic_opmode == IEEE80211_M_STA) 701 rt2560_iter_func(sc, ic->ic_bss); 702#ifndef IEEE80211_STA_ONLY 703 else 704 ieee80211_iterate_nodes(ic, rt2560_iter_func, sc); 705#endif 706 splx(s); 707 708 timeout_add_msec(&sc->amrr_to, 500); 709} 710 711void 712rt2560_newassoc(struct ieee80211com *ic, struct ieee80211_node *ni, int isnew) 713{ 714 struct rt2560_softc *sc = ic->ic_softc; 715 int i; 716 717 ieee80211_amrr_node_init(&sc->amrr, &((struct rt2560_node *)ni)->amn); 718 719 /* set rate to some reasonable initial value */ 720 for (i = ni->ni_rates.rs_nrates - 1; 721 i > 0 && (ni->ni_rates.rs_rates[i] & IEEE80211_RATE_VAL) > 72; 722 i--); 723 ni->ni_txrate = i; 724} 725 726int 727rt2560_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg) 728{ 729 struct rt2560_softc *sc = ic->ic_if.if_softc; 730 enum ieee80211_state ostate; 731 struct ieee80211_node *ni; 732 int error = 0; 733 734 ostate = ic->ic_state; 735 timeout_del(&sc->scan_to); 736 timeout_del(&sc->amrr_to); 737 738 switch (nstate) { 739 case IEEE80211_S_INIT: 740 if (ostate == IEEE80211_S_RUN) { 741 /* abort TSF synchronization */ 742 RAL_WRITE(sc, RT2560_CSR14, 0); 743 744 /* turn association led off */ 745 rt2560_update_led(sc, 0, 0); 746 } 747 break; 748 749 case IEEE80211_S_SCAN: 750 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 751 timeout_add_msec(&sc->scan_to, 200); 752 break; 753 754 case IEEE80211_S_AUTH: 755 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 756 break; 757 758 case IEEE80211_S_ASSOC: 759 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 760 break; 761 762 case IEEE80211_S_RUN: 763 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 764 765 ni = ic->ic_bss; 766 767 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 768 rt2560_update_plcp(sc); 769 rt2560_set_slottime(sc); 770 rt2560_set_basicrates(sc); 771 rt2560_set_bssid(sc, ni->ni_bssid); 772 } 773 774#ifndef IEEE80211_STA_ONLY 775 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 776 ic->ic_opmode == IEEE80211_M_IBSS) { 777 struct mbuf *m = ieee80211_beacon_alloc(ic, ni); 778 if (m == NULL) { 779 printf("%s: could not allocate beacon\n", 780 sc->sc_dev.dv_xname); 781 error = ENOBUFS; 782 break; 783 } 784 785 error = rt2560_tx_bcn(sc, m, ni); 786 if (error != 0) 787 break; 788 } 789#endif 790 791 /* turn assocation led on */ 792 rt2560_update_led(sc, 1, 0); 793 794 if (ic->ic_opmode == IEEE80211_M_STA) { 795 /* fake a join to init the tx rate */ 796 rt2560_newassoc(ic, ni, 1); 797 } 798 799 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 800 /* start automatic rate control timer */ 801 if (ic->ic_fixed_rate == -1) 802 timeout_add_msec(&sc->amrr_to, 500); 803 804 rt2560_enable_tsf_sync(sc); 805 } 806 break; 807 } 808 809 return (error != 0) ? error : sc->sc_newstate(ic, nstate, arg); 810} 811 812/* 813 * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46 or 814 * 93C66). 815 */ 816uint16_t 817rt2560_eeprom_read(struct rt2560_softc *sc, uint8_t addr) 818{ 819 uint32_t tmp; 820 uint16_t val; 821 int n; 822 823 /* clock C once before the first command */ 824 RT2560_EEPROM_CTL(sc, 0); 825 826 RT2560_EEPROM_CTL(sc, RT2560_S); 827 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 828 RT2560_EEPROM_CTL(sc, RT2560_S); 829 830 /* write start bit (1) */ 831 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D); 832 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C); 833 834 /* write READ opcode (10) */ 835 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D); 836 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C); 837 RT2560_EEPROM_CTL(sc, RT2560_S); 838 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 839 840 /* write address (A5-A0 or A7-A0) */ 841 n = (RAL_READ(sc, RT2560_CSR21) & RT2560_93C46) ? 5 : 7; 842 for (; n >= 0; n--) { 843 RT2560_EEPROM_CTL(sc, RT2560_S | 844 (((addr >> n) & 1) << RT2560_SHIFT_D)); 845 RT2560_EEPROM_CTL(sc, RT2560_S | 846 (((addr >> n) & 1) << RT2560_SHIFT_D) | RT2560_C); 847 } 848 849 RT2560_EEPROM_CTL(sc, RT2560_S); 850 851 /* read data Q15-Q0 */ 852 val = 0; 853 for (n = 15; n >= 0; n--) { 854 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 855 tmp = RAL_READ(sc, RT2560_CSR21); 856 val |= ((tmp & RT2560_Q) >> RT2560_SHIFT_Q) << n; 857 RT2560_EEPROM_CTL(sc, RT2560_S); 858 } 859 860 RT2560_EEPROM_CTL(sc, 0); 861 862 /* clear Chip Select and clock C */ 863 RT2560_EEPROM_CTL(sc, RT2560_S); 864 RT2560_EEPROM_CTL(sc, 0); 865 RT2560_EEPROM_CTL(sc, RT2560_C); 866 867 return val; 868} 869 870/* 871 * Some frames were processed by the hardware cipher engine and are ready for 872 * transmission. 873 */ 874void 875rt2560_encryption_intr(struct rt2560_softc *sc) 876{ 877 int hw; 878 879 /* retrieve last descriptor index processed by cipher engine */ 880 hw = (RAL_READ(sc, RT2560_SECCSR1) - sc->txq.physaddr) / 881 RT2560_TX_DESC_SIZE; 882 883 for (; sc->txq.next_encrypt != hw;) { 884 struct rt2560_tx_desc *desc = 885 &sc->txq.desc[sc->txq.next_encrypt]; 886 887 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 888 sc->txq.next_encrypt * RT2560_TX_DESC_SIZE, 889 RT2560_TX_DESC_SIZE, BUS_DMASYNC_POSTREAD); 890 891 if (letoh32(desc->flags) & 892 (RT2560_TX_BUSY | RT2560_TX_CIPHER_BUSY)) 893 break; 894 895 /* for TKIP, swap eiv field to fix a bug in ASIC */ 896 if ((letoh32(desc->flags) & RT2560_TX_CIPHER_MASK) == 897 RT2560_TX_CIPHER_TKIP) 898 desc->eiv = swap32(desc->eiv); 899 900 /* mark the frame ready for transmission */ 901 desc->flags |= htole32(RT2560_TX_BUSY | RT2560_TX_VALID); 902 903 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 904 sc->txq.next_encrypt * RT2560_TX_DESC_SIZE, 905 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 906 907 DPRINTFN(15, ("encryption done idx=%u\n", 908 sc->txq.next_encrypt)); 909 910 sc->txq.next_encrypt = 911 (sc->txq.next_encrypt + 1) % RT2560_TX_RING_COUNT; 912 } 913 914 /* kick Tx */ 915 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_TX); 916} 917 918void 919rt2560_tx_intr(struct rt2560_softc *sc) 920{ 921 struct ieee80211com *ic = &sc->sc_ic; 922 struct ifnet *ifp = &ic->ic_if; 923 924 for (;;) { 925 struct rt2560_tx_desc *desc = &sc->txq.desc[sc->txq.next]; 926 struct rt2560_tx_data *data = &sc->txq.data[sc->txq.next]; 927 struct rt2560_node *rn; 928 929 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 930 sc->txq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 931 BUS_DMASYNC_POSTREAD); 932 933 if ((letoh32(desc->flags) & RT2560_TX_BUSY) || 934 (letoh32(desc->flags) & RT2560_TX_CIPHER_BUSY) || 935 !(letoh32(desc->flags) & RT2560_TX_VALID)) 936 break; 937 938 rn = (struct rt2560_node *)data->ni; 939 940 switch (letoh32(desc->flags) & RT2560_TX_RESULT_MASK) { 941 case RT2560_TX_SUCCESS: 942 DPRINTFN(10, ("data frame sent successfully\n")); 943 rn->amn.amn_txcnt++; 944 ifp->if_opackets++; 945 break; 946 947 case RT2560_TX_SUCCESS_RETRY: 948 DPRINTFN(9, ("data frame sent after %u retries\n", 949 (letoh32(desc->flags) >> 5) & 0x7)); 950 rn->amn.amn_txcnt++; 951 rn->amn.amn_retrycnt++; 952 ifp->if_opackets++; 953 break; 954 955 case RT2560_TX_FAIL_RETRY: 956 DPRINTFN(9, ("sending data frame failed (too much " 957 "retries)\n")); 958 rn->amn.amn_txcnt++; 959 rn->amn.amn_retrycnt++; 960 ifp->if_oerrors++; 961 break; 962 963 case RT2560_TX_FAIL_INVALID: 964 case RT2560_TX_FAIL_OTHER: 965 default: 966 printf("%s: sending data frame failed 0x%08x\n", 967 sc->sc_dev.dv_xname, letoh32(desc->flags)); 968 ifp->if_oerrors++; 969 } 970 971 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 972 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 973 bus_dmamap_unload(sc->sc_dmat, data->map); 974 m_freem(data->m); 975 data->m = NULL; 976 ieee80211_release_node(ic, data->ni); 977 data->ni = NULL; 978 979 /* descriptor is no longer valid */ 980 desc->flags &= ~htole32(RT2560_TX_VALID); 981 982 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 983 sc->txq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 984 BUS_DMASYNC_PREWRITE); 985 986 DPRINTFN(15, ("tx done idx=%u\n", sc->txq.next)); 987 988 sc->txq.queued--; 989 sc->txq.next = (sc->txq.next + 1) % RT2560_TX_RING_COUNT; 990 } 991 992 sc->sc_tx_timer = 0; 993 ifp->if_flags &= ~IFF_OACTIVE; 994 rt2560_start(ifp); 995} 996 997void 998rt2560_prio_intr(struct rt2560_softc *sc) 999{ 1000 struct ieee80211com *ic = &sc->sc_ic; 1001 struct ifnet *ifp = &ic->ic_if; 1002 1003 for (;;) { 1004 struct rt2560_tx_desc *desc = &sc->prioq.desc[sc->prioq.next]; 1005 struct rt2560_tx_data *data = &sc->prioq.data[sc->prioq.next]; 1006 1007 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1008 sc->prioq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1009 BUS_DMASYNC_POSTREAD); 1010 1011 if ((letoh32(desc->flags) & RT2560_TX_BUSY) || 1012 !(letoh32(desc->flags) & RT2560_TX_VALID)) 1013 break; 1014 1015 switch (letoh32(desc->flags) & RT2560_TX_RESULT_MASK) { 1016 case RT2560_TX_SUCCESS: 1017 DPRINTFN(10, ("mgt frame sent successfully\n")); 1018 break; 1019 1020 case RT2560_TX_SUCCESS_RETRY: 1021 DPRINTFN(9, ("mgt frame sent after %u retries\n", 1022 (letoh32(desc->flags) >> 5) & 0x7)); 1023 break; 1024 1025 case RT2560_TX_FAIL_RETRY: 1026 DPRINTFN(9, ("sending mgt frame failed (too much " 1027 "retries)\n")); 1028 break; 1029 1030 case RT2560_TX_FAIL_INVALID: 1031 case RT2560_TX_FAIL_OTHER: 1032 default: 1033 printf("%s: sending mgt frame failed 0x%08x\n", 1034 sc->sc_dev.dv_xname, letoh32(desc->flags)); 1035 } 1036 1037 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1038 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 1039 bus_dmamap_unload(sc->sc_dmat, data->map); 1040 m_freem(data->m); 1041 data->m = NULL; 1042 ieee80211_release_node(ic, data->ni); 1043 data->ni = NULL; 1044 1045 /* descriptor is no longer valid */ 1046 desc->flags &= ~htole32(RT2560_TX_VALID); 1047 1048 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1049 sc->prioq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1050 BUS_DMASYNC_PREWRITE); 1051 1052 DPRINTFN(15, ("prio done idx=%u\n", sc->prioq.next)); 1053 1054 sc->prioq.queued--; 1055 sc->prioq.next = (sc->prioq.next + 1) % RT2560_PRIO_RING_COUNT; 1056 } 1057 1058 sc->sc_tx_timer = 0; 1059 ifp->if_flags &= ~IFF_OACTIVE; 1060 rt2560_start(ifp); 1061} 1062 1063/* 1064 * Some frames were processed by the hardware cipher engine and are ready for 1065 * transmission to the IEEE802.11 layer. 1066 */ 1067void 1068rt2560_decryption_intr(struct rt2560_softc *sc) 1069{ 1070 struct ieee80211com *ic = &sc->sc_ic; 1071 struct ifnet *ifp = &ic->ic_if; 1072 struct ieee80211_frame *wh; 1073 struct ieee80211_rxinfo rxi; 1074 struct ieee80211_node *ni; 1075 struct mbuf *mnew, *m; 1076 int hw, error; 1077 1078 /* retrieve last decriptor index processed by cipher engine */ 1079 hw = (RAL_READ(sc, RT2560_SECCSR0) - sc->rxq.physaddr) / 1080 RT2560_RX_DESC_SIZE; 1081 1082 for (; sc->rxq.cur_decrypt != hw;) { 1083 struct rt2560_rx_desc *desc = 1084 &sc->rxq.desc[sc->rxq.cur_decrypt]; 1085 struct rt2560_rx_data *data = 1086 &sc->rxq.data[sc->rxq.cur_decrypt]; 1087 1088 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1089 sc->rxq.cur_decrypt * RT2560_TX_DESC_SIZE, 1090 RT2560_TX_DESC_SIZE, BUS_DMASYNC_POSTREAD); 1091 1092 if (letoh32(desc->flags) & 1093 (RT2560_RX_BUSY | RT2560_RX_CIPHER_BUSY)) 1094 break; 1095 1096 if (data->drop) { 1097 ifp->if_ierrors++; 1098 goto skip; 1099 } 1100 1101 if ((letoh32(desc->flags) & RT2560_RX_CIPHER_MASK) != 0 && 1102 (letoh32(desc->flags) & RT2560_RX_ICV_ERROR)) { 1103 ifp->if_ierrors++; 1104 goto skip; 1105 } 1106 1107 /* 1108 * Try to allocate a new mbuf for this ring element and load it 1109 * before processing the current mbuf. If the ring element 1110 * cannot be loaded, drop the received packet and reuse the old 1111 * mbuf. In the unlikely case that the old mbuf can't be 1112 * reloaded either, explicitly panic. 1113 */ 1114 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 1115 if (mnew == NULL) { 1116 ifp->if_ierrors++; 1117 goto skip; 1118 } 1119 MCLGET(mnew, M_DONTWAIT); 1120 if (!(mnew->m_flags & M_EXT)) { 1121 m_freem(mnew); 1122 ifp->if_ierrors++; 1123 goto skip; 1124 } 1125 1126 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1127 data->map->dm_mapsize, BUS_DMASYNC_POSTREAD); 1128 bus_dmamap_unload(sc->sc_dmat, data->map); 1129 1130 error = bus_dmamap_load(sc->sc_dmat, data->map, 1131 mtod(mnew, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT); 1132 if (error != 0) { 1133 m_freem(mnew); 1134 1135 /* try to reload the old mbuf */ 1136 error = bus_dmamap_load(sc->sc_dmat, data->map, 1137 mtod(data->m, void *), MCLBYTES, NULL, 1138 BUS_DMA_NOWAIT); 1139 if (error != 0) { 1140 /* very unlikely that it will fail... */ 1141 panic("%s: could not load old rx mbuf", 1142 sc->sc_dev.dv_xname); 1143 } 1144 /* physical address may have changed */ 1145 desc->physaddr = htole32(data->map->dm_segs->ds_addr); 1146 ifp->if_ierrors++; 1147 goto skip; 1148 } 1149 1150 /* 1151 * New mbuf successfully loaded, update Rx ring and continue 1152 * processing. 1153 */ 1154 m = data->m; 1155 data->m = mnew; 1156 desc->physaddr = htole32(data->map->dm_segs->ds_addr); 1157 1158 /* finalize mbuf */ 1159 m->m_pkthdr.rcvif = ifp; 1160 m->m_pkthdr.len = m->m_len = 1161 (letoh32(desc->flags) >> 16) & 0xfff; 1162 1163#if NBPFILTER > 0 1164 if (sc->sc_drvbpf != NULL) { 1165 struct mbuf mb; 1166 struct rt2560_rx_radiotap_header *tap = &sc->sc_rxtap; 1167 uint32_t tsf_lo, tsf_hi; 1168 1169 /* get timestamp (low and high 32 bits) */ 1170 tsf_hi = RAL_READ(sc, RT2560_CSR17); 1171 tsf_lo = RAL_READ(sc, RT2560_CSR16); 1172 1173 tap->wr_tsf = 1174 htole64(((uint64_t)tsf_hi << 32) | tsf_lo); 1175 tap->wr_flags = 0; 1176 tap->wr_rate = rt2560_rxrate(desc); 1177 tap->wr_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 1178 tap->wr_chan_flags = 1179 htole16(ic->ic_ibss_chan->ic_flags); 1180 tap->wr_antenna = sc->rx_ant; 1181 tap->wr_antsignal = desc->rssi; 1182 1183 mb.m_data = (caddr_t)tap; 1184 mb.m_len = sc->sc_txtap_len; 1185 mb.m_next = m; 1186 mb.m_nextpkt = NULL; 1187 mb.m_type = 0; 1188 mb.m_flags = 0; 1189 bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_IN); 1190 } 1191#endif 1192 wh = mtod(m, struct ieee80211_frame *); 1193 ni = ieee80211_find_rxnode(ic, wh); 1194 1195 /* send the frame to the 802.11 layer */ 1196 rxi.rxi_flags = 0; 1197 rxi.rxi_rssi = desc->rssi; 1198 rxi.rxi_tstamp = 0; /* unused */ 1199 ieee80211_input(ifp, m, ni, &rxi); 1200 1201 /* node is no longer needed */ 1202 ieee80211_release_node(ic, ni); 1203 1204skip: desc->flags = htole32(RT2560_RX_BUSY); 1205 1206 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1207 sc->rxq.cur_decrypt * RT2560_TX_DESC_SIZE, 1208 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 1209 1210 DPRINTFN(15, ("decryption done idx=%u\n", sc->rxq.cur_decrypt)); 1211 1212 sc->rxq.cur_decrypt = 1213 (sc->rxq.cur_decrypt + 1) % RT2560_RX_RING_COUNT; 1214 } 1215} 1216 1217/* 1218 * Some frames were received. Pass them to the hardware cipher engine before 1219 * sending them to the 802.11 layer. 1220 */ 1221void 1222rt2560_rx_intr(struct rt2560_softc *sc) 1223{ 1224 for (;;) { 1225 struct rt2560_rx_desc *desc = &sc->rxq.desc[sc->rxq.cur]; 1226 struct rt2560_rx_data *data = &sc->rxq.data[sc->rxq.cur]; 1227 1228 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1229 sc->rxq.cur * RT2560_RX_DESC_SIZE, RT2560_RX_DESC_SIZE, 1230 BUS_DMASYNC_POSTREAD); 1231 1232 if (letoh32(desc->flags) & 1233 (RT2560_RX_BUSY | RT2560_RX_CIPHER_BUSY)) 1234 break; 1235 1236 data->drop = 0; 1237 1238 if (letoh32(desc->flags) & 1239 (RT2560_RX_PHY_ERROR | RT2560_RX_CRC_ERROR)) { 1240 /* 1241 * This should not happen since we did not request 1242 * to receive those frames when we filled RXCSR0. 1243 */ 1244 DPRINTFN(5, ("PHY or CRC error flags 0x%08x\n", 1245 letoh32(desc->flags))); 1246 data->drop = 1; 1247 } 1248 1249 if (((letoh32(desc->flags) >> 16) & 0xfff) > MCLBYTES) { 1250 DPRINTFN(5, ("bad length\n")); 1251 data->drop = 1; 1252 } 1253 1254 /* mark the frame for decryption */ 1255 desc->flags |= htole32(RT2560_RX_CIPHER_BUSY); 1256 1257 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1258 sc->rxq.cur * RT2560_RX_DESC_SIZE, RT2560_RX_DESC_SIZE, 1259 BUS_DMASYNC_PREWRITE); 1260 1261 DPRINTFN(15, ("rx done idx=%u\n", sc->rxq.cur)); 1262 1263 sc->rxq.cur = (sc->rxq.cur + 1) % RT2560_RX_RING_COUNT; 1264 } 1265 1266 /* kick decrypt */ 1267 RAL_WRITE(sc, RT2560_SECCSR0, RT2560_KICK_DECRYPT); 1268} 1269 1270#ifndef IEEE80211_STA_ONLY 1271/* 1272 * This function is called in HostAP or IBSS modes when it's time to send a 1273 * new beacon (every ni_intval milliseconds). 1274 */ 1275void 1276rt2560_beacon_expire(struct rt2560_softc *sc) 1277{ 1278 struct ieee80211com *ic = &sc->sc_ic; 1279 struct rt2560_tx_data *data; 1280 1281 if (ic->ic_opmode != IEEE80211_M_IBSS && 1282 ic->ic_opmode != IEEE80211_M_HOSTAP) 1283 return; 1284 1285 data = &sc->bcnq.data[sc->bcnq.next]; 1286 1287 if (sc->sc_flags & RT2560_UPDATE_SLOT) { 1288 sc->sc_flags &= ~RT2560_UPDATE_SLOT; 1289 sc->sc_flags |= RT2560_SET_SLOTTIME; 1290 } else if (sc->sc_flags & RT2560_SET_SLOTTIME) { 1291 sc->sc_flags &= ~RT2560_SET_SLOTTIME; 1292 rt2560_set_slottime(sc); 1293 } 1294 1295 if (ic->ic_curmode == IEEE80211_MODE_11G) { 1296 /* update ERP Information Element */ 1297 *sc->erp = ic->ic_bss->ni_erp; 1298 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1299 data->map->dm_mapsize, BUS_DMASYNC_PREWRITE); 1300 } 1301 1302#if defined(RT2560_DEBUG) && NBPFILTER > 0 1303 if (ic->ic_rawbpf != NULL) 1304 bpf_mtap(ic->ic_rawbpf, data->m, BPF_DIRECTION_OUT); 1305#endif 1306 1307 DPRINTFN(15, ("beacon expired\n")); 1308} 1309#endif 1310 1311void 1312rt2560_wakeup_expire(struct rt2560_softc *sc) 1313{ 1314 DPRINTFN(15, ("wakeup expired\n")); 1315} 1316 1317int 1318rt2560_intr(void *arg) 1319{ 1320 struct rt2560_softc *sc = arg; 1321 struct ifnet *ifp = &sc->sc_ic.ic_if; 1322 uint32_t r; 1323 1324 if ((r = RAL_READ(sc, RT2560_CSR7)) == 0) 1325 return 0; /* not for us */ 1326 1327 /* disable interrupts */ 1328 RAL_WRITE(sc, RT2560_CSR8, 0xffffffff); 1329 1330 /* acknowledge interrupts */ 1331 RAL_WRITE(sc, RT2560_CSR7, r); 1332 1333 /* don't re-enable interrupts if we're shutting down */ 1334 if (!(ifp->if_flags & IFF_RUNNING)) 1335 return 0; 1336 1337#ifndef IEEE80211_STA_ONLY 1338 if (r & RT2560_BEACON_EXPIRE) 1339 rt2560_beacon_expire(sc); 1340#endif 1341 1342 if (r & RT2560_WAKEUP_EXPIRE) 1343 rt2560_wakeup_expire(sc); 1344 1345 if (r & RT2560_ENCRYPTION_DONE) 1346 rt2560_encryption_intr(sc); 1347 1348 if (r & RT2560_TX_DONE) 1349 rt2560_tx_intr(sc); 1350 1351 if (r & RT2560_PRIO_DONE) 1352 rt2560_prio_intr(sc); 1353 1354 if (r & RT2560_DECRYPTION_DONE) 1355 rt2560_decryption_intr(sc); 1356 1357 if (r & RT2560_RX_DONE) 1358 rt2560_rx_intr(sc); 1359 1360 /* re-enable interrupts */ 1361 RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK); 1362 1363 return 1; 1364} 1365 1366/* quickly determine if a given rate is CCK or OFDM */ 1367#define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22) 1368 1369#define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */ 1370#define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */ 1371 1372#define RAL_SIFS 10 /* us */ 1373 1374#define RT2560_RXTX_TURNAROUND 10 /* us */ 1375 1376/* 1377 * This function is only used by the Rx radiotap code. It returns the rate at 1378 * which a given frame was received. 1379 */ 1380#if NBPFILTER > 0 1381uint8_t 1382rt2560_rxrate(const struct rt2560_rx_desc *desc) 1383{ 1384 if (letoh32(desc->flags) & RT2560_RX_OFDM) { 1385 /* reverse function of rt2560_plcp_signal */ 1386 switch (desc->rate) { 1387 case 0xb: return 12; 1388 case 0xf: return 18; 1389 case 0xa: return 24; 1390 case 0xe: return 36; 1391 case 0x9: return 48; 1392 case 0xd: return 72; 1393 case 0x8: return 96; 1394 case 0xc: return 108; 1395 } 1396 } else { 1397 if (desc->rate == 10) 1398 return 2; 1399 if (desc->rate == 20) 1400 return 4; 1401 if (desc->rate == 55) 1402 return 11; 1403 if (desc->rate == 110) 1404 return 22; 1405 } 1406 return 2; /* should not get there */ 1407} 1408#endif 1409 1410/* 1411 * Return the expected ack rate for a frame transmitted at rate `rate'. 1412 */ 1413int 1414rt2560_ack_rate(struct ieee80211com *ic, int rate) 1415{ 1416 switch (rate) { 1417 /* CCK rates */ 1418 case 2: 1419 return 2; 1420 case 4: 1421 case 11: 1422 case 22: 1423 return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate; 1424 1425 /* OFDM rates */ 1426 case 12: 1427 case 18: 1428 return 12; 1429 case 24: 1430 case 36: 1431 return 24; 1432 case 48: 1433 case 72: 1434 case 96: 1435 case 108: 1436 return 48; 1437 } 1438 1439 /* default to 1Mbps */ 1440 return 2; 1441} 1442 1443/* 1444 * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'. 1445 * The function automatically determines the operating mode depending on the 1446 * given rate. `flags' indicates whether short preamble is in use or not. 1447 */ 1448uint16_t 1449rt2560_txtime(int len, int rate, uint32_t flags) 1450{ 1451 uint16_t txtime; 1452 1453 if (RAL_RATE_IS_OFDM(rate)) { 1454 /* IEEE Std 802.11g-2003, pp. 44 */ 1455 txtime = (8 + 4 * len + 3 + rate - 1) / rate; 1456 txtime = 16 + 4 + 4 * txtime + 6; 1457 } else { 1458 /* IEEE Std 802.11b-1999, pp. 28 */ 1459 txtime = (16 * len + rate - 1) / rate; 1460 if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE)) 1461 txtime += 72 + 24; 1462 else 1463 txtime += 144 + 48; 1464 } 1465 return txtime; 1466} 1467 1468uint8_t 1469rt2560_plcp_signal(int rate) 1470{ 1471 switch (rate) { 1472 /* CCK rates (returned values are device-dependent) */ 1473 case 2: return 0x0; 1474 case 4: return 0x1; 1475 case 11: return 0x2; 1476 case 22: return 0x3; 1477 1478 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1479 case 12: return 0xb; 1480 case 18: return 0xf; 1481 case 24: return 0xa; 1482 case 36: return 0xe; 1483 case 48: return 0x9; 1484 case 72: return 0xd; 1485 case 96: return 0x8; 1486 case 108: return 0xc; 1487 1488 /* unsupported rates (should not get there) */ 1489 default: return 0xff; 1490 } 1491} 1492 1493void 1494rt2560_setup_tx_desc(struct rt2560_softc *sc, struct rt2560_tx_desc *desc, 1495 uint32_t flags, int len, int rate, int encrypt, bus_addr_t physaddr) 1496{ 1497 struct ieee80211com *ic = &sc->sc_ic; 1498 uint16_t plcp_length; 1499 int remainder; 1500 1501 desc->flags = htole32(flags); 1502 desc->flags |= htole32(len << 16); 1503 desc->flags |= encrypt ? htole32(RT2560_TX_CIPHER_BUSY) : 1504 htole32(RT2560_TX_BUSY | RT2560_TX_VALID); 1505 1506 desc->physaddr = htole32(physaddr); 1507 desc->wme = htole16( 1508 RT2560_AIFSN(2) | 1509 RT2560_LOGCWMIN(3) | 1510 RT2560_LOGCWMAX(8)); 1511 1512 /* setup PLCP fields */ 1513 desc->plcp_signal = rt2560_plcp_signal(rate); 1514 desc->plcp_service = 4; 1515 1516 len += IEEE80211_CRC_LEN; 1517 if (RAL_RATE_IS_OFDM(rate)) { 1518 desc->flags |= htole32(RT2560_TX_OFDM); 1519 1520 plcp_length = len & 0xfff; 1521 desc->plcp_length_hi = plcp_length >> 6; 1522 desc->plcp_length_lo = plcp_length & 0x3f; 1523 } else { 1524 plcp_length = (16 * len + rate - 1) / rate; 1525 if (rate == 22) { 1526 remainder = (16 * len) % 22; 1527 if (remainder != 0 && remainder < 7) 1528 desc->plcp_service |= RT2560_PLCP_LENGEXT; 1529 } 1530 desc->plcp_length_hi = plcp_length >> 8; 1531 desc->plcp_length_lo = plcp_length & 0xff; 1532 1533 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1534 desc->plcp_signal |= 0x08; 1535 } 1536} 1537 1538#ifndef IEEE80211_STA_ONLY 1539int 1540rt2560_tx_bcn(struct rt2560_softc *sc, struct mbuf *m0, 1541 struct ieee80211_node *ni) 1542{ 1543 struct ieee80211com *ic = &sc->sc_ic; 1544 struct rt2560_tx_desc *desc; 1545 struct rt2560_tx_data *data; 1546 int rate = 2, error; 1547 1548 desc = &sc->bcnq.desc[sc->bcnq.cur]; 1549 data = &sc->bcnq.data[sc->bcnq.cur]; 1550 1551 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1552 BUS_DMA_NOWAIT); 1553 if (error != 0) { 1554 printf("%s: can't map mbuf (error %d)\n", 1555 sc->sc_dev.dv_xname, error); 1556 m_freem(m0); 1557 return error; 1558 } 1559 1560 data->m = m0; 1561 data->ni = ni; 1562 1563 rt2560_setup_tx_desc(sc, desc, RT2560_TX_IFS_NEWBACKOFF | 1564 RT2560_TX_TIMESTAMP, m0->m_pkthdr.len, rate, 0, 1565 data->map->dm_segs->ds_addr); 1566 1567 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 1568 BUS_DMASYNC_PREWRITE); 1569 bus_dmamap_sync(sc->sc_dmat, sc->bcnq.map, 1570 sc->bcnq.cur * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1571 BUS_DMASYNC_PREWRITE); 1572 1573 /* 1574 * Store pointer to ERP Information Element so that we can update it 1575 * dynamically when the slot time changes. 1576 * XXX: this is ugly since it depends on how net80211 builds beacon 1577 * frames but ieee80211_beacon_alloc() don't store offsets for us. 1578 */ 1579 if (ic->ic_curmode == IEEE80211_MODE_11G) { 1580 sc->erp = 1581 mtod(m0, uint8_t *) + 1582 sizeof (struct ieee80211_frame) + 1583 8 + 2 + 2 + 1584 ((ic->ic_flags & IEEE80211_F_HIDENWID) ? 1585 1 : 2 + ni->ni_esslen) + 1586 2 + min(ni->ni_rates.rs_nrates, IEEE80211_RATE_SIZE) + 1587 2 + 1 + 1588 ((ic->ic_opmode == IEEE80211_M_IBSS) ? 4 : 6) + 1589 2; 1590 } 1591 1592 return 0; 1593} 1594#endif 1595 1596int 1597rt2560_tx_mgt(struct rt2560_softc *sc, struct mbuf *m0, 1598 struct ieee80211_node *ni) 1599{ 1600 struct ieee80211com *ic = &sc->sc_ic; 1601 struct rt2560_tx_desc *desc; 1602 struct rt2560_tx_data *data; 1603 struct ieee80211_frame *wh; 1604 uint16_t dur; 1605 uint32_t flags = 0; 1606 int rate = 2, error; 1607 1608 desc = &sc->prioq.desc[sc->prioq.cur]; 1609 data = &sc->prioq.data[sc->prioq.cur]; 1610 1611 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1612 BUS_DMA_NOWAIT); 1613 if (error != 0) { 1614 printf("%s: can't map mbuf (error %d)\n", 1615 sc->sc_dev.dv_xname, error); 1616 m_freem(m0); 1617 return error; 1618 } 1619 1620#if NBPFILTER > 0 1621 if (sc->sc_drvbpf != NULL) { 1622 struct mbuf mb; 1623 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap; 1624 1625 tap->wt_flags = 0; 1626 tap->wt_rate = rate; 1627 tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 1628 tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags); 1629 tap->wt_antenna = sc->tx_ant; 1630 1631 mb.m_data = (caddr_t)tap; 1632 mb.m_len = sc->sc_txtap_len; 1633 mb.m_next = m0; 1634 mb.m_nextpkt = NULL; 1635 mb.m_type = 0; 1636 mb.m_flags = 0; 1637 bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_OUT); 1638 } 1639#endif 1640 1641 data->m = m0; 1642 data->ni = ni; 1643 1644 wh = mtod(m0, struct ieee80211_frame *); 1645 1646 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1647 flags |= RT2560_TX_NEED_ACK; 1648 1649 dur = rt2560_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) + 1650 RAL_SIFS; 1651 *(uint16_t *)wh->i_dur = htole16(dur); 1652 1653#ifndef IEEE80211_STA_ONLY 1654 /* tell hardware to set timestamp for probe responses */ 1655 if ((wh->i_fc[0] & 1656 (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) == 1657 (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP)) 1658 flags |= RT2560_TX_TIMESTAMP; 1659#endif 1660 } 1661 1662 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 0, 1663 data->map->dm_segs->ds_addr); 1664 1665 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 1666 BUS_DMASYNC_PREWRITE); 1667 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1668 sc->prioq.cur * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1669 BUS_DMASYNC_PREWRITE); 1670 1671 DPRINTFN(10, ("sending mgt frame len=%u idx=%u rate=%u\n", 1672 m0->m_pkthdr.len, sc->prioq.cur, rate)); 1673 1674 /* kick prio */ 1675 sc->prioq.queued++; 1676 sc->prioq.cur = (sc->prioq.cur + 1) % RT2560_PRIO_RING_COUNT; 1677 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_PRIO); 1678 1679 return 0; 1680} 1681 1682int 1683rt2560_tx_data(struct rt2560_softc *sc, struct mbuf *m0, 1684 struct ieee80211_node *ni) 1685{ 1686 struct ieee80211com *ic = &sc->sc_ic; 1687 struct rt2560_tx_ring *txq = &sc->txq; 1688 struct rt2560_tx_desc *desc; 1689 struct rt2560_tx_data *data; 1690 struct ieee80211_frame *wh; 1691 struct ieee80211_key *k; 1692 struct mbuf *m1; 1693 uint16_t dur; 1694 uint32_t flags = 0; 1695 int pktlen, rate, needcts = 0, needrts = 0, error; 1696 1697 wh = mtod(m0, struct ieee80211_frame *); 1698 1699 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 1700 k = ieee80211_get_txkey(ic, wh, ni); 1701 1702 if ((m0 = ieee80211_encrypt(ic, m0, k)) == NULL) 1703 return ENOBUFS; 1704 1705 /* packet header may have moved, reset our local pointer */ 1706 wh = mtod(m0, struct ieee80211_frame *); 1707 } 1708 1709 /* compute actual packet length (including CRC and crypto overhead) */ 1710 pktlen = m0->m_pkthdr.len + IEEE80211_CRC_LEN; 1711 1712 /* pickup a rate */ 1713 if (IEEE80211_IS_MULTICAST(wh->i_addr1) || 1714 ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 1715 IEEE80211_FC0_TYPE_MGT)) { 1716 /* mgmt/multicast frames are sent at the lowest avail. rate */ 1717 rate = ni->ni_rates.rs_rates[0]; 1718 } else if (ic->ic_fixed_rate != -1) { 1719 rate = ic->ic_sup_rates[ic->ic_curmode]. 1720 rs_rates[ic->ic_fixed_rate]; 1721 } else 1722 rate = ni->ni_rates.rs_rates[ni->ni_txrate]; 1723 if (rate == 0) 1724 rate = 2; /* XXX should not happen */ 1725 rate &= IEEE80211_RATE_VAL; 1726 1727 /* 1728 * Packet Bursting: backoff after ppb=8 frames to give other STAs a 1729 * chance to contend for the wireless medium. 1730 */ 1731 if (ic->ic_opmode == IEEE80211_M_STA && (ni->ni_txseq & 7)) 1732 flags |= RT2560_TX_IFS_SIFS; 1733 1734 /* check if RTS/CTS or CTS-to-self protection must be used */ 1735 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1736 /* multicast frames are not sent at OFDM rates in 802.11b/g */ 1737 if (pktlen > ic->ic_rtsthreshold) { 1738 needrts = 1; /* RTS/CTS based on frame length */ 1739 } else if ((ic->ic_flags & IEEE80211_F_USEPROT) && 1740 RAL_RATE_IS_OFDM(rate)) { 1741 if (ic->ic_protmode == IEEE80211_PROT_CTSONLY) 1742 needcts = 1; /* CTS-to-self */ 1743 else if (ic->ic_protmode == IEEE80211_PROT_RTSCTS) 1744 needrts = 1; /* RTS/CTS */ 1745 } 1746 } 1747 if (needrts || needcts) { 1748 struct mbuf *mprot; 1749 int protrate, ackrate; 1750 1751 protrate = 2; /* XXX */ 1752 ackrate = rt2560_ack_rate(ic, rate); 1753 1754 dur = rt2560_txtime(pktlen, rate, ic->ic_flags) + 1755 rt2560_txtime(RAL_ACK_SIZE, ackrate, ic->ic_flags) + 1756 2 * RAL_SIFS; 1757 if (needrts) { 1758 dur += rt2560_txtime(RAL_CTS_SIZE, rt2560_ack_rate(ic, 1759 protrate), ic->ic_flags) + RAL_SIFS; 1760 mprot = ieee80211_get_rts(ic, wh, dur); 1761 } else { 1762 mprot = ieee80211_get_cts_to_self(ic, dur); 1763 } 1764 if (mprot == NULL) { 1765 printf("%s: could not allocate protection frame\n", 1766 sc->sc_dev.dv_xname); 1767 m_freem(m0); 1768 return ENOBUFS; 1769 } 1770 1771 desc = &txq->desc[txq->cur_encrypt]; 1772 data = &txq->data[txq->cur_encrypt]; 1773 1774 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, mprot, 1775 BUS_DMA_NOWAIT); 1776 if (error != 0) { 1777 printf("%s: can't map mbuf (error %d)\n", 1778 sc->sc_dev.dv_xname, error); 1779 m_freem(mprot); 1780 m_freem(m0); 1781 return error; 1782 } 1783 1784 data->m = mprot; 1785 /* avoid multiple free() of the same node for each fragment */ 1786 data->ni = ieee80211_ref_node(ni); 1787 1788 /* XXX may want to pass the protection frame to BPF */ 1789 1790 rt2560_setup_tx_desc(sc, desc, 1791 (needrts ? RT2560_TX_NEED_ACK : 0) | RT2560_TX_MORE_FRAG, 1792 mprot->m_pkthdr.len, protrate, 1, 1793 data->map->dm_segs->ds_addr); 1794 1795 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1796 data->map->dm_mapsize, BUS_DMASYNC_PREWRITE); 1797 bus_dmamap_sync(sc->sc_dmat, txq->map, 1798 txq->cur_encrypt * RT2560_TX_DESC_SIZE, 1799 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 1800 1801 txq->queued++; 1802 if (++txq->cur_encrypt >= txq->count) 1803 txq->cur_encrypt = 0; 1804 1805 flags |= RT2560_TX_LONG_RETRY | RT2560_TX_IFS_SIFS; 1806 } 1807 1808 data = &txq->data[txq->cur_encrypt]; 1809 desc = &txq->desc[txq->cur_encrypt]; 1810 1811 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1812 BUS_DMA_NOWAIT); 1813 if (error != 0 && error != EFBIG) { 1814 printf("%s: can't map mbuf (error %d)\n", 1815 sc->sc_dev.dv_xname, error); 1816 m_freem(m0); 1817 return error; 1818 } 1819 if (error != 0) { 1820 /* too many fragments, linearize */ 1821 MGETHDR(m1, M_DONTWAIT, MT_DATA); 1822 if (m1 == NULL) { 1823 m_freem(m0); 1824 return ENOBUFS; 1825 } 1826 if (m0->m_pkthdr.len > MHLEN) { 1827 MCLGET(m1, M_DONTWAIT); 1828 if (!(m1->m_flags & M_EXT)) { 1829 m_freem(m0); 1830 m_freem(m1); 1831 return ENOBUFS; 1832 } 1833 } 1834 m_copydata(m0, 0, m0->m_pkthdr.len, mtod(m1, caddr_t)); 1835 m1->m_pkthdr.len = m1->m_len = m0->m_pkthdr.len; 1836 m_freem(m0); 1837 m0 = m1; 1838 1839 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1840 BUS_DMA_NOWAIT); 1841 if (error != 0) { 1842 printf("%s: can't map mbuf (error %d)\n", 1843 sc->sc_dev.dv_xname, error); 1844 m_freem(m0); 1845 return error; 1846 } 1847 1848 /* packet header have moved, reset our local pointer */ 1849 wh = mtod(m0, struct ieee80211_frame *); 1850 } 1851 1852#if NBPFILTER > 0 1853 if (sc->sc_drvbpf != NULL) { 1854 struct mbuf mb; 1855 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap; 1856 1857 tap->wt_flags = 0; 1858 tap->wt_rate = rate; 1859 tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 1860 tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags); 1861 tap->wt_antenna = sc->tx_ant; 1862 1863 mb.m_data = (caddr_t)tap; 1864 mb.m_len = sc->sc_txtap_len; 1865 mb.m_next = m0; 1866 mb.m_nextpkt = NULL; 1867 mb.m_type = 0; 1868 mb.m_flags = 0; 1869 bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_OUT); 1870 } 1871#endif 1872 1873 data->m = m0; 1874 data->ni = ni; 1875 1876 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1877 flags |= RT2560_TX_NEED_ACK; 1878 1879 dur = rt2560_txtime(RAL_ACK_SIZE, rt2560_ack_rate(ic, rate), 1880 ic->ic_flags) + RAL_SIFS; 1881 *(uint16_t *)wh->i_dur = htole16(dur); 1882 } 1883 1884 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 1, 1885 data->map->dm_segs->ds_addr); 1886 1887 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 1888 BUS_DMASYNC_PREWRITE); 1889 bus_dmamap_sync(sc->sc_dmat, txq->map, 1890 txq->cur_encrypt * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1891 BUS_DMASYNC_PREWRITE); 1892 1893 DPRINTFN(10, ("sending frame len=%u idx=%u rate=%u\n", 1894 m0->m_pkthdr.len, txq->cur_encrypt, rate)); 1895 1896 /* kick encrypt */ 1897 txq->queued++; 1898 if (++txq->cur_encrypt >= txq->count) 1899 txq->cur_encrypt = 0; 1900 RAL_WRITE(sc, RT2560_SECCSR1, RT2560_KICK_ENCRYPT); 1901 1902 return 0; 1903} 1904 1905void 1906rt2560_start(struct ifnet *ifp) 1907{ 1908 struct rt2560_softc *sc = ifp->if_softc; 1909 struct ieee80211com *ic = &sc->sc_ic; 1910 struct mbuf *m0; 1911 struct ieee80211_node *ni; 1912 1913 /* 1914 * net80211 may still try to send management frames even if the 1915 * IFF_RUNNING flag is not set... 1916 */ 1917 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 1918 return; 1919 1920 for (;;) { 1921 IF_POLL(&ic->ic_mgtq, m0); 1922 if (m0 != NULL) { 1923 if (sc->prioq.queued >= RT2560_PRIO_RING_COUNT) { 1924 ifp->if_flags |= IFF_OACTIVE; 1925 break; 1926 } 1927 IF_DEQUEUE(&ic->ic_mgtq, m0); 1928 1929 ni = (struct ieee80211_node *)m0->m_pkthdr.rcvif; 1930 m0->m_pkthdr.rcvif = NULL; 1931#if NBPFILTER > 0 1932 if (ic->ic_rawbpf != NULL) 1933 bpf_mtap(ic->ic_rawbpf, m0, BPF_DIRECTION_OUT); 1934#endif 1935 if (rt2560_tx_mgt(sc, m0, ni) != 0) 1936 break; 1937 1938 } else { 1939 if (ic->ic_state != IEEE80211_S_RUN) 1940 break; 1941 IFQ_POLL(&ifp->if_snd, m0); 1942 if (m0 == NULL) 1943 break; 1944 if (sc->txq.queued >= RT2560_TX_RING_COUNT - 1) { 1945 ifp->if_flags |= IFF_OACTIVE; 1946 break; 1947 } 1948 IFQ_DEQUEUE(&ifp->if_snd, m0); 1949#if NBPFILTER > 0 1950 if (ifp->if_bpf != NULL) 1951 bpf_mtap(ifp->if_bpf, m0, BPF_DIRECTION_OUT); 1952#endif 1953 m0 = ieee80211_encap(ifp, m0, &ni); 1954 if (m0 == NULL) 1955 continue; 1956#if NBPFILTER > 0 1957 if (ic->ic_rawbpf != NULL) 1958 bpf_mtap(ic->ic_rawbpf, m0, BPF_DIRECTION_OUT); 1959#endif 1960 if (rt2560_tx_data(sc, m0, ni) != 0) { 1961 if (ni != NULL) 1962 ieee80211_release_node(ic, ni); 1963 ifp->if_oerrors++; 1964 break; 1965 } 1966 } 1967 1968 sc->sc_tx_timer = 5; 1969 ifp->if_timer = 1; 1970 } 1971} 1972 1973void 1974rt2560_watchdog(struct ifnet *ifp) 1975{ 1976 struct rt2560_softc *sc = ifp->if_softc; 1977 1978 ifp->if_timer = 0; 1979 1980 if (sc->sc_tx_timer > 0) { 1981 if (--sc->sc_tx_timer == 0) { 1982 printf("%s: device timeout\n", sc->sc_dev.dv_xname); 1983 rt2560_init(ifp); 1984 ifp->if_oerrors++; 1985 return; 1986 } 1987 ifp->if_timer = 1; 1988 } 1989 1990 ieee80211_watchdog(ifp); 1991} 1992 1993int 1994rt2560_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1995{ 1996 struct rt2560_softc *sc = ifp->if_softc; 1997 struct ieee80211com *ic = &sc->sc_ic; 1998 struct ifaddr *ifa; 1999 struct ifreq *ifr; 2000 int s, error = 0; 2001 2002 s = splnet(); 2003 2004 switch (cmd) { 2005 case SIOCSIFADDR: 2006 ifa = (struct ifaddr *)data; 2007 ifp->if_flags |= IFF_UP; 2008#ifdef INET 2009 if (ifa->ifa_addr->sa_family == AF_INET) 2010 arp_ifinit(&ic->ic_ac, ifa); 2011#endif 2012 /* FALLTHROUGH */ 2013 case SIOCSIFFLAGS: 2014 if (ifp->if_flags & IFF_UP) { 2015 if (ifp->if_flags & IFF_RUNNING) 2016 rt2560_update_promisc(sc); 2017 else 2018 rt2560_init(ifp); 2019 } else { 2020 if (ifp->if_flags & IFF_RUNNING) 2021 rt2560_stop(ifp, 1); 2022 } 2023 break; 2024 2025 case SIOCADDMULTI: 2026 case SIOCDELMULTI: 2027 ifr = (struct ifreq *)data; 2028 error = (cmd == SIOCADDMULTI) ? 2029 ether_addmulti(ifr, &ic->ic_ac) : 2030 ether_delmulti(ifr, &ic->ic_ac); 2031 2032 if (error == ENETRESET) 2033 error = 0; 2034 break; 2035 2036 case SIOCS80211CHANNEL: 2037 /* 2038 * This allows for fast channel switching in monitor mode 2039 * (used by kismet). In IBSS mode, we must explicitly reset 2040 * the interface to generate a new beacon frame. 2041 */ 2042 error = ieee80211_ioctl(ifp, cmd, data); 2043 if (error == ENETRESET && 2044 ic->ic_opmode == IEEE80211_M_MONITOR) { 2045 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 2046 (IFF_UP | IFF_RUNNING)) 2047 rt2560_set_chan(sc, ic->ic_ibss_chan); 2048 error = 0; 2049 } 2050 break; 2051 2052 default: 2053 error = ieee80211_ioctl(ifp, cmd, data); 2054 } 2055 2056 if (error == ENETRESET) { 2057 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 2058 (IFF_UP | IFF_RUNNING)) 2059 rt2560_init(ifp); 2060 error = 0; 2061 } 2062 2063 splx(s); 2064 2065 return error; 2066} 2067 2068void 2069rt2560_bbp_write(struct rt2560_softc *sc, uint8_t reg, uint8_t val) 2070{ 2071 uint32_t tmp; 2072 int ntries; 2073 2074 for (ntries = 0; ntries < 100; ntries++) { 2075 if (!(RAL_READ(sc, RT2560_BBPCSR) & RT2560_BBP_BUSY)) 2076 break; 2077 DELAY(1); 2078 } 2079 if (ntries == 100) { 2080 printf("%s: could not write to BBP\n", sc->sc_dev.dv_xname); 2081 return; 2082 } 2083 2084 tmp = RT2560_BBP_WRITE | RT2560_BBP_BUSY | reg << 8 | val; 2085 RAL_WRITE(sc, RT2560_BBPCSR, tmp); 2086 2087 DPRINTFN(15, ("BBP R%u <- 0x%02x\n", reg, val)); 2088} 2089 2090uint8_t 2091rt2560_bbp_read(struct rt2560_softc *sc, uint8_t reg) 2092{ 2093 uint32_t val; 2094 int ntries; 2095 2096 val = RT2560_BBP_BUSY | reg << 8; 2097 RAL_WRITE(sc, RT2560_BBPCSR, val); 2098 2099 for (ntries = 0; ntries < 100; ntries++) { 2100 val = RAL_READ(sc, RT2560_BBPCSR); 2101 if (!(val & RT2560_BBP_BUSY)) 2102 return val & 0xff; 2103 DELAY(1); 2104 } 2105 2106 printf("%s: could not read from BBP\n", sc->sc_dev.dv_xname); 2107 return 0; 2108} 2109 2110void 2111rt2560_rf_write(struct rt2560_softc *sc, uint8_t reg, uint32_t val) 2112{ 2113 uint32_t tmp; 2114 int ntries; 2115 2116 for (ntries = 0; ntries < 100; ntries++) { 2117 if (!(RAL_READ(sc, RT2560_RFCSR) & RT2560_RF_BUSY)) 2118 break; 2119 DELAY(1); 2120 } 2121 if (ntries == 100) { 2122 printf("%s: could not write to RF\n", sc->sc_dev.dv_xname); 2123 return; 2124 } 2125 2126 tmp = RT2560_RF_BUSY | RT2560_RF_20BIT | (val & 0xfffff) << 2 | 2127 (reg & 0x3); 2128 RAL_WRITE(sc, RT2560_RFCSR, tmp); 2129 2130 /* remember last written value in sc */ 2131 sc->rf_regs[reg] = val; 2132 2133 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff)); 2134} 2135 2136void 2137rt2560_set_chan(struct rt2560_softc *sc, struct ieee80211_channel *c) 2138{ 2139 struct ieee80211com *ic = &sc->sc_ic; 2140 uint8_t power, tmp; 2141 u_int chan; 2142 2143 chan = ieee80211_chan2ieee(ic, c); 2144 if (chan == 0 || chan == IEEE80211_CHAN_ANY) 2145 return; 2146 2147 power = min(sc->txpow[chan - 1], 31); 2148 2149 DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power)); 2150 2151 switch (sc->rf_rev) { 2152 case RT2560_RF_2522: 2153 rt2560_rf_write(sc, RT2560_RF1, 0x00814); 2154 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2522_r2[chan - 1]); 2155 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040); 2156 break; 2157 2158 case RT2560_RF_2523: 2159 rt2560_rf_write(sc, RT2560_RF1, 0x08804); 2160 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2523_r2[chan - 1]); 2161 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x38044); 2162 rt2560_rf_write(sc, RT2560_RF4, 2163 (chan == 14) ? 0x00280 : 0x00286); 2164 break; 2165 2166 case RT2560_RF_2524: 2167 rt2560_rf_write(sc, RT2560_RF1, 0x0c808); 2168 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2524_r2[chan - 1]); 2169 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040); 2170 rt2560_rf_write(sc, RT2560_RF4, 2171 (chan == 14) ? 0x00280 : 0x00286); 2172 break; 2173 2174 case RT2560_RF_2525: 2175 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2176 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525_hi_r2[chan - 1]); 2177 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2178 rt2560_rf_write(sc, RT2560_RF4, 2179 (chan == 14) ? 0x00280 : 0x00286); 2180 2181 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2182 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525_r2[chan - 1]); 2183 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2184 rt2560_rf_write(sc, RT2560_RF4, 2185 (chan == 14) ? 0x00280 : 0x00286); 2186 break; 2187 2188 case RT2560_RF_2525E: 2189 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2190 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525e_r2[chan - 1]); 2191 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2192 rt2560_rf_write(sc, RT2560_RF4, 2193 (chan == 14) ? 0x00286 : 0x00282); 2194 break; 2195 2196 case RT2560_RF_2526: 2197 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2526_hi_r2[chan - 1]); 2198 rt2560_rf_write(sc, RT2560_RF4, 2199 (chan & 1) ? 0x00386 : 0x00381); 2200 rt2560_rf_write(sc, RT2560_RF1, 0x08804); 2201 2202 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2526_r2[chan - 1]); 2203 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2204 rt2560_rf_write(sc, RT2560_RF4, 2205 (chan & 1) ? 0x00386 : 0x00381); 2206 break; 2207 } 2208 2209 if (ic->ic_opmode != IEEE80211_M_MONITOR && 2210 ic->ic_state != IEEE80211_S_SCAN) { 2211 /* set Japan filter bit for channel 14 */ 2212 tmp = rt2560_bbp_read(sc, 70); 2213 2214 tmp &= ~RT2560_JAPAN_FILTER; 2215 if (chan == 14) 2216 tmp |= RT2560_JAPAN_FILTER; 2217 2218 rt2560_bbp_write(sc, 70, tmp); 2219 2220 DELAY(1000); /* RF needs a 1ms delay here */ 2221 rt2560_disable_rf_tune(sc); 2222 2223 /* clear CRC errors */ 2224 RAL_READ(sc, RT2560_CNT0); 2225 } 2226} 2227 2228/* 2229 * Disable RF auto-tuning. 2230 */ 2231void 2232rt2560_disable_rf_tune(struct rt2560_softc *sc) 2233{ 2234 uint32_t tmp; 2235 2236 if (sc->rf_rev != RT2560_RF_2523) { 2237 tmp = sc->rf_regs[RT2560_RF1] & ~RT2560_RF1_AUTOTUNE; 2238 rt2560_rf_write(sc, RT2560_RF1, tmp); 2239 } 2240 2241 tmp = sc->rf_regs[RT2560_RF3] & ~RT2560_RF3_AUTOTUNE; 2242 rt2560_rf_write(sc, RT2560_RF3, tmp); 2243 2244 DPRINTFN(2, ("disabling RF autotune\n")); 2245} 2246 2247/* 2248 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF 2249 * synchronization. 2250 */ 2251void 2252rt2560_enable_tsf_sync(struct rt2560_softc *sc) 2253{ 2254 struct ieee80211com *ic = &sc->sc_ic; 2255 uint16_t logcwmin, preload; 2256 uint32_t tmp; 2257 2258 /* first, disable TSF synchronization */ 2259 RAL_WRITE(sc, RT2560_CSR14, 0); 2260 2261 tmp = 16 * ic->ic_bss->ni_intval; 2262 RAL_WRITE(sc, RT2560_CSR12, tmp); 2263 2264 RAL_WRITE(sc, RT2560_CSR13, 0); 2265 2266 logcwmin = 5; 2267 preload = (ic->ic_opmode == IEEE80211_M_STA) ? 384 : 1024; 2268 tmp = logcwmin << 16 | preload; 2269 RAL_WRITE(sc, RT2560_BCNOCSR, tmp); 2270 2271 /* finally, enable TSF synchronization */ 2272 tmp = RT2560_ENABLE_TSF | RT2560_ENABLE_TBCN; 2273 if (ic->ic_opmode == IEEE80211_M_STA) 2274 tmp |= RT2560_ENABLE_TSF_SYNC(1); 2275#ifndef IEEE80211_STA_ONLY 2276 else 2277 tmp |= RT2560_ENABLE_TSF_SYNC(2) | 2278 RT2560_ENABLE_BEACON_GENERATOR; 2279#endif 2280 RAL_WRITE(sc, RT2560_CSR14, tmp); 2281 2282 DPRINTF(("enabling TSF synchronization\n")); 2283} 2284 2285void 2286rt2560_update_plcp(struct rt2560_softc *sc) 2287{ 2288 struct ieee80211com *ic = &sc->sc_ic; 2289 2290 /* no short preamble for 1Mbps */ 2291 RAL_WRITE(sc, RT2560_PLCP1MCSR, 0x00700400); 2292 2293 if (!(ic->ic_flags & IEEE80211_F_SHPREAMBLE)) { 2294 /* values taken from the reference driver */ 2295 RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380401); 2296 RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x00150402); 2297 RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b8403); 2298 } else { 2299 /* same values as above or'ed 0x8 */ 2300 RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380409); 2301 RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x0015040a); 2302 RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b840b); 2303 } 2304 2305 DPRINTF(("updating PLCP for %s preamble\n", 2306 (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ? "short" : "long")); 2307} 2308 2309void 2310rt2560_updateslot(struct ieee80211com *ic) 2311{ 2312 struct rt2560_softc *sc = ic->ic_if.if_softc; 2313 2314#ifndef IEEE80211_STA_ONLY 2315 if (ic->ic_opmode == IEEE80211_M_HOSTAP) { 2316 /* 2317 * In HostAP mode, we defer setting of new slot time until 2318 * updated ERP Information Element has propagated to all 2319 * associated STAs. 2320 */ 2321 sc->sc_flags |= RT2560_UPDATE_SLOT; 2322 } else 2323#endif 2324 rt2560_set_slottime(sc); 2325} 2326 2327/* 2328 * IEEE 802.11a (and possibly 802.11g) use short slot time. Refer to 2329 * IEEE Std 802.11-1999 pp. 85 to know how these values are computed. 2330 */ 2331void 2332rt2560_set_slottime(struct rt2560_softc *sc) 2333{ 2334 struct ieee80211com *ic = &sc->sc_ic; 2335 uint8_t slottime; 2336 uint16_t sifs, pifs, difs, eifs; 2337 uint32_t tmp; 2338 2339 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 2340 2341 /* define the MAC slot boundaries */ 2342 sifs = RAL_SIFS - RT2560_RXTX_TURNAROUND; 2343 pifs = sifs + slottime; 2344 difs = sifs + 2 * slottime; 2345 eifs = (ic->ic_curmode == IEEE80211_MODE_11B) ? 364 : 60; 2346 2347 tmp = RAL_READ(sc, RT2560_CSR11); 2348 tmp = (tmp & ~0x1f00) | slottime << 8; 2349 RAL_WRITE(sc, RT2560_CSR11, tmp); 2350 2351 tmp = pifs << 16 | sifs; 2352 RAL_WRITE(sc, RT2560_CSR18, tmp); 2353 2354 tmp = eifs << 16 | difs; 2355 RAL_WRITE(sc, RT2560_CSR19, tmp); 2356 2357 DPRINTF(("setting slottime to %uus\n", slottime)); 2358} 2359 2360void 2361rt2560_set_basicrates(struct rt2560_softc *sc) 2362{ 2363 struct ieee80211com *ic = &sc->sc_ic; 2364 2365 /* update basic rate set */ 2366 if (ic->ic_curmode == IEEE80211_MODE_11B) { 2367 /* 11b basic rates: 1, 2Mbps */ 2368 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x3); 2369 } else { 2370 /* 11b/g basic rates: 1, 2, 5.5, 11Mbps */ 2371 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0xf); 2372 } 2373} 2374 2375void 2376rt2560_update_led(struct rt2560_softc *sc, int led1, int led2) 2377{ 2378 uint32_t tmp; 2379 2380 /* set ON period to 70ms and OFF period to 30ms */ 2381 tmp = led1 << 16 | led2 << 17 | 70 << 8 | 30; 2382 RAL_WRITE(sc, RT2560_LEDCSR, tmp); 2383} 2384 2385void 2386rt2560_set_bssid(struct rt2560_softc *sc, uint8_t *bssid) 2387{ 2388 uint32_t tmp; 2389 2390 tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24; 2391 RAL_WRITE(sc, RT2560_CSR5, tmp); 2392 2393 tmp = bssid[4] | bssid[5] << 8; 2394 RAL_WRITE(sc, RT2560_CSR6, tmp); 2395 2396 DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid))); 2397} 2398 2399void 2400rt2560_set_macaddr(struct rt2560_softc *sc, uint8_t *addr) 2401{ 2402 uint32_t tmp; 2403 2404 tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24; 2405 RAL_WRITE(sc, RT2560_CSR3, tmp); 2406 2407 tmp = addr[4] | addr[5] << 8; 2408 RAL_WRITE(sc, RT2560_CSR4, tmp); 2409 2410 DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr))); 2411} 2412 2413void 2414rt2560_get_macaddr(struct rt2560_softc *sc, uint8_t *addr) 2415{ 2416 uint32_t tmp; 2417 2418 tmp = RAL_READ(sc, RT2560_CSR3); 2419 addr[0] = tmp & 0xff; 2420 addr[1] = (tmp >> 8) & 0xff; 2421 addr[2] = (tmp >> 16) & 0xff; 2422 addr[3] = (tmp >> 24); 2423 2424 tmp = RAL_READ(sc, RT2560_CSR4); 2425 addr[4] = tmp & 0xff; 2426 addr[5] = (tmp >> 8) & 0xff; 2427} 2428 2429void 2430rt2560_update_promisc(struct rt2560_softc *sc) 2431{ 2432 struct ifnet *ifp = &sc->sc_ic.ic_if; 2433 uint32_t tmp; 2434 2435 tmp = RAL_READ(sc, RT2560_RXCSR0); 2436 2437 tmp &= ~RT2560_DROP_NOT_TO_ME; 2438 if (!(ifp->if_flags & IFF_PROMISC)) 2439 tmp |= RT2560_DROP_NOT_TO_ME; 2440 2441 RAL_WRITE(sc, RT2560_RXCSR0, tmp); 2442 2443 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? 2444 "entering" : "leaving")); 2445} 2446 2447void 2448rt2560_set_txantenna(struct rt2560_softc *sc, int antenna) 2449{ 2450 uint32_t tmp; 2451 uint8_t tx; 2452 2453 tx = rt2560_bbp_read(sc, RT2560_BBP_TX) & ~RT2560_BBP_ANTMASK; 2454 if (antenna == 1) 2455 tx |= RT2560_BBP_ANTA; 2456 else if (antenna == 2) 2457 tx |= RT2560_BBP_ANTB; 2458 else 2459 tx |= RT2560_BBP_DIVERSITY; 2460 2461 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */ 2462 if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526 || 2463 sc->rf_rev == RT2560_RF_5222) 2464 tx |= RT2560_BBP_FLIPIQ; 2465 2466 rt2560_bbp_write(sc, RT2560_BBP_TX, tx); 2467 2468 /* update values for CCK and OFDM in BBPCSR1 */ 2469 tmp = RAL_READ(sc, RT2560_BBPCSR1) & ~0x00070007; 2470 tmp |= (tx & 0x7) << 16 | (tx & 0x7); 2471 RAL_WRITE(sc, RT2560_BBPCSR1, tmp); 2472} 2473 2474void 2475rt2560_set_rxantenna(struct rt2560_softc *sc, int antenna) 2476{ 2477 uint8_t rx; 2478 2479 rx = rt2560_bbp_read(sc, RT2560_BBP_RX) & ~RT2560_BBP_ANTMASK; 2480 if (antenna == 1) 2481 rx |= RT2560_BBP_ANTA; 2482 else if (antenna == 2) 2483 rx |= RT2560_BBP_ANTB; 2484 else 2485 rx |= RT2560_BBP_DIVERSITY; 2486 2487 /* need to force no I/Q flip for RF 2525e and 2526 */ 2488 if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526) 2489 rx &= ~RT2560_BBP_FLIPIQ; 2490 2491 rt2560_bbp_write(sc, RT2560_BBP_RX, rx); 2492} 2493 2494const char * 2495rt2560_get_rf(int rev) 2496{ 2497 switch (rev) { 2498 case RT2560_RF_2522: return "RT2522"; 2499 case RT2560_RF_2523: return "RT2523"; 2500 case RT2560_RF_2524: return "RT2524"; 2501 case RT2560_RF_2525: return "RT2525"; 2502 case RT2560_RF_2525E: return "RT2525e"; 2503 case RT2560_RF_2526: return "RT2526"; 2504 case RT2560_RF_5222: return "RT5222"; 2505 default: return "unknown"; 2506 } 2507} 2508 2509void 2510rt2560_read_eeprom(struct rt2560_softc *sc) 2511{ 2512 uint16_t val; 2513 int i; 2514 2515 val = rt2560_eeprom_read(sc, RT2560_EEPROM_CONFIG0); 2516 sc->rf_rev = (val >> 11) & 0x1f; 2517 sc->hw_radio = (val >> 10) & 0x1; 2518 sc->led_mode = (val >> 6) & 0x7; 2519 sc->rx_ant = (val >> 4) & 0x3; 2520 sc->tx_ant = (val >> 2) & 0x3; 2521 sc->nb_ant = val & 0x3; 2522 2523 /* read default values for BBP registers */ 2524 for (i = 0; i < 16; i++) { 2525 val = rt2560_eeprom_read(sc, RT2560_EEPROM_BBP_BASE + i); 2526 sc->bbp_prom[i].reg = val >> 8; 2527 sc->bbp_prom[i].val = val & 0xff; 2528 } 2529 2530 /* read Tx power for all b/g channels */ 2531 for (i = 0; i < 14 / 2; i++) { 2532 val = rt2560_eeprom_read(sc, RT2560_EEPROM_TXPOWER + i); 2533 sc->txpow[i * 2] = val >> 8; 2534 sc->txpow[i * 2 + 1] = val & 0xff; 2535 } 2536} 2537 2538int 2539rt2560_bbp_init(struct rt2560_softc *sc) 2540{ 2541 int i, ntries; 2542 2543 /* wait for BBP to be ready */ 2544 for (ntries = 0; ntries < 100; ntries++) { 2545 if (rt2560_bbp_read(sc, RT2560_BBP_VERSION) != 0) 2546 break; 2547 DELAY(1); 2548 } 2549 if (ntries == 100) { 2550 printf("%s: timeout waiting for BBP\n", sc->sc_dev.dv_xname); 2551 return EIO; 2552 } 2553 2554 /* initialize BBP registers to default values */ 2555 for (i = 0; i < nitems(rt2560_def_bbp); i++) { 2556 rt2560_bbp_write(sc, rt2560_def_bbp[i].reg, 2557 rt2560_def_bbp[i].val); 2558 } 2559#if 0 2560 /* initialize BBP registers to values stored in EEPROM */ 2561 for (i = 0; i < 16; i++) { 2562 if (sc->bbp_prom[i].reg == 0xff) 2563 continue; 2564 rt2560_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 2565 } 2566#endif 2567 2568 return 0; 2569} 2570 2571int 2572rt2560_init(struct ifnet *ifp) 2573{ 2574 struct rt2560_softc *sc = ifp->if_softc; 2575 struct ieee80211com *ic = &sc->sc_ic; 2576 uint32_t tmp; 2577 int i; 2578 2579 /* for CardBus, power on the socket */ 2580 if (!(sc->sc_flags & RT2560_ENABLED)) { 2581 if (sc->sc_enable != NULL && (*sc->sc_enable)(sc) != 0) { 2582 printf("%s: could not enable device\n", 2583 sc->sc_dev.dv_xname); 2584 return EIO; 2585 } 2586 sc->sc_flags |= RT2560_ENABLED; 2587 } 2588 2589 rt2560_stop(ifp, 0); 2590 2591 /* setup tx rings */ 2592 tmp = RT2560_PRIO_RING_COUNT << 24 | 2593 RT2560_ATIM_RING_COUNT << 16 | 2594 RT2560_TX_RING_COUNT << 8 | 2595 RT2560_TX_DESC_SIZE; 2596 2597 /* rings _must_ be initialized in this _exact_ order! */ 2598 RAL_WRITE(sc, RT2560_TXCSR2, tmp); 2599 RAL_WRITE(sc, RT2560_TXCSR3, sc->txq.physaddr); 2600 RAL_WRITE(sc, RT2560_TXCSR5, sc->prioq.physaddr); 2601 RAL_WRITE(sc, RT2560_TXCSR4, sc->atimq.physaddr); 2602 RAL_WRITE(sc, RT2560_TXCSR6, sc->bcnq.physaddr); 2603 2604 /* setup rx ring */ 2605 tmp = RT2560_RX_RING_COUNT << 8 | RT2560_RX_DESC_SIZE; 2606 2607 RAL_WRITE(sc, RT2560_RXCSR1, tmp); 2608 RAL_WRITE(sc, RT2560_RXCSR2, sc->rxq.physaddr); 2609 2610 /* initialize MAC registers to default values */ 2611 for (i = 0; i < nitems(rt2560_def_mac); i++) 2612 RAL_WRITE(sc, rt2560_def_mac[i].reg, rt2560_def_mac[i].val); 2613 2614 IEEE80211_ADDR_COPY(ic->ic_myaddr, LLADDR(ifp->if_sadl)); 2615 rt2560_set_macaddr(sc, ic->ic_myaddr); 2616 2617 /* set basic rate set (will be updated later) */ 2618 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x153); 2619 2620 rt2560_set_txantenna(sc, 1); 2621 rt2560_set_rxantenna(sc, 1); 2622 rt2560_set_slottime(sc); 2623 rt2560_update_plcp(sc); 2624 rt2560_update_led(sc, 0, 0); 2625 2626 RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC); 2627 RAL_WRITE(sc, RT2560_CSR1, RT2560_HOST_READY); 2628 2629 if (rt2560_bbp_init(sc) != 0) { 2630 rt2560_stop(ifp, 1); 2631 return EIO; 2632 } 2633 2634 /* set default BSS channel */ 2635 ic->ic_bss->ni_chan = ic->ic_ibss_chan; 2636 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 2637 2638 /* kick Rx */ 2639 tmp = RT2560_DROP_PHY_ERROR | RT2560_DROP_CRC_ERROR; 2640 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2641 tmp |= RT2560_DROP_CTL | RT2560_DROP_VERSION_ERROR; 2642#ifndef IEEE80211_STA_ONLY 2643 if (ic->ic_opmode != IEEE80211_M_HOSTAP) 2644#endif 2645 tmp |= RT2560_DROP_TODS; 2646 if (!(ifp->if_flags & IFF_PROMISC)) 2647 tmp |= RT2560_DROP_NOT_TO_ME; 2648 } 2649 RAL_WRITE(sc, RT2560_RXCSR0, tmp); 2650 2651 /* clear old FCS and Rx FIFO errors */ 2652 RAL_READ(sc, RT2560_CNT0); 2653 RAL_READ(sc, RT2560_CNT4); 2654 2655 /* clear any pending interrupts */ 2656 RAL_WRITE(sc, RT2560_CSR7, 0xffffffff); 2657 2658 /* enable interrupts */ 2659 RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK); 2660 2661 ifp->if_flags &= ~IFF_OACTIVE; 2662 ifp->if_flags |= IFF_RUNNING; 2663 2664 if (ic->ic_opmode == IEEE80211_M_MONITOR) 2665 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 2666 else 2667 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 2668 2669 return 0; 2670} 2671 2672void 2673rt2560_stop(struct ifnet *ifp, int disable) 2674{ 2675 struct rt2560_softc *sc = ifp->if_softc; 2676 struct ieee80211com *ic = &sc->sc_ic; 2677 2678 sc->sc_tx_timer = 0; 2679 ifp->if_timer = 0; 2680 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 2681 2682 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); /* free all nodes */ 2683 2684 /* abort Tx */ 2685 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_ABORT_TX); 2686 2687 /* disable Rx */ 2688 RAL_WRITE(sc, RT2560_RXCSR0, RT2560_DISABLE_RX); 2689 2690 /* reset ASIC (and thus, BBP) */ 2691 RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC); 2692 RAL_WRITE(sc, RT2560_CSR1, 0); 2693 2694 /* disable interrupts */ 2695 RAL_WRITE(sc, RT2560_CSR8, 0xffffffff); 2696 2697 /* clear any pending interrupt */ 2698 RAL_WRITE(sc, RT2560_CSR7, 0xffffffff); 2699 2700 /* reset Tx and Rx rings */ 2701 rt2560_reset_tx_ring(sc, &sc->txq); 2702 rt2560_reset_tx_ring(sc, &sc->atimq); 2703 rt2560_reset_tx_ring(sc, &sc->prioq); 2704 rt2560_reset_tx_ring(sc, &sc->bcnq); 2705 rt2560_reset_rx_ring(sc, &sc->rxq); 2706 2707 /* for CardBus, power down the socket */ 2708 if (disable && sc->sc_disable != NULL) { 2709 if (sc->sc_flags & RT2560_ENABLED) { 2710 (*sc->sc_disable)(sc); 2711 sc->sc_flags &= ~RT2560_ENABLED; 2712 } 2713 } 2714} 2715 2716void 2717rt2560_power(int why, void *arg) 2718{ 2719 struct rt2560_softc *sc = arg; 2720 struct ifnet *ifp = &sc->sc_ic.ic_if; 2721 int s; 2722 2723 DPRINTF(("%s: rt2560_power(%d)\n", sc->sc_dev.dv_xname, why)); 2724 2725 s = splnet(); 2726 switch (why) { 2727 case PWR_SUSPEND: 2728 case PWR_STANDBY: 2729 rt2560_stop(ifp, 1); 2730 if (sc->sc_power != NULL) 2731 (*sc->sc_power)(sc, why); 2732 break; 2733 case PWR_RESUME: 2734 if (ifp->if_flags & IFF_UP) { 2735 rt2560_init(ifp); 2736 if (sc->sc_power != NULL) 2737 (*sc->sc_power)(sc, why); 2738 if (ifp->if_flags & IFF_RUNNING) 2739 rt2560_start(ifp); 2740 } 2741 break; 2742 } 2743 splx(s); 2744} 2745 2746struct cfdriver ral_cd = { 2747 NULL, "ral", DV_IFNET 2748}; 2749