rt2560.c revision 1.38
1/* $OpenBSD: rt2560.c,v 1.38 2008/08/14 16:02:24 damien Exp $ */ 2 3/*- 4 * Copyright (c) 2005, 2006 5 * Damien Bergamini <damien.bergamini@free.fr> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20/*- 21 * Ralink Technology RT2560 chipset driver 22 * http://www.ralinktech.com/ 23 */ 24 25#include "bpfilter.h" 26 27#include <sys/param.h> 28#include <sys/sockio.h> 29#include <sys/sysctl.h> 30#include <sys/mbuf.h> 31#include <sys/kernel.h> 32#include <sys/socket.h> 33#include <sys/systm.h> 34#include <sys/malloc.h> 35#include <sys/timeout.h> 36#include <sys/conf.h> 37#include <sys/device.h> 38 39#include <machine/bus.h> 40#include <machine/endian.h> 41#include <machine/intr.h> 42 43#if NBPFILTER > 0 44#include <net/bpf.h> 45#endif 46#include <net/if.h> 47#include <net/if_arp.h> 48#include <net/if_dl.h> 49#include <net/if_media.h> 50#include <net/if_types.h> 51 52#include <netinet/in.h> 53#include <netinet/in_systm.h> 54#include <netinet/in_var.h> 55#include <netinet/if_ether.h> 56#include <netinet/ip.h> 57 58#include <net80211/ieee80211_var.h> 59#include <net80211/ieee80211_amrr.h> 60#include <net80211/ieee80211_radiotap.h> 61 62#include <dev/ic/rt2560reg.h> 63#include <dev/ic/rt2560var.h> 64 65#include <dev/pci/pcireg.h> 66#include <dev/pci/pcivar.h> 67#include <dev/pci/pcidevs.h> 68 69#ifdef RAL_DEBUG 70#define DPRINTF(x) do { if (rt2560_debug > 0) printf x; } while (0) 71#define DPRINTFN(n, x) do { if (rt2560_debug >= (n)) printf x; } while (0) 72int rt2560_debug = 1; 73#else 74#define DPRINTF(x) 75#define DPRINTFN(n, x) 76#endif 77 78int rt2560_alloc_tx_ring(struct rt2560_softc *, 79 struct rt2560_tx_ring *, int); 80void rt2560_reset_tx_ring(struct rt2560_softc *, 81 struct rt2560_tx_ring *); 82void rt2560_free_tx_ring(struct rt2560_softc *, 83 struct rt2560_tx_ring *); 84int rt2560_alloc_rx_ring(struct rt2560_softc *, 85 struct rt2560_rx_ring *, int); 86void rt2560_reset_rx_ring(struct rt2560_softc *, 87 struct rt2560_rx_ring *); 88void rt2560_free_rx_ring(struct rt2560_softc *, 89 struct rt2560_rx_ring *); 90struct ieee80211_node *rt2560_node_alloc(struct ieee80211com *); 91int rt2560_media_change(struct ifnet *); 92void rt2560_next_scan(void *); 93void rt2560_iter_func(void *, struct ieee80211_node *); 94void rt2560_amrr_timeout(void *); 95void rt2560_newassoc(struct ieee80211com *, struct ieee80211_node *, 96 int); 97int rt2560_newstate(struct ieee80211com *, enum ieee80211_state, 98 int); 99uint16_t rt2560_eeprom_read(struct rt2560_softc *, uint8_t); 100void rt2560_encryption_intr(struct rt2560_softc *); 101void rt2560_tx_intr(struct rt2560_softc *); 102void rt2560_prio_intr(struct rt2560_softc *); 103void rt2560_decryption_intr(struct rt2560_softc *); 104void rt2560_rx_intr(struct rt2560_softc *); 105void rt2560_beacon_expire(struct rt2560_softc *); 106void rt2560_wakeup_expire(struct rt2560_softc *); 107#if NBPFILTER > 0 108uint8_t rt2560_rxrate(const struct rt2560_rx_desc *); 109#endif 110int rt2560_ack_rate(struct ieee80211com *, int); 111uint16_t rt2560_txtime(int, int, uint32_t); 112uint8_t rt2560_plcp_signal(int); 113void rt2560_setup_tx_desc(struct rt2560_softc *, 114 struct rt2560_tx_desc *, uint32_t, int, int, int, 115 bus_addr_t); 116int rt2560_tx_bcn(struct rt2560_softc *, struct mbuf *, 117 struct ieee80211_node *); 118int rt2560_tx_mgt(struct rt2560_softc *, struct mbuf *, 119 struct ieee80211_node *); 120int rt2560_tx_data(struct rt2560_softc *, struct mbuf *, 121 struct ieee80211_node *); 122void rt2560_start(struct ifnet *); 123void rt2560_watchdog(struct ifnet *); 124int rt2560_ioctl(struct ifnet *, u_long, caddr_t); 125void rt2560_bbp_write(struct rt2560_softc *, uint8_t, uint8_t); 126uint8_t rt2560_bbp_read(struct rt2560_softc *, uint8_t); 127void rt2560_rf_write(struct rt2560_softc *, uint8_t, uint32_t); 128void rt2560_set_chan(struct rt2560_softc *, 129 struct ieee80211_channel *); 130void rt2560_disable_rf_tune(struct rt2560_softc *); 131void rt2560_enable_tsf_sync(struct rt2560_softc *); 132void rt2560_update_plcp(struct rt2560_softc *); 133void rt2560_updateslot(struct ieee80211com *); 134void rt2560_set_slottime(struct rt2560_softc *); 135void rt2560_set_basicrates(struct rt2560_softc *); 136void rt2560_update_led(struct rt2560_softc *, int, int); 137void rt2560_set_bssid(struct rt2560_softc *, uint8_t *); 138void rt2560_set_macaddr(struct rt2560_softc *, uint8_t *); 139void rt2560_get_macaddr(struct rt2560_softc *, uint8_t *); 140void rt2560_update_promisc(struct rt2560_softc *); 141void rt2560_set_txantenna(struct rt2560_softc *, int); 142void rt2560_set_rxantenna(struct rt2560_softc *, int); 143const char *rt2560_get_rf(int); 144void rt2560_read_eeprom(struct rt2560_softc *); 145int rt2560_bbp_init(struct rt2560_softc *); 146int rt2560_init(struct ifnet *); 147void rt2560_stop(struct ifnet *, int); 148void rt2560_power(int, void *); 149 150static const struct { 151 uint32_t reg; 152 uint32_t val; 153} rt2560_def_mac[] = { 154 RT2560_DEF_MAC 155}; 156 157static const struct { 158 uint8_t reg; 159 uint8_t val; 160} rt2560_def_bbp[] = { 161 RT2560_DEF_BBP 162}; 163 164static const uint32_t rt2560_rf2522_r2[] = RT2560_RF2522_R2; 165static const uint32_t rt2560_rf2523_r2[] = RT2560_RF2523_R2; 166static const uint32_t rt2560_rf2524_r2[] = RT2560_RF2524_R2; 167static const uint32_t rt2560_rf2525_r2[] = RT2560_RF2525_R2; 168static const uint32_t rt2560_rf2525_hi_r2[] = RT2560_RF2525_HI_R2; 169static const uint32_t rt2560_rf2525e_r2[] = RT2560_RF2525E_R2; 170static const uint32_t rt2560_rf2526_r2[] = RT2560_RF2526_R2; 171static const uint32_t rt2560_rf2526_hi_r2[] = RT2560_RF2526_HI_R2; 172 173int 174rt2560_attach(void *xsc, int id) 175{ 176 struct rt2560_softc *sc = xsc; 177 struct ieee80211com *ic = &sc->sc_ic; 178 struct ifnet *ifp = &ic->ic_if; 179 int error, i; 180 181 sc->amrr.amrr_min_success_threshold = 1; 182 sc->amrr.amrr_max_success_threshold = 15; 183 timeout_set(&sc->amrr_to, rt2560_amrr_timeout, sc); 184 timeout_set(&sc->scan_to, rt2560_next_scan, sc); 185 186 /* retrieve RT2560 rev. no */ 187 sc->asic_rev = RAL_READ(sc, RT2560_CSR0); 188 189 /* retrieve MAC address */ 190 rt2560_get_macaddr(sc, ic->ic_myaddr); 191 printf(", address %s\n", ether_sprintf(ic->ic_myaddr)); 192 193 /* retrieve RF rev. no and various other things from EEPROM */ 194 rt2560_read_eeprom(sc); 195 196 printf("%s: MAC/BBP RT2560 (rev 0x%02x), RF %s\n", sc->sc_dev.dv_xname, 197 sc->asic_rev, rt2560_get_rf(sc->rf_rev)); 198 199 /* 200 * Allocate Tx and Rx rings. 201 */ 202 error = rt2560_alloc_tx_ring(sc, &sc->txq, RT2560_TX_RING_COUNT); 203 if (error != 0) { 204 printf("%s: could not allocate Tx ring\n", 205 sc->sc_dev.dv_xname); 206 goto fail1; 207 } 208 error = rt2560_alloc_tx_ring(sc, &sc->atimq, RT2560_ATIM_RING_COUNT); 209 if (error != 0) { 210 printf("%s: could not allocate ATIM ring\n", 211 sc->sc_dev.dv_xname); 212 goto fail2; 213 } 214 error = rt2560_alloc_tx_ring(sc, &sc->prioq, RT2560_PRIO_RING_COUNT); 215 if (error != 0) { 216 printf("%s: could not allocate Prio ring\n", 217 sc->sc_dev.dv_xname); 218 goto fail3; 219 } 220 error = rt2560_alloc_tx_ring(sc, &sc->bcnq, RT2560_BEACON_RING_COUNT); 221 if (error != 0) { 222 printf("%s: could not allocate Beacon ring\n", 223 sc->sc_dev.dv_xname); 224 goto fail4; 225 } 226 error = rt2560_alloc_rx_ring(sc, &sc->rxq, RT2560_RX_RING_COUNT); 227 if (error != 0) { 228 printf("%s: could not allocate Rx ring\n", 229 sc->sc_dev.dv_xname); 230 goto fail5; 231 } 232 233 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 234 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 235 ic->ic_state = IEEE80211_S_INIT; 236 237 /* set device capabilities */ 238 ic->ic_caps = 239 IEEE80211_C_IBSS | /* IBSS mode supported */ 240 IEEE80211_C_MONITOR | /* monitor mode supported */ 241 IEEE80211_C_HOSTAP | /* HostAp mode supported */ 242 IEEE80211_C_TXPMGT | /* tx power management */ 243 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 244 IEEE80211_C_SHSLOT | /* short slot time supported */ 245 IEEE80211_C_WEP | /* s/w WEP */ 246 IEEE80211_C_RSN; /* WPA/RSN */ 247 248 /* set supported .11b and .11g rates */ 249 ic->ic_sup_rates[IEEE80211_MODE_11B] = ieee80211_std_rateset_11b; 250 ic->ic_sup_rates[IEEE80211_MODE_11G] = ieee80211_std_rateset_11g; 251 252 /* set supported .11b and .11g channels (1 through 14) */ 253 for (i = 1; i <= 14; i++) { 254 ic->ic_channels[i].ic_freq = 255 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 256 ic->ic_channels[i].ic_flags = 257 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 258 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 259 } 260 261 ifp->if_softc = sc; 262 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 263 ifp->if_init = rt2560_init; 264 ifp->if_ioctl = rt2560_ioctl; 265 ifp->if_start = rt2560_start; 266 ifp->if_watchdog = rt2560_watchdog; 267 IFQ_SET_READY(&ifp->if_snd); 268 memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ); 269 270 if_attach(ifp); 271 ieee80211_ifattach(ifp); 272 ic->ic_node_alloc = rt2560_node_alloc; 273 ic->ic_newassoc = rt2560_newassoc; 274 ic->ic_updateslot = rt2560_updateslot; 275 276 /* override state transition machine */ 277 sc->sc_newstate = ic->ic_newstate; 278 ic->ic_newstate = rt2560_newstate; 279 ieee80211_media_init(ifp, rt2560_media_change, ieee80211_media_status); 280 281#if NBPFILTER > 0 282 bpfattach(&sc->sc_drvbpf, ifp, DLT_IEEE802_11_RADIO, 283 sizeof (struct ieee80211_frame) + 64); 284 285 sc->sc_rxtap_len = sizeof sc->sc_rxtapu; 286 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 287 sc->sc_rxtap.wr_ihdr.it_present = htole32(RT2560_RX_RADIOTAP_PRESENT); 288 289 sc->sc_txtap_len = sizeof sc->sc_txtapu; 290 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 291 sc->sc_txtap.wt_ihdr.it_present = htole32(RT2560_TX_RADIOTAP_PRESENT); 292#endif 293 294 /* 295 * Make sure the interface is shutdown during reboot. 296 */ 297 sc->sc_sdhook = shutdownhook_establish(rt2560_shutdown, sc); 298 if (sc->sc_sdhook == NULL) { 299 printf("%s: WARNING: unable to establish shutdown hook\n", 300 sc->sc_dev.dv_xname); 301 } 302 sc->sc_powerhook = powerhook_establish(rt2560_power, sc); 303 if (sc->sc_powerhook == NULL) { 304 printf("%s: WARNING: unable to establish power hook\n", 305 sc->sc_dev.dv_xname); 306 } 307 return 0; 308 309fail5: rt2560_free_tx_ring(sc, &sc->bcnq); 310fail4: rt2560_free_tx_ring(sc, &sc->prioq); 311fail3: rt2560_free_tx_ring(sc, &sc->atimq); 312fail2: rt2560_free_tx_ring(sc, &sc->txq); 313fail1: return ENXIO; 314} 315 316int 317rt2560_detach(void *xsc) 318{ 319 struct rt2560_softc *sc = xsc; 320 struct ifnet *ifp = &sc->sc_ic.ic_if; 321 322 timeout_del(&sc->scan_to); 323 timeout_del(&sc->amrr_to); 324 325 ieee80211_ifdetach(ifp); /* free all nodes */ 326 if_detach(ifp); 327 328 if (sc->sc_powerhook != NULL) 329 powerhook_disestablish(sc->sc_powerhook); 330 if (sc->sc_sdhook != NULL) 331 shutdownhook_disestablish(sc->sc_sdhook); 332 333 rt2560_free_tx_ring(sc, &sc->txq); 334 rt2560_free_tx_ring(sc, &sc->atimq); 335 rt2560_free_tx_ring(sc, &sc->prioq); 336 rt2560_free_tx_ring(sc, &sc->bcnq); 337 rt2560_free_rx_ring(sc, &sc->rxq); 338 339 return 0; 340} 341 342int 343rt2560_alloc_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring, 344 int count) 345{ 346 int i, nsegs, error; 347 348 ring->count = count; 349 ring->queued = 0; 350 ring->cur = ring->next = 0; 351 ring->cur_encrypt = ring->next_encrypt = 0; 352 353 error = bus_dmamap_create(sc->sc_dmat, count * RT2560_TX_DESC_SIZE, 1, 354 count * RT2560_TX_DESC_SIZE, 0, BUS_DMA_NOWAIT, &ring->map); 355 if (error != 0) { 356 printf("%s: could not create desc DMA map\n", 357 sc->sc_dev.dv_xname); 358 goto fail; 359 } 360 361 error = bus_dmamem_alloc(sc->sc_dmat, count * RT2560_TX_DESC_SIZE, 362 PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT); 363 if (error != 0) { 364 printf("%s: could not allocate DMA memory\n", 365 sc->sc_dev.dv_xname); 366 goto fail; 367 } 368 369 error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs, 370 count * RT2560_TX_DESC_SIZE, (caddr_t *)&ring->desc, 371 BUS_DMA_NOWAIT); 372 if (error != 0) { 373 printf("%s: could not map desc DMA memory\n", 374 sc->sc_dev.dv_xname); 375 goto fail; 376 } 377 378 error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc, 379 count * RT2560_TX_DESC_SIZE, NULL, BUS_DMA_NOWAIT); 380 if (error != 0) { 381 printf("%s: could not load desc DMA map\n", 382 sc->sc_dev.dv_xname); 383 goto fail; 384 } 385 386 memset(ring->desc, 0, count * RT2560_TX_DESC_SIZE); 387 ring->physaddr = ring->map->dm_segs->ds_addr; 388 389 ring->data = malloc(count * sizeof (struct rt2560_tx_data), M_DEVBUF, 390 M_NOWAIT | M_ZERO); 391 if (ring->data == NULL) { 392 printf("%s: could not allocate soft data\n", 393 sc->sc_dev.dv_xname); 394 error = ENOMEM; 395 goto fail; 396 } 397 398 for (i = 0; i < count; i++) { 399 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 400 RT2560_MAX_SCATTER, MCLBYTES, 0, BUS_DMA_NOWAIT, 401 &ring->data[i].map); 402 if (error != 0) { 403 printf("%s: could not create DMA map\n", 404 sc->sc_dev.dv_xname); 405 goto fail; 406 } 407 } 408 409 return 0; 410 411fail: rt2560_free_tx_ring(sc, ring); 412 return error; 413} 414 415void 416rt2560_reset_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring) 417{ 418 int i; 419 420 for (i = 0; i < ring->count; i++) { 421 struct rt2560_tx_desc *desc = &ring->desc[i]; 422 struct rt2560_tx_data *data = &ring->data[i]; 423 424 if (data->m != NULL) { 425 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 426 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 427 bus_dmamap_unload(sc->sc_dmat, data->map); 428 m_freem(data->m); 429 data->m = NULL; 430 } 431 432 /* 433 * The node has already been freed at that point so don't call 434 * ieee80211_release_node() here. 435 */ 436 data->ni = NULL; 437 438 desc->flags = 0; 439 } 440 441 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 442 BUS_DMASYNC_PREWRITE); 443 444 ring->queued = 0; 445 ring->cur = ring->next = 0; 446 ring->cur_encrypt = ring->next_encrypt = 0; 447} 448 449void 450rt2560_free_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring) 451{ 452 int i; 453 454 if (ring->desc != NULL) { 455 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, 456 ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 457 bus_dmamap_unload(sc->sc_dmat, ring->map); 458 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)ring->desc, 459 ring->count * RT2560_TX_DESC_SIZE); 460 bus_dmamem_free(sc->sc_dmat, &ring->seg, 1); 461 } 462 463 if (ring->data != NULL) { 464 for (i = 0; i < ring->count; i++) { 465 struct rt2560_tx_data *data = &ring->data[i]; 466 467 if (data->m != NULL) { 468 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 469 data->map->dm_mapsize, 470 BUS_DMASYNC_POSTWRITE); 471 bus_dmamap_unload(sc->sc_dmat, data->map); 472 m_freem(data->m); 473 } 474 475 /* 476 * The node has already been freed at that point so 477 * don't call ieee80211_release_node() here. 478 */ 479 data->ni = NULL; 480 481 if (data->map != NULL) 482 bus_dmamap_destroy(sc->sc_dmat, data->map); 483 } 484 free(ring->data, M_DEVBUF); 485 } 486} 487 488int 489rt2560_alloc_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring, 490 int count) 491{ 492 int i, nsegs, error; 493 494 ring->count = count; 495 ring->cur = ring->next = 0; 496 ring->cur_decrypt = 0; 497 498 error = bus_dmamap_create(sc->sc_dmat, count * RT2560_RX_DESC_SIZE, 1, 499 count * RT2560_RX_DESC_SIZE, 0, BUS_DMA_NOWAIT, &ring->map); 500 if (error != 0) { 501 printf("%s: could not create desc DMA map\n", 502 sc->sc_dev.dv_xname); 503 goto fail; 504 } 505 506 error = bus_dmamem_alloc(sc->sc_dmat, count * RT2560_RX_DESC_SIZE, 507 PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT); 508 if (error != 0) { 509 printf("%s: could not allocate DMA memory\n", 510 sc->sc_dev.dv_xname); 511 goto fail; 512 } 513 514 error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs, 515 count * RT2560_RX_DESC_SIZE, (caddr_t *)&ring->desc, 516 BUS_DMA_NOWAIT); 517 if (error != 0) { 518 printf("%s: could not map desc DMA memory\n", 519 sc->sc_dev.dv_xname); 520 goto fail; 521 } 522 523 error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc, 524 count * RT2560_RX_DESC_SIZE, NULL, BUS_DMA_NOWAIT); 525 if (error != 0) { 526 printf("%s: could not load desc DMA map\n", 527 sc->sc_dev.dv_xname); 528 goto fail; 529 } 530 531 memset(ring->desc, 0, count * RT2560_RX_DESC_SIZE); 532 ring->physaddr = ring->map->dm_segs->ds_addr; 533 534 ring->data = malloc(count * sizeof (struct rt2560_rx_data), M_DEVBUF, 535 M_NOWAIT | M_ZERO); 536 if (ring->data == NULL) { 537 printf("%s: could not allocate soft data\n", 538 sc->sc_dev.dv_xname); 539 error = ENOMEM; 540 goto fail; 541 } 542 543 /* 544 * Pre-allocate Rx buffers and populate Rx ring. 545 */ 546 for (i = 0; i < count; i++) { 547 struct rt2560_rx_desc *desc = &sc->rxq.desc[i]; 548 struct rt2560_rx_data *data = &sc->rxq.data[i]; 549 550 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES, 551 0, BUS_DMA_NOWAIT, &data->map); 552 if (error != 0) { 553 printf("%s: could not create DMA map\n", 554 sc->sc_dev.dv_xname); 555 goto fail; 556 } 557 558 MGETHDR(data->m, M_DONTWAIT, MT_DATA); 559 if (data->m == NULL) { 560 printf("%s: could not allocate rx mbuf\n", 561 sc->sc_dev.dv_xname); 562 error = ENOMEM; 563 goto fail; 564 } 565 MCLGET(data->m, M_DONTWAIT); 566 if (!(data->m->m_flags & M_EXT)) { 567 printf("%s: could not allocate rx mbuf cluster\n", 568 sc->sc_dev.dv_xname); 569 error = ENOMEM; 570 goto fail; 571 } 572 573 error = bus_dmamap_load(sc->sc_dmat, data->map, 574 mtod(data->m, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT); 575 if (error != 0) { 576 printf("%s: could not load rx buf DMA map", 577 sc->sc_dev.dv_xname); 578 goto fail; 579 } 580 581 desc->flags = htole32(RT2560_RX_BUSY); 582 desc->physaddr = htole32(data->map->dm_segs->ds_addr); 583 } 584 585 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 586 BUS_DMASYNC_PREWRITE); 587 588 return 0; 589 590fail: rt2560_free_rx_ring(sc, ring); 591 return error; 592} 593 594void 595rt2560_reset_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring) 596{ 597 int i; 598 599 for (i = 0; i < ring->count; i++) { 600 ring->desc[i].flags = htole32(RT2560_RX_BUSY); 601 ring->data[i].drop = 0; 602 } 603 604 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 605 BUS_DMASYNC_PREWRITE); 606 607 ring->cur = ring->next = 0; 608 ring->cur_decrypt = 0; 609} 610 611void 612rt2560_free_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring) 613{ 614 int i; 615 616 if (ring->desc != NULL) { 617 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, 618 ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 619 bus_dmamap_unload(sc->sc_dmat, ring->map); 620 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)ring->desc, 621 ring->count * RT2560_RX_DESC_SIZE); 622 bus_dmamem_free(sc->sc_dmat, &ring->seg, 1); 623 } 624 625 if (ring->data != NULL) { 626 for (i = 0; i < ring->count; i++) { 627 struct rt2560_rx_data *data = &ring->data[i]; 628 629 if (data->m != NULL) { 630 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 631 data->map->dm_mapsize, 632 BUS_DMASYNC_POSTREAD); 633 bus_dmamap_unload(sc->sc_dmat, data->map); 634 m_freem(data->m); 635 } 636 637 if (data->map != NULL) 638 bus_dmamap_destroy(sc->sc_dmat, data->map); 639 } 640 free(ring->data, M_DEVBUF); 641 } 642} 643 644struct ieee80211_node * 645rt2560_node_alloc(struct ieee80211com *ic) 646{ 647 return malloc(sizeof (struct rt2560_node), M_DEVBUF, 648 M_NOWAIT | M_ZERO); 649} 650 651int 652rt2560_media_change(struct ifnet *ifp) 653{ 654 int error; 655 656 error = ieee80211_media_change(ifp); 657 if (error != ENETRESET) 658 return error; 659 660 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 661 rt2560_init(ifp); 662 663 return 0; 664} 665 666/* 667 * This function is called periodically (every 200ms) during scanning to 668 * switch from one channel to another. 669 */ 670void 671rt2560_next_scan(void *arg) 672{ 673 struct rt2560_softc *sc = arg; 674 struct ieee80211com *ic = &sc->sc_ic; 675 struct ifnet *ifp = &ic->ic_if; 676 int s; 677 678 s = splnet(); 679 if (ic->ic_state == IEEE80211_S_SCAN) 680 ieee80211_next_scan(ifp); 681 splx(s); 682} 683 684/* 685 * This function is called for each neighbor node. 686 */ 687void 688rt2560_iter_func(void *arg, struct ieee80211_node *ni) 689{ 690 struct rt2560_softc *sc = arg; 691 struct rt2560_node *rn = (struct rt2560_node *)ni; 692 693 ieee80211_amrr_choose(&sc->amrr, ni, &rn->amn); 694} 695 696void 697rt2560_amrr_timeout(void *arg) 698{ 699 struct rt2560_softc *sc = arg; 700 struct ieee80211com *ic = &sc->sc_ic; 701 int s; 702 703 s = splnet(); 704 if (ic->ic_opmode == IEEE80211_M_STA) 705 rt2560_iter_func(sc, ic->ic_bss); 706 else 707 ieee80211_iterate_nodes(ic, rt2560_iter_func, sc); 708 splx(s); 709 710 timeout_add(&sc->amrr_to, hz / 2); 711} 712 713void 714rt2560_newassoc(struct ieee80211com *ic, struct ieee80211_node *ni, int isnew) 715{ 716 struct rt2560_softc *sc = ic->ic_softc; 717 int i; 718 719 ieee80211_amrr_node_init(&sc->amrr, &((struct rt2560_node *)ni)->amn); 720 721 /* set rate to some reasonable initial value */ 722 for (i = ni->ni_rates.rs_nrates - 1; 723 i > 0 && (ni->ni_rates.rs_rates[i] & IEEE80211_RATE_VAL) > 72; 724 i--); 725 ni->ni_txrate = i; 726} 727 728int 729rt2560_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg) 730{ 731 struct rt2560_softc *sc = ic->ic_if.if_softc; 732 enum ieee80211_state ostate; 733 struct ieee80211_node *ni; 734 struct mbuf *m; 735 int error = 0; 736 737 ostate = ic->ic_state; 738 timeout_del(&sc->scan_to); 739 timeout_del(&sc->amrr_to); 740 741 switch (nstate) { 742 case IEEE80211_S_INIT: 743 if (ostate == IEEE80211_S_RUN) { 744 /* abort TSF synchronization */ 745 RAL_WRITE(sc, RT2560_CSR14, 0); 746 747 /* turn association led off */ 748 rt2560_update_led(sc, 0, 0); 749 } 750 break; 751 752 case IEEE80211_S_SCAN: 753 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 754 timeout_add(&sc->scan_to, hz / 5); 755 break; 756 757 case IEEE80211_S_AUTH: 758 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 759 break; 760 761 case IEEE80211_S_ASSOC: 762 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 763 break; 764 765 case IEEE80211_S_RUN: 766 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 767 768 ni = ic->ic_bss; 769 770 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 771 rt2560_update_plcp(sc); 772 rt2560_set_slottime(sc); 773 rt2560_set_basicrates(sc); 774 rt2560_set_bssid(sc, ni->ni_bssid); 775 } 776 777 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 778 ic->ic_opmode == IEEE80211_M_IBSS) { 779 m = ieee80211_beacon_alloc(ic, ni); 780 if (m == NULL) { 781 printf("%s: could not allocate beacon\n", 782 sc->sc_dev.dv_xname); 783 error = ENOBUFS; 784 break; 785 } 786 787 error = rt2560_tx_bcn(sc, m, ni); 788 if (error != 0) 789 break; 790 } 791 792 /* turn assocation led on */ 793 rt2560_update_led(sc, 1, 0); 794 795 if (ic->ic_opmode == IEEE80211_M_STA) { 796 /* fake a join to init the tx rate */ 797 rt2560_newassoc(ic, ni, 1); 798 } 799 800 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 801 /* start automatic rate control timer */ 802 if (ic->ic_fixed_rate == -1) 803 timeout_add(&sc->amrr_to, hz / 2); 804 805 rt2560_enable_tsf_sync(sc); 806 } 807 break; 808 } 809 810 return (error != 0) ? error : sc->sc_newstate(ic, nstate, arg); 811} 812 813/* 814 * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46 or 815 * 93C66). 816 */ 817uint16_t 818rt2560_eeprom_read(struct rt2560_softc *sc, uint8_t addr) 819{ 820 uint32_t tmp; 821 uint16_t val; 822 int n; 823 824 /* clock C once before the first command */ 825 RT2560_EEPROM_CTL(sc, 0); 826 827 RT2560_EEPROM_CTL(sc, RT2560_S); 828 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 829 RT2560_EEPROM_CTL(sc, RT2560_S); 830 831 /* write start bit (1) */ 832 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D); 833 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C); 834 835 /* write READ opcode (10) */ 836 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D); 837 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C); 838 RT2560_EEPROM_CTL(sc, RT2560_S); 839 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 840 841 /* write address (A5-A0 or A7-A0) */ 842 n = (RAL_READ(sc, RT2560_CSR21) & RT2560_93C46) ? 5 : 7; 843 for (; n >= 0; n--) { 844 RT2560_EEPROM_CTL(sc, RT2560_S | 845 (((addr >> n) & 1) << RT2560_SHIFT_D)); 846 RT2560_EEPROM_CTL(sc, RT2560_S | 847 (((addr >> n) & 1) << RT2560_SHIFT_D) | RT2560_C); 848 } 849 850 RT2560_EEPROM_CTL(sc, RT2560_S); 851 852 /* read data Q15-Q0 */ 853 val = 0; 854 for (n = 15; n >= 0; n--) { 855 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 856 tmp = RAL_READ(sc, RT2560_CSR21); 857 val |= ((tmp & RT2560_Q) >> RT2560_SHIFT_Q) << n; 858 RT2560_EEPROM_CTL(sc, RT2560_S); 859 } 860 861 RT2560_EEPROM_CTL(sc, 0); 862 863 /* clear Chip Select and clock C */ 864 RT2560_EEPROM_CTL(sc, RT2560_S); 865 RT2560_EEPROM_CTL(sc, 0); 866 RT2560_EEPROM_CTL(sc, RT2560_C); 867 868 return val; 869} 870 871/* 872 * Some frames were processed by the hardware cipher engine and are ready for 873 * transmission. 874 */ 875void 876rt2560_encryption_intr(struct rt2560_softc *sc) 877{ 878 int hw; 879 880 /* retrieve last descriptor index processed by cipher engine */ 881 hw = (RAL_READ(sc, RT2560_SECCSR1) - sc->txq.physaddr) / 882 RT2560_TX_DESC_SIZE; 883 884 for (; sc->txq.next_encrypt != hw;) { 885 struct rt2560_tx_desc *desc = 886 &sc->txq.desc[sc->txq.next_encrypt]; 887 888 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 889 sc->txq.next_encrypt * RT2560_TX_DESC_SIZE, 890 RT2560_TX_DESC_SIZE, BUS_DMASYNC_POSTREAD); 891 892 if (letoh32(desc->flags) & 893 (RT2560_TX_BUSY | RT2560_TX_CIPHER_BUSY)) 894 break; 895 896 /* for TKIP, swap eiv field to fix a bug in ASIC */ 897 if ((letoh32(desc->flags) & RT2560_TX_CIPHER_MASK) == 898 RT2560_TX_CIPHER_TKIP) 899 desc->eiv = swap32(desc->eiv); 900 901 /* mark the frame ready for transmission */ 902 desc->flags |= htole32(RT2560_TX_BUSY | RT2560_TX_VALID); 903 904 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 905 sc->txq.next_encrypt * RT2560_TX_DESC_SIZE, 906 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 907 908 DPRINTFN(15, ("encryption done idx=%u\n", 909 sc->txq.next_encrypt)); 910 911 sc->txq.next_encrypt = 912 (sc->txq.next_encrypt + 1) % RT2560_TX_RING_COUNT; 913 } 914 915 /* kick Tx */ 916 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_TX); 917} 918 919void 920rt2560_tx_intr(struct rt2560_softc *sc) 921{ 922 struct ieee80211com *ic = &sc->sc_ic; 923 struct ifnet *ifp = &ic->ic_if; 924 925 for (;;) { 926 struct rt2560_tx_desc *desc = &sc->txq.desc[sc->txq.next]; 927 struct rt2560_tx_data *data = &sc->txq.data[sc->txq.next]; 928 struct rt2560_node *rn; 929 930 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 931 sc->txq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 932 BUS_DMASYNC_POSTREAD); 933 934 if ((letoh32(desc->flags) & RT2560_TX_BUSY) || 935 (letoh32(desc->flags) & RT2560_TX_CIPHER_BUSY) || 936 !(letoh32(desc->flags) & RT2560_TX_VALID)) 937 break; 938 939 rn = (struct rt2560_node *)data->ni; 940 941 switch (letoh32(desc->flags) & RT2560_TX_RESULT_MASK) { 942 case RT2560_TX_SUCCESS: 943 DPRINTFN(10, ("data frame sent successfully\n")); 944 rn->amn.amn_txcnt++; 945 ifp->if_opackets++; 946 break; 947 948 case RT2560_TX_SUCCESS_RETRY: 949 DPRINTFN(9, ("data frame sent after %u retries\n", 950 (letoh32(desc->flags) >> 5) & 0x7)); 951 rn->amn.amn_txcnt++; 952 rn->amn.amn_retrycnt++; 953 ifp->if_opackets++; 954 break; 955 956 case RT2560_TX_FAIL_RETRY: 957 DPRINTFN(9, ("sending data frame failed (too much " 958 "retries)\n")); 959 rn->amn.amn_txcnt++; 960 rn->amn.amn_retrycnt++; 961 ifp->if_oerrors++; 962 break; 963 964 case RT2560_TX_FAIL_INVALID: 965 case RT2560_TX_FAIL_OTHER: 966 default: 967 printf("%s: sending data frame failed 0x%08x\n", 968 sc->sc_dev.dv_xname, letoh32(desc->flags)); 969 ifp->if_oerrors++; 970 } 971 972 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 973 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 974 bus_dmamap_unload(sc->sc_dmat, data->map); 975 m_freem(data->m); 976 data->m = NULL; 977 ieee80211_release_node(ic, data->ni); 978 data->ni = NULL; 979 980 /* descriptor is no longer valid */ 981 desc->flags &= ~htole32(RT2560_TX_VALID); 982 983 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 984 sc->txq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 985 BUS_DMASYNC_PREWRITE); 986 987 DPRINTFN(15, ("tx done idx=%u\n", sc->txq.next)); 988 989 sc->txq.queued--; 990 sc->txq.next = (sc->txq.next + 1) % RT2560_TX_RING_COUNT; 991 } 992 993 sc->sc_tx_timer = 0; 994 ifp->if_flags &= ~IFF_OACTIVE; 995 rt2560_start(ifp); 996} 997 998void 999rt2560_prio_intr(struct rt2560_softc *sc) 1000{ 1001 struct ieee80211com *ic = &sc->sc_ic; 1002 struct ifnet *ifp = &ic->ic_if; 1003 1004 for (;;) { 1005 struct rt2560_tx_desc *desc = &sc->prioq.desc[sc->prioq.next]; 1006 struct rt2560_tx_data *data = &sc->prioq.data[sc->prioq.next]; 1007 1008 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1009 sc->prioq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1010 BUS_DMASYNC_POSTREAD); 1011 1012 if ((letoh32(desc->flags) & RT2560_TX_BUSY) || 1013 !(letoh32(desc->flags) & RT2560_TX_VALID)) 1014 break; 1015 1016 switch (letoh32(desc->flags) & RT2560_TX_RESULT_MASK) { 1017 case RT2560_TX_SUCCESS: 1018 DPRINTFN(10, ("mgt frame sent successfully\n")); 1019 break; 1020 1021 case RT2560_TX_SUCCESS_RETRY: 1022 DPRINTFN(9, ("mgt frame sent after %u retries\n", 1023 (letoh32(desc->flags) >> 5) & 0x7)); 1024 break; 1025 1026 case RT2560_TX_FAIL_RETRY: 1027 DPRINTFN(9, ("sending mgt frame failed (too much " 1028 "retries)\n")); 1029 break; 1030 1031 case RT2560_TX_FAIL_INVALID: 1032 case RT2560_TX_FAIL_OTHER: 1033 default: 1034 printf("%s: sending mgt frame failed 0x%08x\n", 1035 sc->sc_dev.dv_xname, letoh32(desc->flags)); 1036 } 1037 1038 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1039 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 1040 bus_dmamap_unload(sc->sc_dmat, data->map); 1041 m_freem(data->m); 1042 data->m = NULL; 1043 ieee80211_release_node(ic, data->ni); 1044 data->ni = NULL; 1045 1046 /* descriptor is no longer valid */ 1047 desc->flags &= ~htole32(RT2560_TX_VALID); 1048 1049 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1050 sc->prioq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1051 BUS_DMASYNC_PREWRITE); 1052 1053 DPRINTFN(15, ("prio done idx=%u\n", sc->prioq.next)); 1054 1055 sc->prioq.queued--; 1056 sc->prioq.next = (sc->prioq.next + 1) % RT2560_PRIO_RING_COUNT; 1057 } 1058 1059 sc->sc_tx_timer = 0; 1060 ifp->if_flags &= ~IFF_OACTIVE; 1061 rt2560_start(ifp); 1062} 1063 1064/* 1065 * Some frames were processed by the hardware cipher engine and are ready for 1066 * transmission to the IEEE802.11 layer. 1067 */ 1068void 1069rt2560_decryption_intr(struct rt2560_softc *sc) 1070{ 1071 struct ieee80211com *ic = &sc->sc_ic; 1072 struct ifnet *ifp = &ic->ic_if; 1073 struct ieee80211_frame *wh; 1074 struct ieee80211_rxinfo rxi; 1075 struct ieee80211_node *ni; 1076 struct mbuf *mnew, *m; 1077 int hw, error; 1078 1079 /* retrieve last decriptor index processed by cipher engine */ 1080 hw = (RAL_READ(sc, RT2560_SECCSR0) - sc->rxq.physaddr) / 1081 RT2560_RX_DESC_SIZE; 1082 1083 for (; sc->rxq.cur_decrypt != hw;) { 1084 struct rt2560_rx_desc *desc = 1085 &sc->rxq.desc[sc->rxq.cur_decrypt]; 1086 struct rt2560_rx_data *data = 1087 &sc->rxq.data[sc->rxq.cur_decrypt]; 1088 1089 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1090 sc->rxq.cur_decrypt * RT2560_TX_DESC_SIZE, 1091 RT2560_TX_DESC_SIZE, BUS_DMASYNC_POSTREAD); 1092 1093 if (letoh32(desc->flags) & 1094 (RT2560_RX_BUSY | RT2560_RX_CIPHER_BUSY)) 1095 break; 1096 1097 if (data->drop) { 1098 ifp->if_ierrors++; 1099 goto skip; 1100 } 1101 1102 if ((letoh32(desc->flags) & RT2560_RX_CIPHER_MASK) != 0 && 1103 (letoh32(desc->flags) & RT2560_RX_ICV_ERROR)) { 1104 ifp->if_ierrors++; 1105 goto skip; 1106 } 1107 1108 /* 1109 * Try to allocate a new mbuf for this ring element and load it 1110 * before processing the current mbuf. If the ring element 1111 * cannot be loaded, drop the received packet and reuse the old 1112 * mbuf. In the unlikely case that the old mbuf can't be 1113 * reloaded either, explicitly panic. 1114 */ 1115 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 1116 if (mnew == NULL) { 1117 ifp->if_ierrors++; 1118 goto skip; 1119 } 1120 MCLGET(mnew, M_DONTWAIT); 1121 if (!(mnew->m_flags & M_EXT)) { 1122 m_freem(mnew); 1123 ifp->if_ierrors++; 1124 goto skip; 1125 } 1126 1127 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1128 data->map->dm_mapsize, BUS_DMASYNC_POSTREAD); 1129 bus_dmamap_unload(sc->sc_dmat, data->map); 1130 1131 error = bus_dmamap_load(sc->sc_dmat, data->map, 1132 mtod(mnew, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT); 1133 if (error != 0) { 1134 m_freem(mnew); 1135 1136 /* try to reload the old mbuf */ 1137 error = bus_dmamap_load(sc->sc_dmat, data->map, 1138 mtod(data->m, void *), MCLBYTES, NULL, 1139 BUS_DMA_NOWAIT); 1140 if (error != 0) { 1141 /* very unlikely that it will fail... */ 1142 panic("%s: could not load old rx mbuf", 1143 sc->sc_dev.dv_xname); 1144 } 1145 /* physical address may have changed */ 1146 desc->physaddr = htole32(data->map->dm_segs->ds_addr); 1147 ifp->if_ierrors++; 1148 goto skip; 1149 } 1150 1151 /* 1152 * New mbuf successfully loaded, update Rx ring and continue 1153 * processing. 1154 */ 1155 m = data->m; 1156 data->m = mnew; 1157 desc->physaddr = htole32(data->map->dm_segs->ds_addr); 1158 1159 /* finalize mbuf */ 1160 m->m_pkthdr.rcvif = ifp; 1161 m->m_pkthdr.len = m->m_len = 1162 (letoh32(desc->flags) >> 16) & 0xfff; 1163 1164#if NBPFILTER > 0 1165 if (sc->sc_drvbpf != NULL) { 1166 struct mbuf mb; 1167 struct rt2560_rx_radiotap_header *tap = &sc->sc_rxtap; 1168 uint32_t tsf_lo, tsf_hi; 1169 1170 /* get timestamp (low and high 32 bits) */ 1171 tsf_hi = RAL_READ(sc, RT2560_CSR17); 1172 tsf_lo = RAL_READ(sc, RT2560_CSR16); 1173 1174 tap->wr_tsf = 1175 htole64(((uint64_t)tsf_hi << 32) | tsf_lo); 1176 tap->wr_flags = 0; 1177 tap->wr_rate = rt2560_rxrate(desc); 1178 tap->wr_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 1179 tap->wr_chan_flags = 1180 htole16(ic->ic_ibss_chan->ic_flags); 1181 tap->wr_antenna = sc->rx_ant; 1182 tap->wr_antsignal = desc->rssi; 1183 1184 mb.m_data = (caddr_t)tap; 1185 mb.m_len = sc->sc_txtap_len; 1186 mb.m_next = m; 1187 mb.m_nextpkt = NULL; 1188 mb.m_type = 0; 1189 mb.m_flags = 0; 1190 bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_IN); 1191 } 1192#endif 1193 wh = mtod(m, struct ieee80211_frame *); 1194 ni = ieee80211_find_rxnode(ic, wh); 1195 1196 /* send the frame to the 802.11 layer */ 1197 rxi.rxi_flags = 0; 1198 rxi.rxi_rssi = desc->rssi; 1199 rxi.rxi_tstamp = 0; /* unused */ 1200 ieee80211_input(ifp, m, ni, &rxi); 1201 1202 /* node is no longer needed */ 1203 ieee80211_release_node(ic, ni); 1204 1205skip: desc->flags = htole32(RT2560_RX_BUSY); 1206 1207 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1208 sc->rxq.cur_decrypt * RT2560_TX_DESC_SIZE, 1209 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 1210 1211 DPRINTFN(15, ("decryption done idx=%u\n", sc->rxq.cur_decrypt)); 1212 1213 sc->rxq.cur_decrypt = 1214 (sc->rxq.cur_decrypt + 1) % RT2560_RX_RING_COUNT; 1215 } 1216} 1217 1218/* 1219 * Some frames were received. Pass them to the hardware cipher engine before 1220 * sending them to the 802.11 layer. 1221 */ 1222void 1223rt2560_rx_intr(struct rt2560_softc *sc) 1224{ 1225 for (;;) { 1226 struct rt2560_rx_desc *desc = &sc->rxq.desc[sc->rxq.cur]; 1227 struct rt2560_rx_data *data = &sc->rxq.data[sc->rxq.cur]; 1228 1229 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1230 sc->rxq.cur * RT2560_RX_DESC_SIZE, RT2560_RX_DESC_SIZE, 1231 BUS_DMASYNC_POSTREAD); 1232 1233 if (letoh32(desc->flags) & 1234 (RT2560_RX_BUSY | RT2560_RX_CIPHER_BUSY)) 1235 break; 1236 1237 data->drop = 0; 1238 1239 if (letoh32(desc->flags) & 1240 (RT2560_RX_PHY_ERROR | RT2560_RX_CRC_ERROR)) { 1241 /* 1242 * This should not happen since we did not request 1243 * to receive those frames when we filled RXCSR0. 1244 */ 1245 DPRINTFN(5, ("PHY or CRC error flags 0x%08x\n", 1246 letoh32(desc->flags))); 1247 data->drop = 1; 1248 } 1249 1250 if (((letoh32(desc->flags) >> 16) & 0xfff) > MCLBYTES) { 1251 DPRINTFN(5, ("bad length\n")); 1252 data->drop = 1; 1253 } 1254 1255 /* mark the frame for decryption */ 1256 desc->flags |= htole32(RT2560_RX_CIPHER_BUSY); 1257 1258 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1259 sc->rxq.cur * RT2560_RX_DESC_SIZE, RT2560_RX_DESC_SIZE, 1260 BUS_DMASYNC_PREWRITE); 1261 1262 DPRINTFN(15, ("rx done idx=%u\n", sc->rxq.cur)); 1263 1264 sc->rxq.cur = (sc->rxq.cur + 1) % RT2560_RX_RING_COUNT; 1265 } 1266 1267 /* kick decrypt */ 1268 RAL_WRITE(sc, RT2560_SECCSR0, RT2560_KICK_DECRYPT); 1269} 1270 1271/* 1272 * This function is called in HostAP or IBSS modes when it's time to send a 1273 * new beacon (every ni_intval milliseconds). 1274 */ 1275void 1276rt2560_beacon_expire(struct rt2560_softc *sc) 1277{ 1278 struct ieee80211com *ic = &sc->sc_ic; 1279 struct rt2560_tx_data *data; 1280 1281 if (ic->ic_opmode != IEEE80211_M_IBSS && 1282 ic->ic_opmode != IEEE80211_M_HOSTAP) 1283 return; 1284 1285 data = &sc->bcnq.data[sc->bcnq.next]; 1286 1287 if (sc->sc_flags & RT2560_UPDATE_SLOT) { 1288 sc->sc_flags &= ~RT2560_UPDATE_SLOT; 1289 sc->sc_flags |= RT2560_SET_SLOTTIME; 1290 } else if (sc->sc_flags & RT2560_SET_SLOTTIME) { 1291 sc->sc_flags &= ~RT2560_SET_SLOTTIME; 1292 rt2560_set_slottime(sc); 1293 } 1294 1295 if (ic->ic_curmode == IEEE80211_MODE_11G) { 1296 /* update ERP Information Element */ 1297 *sc->erp = ic->ic_bss->ni_erp; 1298 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1299 data->map->dm_mapsize, BUS_DMASYNC_PREWRITE); 1300 } 1301 1302#if defined(RT2560_DEBUG) && NBPFILTER > 0 1303 if (ic->ic_rawbpf != NULL) 1304 bpf_mtap(ic->ic_rawbpf, data->m, BPF_DIRECTION_OUT); 1305#endif 1306 1307 DPRINTFN(15, ("beacon expired\n")); 1308} 1309 1310void 1311rt2560_wakeup_expire(struct rt2560_softc *sc) 1312{ 1313 DPRINTFN(15, ("wakeup expired\n")); 1314} 1315 1316int 1317rt2560_intr(void *arg) 1318{ 1319 struct rt2560_softc *sc = arg; 1320 struct ifnet *ifp = &sc->sc_ic.ic_if; 1321 uint32_t r; 1322 1323 if ((r = RAL_READ(sc, RT2560_CSR7)) == 0) 1324 return 0; /* not for us */ 1325 1326 /* disable interrupts */ 1327 RAL_WRITE(sc, RT2560_CSR8, 0xffffffff); 1328 1329 /* acknowledge interrupts */ 1330 RAL_WRITE(sc, RT2560_CSR7, r); 1331 1332 /* don't re-enable interrupts if we're shutting down */ 1333 if (!(ifp->if_flags & IFF_RUNNING)) 1334 return 0; 1335 1336 if (r & RT2560_BEACON_EXPIRE) 1337 rt2560_beacon_expire(sc); 1338 1339 if (r & RT2560_WAKEUP_EXPIRE) 1340 rt2560_wakeup_expire(sc); 1341 1342 if (r & RT2560_ENCRYPTION_DONE) 1343 rt2560_encryption_intr(sc); 1344 1345 if (r & RT2560_TX_DONE) 1346 rt2560_tx_intr(sc); 1347 1348 if (r & RT2560_PRIO_DONE) 1349 rt2560_prio_intr(sc); 1350 1351 if (r & RT2560_DECRYPTION_DONE) 1352 rt2560_decryption_intr(sc); 1353 1354 if (r & RT2560_RX_DONE) 1355 rt2560_rx_intr(sc); 1356 1357 /* re-enable interrupts */ 1358 RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK); 1359 1360 return 1; 1361} 1362 1363/* quickly determine if a given rate is CCK or OFDM */ 1364#define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22) 1365 1366#define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */ 1367#define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */ 1368 1369#define RAL_SIFS 10 /* us */ 1370 1371#define RT2560_RXTX_TURNAROUND 10 /* us */ 1372 1373/* 1374 * This function is only used by the Rx radiotap code. It returns the rate at 1375 * which a given frame was received. 1376 */ 1377#if NBPFILTER > 0 1378uint8_t 1379rt2560_rxrate(const struct rt2560_rx_desc *desc) 1380{ 1381 if (letoh32(desc->flags) & RT2560_RX_OFDM) { 1382 /* reverse function of rt2560_plcp_signal */ 1383 switch (desc->rate) { 1384 case 0xb: return 12; 1385 case 0xf: return 18; 1386 case 0xa: return 24; 1387 case 0xe: return 36; 1388 case 0x9: return 48; 1389 case 0xd: return 72; 1390 case 0x8: return 96; 1391 case 0xc: return 108; 1392 } 1393 } else { 1394 if (desc->rate == 10) 1395 return 2; 1396 if (desc->rate == 20) 1397 return 4; 1398 if (desc->rate == 55) 1399 return 11; 1400 if (desc->rate == 110) 1401 return 22; 1402 } 1403 return 2; /* should not get there */ 1404} 1405#endif 1406 1407/* 1408 * Return the expected ack rate for a frame transmitted at rate `rate'. 1409 */ 1410int 1411rt2560_ack_rate(struct ieee80211com *ic, int rate) 1412{ 1413 switch (rate) { 1414 /* CCK rates */ 1415 case 2: 1416 return 2; 1417 case 4: 1418 case 11: 1419 case 22: 1420 return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate; 1421 1422 /* OFDM rates */ 1423 case 12: 1424 case 18: 1425 return 12; 1426 case 24: 1427 case 36: 1428 return 24; 1429 case 48: 1430 case 72: 1431 case 96: 1432 case 108: 1433 return 48; 1434 } 1435 1436 /* default to 1Mbps */ 1437 return 2; 1438} 1439 1440/* 1441 * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'. 1442 * The function automatically determines the operating mode depending on the 1443 * given rate. `flags' indicates whether short preamble is in use or not. 1444 */ 1445uint16_t 1446rt2560_txtime(int len, int rate, uint32_t flags) 1447{ 1448 uint16_t txtime; 1449 1450 if (RAL_RATE_IS_OFDM(rate)) { 1451 /* IEEE Std 802.11g-2003, pp. 44 */ 1452 txtime = (8 + 4 * len + 3 + rate - 1) / rate; 1453 txtime = 16 + 4 + 4 * txtime + 6; 1454 } else { 1455 /* IEEE Std 802.11b-1999, pp. 28 */ 1456 txtime = (16 * len + rate - 1) / rate; 1457 if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE)) 1458 txtime += 72 + 24; 1459 else 1460 txtime += 144 + 48; 1461 } 1462 return txtime; 1463} 1464 1465uint8_t 1466rt2560_plcp_signal(int rate) 1467{ 1468 switch (rate) { 1469 /* CCK rates (returned values are device-dependent) */ 1470 case 2: return 0x0; 1471 case 4: return 0x1; 1472 case 11: return 0x2; 1473 case 22: return 0x3; 1474 1475 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1476 case 12: return 0xb; 1477 case 18: return 0xf; 1478 case 24: return 0xa; 1479 case 36: return 0xe; 1480 case 48: return 0x9; 1481 case 72: return 0xd; 1482 case 96: return 0x8; 1483 case 108: return 0xc; 1484 1485 /* unsupported rates (should not get there) */ 1486 default: return 0xff; 1487 } 1488} 1489 1490void 1491rt2560_setup_tx_desc(struct rt2560_softc *sc, struct rt2560_tx_desc *desc, 1492 uint32_t flags, int len, int rate, int encrypt, bus_addr_t physaddr) 1493{ 1494 struct ieee80211com *ic = &sc->sc_ic; 1495 uint16_t plcp_length; 1496 int remainder; 1497 1498 desc->flags = htole32(flags); 1499 desc->flags |= htole32(len << 16); 1500 desc->flags |= encrypt ? htole32(RT2560_TX_CIPHER_BUSY) : 1501 htole32(RT2560_TX_BUSY | RT2560_TX_VALID); 1502 1503 desc->physaddr = htole32(physaddr); 1504 desc->wme = htole16( 1505 RT2560_AIFSN(2) | 1506 RT2560_LOGCWMIN(3) | 1507 RT2560_LOGCWMAX(8)); 1508 1509 /* setup PLCP fields */ 1510 desc->plcp_signal = rt2560_plcp_signal(rate); 1511 desc->plcp_service = 4; 1512 1513 len += IEEE80211_CRC_LEN; 1514 if (RAL_RATE_IS_OFDM(rate)) { 1515 desc->flags |= htole32(RT2560_TX_OFDM); 1516 1517 plcp_length = len & 0xfff; 1518 desc->plcp_length_hi = plcp_length >> 6; 1519 desc->plcp_length_lo = plcp_length & 0x3f; 1520 } else { 1521 plcp_length = (16 * len + rate - 1) / rate; 1522 if (rate == 22) { 1523 remainder = (16 * len) % 22; 1524 if (remainder != 0 && remainder < 7) 1525 desc->plcp_service |= RT2560_PLCP_LENGEXT; 1526 } 1527 desc->plcp_length_hi = plcp_length >> 8; 1528 desc->plcp_length_lo = plcp_length & 0xff; 1529 1530 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1531 desc->plcp_signal |= 0x08; 1532 } 1533} 1534 1535int 1536rt2560_tx_bcn(struct rt2560_softc *sc, struct mbuf *m0, 1537 struct ieee80211_node *ni) 1538{ 1539 struct ieee80211com *ic = &sc->sc_ic; 1540 struct rt2560_tx_desc *desc; 1541 struct rt2560_tx_data *data; 1542 int rate = 2, error; 1543 1544 desc = &sc->bcnq.desc[sc->bcnq.cur]; 1545 data = &sc->bcnq.data[sc->bcnq.cur]; 1546 1547 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1548 BUS_DMA_NOWAIT); 1549 if (error != 0) { 1550 printf("%s: could not map mbuf (error %d)\n", 1551 sc->sc_dev.dv_xname, error); 1552 m_freem(m0); 1553 return error; 1554 } 1555 1556 data->m = m0; 1557 data->ni = ni; 1558 1559 rt2560_setup_tx_desc(sc, desc, RT2560_TX_IFS_NEWBACKOFF | 1560 RT2560_TX_TIMESTAMP, m0->m_pkthdr.len, rate, 0, 1561 data->map->dm_segs->ds_addr); 1562 1563 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 1564 BUS_DMASYNC_PREWRITE); 1565 bus_dmamap_sync(sc->sc_dmat, sc->bcnq.map, 1566 sc->bcnq.cur * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1567 BUS_DMASYNC_PREWRITE); 1568 1569 /* 1570 * Store pointer to ERP Information Element so that we can update it 1571 * dynamically when the slot time changes. 1572 * XXX: this is ugly since it depends on how net80211 builds beacon 1573 * frames but ieee80211_beacon_alloc() don't store offsets for us. 1574 */ 1575 if (ic->ic_curmode == IEEE80211_MODE_11G) { 1576 sc->erp = 1577 mtod(m0, uint8_t *) + 1578 sizeof (struct ieee80211_frame) + 1579 8 + 2 + 2 + 1580 ((ic->ic_flags & IEEE80211_F_HIDENWID) ? 1581 1 : 2 + ni->ni_esslen) + 1582 2 + min(ni->ni_rates.rs_nrates, IEEE80211_RATE_SIZE) + 1583 2 + 1 + 1584 ((ic->ic_opmode == IEEE80211_M_IBSS) ? 4 : 6) + 1585 2; 1586 } 1587 1588 return 0; 1589} 1590 1591int 1592rt2560_tx_mgt(struct rt2560_softc *sc, struct mbuf *m0, 1593 struct ieee80211_node *ni) 1594{ 1595 struct ieee80211com *ic = &sc->sc_ic; 1596 struct rt2560_tx_desc *desc; 1597 struct rt2560_tx_data *data; 1598 struct ieee80211_frame *wh; 1599 uint16_t dur; 1600 uint32_t flags = 0; 1601 int rate = 2, error; 1602 1603 desc = &sc->prioq.desc[sc->prioq.cur]; 1604 data = &sc->prioq.data[sc->prioq.cur]; 1605 1606 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1607 BUS_DMA_NOWAIT); 1608 if (error != 0) { 1609 printf("%s: could not map mbuf (error %d)\n", 1610 sc->sc_dev.dv_xname, error); 1611 m_freem(m0); 1612 return error; 1613 } 1614 1615#if NBPFILTER > 0 1616 if (sc->sc_drvbpf != NULL) { 1617 struct mbuf mb; 1618 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap; 1619 1620 tap->wt_flags = 0; 1621 tap->wt_rate = rate; 1622 tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 1623 tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags); 1624 tap->wt_antenna = sc->tx_ant; 1625 1626 mb.m_data = (caddr_t)tap; 1627 mb.m_len = sc->sc_txtap_len; 1628 mb.m_next = m0; 1629 mb.m_nextpkt = NULL; 1630 mb.m_type = 0; 1631 mb.m_flags = 0; 1632 bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_OUT); 1633 } 1634#endif 1635 1636 data->m = m0; 1637 data->ni = ni; 1638 1639 wh = mtod(m0, struct ieee80211_frame *); 1640 1641 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1642 flags |= RT2560_TX_NEED_ACK; 1643 1644 dur = rt2560_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) + 1645 RAL_SIFS; 1646 *(uint16_t *)wh->i_dur = htole16(dur); 1647 1648 /* tell hardware to set timestamp for probe responses */ 1649 if ((wh->i_fc[0] & 1650 (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) == 1651 (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP)) 1652 flags |= RT2560_TX_TIMESTAMP; 1653 } 1654 1655 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 0, 1656 data->map->dm_segs->ds_addr); 1657 1658 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 1659 BUS_DMASYNC_PREWRITE); 1660 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1661 sc->prioq.cur * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1662 BUS_DMASYNC_PREWRITE); 1663 1664 DPRINTFN(10, ("sending mgt frame len=%u idx=%u rate=%u\n", 1665 m0->m_pkthdr.len, sc->prioq.cur, rate)); 1666 1667 /* kick prio */ 1668 sc->prioq.queued++; 1669 sc->prioq.cur = (sc->prioq.cur + 1) % RT2560_PRIO_RING_COUNT; 1670 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_PRIO); 1671 1672 return 0; 1673} 1674 1675int 1676rt2560_tx_data(struct rt2560_softc *sc, struct mbuf *m0, 1677 struct ieee80211_node *ni) 1678{ 1679 struct ieee80211com *ic = &sc->sc_ic; 1680 struct rt2560_tx_ring *txq = &sc->txq; 1681 struct rt2560_tx_desc *desc; 1682 struct rt2560_tx_data *data; 1683 struct ieee80211_frame *wh; 1684 struct ieee80211_key *k; 1685 struct mbuf *mnew; 1686 uint16_t dur; 1687 uint32_t flags = 0; 1688 int pktlen, rate, needcts = 0, needrts = 0, error; 1689 1690 wh = mtod(m0, struct ieee80211_frame *); 1691 1692 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 1693 k = ieee80211_get_txkey(ic, wh, ni); 1694 1695 if ((m0 = ieee80211_encrypt(ic, m0, k)) == NULL) 1696 return ENOBUFS; 1697 1698 /* packet header may have moved, reset our local pointer */ 1699 wh = mtod(m0, struct ieee80211_frame *); 1700 } 1701 1702 /* compute actual packet length (including CRC and crypto overhead) */ 1703 pktlen = m0->m_pkthdr.len + IEEE80211_CRC_LEN; 1704 1705 /* pickup a rate */ 1706 if (IEEE80211_IS_MULTICAST(wh->i_addr1) || 1707 ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 1708 IEEE80211_FC0_TYPE_MGT)) { 1709 /* mgmt/multicast frames are sent at the lowest avail. rate */ 1710 rate = ni->ni_rates.rs_rates[0]; 1711 } else if (ic->ic_fixed_rate != -1) { 1712 rate = ic->ic_sup_rates[ic->ic_curmode]. 1713 rs_rates[ic->ic_fixed_rate]; 1714 } else 1715 rate = ni->ni_rates.rs_rates[ni->ni_txrate]; 1716 if (rate == 0) 1717 rate = 2; /* XXX should not happen */ 1718 rate &= IEEE80211_RATE_VAL; 1719 1720 /* 1721 * Packet Bursting: backoff after ppb=8 frames to give other STAs a 1722 * chance to contend for the wireless medium. 1723 */ 1724 if (ic->ic_opmode == IEEE80211_M_STA && (ni->ni_txseq & 7)) 1725 flags |= RT2560_TX_IFS_SIFS; 1726 1727 /* check if RTS/CTS or CTS-to-self protection must be used */ 1728 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1729 /* multicast frames are not sent at OFDM rates in 802.11b/g */ 1730 if (pktlen > ic->ic_rtsthreshold) { 1731 needrts = 1; /* RTS/CTS based on frame length */ 1732 } else if ((ic->ic_flags & IEEE80211_F_USEPROT) && 1733 RAL_RATE_IS_OFDM(rate)) { 1734 if (ic->ic_protmode == IEEE80211_PROT_CTSONLY) 1735 needcts = 1; /* CTS-to-self */ 1736 else if (ic->ic_protmode == IEEE80211_PROT_RTSCTS) 1737 needrts = 1; /* RTS/CTS */ 1738 } 1739 } 1740 if (needrts || needcts) { 1741 struct mbuf *mprot; 1742 int protrate, ackrate; 1743 1744 protrate = 2; /* XXX */ 1745 ackrate = rt2560_ack_rate(ic, rate); 1746 1747 dur = rt2560_txtime(pktlen, rate, ic->ic_flags) + 1748 rt2560_txtime(RAL_ACK_SIZE, ackrate, ic->ic_flags) + 1749 2 * RAL_SIFS; 1750 if (needrts) { 1751 dur += rt2560_txtime(RAL_CTS_SIZE, rt2560_ack_rate(ic, 1752 protrate), ic->ic_flags) + RAL_SIFS; 1753 mprot = ieee80211_get_rts(ic, wh, dur); 1754 } else { 1755 mprot = ieee80211_get_cts_to_self(ic, dur); 1756 } 1757 if (mprot == NULL) { 1758 printf("%s: could not allocate protection frame\n", 1759 sc->sc_dev.dv_xname); 1760 m_freem(m0); 1761 return ENOBUFS; 1762 } 1763 1764 desc = &txq->desc[txq->cur_encrypt]; 1765 data = &txq->data[txq->cur_encrypt]; 1766 1767 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, mprot, 1768 BUS_DMA_NOWAIT); 1769 if (error != 0) { 1770 printf("%s: could not map mbuf (error %d)\n", 1771 sc->sc_dev.dv_xname, error); 1772 m_freem(mprot); 1773 m_freem(m0); 1774 return error; 1775 } 1776 1777 data->m = mprot; 1778 /* avoid multiple free() of the same node for each fragment */ 1779 data->ni = ieee80211_ref_node(ni); 1780 1781 /* XXX may want to pass the protection frame to BPF */ 1782 1783 rt2560_setup_tx_desc(sc, desc, 1784 (needrts ? RT2560_TX_NEED_ACK : 0) | RT2560_TX_MORE_FRAG, 1785 mprot->m_pkthdr.len, protrate, 1, 1786 data->map->dm_segs->ds_addr); 1787 1788 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1789 data->map->dm_mapsize, BUS_DMASYNC_PREWRITE); 1790 bus_dmamap_sync(sc->sc_dmat, txq->map, 1791 txq->cur_encrypt * RT2560_TX_DESC_SIZE, 1792 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 1793 1794 txq->queued++; 1795 if (++txq->cur_encrypt >= txq->count) 1796 txq->cur_encrypt = 0; 1797 1798 flags |= RT2560_TX_LONG_RETRY | RT2560_TX_IFS_SIFS; 1799 } 1800 1801 data = &txq->data[txq->cur_encrypt]; 1802 desc = &txq->desc[txq->cur_encrypt]; 1803 1804 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1805 BUS_DMA_NOWAIT); 1806 if (error != 0 && error != EFBIG) { 1807 printf("%s: could not map mbuf (error %d)\n", 1808 sc->sc_dev.dv_xname, error); 1809 m_freem(m0); 1810 return error; 1811 } 1812 if (error != 0) { 1813 /* too many fragments, linearize */ 1814 1815 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 1816 if (mnew == NULL) { 1817 m_freem(m0); 1818 return ENOMEM; 1819 } 1820 M_DUP_PKTHDR(mnew, m0); 1821 if (m0->m_pkthdr.len > MHLEN) { 1822 MCLGET(mnew, M_DONTWAIT); 1823 if (!(mnew->m_flags & M_EXT)) { 1824 m_freem(m0); 1825 m_freem(mnew); 1826 return ENOMEM; 1827 } 1828 } 1829 1830 m_copydata(m0, 0, m0->m_pkthdr.len, mtod(mnew, caddr_t)); 1831 m_freem(m0); 1832 mnew->m_len = mnew->m_pkthdr.len; 1833 m0 = mnew; 1834 1835 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1836 BUS_DMA_NOWAIT); 1837 if (error != 0) { 1838 printf("%s: could not map mbuf (error %d)\n", 1839 sc->sc_dev.dv_xname, error); 1840 m_freem(m0); 1841 return error; 1842 } 1843 1844 /* packet header have moved, reset our local pointer */ 1845 wh = mtod(m0, struct ieee80211_frame *); 1846 } 1847 1848#if NBPFILTER > 0 1849 if (sc->sc_drvbpf != NULL) { 1850 struct mbuf mb; 1851 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap; 1852 1853 tap->wt_flags = 0; 1854 tap->wt_rate = rate; 1855 tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 1856 tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags); 1857 tap->wt_antenna = sc->tx_ant; 1858 1859 mb.m_data = (caddr_t)tap; 1860 mb.m_len = sc->sc_txtap_len; 1861 mb.m_next = m0; 1862 mb.m_nextpkt = NULL; 1863 mb.m_type = 0; 1864 mb.m_flags = 0; 1865 bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_OUT); 1866 } 1867#endif 1868 1869 data->m = m0; 1870 data->ni = ni; 1871 1872 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1873 flags |= RT2560_TX_NEED_ACK; 1874 1875 dur = rt2560_txtime(RAL_ACK_SIZE, rt2560_ack_rate(ic, rate), 1876 ic->ic_flags) + RAL_SIFS; 1877 *(uint16_t *)wh->i_dur = htole16(dur); 1878 } 1879 1880 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 1, 1881 data->map->dm_segs->ds_addr); 1882 1883 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 1884 BUS_DMASYNC_PREWRITE); 1885 bus_dmamap_sync(sc->sc_dmat, txq->map, 1886 txq->cur_encrypt * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1887 BUS_DMASYNC_PREWRITE); 1888 1889 DPRINTFN(10, ("sending frame len=%u idx=%u rate=%u\n", 1890 m0->m_pkthdr.len, txq->cur_encrypt, rate)); 1891 1892 /* kick encrypt */ 1893 txq->queued++; 1894 if (++txq->cur_encrypt >= txq->count) 1895 txq->cur_encrypt = 0; 1896 RAL_WRITE(sc, RT2560_SECCSR1, RT2560_KICK_ENCRYPT); 1897 1898 return 0; 1899} 1900 1901void 1902rt2560_start(struct ifnet *ifp) 1903{ 1904 struct rt2560_softc *sc = ifp->if_softc; 1905 struct ieee80211com *ic = &sc->sc_ic; 1906 struct mbuf *m0; 1907 struct ieee80211_node *ni; 1908 1909 /* 1910 * net80211 may still try to send management frames even if the 1911 * IFF_RUNNING flag is not set... 1912 */ 1913 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 1914 return; 1915 1916 for (;;) { 1917 IF_POLL(&ic->ic_mgtq, m0); 1918 if (m0 != NULL) { 1919 if (sc->prioq.queued >= RT2560_PRIO_RING_COUNT) { 1920 ifp->if_flags |= IFF_OACTIVE; 1921 break; 1922 } 1923 IF_DEQUEUE(&ic->ic_mgtq, m0); 1924 1925 ni = (struct ieee80211_node *)m0->m_pkthdr.rcvif; 1926 m0->m_pkthdr.rcvif = NULL; 1927#if NBPFILTER > 0 1928 if (ic->ic_rawbpf != NULL) 1929 bpf_mtap(ic->ic_rawbpf, m0, BPF_DIRECTION_OUT); 1930#endif 1931 if (rt2560_tx_mgt(sc, m0, ni) != 0) 1932 break; 1933 1934 } else { 1935 if (ic->ic_state != IEEE80211_S_RUN) 1936 break; 1937 IFQ_POLL(&ifp->if_snd, m0); 1938 if (m0 == NULL) 1939 break; 1940 if (sc->txq.queued >= RT2560_TX_RING_COUNT - 1) { 1941 ifp->if_flags |= IFF_OACTIVE; 1942 break; 1943 } 1944 IFQ_DEQUEUE(&ifp->if_snd, m0); 1945#if NBPFILTER > 0 1946 if (ifp->if_bpf != NULL) 1947 bpf_mtap(ifp->if_bpf, m0, BPF_DIRECTION_OUT); 1948#endif 1949 m0 = ieee80211_encap(ifp, m0, &ni); 1950 if (m0 == NULL) 1951 continue; 1952#if NBPFILTER > 0 1953 if (ic->ic_rawbpf != NULL) 1954 bpf_mtap(ic->ic_rawbpf, m0, BPF_DIRECTION_OUT); 1955#endif 1956 if (rt2560_tx_data(sc, m0, ni) != 0) { 1957 if (ni != NULL) 1958 ieee80211_release_node(ic, ni); 1959 ifp->if_oerrors++; 1960 break; 1961 } 1962 } 1963 1964 sc->sc_tx_timer = 5; 1965 ifp->if_timer = 1; 1966 } 1967} 1968 1969void 1970rt2560_watchdog(struct ifnet *ifp) 1971{ 1972 struct rt2560_softc *sc = ifp->if_softc; 1973 1974 ifp->if_timer = 0; 1975 1976 if (sc->sc_tx_timer > 0) { 1977 if (--sc->sc_tx_timer == 0) { 1978 printf("%s: device timeout\n", sc->sc_dev.dv_xname); 1979 rt2560_init(ifp); 1980 ifp->if_oerrors++; 1981 return; 1982 } 1983 ifp->if_timer = 1; 1984 } 1985 1986 ieee80211_watchdog(ifp); 1987} 1988 1989int 1990rt2560_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1991{ 1992 struct rt2560_softc *sc = ifp->if_softc; 1993 struct ieee80211com *ic = &sc->sc_ic; 1994 struct ifaddr *ifa; 1995 struct ifreq *ifr; 1996 int s, error = 0; 1997 1998 s = splnet(); 1999 2000 switch (cmd) { 2001 case SIOCSIFADDR: 2002 ifa = (struct ifaddr *)data; 2003 ifp->if_flags |= IFF_UP; 2004#ifdef INET 2005 if (ifa->ifa_addr->sa_family == AF_INET) 2006 arp_ifinit(&ic->ic_ac, ifa); 2007#endif 2008 /* FALLTHROUGH */ 2009 case SIOCSIFFLAGS: 2010 if (ifp->if_flags & IFF_UP) { 2011 if (ifp->if_flags & IFF_RUNNING) 2012 rt2560_update_promisc(sc); 2013 else 2014 rt2560_init(ifp); 2015 } else { 2016 if (ifp->if_flags & IFF_RUNNING) 2017 rt2560_stop(ifp, 1); 2018 } 2019 break; 2020 2021 case SIOCADDMULTI: 2022 case SIOCDELMULTI: 2023 ifr = (struct ifreq *)data; 2024 error = (cmd == SIOCADDMULTI) ? 2025 ether_addmulti(ifr, &ic->ic_ac) : 2026 ether_delmulti(ifr, &ic->ic_ac); 2027 2028 if (error == ENETRESET) 2029 error = 0; 2030 break; 2031 2032 case SIOCS80211CHANNEL: 2033 /* 2034 * This allows for fast channel switching in monitor mode 2035 * (used by kismet). In IBSS mode, we must explicitly reset 2036 * the interface to generate a new beacon frame. 2037 */ 2038 error = ieee80211_ioctl(ifp, cmd, data); 2039 if (error == ENETRESET && 2040 ic->ic_opmode == IEEE80211_M_MONITOR) { 2041 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 2042 (IFF_UP | IFF_RUNNING)) 2043 rt2560_set_chan(sc, ic->ic_ibss_chan); 2044 error = 0; 2045 } 2046 break; 2047 2048 default: 2049 error = ieee80211_ioctl(ifp, cmd, data); 2050 } 2051 2052 if (error == ENETRESET) { 2053 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 2054 (IFF_UP | IFF_RUNNING)) 2055 rt2560_init(ifp); 2056 error = 0; 2057 } 2058 2059 splx(s); 2060 2061 return error; 2062} 2063 2064void 2065rt2560_bbp_write(struct rt2560_softc *sc, uint8_t reg, uint8_t val) 2066{ 2067 uint32_t tmp; 2068 int ntries; 2069 2070 for (ntries = 0; ntries < 100; ntries++) { 2071 if (!(RAL_READ(sc, RT2560_BBPCSR) & RT2560_BBP_BUSY)) 2072 break; 2073 DELAY(1); 2074 } 2075 if (ntries == 100) { 2076 printf("%s: could not write to BBP\n", sc->sc_dev.dv_xname); 2077 return; 2078 } 2079 2080 tmp = RT2560_BBP_WRITE | RT2560_BBP_BUSY | reg << 8 | val; 2081 RAL_WRITE(sc, RT2560_BBPCSR, tmp); 2082 2083 DPRINTFN(15, ("BBP R%u <- 0x%02x\n", reg, val)); 2084} 2085 2086uint8_t 2087rt2560_bbp_read(struct rt2560_softc *sc, uint8_t reg) 2088{ 2089 uint32_t val; 2090 int ntries; 2091 2092 val = RT2560_BBP_BUSY | reg << 8; 2093 RAL_WRITE(sc, RT2560_BBPCSR, val); 2094 2095 for (ntries = 0; ntries < 100; ntries++) { 2096 val = RAL_READ(sc, RT2560_BBPCSR); 2097 if (!(val & RT2560_BBP_BUSY)) 2098 return val & 0xff; 2099 DELAY(1); 2100 } 2101 2102 printf("%s: could not read from BBP\n", sc->sc_dev.dv_xname); 2103 return 0; 2104} 2105 2106void 2107rt2560_rf_write(struct rt2560_softc *sc, uint8_t reg, uint32_t val) 2108{ 2109 uint32_t tmp; 2110 int ntries; 2111 2112 for (ntries = 0; ntries < 100; ntries++) { 2113 if (!(RAL_READ(sc, RT2560_RFCSR) & RT2560_RF_BUSY)) 2114 break; 2115 DELAY(1); 2116 } 2117 if (ntries == 100) { 2118 printf("%s: could not write to RF\n", sc->sc_dev.dv_xname); 2119 return; 2120 } 2121 2122 tmp = RT2560_RF_BUSY | RT2560_RF_20BIT | (val & 0xfffff) << 2 | 2123 (reg & 0x3); 2124 RAL_WRITE(sc, RT2560_RFCSR, tmp); 2125 2126 /* remember last written value in sc */ 2127 sc->rf_regs[reg] = val; 2128 2129 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff)); 2130} 2131 2132void 2133rt2560_set_chan(struct rt2560_softc *sc, struct ieee80211_channel *c) 2134{ 2135 struct ieee80211com *ic = &sc->sc_ic; 2136 uint8_t power, tmp; 2137 u_int chan; 2138 2139 chan = ieee80211_chan2ieee(ic, c); 2140 if (chan == 0 || chan == IEEE80211_CHAN_ANY) 2141 return; 2142 2143 power = min(sc->txpow[chan - 1], 31); 2144 2145 DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power)); 2146 2147 switch (sc->rf_rev) { 2148 case RT2560_RF_2522: 2149 rt2560_rf_write(sc, RT2560_RF1, 0x00814); 2150 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2522_r2[chan - 1]); 2151 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040); 2152 break; 2153 2154 case RT2560_RF_2523: 2155 rt2560_rf_write(sc, RT2560_RF1, 0x08804); 2156 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2523_r2[chan - 1]); 2157 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x38044); 2158 rt2560_rf_write(sc, RT2560_RF4, 2159 (chan == 14) ? 0x00280 : 0x00286); 2160 break; 2161 2162 case RT2560_RF_2524: 2163 rt2560_rf_write(sc, RT2560_RF1, 0x0c808); 2164 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2524_r2[chan - 1]); 2165 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040); 2166 rt2560_rf_write(sc, RT2560_RF4, 2167 (chan == 14) ? 0x00280 : 0x00286); 2168 break; 2169 2170 case RT2560_RF_2525: 2171 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2172 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525_hi_r2[chan - 1]); 2173 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2174 rt2560_rf_write(sc, RT2560_RF4, 2175 (chan == 14) ? 0x00280 : 0x00286); 2176 2177 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2178 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525_r2[chan - 1]); 2179 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2180 rt2560_rf_write(sc, RT2560_RF4, 2181 (chan == 14) ? 0x00280 : 0x00286); 2182 break; 2183 2184 case RT2560_RF_2525E: 2185 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2186 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525e_r2[chan - 1]); 2187 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2188 rt2560_rf_write(sc, RT2560_RF4, 2189 (chan == 14) ? 0x00286 : 0x00282); 2190 break; 2191 2192 case RT2560_RF_2526: 2193 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2526_hi_r2[chan - 1]); 2194 rt2560_rf_write(sc, RT2560_RF4, 2195 (chan & 1) ? 0x00386 : 0x00381); 2196 rt2560_rf_write(sc, RT2560_RF1, 0x08804); 2197 2198 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2526_r2[chan - 1]); 2199 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2200 rt2560_rf_write(sc, RT2560_RF4, 2201 (chan & 1) ? 0x00386 : 0x00381); 2202 break; 2203 } 2204 2205 if (ic->ic_opmode != IEEE80211_M_MONITOR && 2206 ic->ic_state != IEEE80211_S_SCAN) { 2207 /* set Japan filter bit for channel 14 */ 2208 tmp = rt2560_bbp_read(sc, 70); 2209 2210 tmp &= ~RT2560_JAPAN_FILTER; 2211 if (chan == 14) 2212 tmp |= RT2560_JAPAN_FILTER; 2213 2214 rt2560_bbp_write(sc, 70, tmp); 2215 2216 DELAY(1000); /* RF needs a 1ms delay here */ 2217 rt2560_disable_rf_tune(sc); 2218 2219 /* clear CRC errors */ 2220 RAL_READ(sc, RT2560_CNT0); 2221 } 2222} 2223 2224/* 2225 * Disable RF auto-tuning. 2226 */ 2227void 2228rt2560_disable_rf_tune(struct rt2560_softc *sc) 2229{ 2230 uint32_t tmp; 2231 2232 if (sc->rf_rev != RT2560_RF_2523) { 2233 tmp = sc->rf_regs[RT2560_RF1] & ~RT2560_RF1_AUTOTUNE; 2234 rt2560_rf_write(sc, RT2560_RF1, tmp); 2235 } 2236 2237 tmp = sc->rf_regs[RT2560_RF3] & ~RT2560_RF3_AUTOTUNE; 2238 rt2560_rf_write(sc, RT2560_RF3, tmp); 2239 2240 DPRINTFN(2, ("disabling RF autotune\n")); 2241} 2242 2243/* 2244 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF 2245 * synchronization. 2246 */ 2247void 2248rt2560_enable_tsf_sync(struct rt2560_softc *sc) 2249{ 2250 struct ieee80211com *ic = &sc->sc_ic; 2251 uint16_t logcwmin, preload; 2252 uint32_t tmp; 2253 2254 /* first, disable TSF synchronization */ 2255 RAL_WRITE(sc, RT2560_CSR14, 0); 2256 2257 tmp = 16 * ic->ic_bss->ni_intval; 2258 RAL_WRITE(sc, RT2560_CSR12, tmp); 2259 2260 RAL_WRITE(sc, RT2560_CSR13, 0); 2261 2262 logcwmin = 5; 2263 preload = (ic->ic_opmode == IEEE80211_M_STA) ? 384 : 1024; 2264 tmp = logcwmin << 16 | preload; 2265 RAL_WRITE(sc, RT2560_BCNOCSR, tmp); 2266 2267 /* finally, enable TSF synchronization */ 2268 tmp = RT2560_ENABLE_TSF | RT2560_ENABLE_TBCN; 2269 if (ic->ic_opmode == IEEE80211_M_STA) 2270 tmp |= RT2560_ENABLE_TSF_SYNC(1); 2271 else 2272 tmp |= RT2560_ENABLE_TSF_SYNC(2) | 2273 RT2560_ENABLE_BEACON_GENERATOR; 2274 RAL_WRITE(sc, RT2560_CSR14, tmp); 2275 2276 DPRINTF(("enabling TSF synchronization\n")); 2277} 2278 2279void 2280rt2560_update_plcp(struct rt2560_softc *sc) 2281{ 2282 struct ieee80211com *ic = &sc->sc_ic; 2283 2284 /* no short preamble for 1Mbps */ 2285 RAL_WRITE(sc, RT2560_PLCP1MCSR, 0x00700400); 2286 2287 if (!(ic->ic_flags & IEEE80211_F_SHPREAMBLE)) { 2288 /* values taken from the reference driver */ 2289 RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380401); 2290 RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x00150402); 2291 RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b8403); 2292 } else { 2293 /* same values as above or'ed 0x8 */ 2294 RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380409); 2295 RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x0015040a); 2296 RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b840b); 2297 } 2298 2299 DPRINTF(("updating PLCP for %s preamble\n", 2300 (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ? "short" : "long")); 2301} 2302 2303void 2304rt2560_updateslot(struct ieee80211com *ic) 2305{ 2306 struct rt2560_softc *sc = ic->ic_if.if_softc; 2307 2308 if (ic->ic_opmode == IEEE80211_M_HOSTAP) { 2309 /* 2310 * In HostAP mode, we defer setting of new slot time until 2311 * updated ERP Information Element has propagated to all 2312 * associated STAs. 2313 */ 2314 sc->sc_flags |= RT2560_UPDATE_SLOT; 2315 } else 2316 rt2560_set_slottime(sc); 2317} 2318 2319/* 2320 * IEEE 802.11a (and possibly 802.11g) use short slot time. Refer to 2321 * IEEE Std 802.11-1999 pp. 85 to know how these values are computed. 2322 */ 2323void 2324rt2560_set_slottime(struct rt2560_softc *sc) 2325{ 2326 struct ieee80211com *ic = &sc->sc_ic; 2327 uint8_t slottime; 2328 uint16_t sifs, pifs, difs, eifs; 2329 uint32_t tmp; 2330 2331 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 2332 2333 /* define the MAC slot boundaries */ 2334 sifs = RAL_SIFS - RT2560_RXTX_TURNAROUND; 2335 pifs = sifs + slottime; 2336 difs = sifs + 2 * slottime; 2337 eifs = (ic->ic_curmode == IEEE80211_MODE_11B) ? 364 : 60; 2338 2339 tmp = RAL_READ(sc, RT2560_CSR11); 2340 tmp = (tmp & ~0x1f00) | slottime << 8; 2341 RAL_WRITE(sc, RT2560_CSR11, tmp); 2342 2343 tmp = pifs << 16 | sifs; 2344 RAL_WRITE(sc, RT2560_CSR18, tmp); 2345 2346 tmp = eifs << 16 | difs; 2347 RAL_WRITE(sc, RT2560_CSR19, tmp); 2348 2349 DPRINTF(("setting slottime to %uus\n", slottime)); 2350} 2351 2352void 2353rt2560_set_basicrates(struct rt2560_softc *sc) 2354{ 2355 struct ieee80211com *ic = &sc->sc_ic; 2356 2357 /* update basic rate set */ 2358 if (ic->ic_curmode == IEEE80211_MODE_11B) { 2359 /* 11b basic rates: 1, 2Mbps */ 2360 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x3); 2361 } else { 2362 /* 11b/g basic rates: 1, 2, 5.5, 11Mbps */ 2363 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0xf); 2364 } 2365} 2366 2367void 2368rt2560_update_led(struct rt2560_softc *sc, int led1, int led2) 2369{ 2370 uint32_t tmp; 2371 2372 /* set ON period to 70ms and OFF period to 30ms */ 2373 tmp = led1 << 16 | led2 << 17 | 70 << 8 | 30; 2374 RAL_WRITE(sc, RT2560_LEDCSR, tmp); 2375} 2376 2377void 2378rt2560_set_bssid(struct rt2560_softc *sc, uint8_t *bssid) 2379{ 2380 uint32_t tmp; 2381 2382 tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24; 2383 RAL_WRITE(sc, RT2560_CSR5, tmp); 2384 2385 tmp = bssid[4] | bssid[5] << 8; 2386 RAL_WRITE(sc, RT2560_CSR6, tmp); 2387 2388 DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid))); 2389} 2390 2391void 2392rt2560_set_macaddr(struct rt2560_softc *sc, uint8_t *addr) 2393{ 2394 uint32_t tmp; 2395 2396 tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24; 2397 RAL_WRITE(sc, RT2560_CSR3, tmp); 2398 2399 tmp = addr[4] | addr[5] << 8; 2400 RAL_WRITE(sc, RT2560_CSR4, tmp); 2401 2402 DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr))); 2403} 2404 2405void 2406rt2560_get_macaddr(struct rt2560_softc *sc, uint8_t *addr) 2407{ 2408 uint32_t tmp; 2409 2410 tmp = RAL_READ(sc, RT2560_CSR3); 2411 addr[0] = tmp & 0xff; 2412 addr[1] = (tmp >> 8) & 0xff; 2413 addr[2] = (tmp >> 16) & 0xff; 2414 addr[3] = (tmp >> 24); 2415 2416 tmp = RAL_READ(sc, RT2560_CSR4); 2417 addr[4] = tmp & 0xff; 2418 addr[5] = (tmp >> 8) & 0xff; 2419} 2420 2421void 2422rt2560_update_promisc(struct rt2560_softc *sc) 2423{ 2424 struct ifnet *ifp = &sc->sc_ic.ic_if; 2425 uint32_t tmp; 2426 2427 tmp = RAL_READ(sc, RT2560_RXCSR0); 2428 2429 tmp &= ~RT2560_DROP_NOT_TO_ME; 2430 if (!(ifp->if_flags & IFF_PROMISC)) 2431 tmp |= RT2560_DROP_NOT_TO_ME; 2432 2433 RAL_WRITE(sc, RT2560_RXCSR0, tmp); 2434 2435 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? 2436 "entering" : "leaving")); 2437} 2438 2439void 2440rt2560_set_txantenna(struct rt2560_softc *sc, int antenna) 2441{ 2442 uint32_t tmp; 2443 uint8_t tx; 2444 2445 tx = rt2560_bbp_read(sc, RT2560_BBP_TX) & ~RT2560_BBP_ANTMASK; 2446 if (antenna == 1) 2447 tx |= RT2560_BBP_ANTA; 2448 else if (antenna == 2) 2449 tx |= RT2560_BBP_ANTB; 2450 else 2451 tx |= RT2560_BBP_DIVERSITY; 2452 2453 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */ 2454 if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526 || 2455 sc->rf_rev == RT2560_RF_5222) 2456 tx |= RT2560_BBP_FLIPIQ; 2457 2458 rt2560_bbp_write(sc, RT2560_BBP_TX, tx); 2459 2460 /* update values for CCK and OFDM in BBPCSR1 */ 2461 tmp = RAL_READ(sc, RT2560_BBPCSR1) & ~0x00070007; 2462 tmp |= (tx & 0x7) << 16 | (tx & 0x7); 2463 RAL_WRITE(sc, RT2560_BBPCSR1, tmp); 2464} 2465 2466void 2467rt2560_set_rxantenna(struct rt2560_softc *sc, int antenna) 2468{ 2469 uint8_t rx; 2470 2471 rx = rt2560_bbp_read(sc, RT2560_BBP_RX) & ~RT2560_BBP_ANTMASK; 2472 if (antenna == 1) 2473 rx |= RT2560_BBP_ANTA; 2474 else if (antenna == 2) 2475 rx |= RT2560_BBP_ANTB; 2476 else 2477 rx |= RT2560_BBP_DIVERSITY; 2478 2479 /* need to force no I/Q flip for RF 2525e and 2526 */ 2480 if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526) 2481 rx &= ~RT2560_BBP_FLIPIQ; 2482 2483 rt2560_bbp_write(sc, RT2560_BBP_RX, rx); 2484} 2485 2486const char * 2487rt2560_get_rf(int rev) 2488{ 2489 switch (rev) { 2490 case RT2560_RF_2522: return "RT2522"; 2491 case RT2560_RF_2523: return "RT2523"; 2492 case RT2560_RF_2524: return "RT2524"; 2493 case RT2560_RF_2525: return "RT2525"; 2494 case RT2560_RF_2525E: return "RT2525e"; 2495 case RT2560_RF_2526: return "RT2526"; 2496 case RT2560_RF_5222: return "RT5222"; 2497 default: return "unknown"; 2498 } 2499} 2500 2501void 2502rt2560_read_eeprom(struct rt2560_softc *sc) 2503{ 2504 uint16_t val; 2505 int i; 2506 2507 val = rt2560_eeprom_read(sc, RT2560_EEPROM_CONFIG0); 2508 sc->rf_rev = (val >> 11) & 0x1f; 2509 sc->hw_radio = (val >> 10) & 0x1; 2510 sc->led_mode = (val >> 6) & 0x7; 2511 sc->rx_ant = (val >> 4) & 0x3; 2512 sc->tx_ant = (val >> 2) & 0x3; 2513 sc->nb_ant = val & 0x3; 2514 2515 /* read default values for BBP registers */ 2516 for (i = 0; i < 16; i++) { 2517 val = rt2560_eeprom_read(sc, RT2560_EEPROM_BBP_BASE + i); 2518 sc->bbp_prom[i].reg = val >> 8; 2519 sc->bbp_prom[i].val = val & 0xff; 2520 } 2521 2522 /* read Tx power for all b/g channels */ 2523 for (i = 0; i < 14 / 2; i++) { 2524 val = rt2560_eeprom_read(sc, RT2560_EEPROM_TXPOWER + i); 2525 sc->txpow[i * 2] = val >> 8; 2526 sc->txpow[i * 2 + 1] = val & 0xff; 2527 } 2528} 2529 2530int 2531rt2560_bbp_init(struct rt2560_softc *sc) 2532{ 2533#define N(a) (sizeof (a) / sizeof ((a)[0])) 2534 int i, ntries; 2535 2536 /* wait for BBP to be ready */ 2537 for (ntries = 0; ntries < 100; ntries++) { 2538 if (rt2560_bbp_read(sc, RT2560_BBP_VERSION) != 0) 2539 break; 2540 DELAY(1); 2541 } 2542 if (ntries == 100) { 2543 printf("%s: timeout waiting for BBP\n", sc->sc_dev.dv_xname); 2544 return EIO; 2545 } 2546 2547 /* initialize BBP registers to default values */ 2548 for (i = 0; i < N(rt2560_def_bbp); i++) { 2549 rt2560_bbp_write(sc, rt2560_def_bbp[i].reg, 2550 rt2560_def_bbp[i].val); 2551 } 2552#if 0 2553 /* initialize BBP registers to values stored in EEPROM */ 2554 for (i = 0; i < 16; i++) { 2555 if (sc->bbp_prom[i].reg == 0xff) 2556 continue; 2557 rt2560_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 2558 } 2559#endif 2560 2561 return 0; 2562#undef N 2563} 2564 2565int 2566rt2560_init(struct ifnet *ifp) 2567{ 2568#define N(a) (sizeof (a) / sizeof ((a)[0])) 2569 struct rt2560_softc *sc = ifp->if_softc; 2570 struct ieee80211com *ic = &sc->sc_ic; 2571 uint32_t tmp; 2572 int i; 2573 2574 /* for CardBus, power on the socket */ 2575 if (!(sc->sc_flags & RT2560_ENABLED)) { 2576 if (sc->sc_enable != NULL && (*sc->sc_enable)(sc) != 0) { 2577 printf("%s: could not enable device\n", 2578 sc->sc_dev.dv_xname); 2579 return EIO; 2580 } 2581 sc->sc_flags |= RT2560_ENABLED; 2582 } 2583 2584 rt2560_stop(ifp, 0); 2585 2586 /* setup tx rings */ 2587 tmp = RT2560_PRIO_RING_COUNT << 24 | 2588 RT2560_ATIM_RING_COUNT << 16 | 2589 RT2560_TX_RING_COUNT << 8 | 2590 RT2560_TX_DESC_SIZE; 2591 2592 /* rings _must_ be initialized in this _exact_ order! */ 2593 RAL_WRITE(sc, RT2560_TXCSR2, tmp); 2594 RAL_WRITE(sc, RT2560_TXCSR3, sc->txq.physaddr); 2595 RAL_WRITE(sc, RT2560_TXCSR5, sc->prioq.physaddr); 2596 RAL_WRITE(sc, RT2560_TXCSR4, sc->atimq.physaddr); 2597 RAL_WRITE(sc, RT2560_TXCSR6, sc->bcnq.physaddr); 2598 2599 /* setup rx ring */ 2600 tmp = RT2560_RX_RING_COUNT << 8 | RT2560_RX_DESC_SIZE; 2601 2602 RAL_WRITE(sc, RT2560_RXCSR1, tmp); 2603 RAL_WRITE(sc, RT2560_RXCSR2, sc->rxq.physaddr); 2604 2605 /* initialize MAC registers to default values */ 2606 for (i = 0; i < N(rt2560_def_mac); i++) 2607 RAL_WRITE(sc, rt2560_def_mac[i].reg, rt2560_def_mac[i].val); 2608 2609 IEEE80211_ADDR_COPY(ic->ic_myaddr, LLADDR(ifp->if_sadl)); 2610 rt2560_set_macaddr(sc, ic->ic_myaddr); 2611 2612 /* set basic rate set (will be updated later) */ 2613 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x153); 2614 2615 rt2560_set_txantenna(sc, 1); 2616 rt2560_set_rxantenna(sc, 1); 2617 rt2560_set_slottime(sc); 2618 rt2560_update_plcp(sc); 2619 rt2560_update_led(sc, 0, 0); 2620 2621 RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC); 2622 RAL_WRITE(sc, RT2560_CSR1, RT2560_HOST_READY); 2623 2624 if (rt2560_bbp_init(sc) != 0) { 2625 rt2560_stop(ifp, 1); 2626 return EIO; 2627 } 2628 2629 /* set default BSS channel */ 2630 ic->ic_bss->ni_chan = ic->ic_ibss_chan; 2631 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 2632 2633 /* kick Rx */ 2634 tmp = RT2560_DROP_PHY_ERROR | RT2560_DROP_CRC_ERROR; 2635 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2636 tmp |= RT2560_DROP_CTL | RT2560_DROP_VERSION_ERROR; 2637 if (ic->ic_opmode != IEEE80211_M_HOSTAP) 2638 tmp |= RT2560_DROP_TODS; 2639 if (!(ifp->if_flags & IFF_PROMISC)) 2640 tmp |= RT2560_DROP_NOT_TO_ME; 2641 } 2642 RAL_WRITE(sc, RT2560_RXCSR0, tmp); 2643 2644 /* clear old FCS and Rx FIFO errors */ 2645 RAL_READ(sc, RT2560_CNT0); 2646 RAL_READ(sc, RT2560_CNT4); 2647 2648 /* clear any pending interrupts */ 2649 RAL_WRITE(sc, RT2560_CSR7, 0xffffffff); 2650 2651 /* enable interrupts */ 2652 RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK); 2653 2654 ifp->if_flags &= ~IFF_OACTIVE; 2655 ifp->if_flags |= IFF_RUNNING; 2656 2657 if (ic->ic_opmode == IEEE80211_M_MONITOR) 2658 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 2659 else 2660 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 2661 2662 return 0; 2663#undef N 2664} 2665 2666void 2667rt2560_stop(struct ifnet *ifp, int disable) 2668{ 2669 struct rt2560_softc *sc = ifp->if_softc; 2670 struct ieee80211com *ic = &sc->sc_ic; 2671 2672 sc->sc_tx_timer = 0; 2673 ifp->if_timer = 0; 2674 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 2675 2676 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); /* free all nodes */ 2677 2678 /* abort Tx */ 2679 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_ABORT_TX); 2680 2681 /* disable Rx */ 2682 RAL_WRITE(sc, RT2560_RXCSR0, RT2560_DISABLE_RX); 2683 2684 /* reset ASIC (and thus, BBP) */ 2685 RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC); 2686 RAL_WRITE(sc, RT2560_CSR1, 0); 2687 2688 /* disable interrupts */ 2689 RAL_WRITE(sc, RT2560_CSR8, 0xffffffff); 2690 2691 /* clear any pending interrupt */ 2692 RAL_WRITE(sc, RT2560_CSR7, 0xffffffff); 2693 2694 /* reset Tx and Rx rings */ 2695 rt2560_reset_tx_ring(sc, &sc->txq); 2696 rt2560_reset_tx_ring(sc, &sc->atimq); 2697 rt2560_reset_tx_ring(sc, &sc->prioq); 2698 rt2560_reset_tx_ring(sc, &sc->bcnq); 2699 rt2560_reset_rx_ring(sc, &sc->rxq); 2700 2701 /* for CardBus, power down the socket */ 2702 if (disable && sc->sc_disable != NULL) { 2703 if (sc->sc_flags & RT2560_ENABLED) { 2704 (*sc->sc_disable)(sc); 2705 sc->sc_flags &= ~RT2560_ENABLED; 2706 } 2707 } 2708} 2709 2710void 2711rt2560_power(int why, void *arg) 2712{ 2713 struct rt2560_softc *sc = arg; 2714 struct ifnet *ifp = &sc->sc_ic.ic_if; 2715 int s; 2716 2717 DPRINTF(("%s: rt2560_power(%d)\n", sc->sc_dev.dv_xname, why)); 2718 2719 s = splnet(); 2720 switch (why) { 2721 case PWR_SUSPEND: 2722 case PWR_STANDBY: 2723 rt2560_stop(ifp, 1); 2724 if (sc->sc_power != NULL) 2725 (*sc->sc_power)(sc, why); 2726 break; 2727 case PWR_RESUME: 2728 if (ifp->if_flags & IFF_UP) { 2729 rt2560_init(ifp); 2730 if (sc->sc_power != NULL) 2731 (*sc->sc_power)(sc, why); 2732 if (ifp->if_flags & IFF_RUNNING) 2733 rt2560_start(ifp); 2734 } 2735 break; 2736 } 2737 splx(s); 2738} 2739 2740void 2741rt2560_shutdown(void *arg) 2742{ 2743 struct rt2560_softc *sc = arg; 2744 2745 rt2560_stop(&sc->sc_ic.ic_if, 1); 2746} 2747 2748struct cfdriver ral_cd = { 2749 NULL, "ral", DV_IFNET 2750}; 2751