rt2560.c revision 1.35
1/*	$OpenBSD: rt2560.c,v 1.35 2007/11/17 14:29:11 damien Exp $  */
2
3/*-
4 * Copyright (c) 2005, 2006
5 *	Damien Bergamini <damien.bergamini@free.fr>
6 *
7 * Permission to use, copy, modify, and distribute this software for any
8 * purpose with or without fee is hereby granted, provided that the above
9 * copyright notice and this permission notice appear in all copies.
10 *
11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18 */
19
20/*-
21 * Ralink Technology RT2560 chipset driver
22 * http://www.ralinktech.com/
23 */
24
25#include "bpfilter.h"
26
27#include <sys/param.h>
28#include <sys/sockio.h>
29#include <sys/sysctl.h>
30#include <sys/mbuf.h>
31#include <sys/kernel.h>
32#include <sys/socket.h>
33#include <sys/systm.h>
34#include <sys/malloc.h>
35#include <sys/timeout.h>
36#include <sys/conf.h>
37#include <sys/device.h>
38
39#include <machine/bus.h>
40#include <machine/endian.h>
41#include <machine/intr.h>
42
43#if NBPFILTER > 0
44#include <net/bpf.h>
45#endif
46#include <net/if.h>
47#include <net/if_arp.h>
48#include <net/if_dl.h>
49#include <net/if_media.h>
50#include <net/if_types.h>
51
52#include <netinet/in.h>
53#include <netinet/in_systm.h>
54#include <netinet/in_var.h>
55#include <netinet/if_ether.h>
56#include <netinet/ip.h>
57
58#include <net80211/ieee80211_var.h>
59#include <net80211/ieee80211_amrr.h>
60#include <net80211/ieee80211_radiotap.h>
61
62#include <dev/ic/rt2560reg.h>
63#include <dev/ic/rt2560var.h>
64
65#include <dev/pci/pcireg.h>
66#include <dev/pci/pcivar.h>
67#include <dev/pci/pcidevs.h>
68
69#ifdef RAL_DEBUG
70#define DPRINTF(x)	do { if (rt2560_debug > 0) printf x; } while (0)
71#define DPRINTFN(n, x)	do { if (rt2560_debug >= (n)) printf x; } while (0)
72int rt2560_debug = 1;
73#else
74#define DPRINTF(x)
75#define DPRINTFN(n, x)
76#endif
77
78int		rt2560_alloc_tx_ring(struct rt2560_softc *,
79		    struct rt2560_tx_ring *, int);
80void		rt2560_reset_tx_ring(struct rt2560_softc *,
81		    struct rt2560_tx_ring *);
82void		rt2560_free_tx_ring(struct rt2560_softc *,
83		    struct rt2560_tx_ring *);
84int		rt2560_alloc_rx_ring(struct rt2560_softc *,
85		    struct rt2560_rx_ring *, int);
86void		rt2560_reset_rx_ring(struct rt2560_softc *,
87		    struct rt2560_rx_ring *);
88void		rt2560_free_rx_ring(struct rt2560_softc *,
89		    struct rt2560_rx_ring *);
90struct		ieee80211_node *rt2560_node_alloc(struct ieee80211com *);
91int		rt2560_media_change(struct ifnet *);
92void		rt2560_next_scan(void *);
93void		rt2560_iter_func(void *, struct ieee80211_node *);
94void		rt2560_amrr_timeout(void *);
95void		rt2560_newassoc(struct ieee80211com *, struct ieee80211_node *,
96		    int);
97int		rt2560_newstate(struct ieee80211com *, enum ieee80211_state,
98		    int);
99uint16_t	rt2560_eeprom_read(struct rt2560_softc *, uint8_t);
100void		rt2560_encryption_intr(struct rt2560_softc *);
101void		rt2560_tx_intr(struct rt2560_softc *);
102void		rt2560_prio_intr(struct rt2560_softc *);
103void		rt2560_decryption_intr(struct rt2560_softc *);
104void		rt2560_rx_intr(struct rt2560_softc *);
105void		rt2560_beacon_expire(struct rt2560_softc *);
106void		rt2560_wakeup_expire(struct rt2560_softc *);
107#if NBPFILTER > 0
108uint8_t		rt2560_rxrate(const struct rt2560_rx_desc *);
109#endif
110int		rt2560_ack_rate(struct ieee80211com *, int);
111uint16_t	rt2560_txtime(int, int, uint32_t);
112uint8_t		rt2560_plcp_signal(int);
113void		rt2560_setup_tx_desc(struct rt2560_softc *,
114		    struct rt2560_tx_desc *, uint32_t, int, int, int,
115		    bus_addr_t);
116int		rt2560_tx_bcn(struct rt2560_softc *, struct mbuf *,
117		    struct ieee80211_node *);
118int		rt2560_tx_mgt(struct rt2560_softc *, struct mbuf *,
119		    struct ieee80211_node *);
120int		rt2560_tx_data(struct rt2560_softc *, struct mbuf *,
121		    struct ieee80211_node *);
122void		rt2560_start(struct ifnet *);
123void		rt2560_watchdog(struct ifnet *);
124int		rt2560_ioctl(struct ifnet *, u_long, caddr_t);
125void		rt2560_bbp_write(struct rt2560_softc *, uint8_t, uint8_t);
126uint8_t		rt2560_bbp_read(struct rt2560_softc *, uint8_t);
127void		rt2560_rf_write(struct rt2560_softc *, uint8_t, uint32_t);
128void		rt2560_set_chan(struct rt2560_softc *,
129		    struct ieee80211_channel *);
130void		rt2560_disable_rf_tune(struct rt2560_softc *);
131void		rt2560_enable_tsf_sync(struct rt2560_softc *);
132void		rt2560_update_plcp(struct rt2560_softc *);
133void		rt2560_updateslot(struct ieee80211com *);
134void		rt2560_set_slottime(struct rt2560_softc *);
135void		rt2560_set_basicrates(struct rt2560_softc *);
136void		rt2560_update_led(struct rt2560_softc *, int, int);
137void		rt2560_set_bssid(struct rt2560_softc *, uint8_t *);
138void		rt2560_set_macaddr(struct rt2560_softc *, uint8_t *);
139void		rt2560_get_macaddr(struct rt2560_softc *, uint8_t *);
140void		rt2560_update_promisc(struct rt2560_softc *);
141void		rt2560_set_txantenna(struct rt2560_softc *, int);
142void		rt2560_set_rxantenna(struct rt2560_softc *, int);
143const char	*rt2560_get_rf(int);
144void		rt2560_read_eeprom(struct rt2560_softc *);
145int		rt2560_bbp_init(struct rt2560_softc *);
146int		rt2560_init(struct ifnet *);
147void		rt2560_stop(struct ifnet *, int);
148void		rt2560_power(int, void *);
149
150static const struct {
151	uint32_t	reg;
152	uint32_t	val;
153} rt2560_def_mac[] = {
154	RT2560_DEF_MAC
155};
156
157static const struct {
158	uint8_t	reg;
159	uint8_t	val;
160} rt2560_def_bbp[] = {
161	RT2560_DEF_BBP
162};
163
164static const uint32_t rt2560_rf2522_r2[]    = RT2560_RF2522_R2;
165static const uint32_t rt2560_rf2523_r2[]    = RT2560_RF2523_R2;
166static const uint32_t rt2560_rf2524_r2[]    = RT2560_RF2524_R2;
167static const uint32_t rt2560_rf2525_r2[]    = RT2560_RF2525_R2;
168static const uint32_t rt2560_rf2525_hi_r2[] = RT2560_RF2525_HI_R2;
169static const uint32_t rt2560_rf2525e_r2[]   = RT2560_RF2525E_R2;
170static const uint32_t rt2560_rf2526_r2[]    = RT2560_RF2526_R2;
171static const uint32_t rt2560_rf2526_hi_r2[] = RT2560_RF2526_HI_R2;
172
173int
174rt2560_attach(void *xsc, int id)
175{
176	struct rt2560_softc *sc = xsc;
177	struct ieee80211com *ic = &sc->sc_ic;
178	struct ifnet *ifp = &ic->ic_if;
179	int error, i;
180
181	sc->amrr.amrr_min_success_threshold =  1;
182	sc->amrr.amrr_max_success_threshold = 15;
183	timeout_set(&sc->amrr_to, rt2560_amrr_timeout, sc);
184	timeout_set(&sc->scan_to, rt2560_next_scan, sc);
185
186	/* retrieve RT2560 rev. no */
187	sc->asic_rev = RAL_READ(sc, RT2560_CSR0);
188
189	/* retrieve MAC address */
190	rt2560_get_macaddr(sc, ic->ic_myaddr);
191	printf(", address %s\n", ether_sprintf(ic->ic_myaddr));
192
193	/* retrieve RF rev. no and various other things from EEPROM */
194	rt2560_read_eeprom(sc);
195
196	printf("%s: MAC/BBP RT2560 (rev 0x%02x), RF %s\n", sc->sc_dev.dv_xname,
197	    sc->asic_rev, rt2560_get_rf(sc->rf_rev));
198
199	/*
200	 * Allocate Tx and Rx rings.
201	 */
202	error = rt2560_alloc_tx_ring(sc, &sc->txq, RT2560_TX_RING_COUNT);
203	if (error != 0) {
204		printf("%s: could not allocate Tx ring\n",
205		    sc->sc_dev.dv_xname);
206		goto fail1;
207	}
208	error = rt2560_alloc_tx_ring(sc, &sc->atimq, RT2560_ATIM_RING_COUNT);
209	if (error != 0) {
210		printf("%s: could not allocate ATIM ring\n",
211		    sc->sc_dev.dv_xname);
212		goto fail2;
213	}
214	error = rt2560_alloc_tx_ring(sc, &sc->prioq, RT2560_PRIO_RING_COUNT);
215	if (error != 0) {
216		printf("%s: could not allocate Prio ring\n",
217		    sc->sc_dev.dv_xname);
218		goto fail3;
219	}
220	error = rt2560_alloc_tx_ring(sc, &sc->bcnq, RT2560_BEACON_RING_COUNT);
221	if (error != 0) {
222		printf("%s: could not allocate Beacon ring\n",
223		    sc->sc_dev.dv_xname);
224		goto fail4;
225	}
226	error = rt2560_alloc_rx_ring(sc, &sc->rxq, RT2560_RX_RING_COUNT);
227	if (error != 0) {
228		printf("%s: could not allocate Rx ring\n",
229		    sc->sc_dev.dv_xname);
230		goto fail5;
231	}
232
233	ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
234	ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */
235	ic->ic_state = IEEE80211_S_INIT;
236
237	/* set device capabilities */
238	ic->ic_caps =
239	    IEEE80211_C_IBSS |		/* IBSS mode supported */
240	    IEEE80211_C_MONITOR |	/* monitor mode supported */
241	    IEEE80211_C_HOSTAP |	/* HostAp mode supported */
242	    IEEE80211_C_TXPMGT |	/* tx power management */
243	    IEEE80211_C_SHPREAMBLE |	/* short preamble supported */
244	    IEEE80211_C_SHSLOT |	/* short slot time supported */
245	    IEEE80211_C_WEP;		/* s/w WEP */
246
247	/* set supported .11b and .11g rates */
248	ic->ic_sup_rates[IEEE80211_MODE_11B] = ieee80211_std_rateset_11b;
249	ic->ic_sup_rates[IEEE80211_MODE_11G] = ieee80211_std_rateset_11g;
250
251	/* set supported .11b and .11g channels (1 through 14) */
252	for (i = 1; i <= 14; i++) {
253		ic->ic_channels[i].ic_freq =
254		    ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ);
255		ic->ic_channels[i].ic_flags =
256		    IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM |
257		    IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ;
258	}
259
260	ifp->if_softc = sc;
261	ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
262	ifp->if_init = rt2560_init;
263	ifp->if_ioctl = rt2560_ioctl;
264	ifp->if_start = rt2560_start;
265	ifp->if_watchdog = rt2560_watchdog;
266	IFQ_SET_READY(&ifp->if_snd);
267	memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ);
268
269	if_attach(ifp);
270	ieee80211_ifattach(ifp);
271	ic->ic_node_alloc = rt2560_node_alloc;
272	ic->ic_newassoc = rt2560_newassoc;
273	ic->ic_updateslot = rt2560_updateslot;
274
275	/* override state transition machine */
276	sc->sc_newstate = ic->ic_newstate;
277	ic->ic_newstate = rt2560_newstate;
278	ieee80211_media_init(ifp, rt2560_media_change, ieee80211_media_status);
279
280#if NBPFILTER > 0
281	bpfattach(&sc->sc_drvbpf, ifp, DLT_IEEE802_11_RADIO,
282	    sizeof (struct ieee80211_frame) + 64);
283
284	sc->sc_rxtap_len = sizeof sc->sc_rxtapu;
285	sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len);
286	sc->sc_rxtap.wr_ihdr.it_present = htole32(RT2560_RX_RADIOTAP_PRESENT);
287
288	sc->sc_txtap_len = sizeof sc->sc_txtapu;
289	sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len);
290	sc->sc_txtap.wt_ihdr.it_present = htole32(RT2560_TX_RADIOTAP_PRESENT);
291#endif
292
293	/*
294	 * Make sure the interface is shutdown during reboot.
295	 */
296	sc->sc_sdhook = shutdownhook_establish(rt2560_shutdown, sc);
297	if (sc->sc_sdhook == NULL) {
298		printf("%s: WARNING: unable to establish shutdown hook\n",
299		    sc->sc_dev.dv_xname);
300	}
301	sc->sc_powerhook = powerhook_establish(rt2560_power, sc);
302	if (sc->sc_powerhook == NULL) {
303		printf("%s: WARNING: unable to establish power hook\n",
304		    sc->sc_dev.dv_xname);
305	}
306	return 0;
307
308fail5:	rt2560_free_tx_ring(sc, &sc->bcnq);
309fail4:	rt2560_free_tx_ring(sc, &sc->prioq);
310fail3:	rt2560_free_tx_ring(sc, &sc->atimq);
311fail2:	rt2560_free_tx_ring(sc, &sc->txq);
312fail1:	return ENXIO;
313}
314
315int
316rt2560_detach(void *xsc)
317{
318	struct rt2560_softc *sc = xsc;
319	struct ifnet *ifp = &sc->sc_ic.ic_if;
320
321	timeout_del(&sc->scan_to);
322	timeout_del(&sc->amrr_to);
323
324	ieee80211_ifdetach(ifp);	/* free all nodes */
325	if_detach(ifp);
326
327	if (sc->sc_powerhook != NULL)
328		powerhook_disestablish(sc->sc_powerhook);
329	if (sc->sc_sdhook != NULL)
330		shutdownhook_disestablish(sc->sc_sdhook);
331
332	rt2560_free_tx_ring(sc, &sc->txq);
333	rt2560_free_tx_ring(sc, &sc->atimq);
334	rt2560_free_tx_ring(sc, &sc->prioq);
335	rt2560_free_tx_ring(sc, &sc->bcnq);
336	rt2560_free_rx_ring(sc, &sc->rxq);
337
338	return 0;
339}
340
341int
342rt2560_alloc_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring,
343    int count)
344{
345	int i, nsegs, error;
346
347	ring->count = count;
348	ring->queued = 0;
349	ring->cur = ring->next = 0;
350	ring->cur_encrypt = ring->next_encrypt = 0;
351
352	error = bus_dmamap_create(sc->sc_dmat, count * RT2560_TX_DESC_SIZE, 1,
353	    count * RT2560_TX_DESC_SIZE, 0, BUS_DMA_NOWAIT, &ring->map);
354	if (error != 0) {
355		printf("%s: could not create desc DMA map\n",
356		    sc->sc_dev.dv_xname);
357		goto fail;
358	}
359
360	error = bus_dmamem_alloc(sc->sc_dmat, count * RT2560_TX_DESC_SIZE,
361	    PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT);
362	if (error != 0) {
363		printf("%s: could not allocate DMA memory\n",
364		    sc->sc_dev.dv_xname);
365		goto fail;
366	}
367
368	error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs,
369	    count * RT2560_TX_DESC_SIZE, (caddr_t *)&ring->desc,
370	    BUS_DMA_NOWAIT);
371	if (error != 0) {
372		printf("%s: could not map desc DMA memory\n",
373		    sc->sc_dev.dv_xname);
374		goto fail;
375	}
376
377	error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc,
378	    count * RT2560_TX_DESC_SIZE, NULL, BUS_DMA_NOWAIT);
379	if (error != 0) {
380		printf("%s: could not load desc DMA map\n",
381		    sc->sc_dev.dv_xname);
382		goto fail;
383	}
384
385	memset(ring->desc, 0, count * RT2560_TX_DESC_SIZE);
386	ring->physaddr = ring->map->dm_segs->ds_addr;
387
388	ring->data = malloc(count * sizeof (struct rt2560_tx_data), M_DEVBUF,
389	    M_NOWAIT | M_ZERO);
390	if (ring->data == NULL) {
391		printf("%s: could not allocate soft data\n",
392		    sc->sc_dev.dv_xname);
393		error = ENOMEM;
394		goto fail;
395	}
396
397	for (i = 0; i < count; i++) {
398		error = bus_dmamap_create(sc->sc_dmat, MCLBYTES,
399		    RT2560_MAX_SCATTER, MCLBYTES, 0, BUS_DMA_NOWAIT,
400		    &ring->data[i].map);
401		if (error != 0) {
402			printf("%s: could not create DMA map\n",
403			    sc->sc_dev.dv_xname);
404			goto fail;
405		}
406	}
407
408	return 0;
409
410fail:	rt2560_free_tx_ring(sc, ring);
411	return error;
412}
413
414void
415rt2560_reset_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring)
416{
417	int i;
418
419	for (i = 0; i < ring->count; i++) {
420		struct rt2560_tx_desc *desc = &ring->desc[i];
421		struct rt2560_tx_data *data = &ring->data[i];
422
423		if (data->m != NULL) {
424			bus_dmamap_sync(sc->sc_dmat, data->map, 0,
425			    data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE);
426			bus_dmamap_unload(sc->sc_dmat, data->map);
427			m_freem(data->m);
428			data->m = NULL;
429		}
430
431		/*
432		 * The node has already been freed at that point so don't call
433		 * ieee80211_release_node() here.
434		 */
435		data->ni = NULL;
436
437		desc->flags = 0;
438	}
439
440	bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize,
441	    BUS_DMASYNC_PREWRITE);
442
443	ring->queued = 0;
444	ring->cur = ring->next = 0;
445	ring->cur_encrypt = ring->next_encrypt = 0;
446}
447
448void
449rt2560_free_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring)
450{
451	int i;
452
453	if (ring->desc != NULL) {
454		bus_dmamap_sync(sc->sc_dmat, ring->map, 0,
455		    ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE);
456		bus_dmamap_unload(sc->sc_dmat, ring->map);
457		bus_dmamem_unmap(sc->sc_dmat, (caddr_t)ring->desc,
458		    ring->count * RT2560_TX_DESC_SIZE);
459		bus_dmamem_free(sc->sc_dmat, &ring->seg, 1);
460	}
461
462	if (ring->data != NULL) {
463		for (i = 0; i < ring->count; i++) {
464			struct rt2560_tx_data *data = &ring->data[i];
465
466			if (data->m != NULL) {
467				bus_dmamap_sync(sc->sc_dmat, data->map, 0,
468				    data->map->dm_mapsize,
469				    BUS_DMASYNC_POSTWRITE);
470				bus_dmamap_unload(sc->sc_dmat, data->map);
471				m_freem(data->m);
472			}
473
474			/*
475			 * The node has already been freed at that point so
476			 * don't call ieee80211_release_node() here.
477			 */
478			data->ni = NULL;
479
480			if (data->map != NULL)
481				bus_dmamap_destroy(sc->sc_dmat, data->map);
482		}
483		free(ring->data, M_DEVBUF);
484	}
485}
486
487int
488rt2560_alloc_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring,
489    int count)
490{
491	int i, nsegs, error;
492
493	ring->count = count;
494	ring->cur = ring->next = 0;
495	ring->cur_decrypt = 0;
496
497	error = bus_dmamap_create(sc->sc_dmat, count * RT2560_RX_DESC_SIZE, 1,
498	    count * RT2560_RX_DESC_SIZE, 0, BUS_DMA_NOWAIT, &ring->map);
499	if (error != 0) {
500		printf("%s: could not create desc DMA map\n",
501		    sc->sc_dev.dv_xname);
502		goto fail;
503	}
504
505	error = bus_dmamem_alloc(sc->sc_dmat, count * RT2560_RX_DESC_SIZE,
506	    PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT);
507	if (error != 0) {
508		printf("%s: could not allocate DMA memory\n",
509		    sc->sc_dev.dv_xname);
510		goto fail;
511	}
512
513	error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs,
514	    count * RT2560_RX_DESC_SIZE, (caddr_t *)&ring->desc,
515	    BUS_DMA_NOWAIT);
516	if (error != 0) {
517		printf("%s: could not map desc DMA memory\n",
518		    sc->sc_dev.dv_xname);
519		goto fail;
520	}
521
522	error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc,
523	    count * RT2560_RX_DESC_SIZE, NULL, BUS_DMA_NOWAIT);
524	if (error != 0) {
525		printf("%s: could not load desc DMA map\n",
526		    sc->sc_dev.dv_xname);
527		goto fail;
528	}
529
530	memset(ring->desc, 0, count * RT2560_RX_DESC_SIZE);
531	ring->physaddr = ring->map->dm_segs->ds_addr;
532
533	ring->data = malloc(count * sizeof (struct rt2560_rx_data), M_DEVBUF,
534	    M_NOWAIT | M_ZERO);
535	if (ring->data == NULL) {
536		printf("%s: could not allocate soft data\n",
537		    sc->sc_dev.dv_xname);
538		error = ENOMEM;
539		goto fail;
540	}
541
542	/*
543	 * Pre-allocate Rx buffers and populate Rx ring.
544	 */
545	for (i = 0; i < count; i++) {
546		struct rt2560_rx_desc *desc = &sc->rxq.desc[i];
547		struct rt2560_rx_data *data = &sc->rxq.data[i];
548
549		error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES,
550		    0, BUS_DMA_NOWAIT, &data->map);
551		if (error != 0) {
552			printf("%s: could not create DMA map\n",
553			    sc->sc_dev.dv_xname);
554			goto fail;
555		}
556
557		MGETHDR(data->m, M_DONTWAIT, MT_DATA);
558		if (data->m == NULL) {
559			printf("%s: could not allocate rx mbuf\n",
560			    sc->sc_dev.dv_xname);
561			error = ENOMEM;
562			goto fail;
563		}
564		MCLGET(data->m, M_DONTWAIT);
565		if (!(data->m->m_flags & M_EXT)) {
566			printf("%s: could not allocate rx mbuf cluster\n",
567			    sc->sc_dev.dv_xname);
568			error = ENOMEM;
569			goto fail;
570		}
571
572		error = bus_dmamap_load(sc->sc_dmat, data->map,
573		    mtod(data->m, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT);
574		if (error != 0) {
575			printf("%s: could not load rx buf DMA map",
576			    sc->sc_dev.dv_xname);
577			goto fail;
578		}
579
580		desc->flags = htole32(RT2560_RX_BUSY);
581		desc->physaddr = htole32(data->map->dm_segs->ds_addr);
582	}
583
584	bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize,
585	    BUS_DMASYNC_PREWRITE);
586
587	return 0;
588
589fail:	rt2560_free_rx_ring(sc, ring);
590	return error;
591}
592
593void
594rt2560_reset_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring)
595{
596	int i;
597
598	for (i = 0; i < ring->count; i++) {
599		ring->desc[i].flags = htole32(RT2560_RX_BUSY);
600		ring->data[i].drop = 0;
601	}
602
603	bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize,
604	    BUS_DMASYNC_PREWRITE);
605
606	ring->cur = ring->next = 0;
607	ring->cur_decrypt = 0;
608}
609
610void
611rt2560_free_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring)
612{
613	int i;
614
615	if (ring->desc != NULL) {
616		bus_dmamap_sync(sc->sc_dmat, ring->map, 0,
617		    ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE);
618		bus_dmamap_unload(sc->sc_dmat, ring->map);
619		bus_dmamem_unmap(sc->sc_dmat, (caddr_t)ring->desc,
620		    ring->count * RT2560_RX_DESC_SIZE);
621		bus_dmamem_free(sc->sc_dmat, &ring->seg, 1);
622	}
623
624	if (ring->data != NULL) {
625		for (i = 0; i < ring->count; i++) {
626			struct rt2560_rx_data *data = &ring->data[i];
627
628			if (data->m != NULL) {
629				bus_dmamap_sync(sc->sc_dmat, data->map, 0,
630				    data->map->dm_mapsize,
631				    BUS_DMASYNC_POSTREAD);
632				bus_dmamap_unload(sc->sc_dmat, data->map);
633				m_freem(data->m);
634			}
635
636			if (data->map != NULL)
637				bus_dmamap_destroy(sc->sc_dmat, data->map);
638		}
639		free(ring->data, M_DEVBUF);
640	}
641}
642
643struct ieee80211_node *
644rt2560_node_alloc(struct ieee80211com *ic)
645{
646	return malloc(sizeof (struct rt2560_node), M_DEVBUF,
647	    M_NOWAIT | M_ZERO);
648}
649
650int
651rt2560_media_change(struct ifnet *ifp)
652{
653	int error;
654
655	error = ieee80211_media_change(ifp);
656	if (error != ENETRESET)
657		return error;
658
659	if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING))
660		rt2560_init(ifp);
661
662	return 0;
663}
664
665/*
666 * This function is called periodically (every 200ms) during scanning to
667 * switch from one channel to another.
668 */
669void
670rt2560_next_scan(void *arg)
671{
672	struct rt2560_softc *sc = arg;
673	struct ieee80211com *ic = &sc->sc_ic;
674	struct ifnet *ifp = &ic->ic_if;
675	int s;
676
677	s = splnet();
678	if (ic->ic_state == IEEE80211_S_SCAN)
679		ieee80211_next_scan(ifp);
680	splx(s);
681}
682
683/*
684 * This function is called for each neighbor node.
685 */
686void
687rt2560_iter_func(void *arg, struct ieee80211_node *ni)
688{
689	struct rt2560_softc *sc = arg;
690	struct rt2560_node *rn = (struct rt2560_node *)ni;
691
692	ieee80211_amrr_choose(&sc->amrr, ni, &rn->amn);
693}
694
695void
696rt2560_amrr_timeout(void *arg)
697{
698	struct rt2560_softc *sc = arg;
699	struct ieee80211com *ic = &sc->sc_ic;
700	int s;
701
702	s = splnet();
703	if (ic->ic_opmode == IEEE80211_M_STA)
704		rt2560_iter_func(sc, ic->ic_bss);
705	else
706		ieee80211_iterate_nodes(ic, rt2560_iter_func, sc);
707	splx(s);
708
709	timeout_add(&sc->amrr_to, hz / 2);
710}
711
712void
713rt2560_newassoc(struct ieee80211com *ic, struct ieee80211_node *ni, int isnew)
714{
715	struct rt2560_softc *sc = ic->ic_softc;
716	int i;
717
718	ieee80211_amrr_node_init(&sc->amrr, &((struct rt2560_node *)ni)->amn);
719
720	/* set rate to some reasonable initial value */
721	for (i = ni->ni_rates.rs_nrates - 1;
722	     i > 0 && (ni->ni_rates.rs_rates[i] & IEEE80211_RATE_VAL) > 72;
723	     i--);
724	ni->ni_txrate = i;
725}
726
727int
728rt2560_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg)
729{
730	struct rt2560_softc *sc = ic->ic_if.if_softc;
731	enum ieee80211_state ostate;
732	struct ieee80211_node *ni;
733	struct mbuf *m;
734	int error = 0;
735
736	ostate = ic->ic_state;
737	timeout_del(&sc->scan_to);
738	timeout_del(&sc->amrr_to);
739
740	switch (nstate) {
741	case IEEE80211_S_INIT:
742		if (ostate == IEEE80211_S_RUN) {
743			/* abort TSF synchronization */
744			RAL_WRITE(sc, RT2560_CSR14, 0);
745
746			/* turn association led off */
747			rt2560_update_led(sc, 0, 0);
748		}
749		break;
750
751	case IEEE80211_S_SCAN:
752		rt2560_set_chan(sc, ic->ic_bss->ni_chan);
753		timeout_add(&sc->scan_to, hz / 5);
754		break;
755
756	case IEEE80211_S_AUTH:
757		rt2560_set_chan(sc, ic->ic_bss->ni_chan);
758		break;
759
760	case IEEE80211_S_ASSOC:
761		rt2560_set_chan(sc, ic->ic_bss->ni_chan);
762		break;
763
764	case IEEE80211_S_RUN:
765		rt2560_set_chan(sc, ic->ic_bss->ni_chan);
766
767		ni = ic->ic_bss;
768
769		if (ic->ic_opmode != IEEE80211_M_MONITOR) {
770			rt2560_update_plcp(sc);
771			rt2560_set_slottime(sc);
772			rt2560_set_basicrates(sc);
773			rt2560_set_bssid(sc, ni->ni_bssid);
774		}
775
776		if (ic->ic_opmode == IEEE80211_M_HOSTAP ||
777		    ic->ic_opmode == IEEE80211_M_IBSS) {
778			m = ieee80211_beacon_alloc(ic, ni);
779			if (m == NULL) {
780				printf("%s: could not allocate beacon\n",
781				    sc->sc_dev.dv_xname);
782				error = ENOBUFS;
783				break;
784			}
785
786			error = rt2560_tx_bcn(sc, m, ni);
787			if (error != 0)
788				break;
789		}
790
791		/* turn assocation led on */
792		rt2560_update_led(sc, 1, 0);
793
794		if (ic->ic_opmode == IEEE80211_M_STA) {
795			/* fake a join to init the tx rate */
796			rt2560_newassoc(ic, ni, 1);
797		}
798
799		if (ic->ic_opmode != IEEE80211_M_MONITOR) {
800			/* start automatic rate control timer */
801			if (ic->ic_fixed_rate == -1)
802				timeout_add(&sc->amrr_to, hz / 2);
803
804			rt2560_enable_tsf_sync(sc);
805		}
806		break;
807	}
808
809	return (error != 0) ? error : sc->sc_newstate(ic, nstate, arg);
810}
811
812/*
813 * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46 or
814 * 93C66).
815 */
816uint16_t
817rt2560_eeprom_read(struct rt2560_softc *sc, uint8_t addr)
818{
819	uint32_t tmp;
820	uint16_t val;
821	int n;
822
823	/* clock C once before the first command */
824	RT2560_EEPROM_CTL(sc, 0);
825
826	RT2560_EEPROM_CTL(sc, RT2560_S);
827	RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C);
828	RT2560_EEPROM_CTL(sc, RT2560_S);
829
830	/* write start bit (1) */
831	RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D);
832	RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C);
833
834	/* write READ opcode (10) */
835	RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D);
836	RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C);
837	RT2560_EEPROM_CTL(sc, RT2560_S);
838	RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C);
839
840	/* write address (A5-A0 or A7-A0) */
841	n = (RAL_READ(sc, RT2560_CSR21) & RT2560_93C46) ? 5 : 7;
842	for (; n >= 0; n--) {
843		RT2560_EEPROM_CTL(sc, RT2560_S |
844		    (((addr >> n) & 1) << RT2560_SHIFT_D));
845		RT2560_EEPROM_CTL(sc, RT2560_S |
846		    (((addr >> n) & 1) << RT2560_SHIFT_D) | RT2560_C);
847	}
848
849	RT2560_EEPROM_CTL(sc, RT2560_S);
850
851	/* read data Q15-Q0 */
852	val = 0;
853	for (n = 15; n >= 0; n--) {
854		RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C);
855		tmp = RAL_READ(sc, RT2560_CSR21);
856		val |= ((tmp & RT2560_Q) >> RT2560_SHIFT_Q) << n;
857		RT2560_EEPROM_CTL(sc, RT2560_S);
858	}
859
860	RT2560_EEPROM_CTL(sc, 0);
861
862	/* clear Chip Select and clock C */
863	RT2560_EEPROM_CTL(sc, RT2560_S);
864	RT2560_EEPROM_CTL(sc, 0);
865	RT2560_EEPROM_CTL(sc, RT2560_C);
866
867	return val;
868}
869
870/*
871 * Some frames were processed by the hardware cipher engine and are ready for
872 * transmission.
873 */
874void
875rt2560_encryption_intr(struct rt2560_softc *sc)
876{
877	int hw;
878
879	/* retrieve last descriptor index processed by cipher engine */
880	hw = (RAL_READ(sc, RT2560_SECCSR1) - sc->txq.physaddr) /
881	    RT2560_TX_DESC_SIZE;
882
883	for (; sc->txq.next_encrypt != hw;) {
884		struct rt2560_tx_desc *desc =
885		    &sc->txq.desc[sc->txq.next_encrypt];
886
887		bus_dmamap_sync(sc->sc_dmat, sc->txq.map,
888		    sc->txq.next_encrypt * RT2560_TX_DESC_SIZE,
889		    RT2560_TX_DESC_SIZE, BUS_DMASYNC_POSTREAD);
890
891		if (letoh32(desc->flags) &
892		    (RT2560_TX_BUSY | RT2560_TX_CIPHER_BUSY))
893			break;
894
895		/* for TKIP, swap eiv field to fix a bug in ASIC */
896		if ((letoh32(desc->flags) & RT2560_TX_CIPHER_MASK) ==
897		    RT2560_TX_CIPHER_TKIP)
898			desc->eiv = swap32(desc->eiv);
899
900		/* mark the frame ready for transmission */
901		desc->flags |= htole32(RT2560_TX_BUSY | RT2560_TX_VALID);
902
903		bus_dmamap_sync(sc->sc_dmat, sc->txq.map,
904		    sc->txq.next_encrypt * RT2560_TX_DESC_SIZE,
905		    RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE);
906
907		DPRINTFN(15, ("encryption done idx=%u\n",
908		    sc->txq.next_encrypt));
909
910		sc->txq.next_encrypt =
911		    (sc->txq.next_encrypt + 1) % RT2560_TX_RING_COUNT;
912	}
913
914	/* kick Tx */
915	RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_TX);
916}
917
918void
919rt2560_tx_intr(struct rt2560_softc *sc)
920{
921	struct ieee80211com *ic = &sc->sc_ic;
922	struct ifnet *ifp = &ic->ic_if;
923
924	for (;;) {
925		struct rt2560_tx_desc *desc = &sc->txq.desc[sc->txq.next];
926		struct rt2560_tx_data *data = &sc->txq.data[sc->txq.next];
927		struct rt2560_node *rn;
928
929		bus_dmamap_sync(sc->sc_dmat, sc->txq.map,
930		    sc->txq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE,
931		    BUS_DMASYNC_POSTREAD);
932
933		if ((letoh32(desc->flags) & RT2560_TX_BUSY) ||
934		    (letoh32(desc->flags) & RT2560_TX_CIPHER_BUSY) ||
935		    !(letoh32(desc->flags) & RT2560_TX_VALID))
936			break;
937
938		rn = (struct rt2560_node *)data->ni;
939
940		switch (letoh32(desc->flags) & RT2560_TX_RESULT_MASK) {
941		case RT2560_TX_SUCCESS:
942			DPRINTFN(10, ("data frame sent successfully\n"));
943			rn->amn.amn_txcnt++;
944			ifp->if_opackets++;
945			break;
946
947		case RT2560_TX_SUCCESS_RETRY:
948			DPRINTFN(9, ("data frame sent after %u retries\n",
949			    (letoh32(desc->flags) >> 5) & 0x7));
950			rn->amn.amn_txcnt++;
951			rn->amn.amn_retrycnt++;
952			ifp->if_opackets++;
953			break;
954
955		case RT2560_TX_FAIL_RETRY:
956			DPRINTFN(9, ("sending data frame failed (too much "
957			    "retries)\n"));
958			rn->amn.amn_txcnt++;
959			rn->amn.amn_retrycnt++;
960			ifp->if_oerrors++;
961			break;
962
963		case RT2560_TX_FAIL_INVALID:
964		case RT2560_TX_FAIL_OTHER:
965		default:
966			printf("%s: sending data frame failed 0x%08x\n",
967			    sc->sc_dev.dv_xname, letoh32(desc->flags));
968			ifp->if_oerrors++;
969		}
970
971		bus_dmamap_sync(sc->sc_dmat, data->map, 0,
972		    data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE);
973		bus_dmamap_unload(sc->sc_dmat, data->map);
974		m_freem(data->m);
975		data->m = NULL;
976		ieee80211_release_node(ic, data->ni);
977		data->ni = NULL;
978
979		/* descriptor is no longer valid */
980		desc->flags &= ~htole32(RT2560_TX_VALID);
981
982		bus_dmamap_sync(sc->sc_dmat, sc->txq.map,
983		    sc->txq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE,
984		    BUS_DMASYNC_PREWRITE);
985
986		DPRINTFN(15, ("tx done idx=%u\n", sc->txq.next));
987
988		sc->txq.queued--;
989		sc->txq.next = (sc->txq.next + 1) % RT2560_TX_RING_COUNT;
990	}
991
992	sc->sc_tx_timer = 0;
993	ifp->if_flags &= ~IFF_OACTIVE;
994	rt2560_start(ifp);
995}
996
997void
998rt2560_prio_intr(struct rt2560_softc *sc)
999{
1000	struct ieee80211com *ic = &sc->sc_ic;
1001	struct ifnet *ifp = &ic->ic_if;
1002
1003	for (;;) {
1004		struct rt2560_tx_desc *desc = &sc->prioq.desc[sc->prioq.next];
1005		struct rt2560_tx_data *data = &sc->prioq.data[sc->prioq.next];
1006
1007		bus_dmamap_sync(sc->sc_dmat, sc->prioq.map,
1008		    sc->prioq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE,
1009		    BUS_DMASYNC_POSTREAD);
1010
1011		if ((letoh32(desc->flags) & RT2560_TX_BUSY) ||
1012		    !(letoh32(desc->flags) & RT2560_TX_VALID))
1013			break;
1014
1015		switch (letoh32(desc->flags) & RT2560_TX_RESULT_MASK) {
1016		case RT2560_TX_SUCCESS:
1017			DPRINTFN(10, ("mgt frame sent successfully\n"));
1018			break;
1019
1020		case RT2560_TX_SUCCESS_RETRY:
1021			DPRINTFN(9, ("mgt frame sent after %u retries\n",
1022			    (letoh32(desc->flags) >> 5) & 0x7));
1023			break;
1024
1025		case RT2560_TX_FAIL_RETRY:
1026			DPRINTFN(9, ("sending mgt frame failed (too much "
1027			    "retries)\n"));
1028			break;
1029
1030		case RT2560_TX_FAIL_INVALID:
1031		case RT2560_TX_FAIL_OTHER:
1032		default:
1033			printf("%s: sending mgt frame failed 0x%08x\n",
1034			    sc->sc_dev.dv_xname, letoh32(desc->flags));
1035		}
1036
1037		bus_dmamap_sync(sc->sc_dmat, data->map, 0,
1038		    data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE);
1039		bus_dmamap_unload(sc->sc_dmat, data->map);
1040		m_freem(data->m);
1041		data->m = NULL;
1042		ieee80211_release_node(ic, data->ni);
1043		data->ni = NULL;
1044
1045		/* descriptor is no longer valid */
1046		desc->flags &= ~htole32(RT2560_TX_VALID);
1047
1048		bus_dmamap_sync(sc->sc_dmat, sc->prioq.map,
1049		    sc->prioq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE,
1050		    BUS_DMASYNC_PREWRITE);
1051
1052		DPRINTFN(15, ("prio done idx=%u\n", sc->prioq.next));
1053
1054		sc->prioq.queued--;
1055		sc->prioq.next = (sc->prioq.next + 1) % RT2560_PRIO_RING_COUNT;
1056	}
1057
1058	sc->sc_tx_timer = 0;
1059	ifp->if_flags &= ~IFF_OACTIVE;
1060	rt2560_start(ifp);
1061}
1062
1063/*
1064 * Some frames were processed by the hardware cipher engine and are ready for
1065 * transmission to the IEEE802.11 layer.
1066 */
1067void
1068rt2560_decryption_intr(struct rt2560_softc *sc)
1069{
1070	struct ieee80211com *ic = &sc->sc_ic;
1071	struct ifnet *ifp = &ic->ic_if;
1072	struct ieee80211_frame *wh;
1073	struct ieee80211_node *ni;
1074	struct mbuf *mnew, *m;
1075	int hw, error;
1076
1077	/* retrieve last decriptor index processed by cipher engine */
1078	hw = (RAL_READ(sc, RT2560_SECCSR0) - sc->rxq.physaddr) /
1079	    RT2560_RX_DESC_SIZE;
1080
1081	for (; sc->rxq.cur_decrypt != hw;) {
1082		struct rt2560_rx_desc *desc =
1083		    &sc->rxq.desc[sc->rxq.cur_decrypt];
1084		struct rt2560_rx_data *data =
1085		    &sc->rxq.data[sc->rxq.cur_decrypt];
1086
1087		bus_dmamap_sync(sc->sc_dmat, sc->rxq.map,
1088		    sc->rxq.cur_decrypt * RT2560_TX_DESC_SIZE,
1089		    RT2560_TX_DESC_SIZE, BUS_DMASYNC_POSTREAD);
1090
1091		if (letoh32(desc->flags) &
1092		    (RT2560_RX_BUSY | RT2560_RX_CIPHER_BUSY))
1093			break;
1094
1095		if (data->drop) {
1096			ifp->if_ierrors++;
1097			goto skip;
1098		}
1099
1100		if ((letoh32(desc->flags) & RT2560_RX_CIPHER_MASK) != 0 &&
1101		    (letoh32(desc->flags) & RT2560_RX_ICV_ERROR)) {
1102			ifp->if_ierrors++;
1103			goto skip;
1104		}
1105
1106		/*
1107		 * Try to allocate a new mbuf for this ring element and load it
1108		 * before processing the current mbuf.  If the ring element
1109		 * cannot be loaded, drop the received packet and reuse the old
1110		 * mbuf.  In the unlikely case that the old mbuf can't be
1111		 * reloaded either, explicitly panic.
1112		 */
1113		MGETHDR(mnew, M_DONTWAIT, MT_DATA);
1114		if (mnew == NULL) {
1115			ifp->if_ierrors++;
1116			goto skip;
1117		}
1118		MCLGET(mnew, M_DONTWAIT);
1119		if (!(mnew->m_flags & M_EXT)) {
1120			m_freem(mnew);
1121			ifp->if_ierrors++;
1122			goto skip;
1123		}
1124
1125		bus_dmamap_sync(sc->sc_dmat, data->map, 0,
1126		    data->map->dm_mapsize, BUS_DMASYNC_POSTREAD);
1127		bus_dmamap_unload(sc->sc_dmat, data->map);
1128
1129		error = bus_dmamap_load(sc->sc_dmat, data->map,
1130		    mtod(mnew, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT);
1131		if (error != 0) {
1132			m_freem(mnew);
1133
1134			/* try to reload the old mbuf */
1135			error = bus_dmamap_load(sc->sc_dmat, data->map,
1136			    mtod(data->m, void *), MCLBYTES, NULL,
1137			    BUS_DMA_NOWAIT);
1138			if (error != 0) {
1139				/* very unlikely that it will fail... */
1140				panic("%s: could not load old rx mbuf",
1141				    sc->sc_dev.dv_xname);
1142			}
1143			/* physical address may have changed */
1144			desc->physaddr = htole32(data->map->dm_segs->ds_addr);
1145			ifp->if_ierrors++;
1146			goto skip;
1147		}
1148
1149		/*
1150		 * New mbuf successfully loaded, update Rx ring and continue
1151		 * processing.
1152		 */
1153		m = data->m;
1154		data->m = mnew;
1155		desc->physaddr = htole32(data->map->dm_segs->ds_addr);
1156
1157		/* finalize mbuf */
1158		m->m_pkthdr.rcvif = ifp;
1159		m->m_pkthdr.len = m->m_len =
1160		    (letoh32(desc->flags) >> 16) & 0xfff;
1161
1162#if NBPFILTER > 0
1163		if (sc->sc_drvbpf != NULL) {
1164			struct mbuf mb;
1165			struct rt2560_rx_radiotap_header *tap = &sc->sc_rxtap;
1166			uint32_t tsf_lo, tsf_hi;
1167
1168			/* get timestamp (low and high 32 bits) */
1169			tsf_hi = RAL_READ(sc, RT2560_CSR17);
1170			tsf_lo = RAL_READ(sc, RT2560_CSR16);
1171
1172			tap->wr_tsf =
1173			    htole64(((uint64_t)tsf_hi << 32) | tsf_lo);
1174			tap->wr_flags = 0;
1175			tap->wr_rate = rt2560_rxrate(desc);
1176			tap->wr_chan_freq = htole16(ic->ic_ibss_chan->ic_freq);
1177			tap->wr_chan_flags =
1178			    htole16(ic->ic_ibss_chan->ic_flags);
1179			tap->wr_antenna = sc->rx_ant;
1180			tap->wr_antsignal = desc->rssi;
1181
1182			mb.m_data = (caddr_t)tap;
1183			mb.m_len = sc->sc_txtap_len;
1184			mb.m_next = m;
1185			mb.m_nextpkt = NULL;
1186			mb.m_type = 0;
1187			mb.m_flags = 0;
1188			bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_IN);
1189		}
1190#endif
1191		wh = mtod(m, struct ieee80211_frame *);
1192		ni = ieee80211_find_rxnode(ic, wh);
1193
1194		/* send the frame to the 802.11 layer */
1195		ieee80211_input(ifp, m, ni, desc->rssi, 0);
1196
1197		/* node is no longer needed */
1198		ieee80211_release_node(ic, ni);
1199
1200skip:		desc->flags = htole32(RT2560_RX_BUSY);
1201
1202		bus_dmamap_sync(sc->sc_dmat, sc->rxq.map,
1203		    sc->rxq.cur_decrypt * RT2560_TX_DESC_SIZE,
1204		    RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE);
1205
1206		DPRINTFN(15, ("decryption done idx=%u\n", sc->rxq.cur_decrypt));
1207
1208		sc->rxq.cur_decrypt =
1209		    (sc->rxq.cur_decrypt + 1) % RT2560_RX_RING_COUNT;
1210	}
1211
1212	/*
1213	 * In HostAP mode, ieee80211_input() will enqueue packets in if_snd
1214	 * without calling if_start().
1215	 */
1216	if (!IFQ_IS_EMPTY(&ifp->if_snd) && !(ifp->if_flags & IFF_OACTIVE))
1217		rt2560_start(ifp);
1218}
1219
1220/*
1221 * Some frames were received. Pass them to the hardware cipher engine before
1222 * sending them to the 802.11 layer.
1223 */
1224void
1225rt2560_rx_intr(struct rt2560_softc *sc)
1226{
1227	for (;;) {
1228		struct rt2560_rx_desc *desc = &sc->rxq.desc[sc->rxq.cur];
1229		struct rt2560_rx_data *data = &sc->rxq.data[sc->rxq.cur];
1230
1231		bus_dmamap_sync(sc->sc_dmat, sc->rxq.map,
1232		    sc->rxq.cur * RT2560_RX_DESC_SIZE, RT2560_RX_DESC_SIZE,
1233		    BUS_DMASYNC_POSTREAD);
1234
1235		if (letoh32(desc->flags) &
1236		    (RT2560_RX_BUSY | RT2560_RX_CIPHER_BUSY))
1237			break;
1238
1239		data->drop = 0;
1240
1241		if (letoh32(desc->flags) &
1242		    (RT2560_RX_PHY_ERROR | RT2560_RX_CRC_ERROR)) {
1243			/*
1244			 * This should not happen since we did not request
1245			 * to receive those frames when we filled RXCSR0.
1246			 */
1247			DPRINTFN(5, ("PHY or CRC error flags 0x%08x\n",
1248			    letoh32(desc->flags)));
1249			data->drop = 1;
1250		}
1251
1252		if (((letoh32(desc->flags) >> 16) & 0xfff) > MCLBYTES) {
1253			DPRINTFN(5, ("bad length\n"));
1254			data->drop = 1;
1255		}
1256
1257		/* mark the frame for decryption */
1258		desc->flags |= htole32(RT2560_RX_CIPHER_BUSY);
1259
1260		bus_dmamap_sync(sc->sc_dmat, sc->rxq.map,
1261		    sc->rxq.cur * RT2560_RX_DESC_SIZE, RT2560_RX_DESC_SIZE,
1262		    BUS_DMASYNC_PREWRITE);
1263
1264		DPRINTFN(15, ("rx done idx=%u\n", sc->rxq.cur));
1265
1266		sc->rxq.cur = (sc->rxq.cur + 1) % RT2560_RX_RING_COUNT;
1267	}
1268
1269	/* kick decrypt */
1270	RAL_WRITE(sc, RT2560_SECCSR0, RT2560_KICK_DECRYPT);
1271}
1272
1273/*
1274 * This function is called in HostAP or IBSS modes when it's time to send a
1275 * new beacon (every ni_intval milliseconds).
1276 */
1277void
1278rt2560_beacon_expire(struct rt2560_softc *sc)
1279{
1280	struct ieee80211com *ic = &sc->sc_ic;
1281	struct rt2560_tx_data *data;
1282
1283	if (ic->ic_opmode != IEEE80211_M_IBSS &&
1284	    ic->ic_opmode != IEEE80211_M_HOSTAP)
1285		return;
1286
1287	data = &sc->bcnq.data[sc->bcnq.next];
1288
1289	if (sc->sc_flags & RT2560_UPDATE_SLOT) {
1290		sc->sc_flags &= ~RT2560_UPDATE_SLOT;
1291		sc->sc_flags |= RT2560_SET_SLOTTIME;
1292	} else if (sc->sc_flags & RT2560_SET_SLOTTIME) {
1293		sc->sc_flags &= ~RT2560_SET_SLOTTIME;
1294		rt2560_set_slottime(sc);
1295	}
1296
1297	if (ic->ic_curmode == IEEE80211_MODE_11G) {
1298		/* update ERP Information Element */
1299		*sc->erp = ic->ic_bss->ni_erp;
1300		bus_dmamap_sync(sc->sc_dmat, data->map, 0,
1301		    data->map->dm_mapsize, BUS_DMASYNC_PREWRITE);
1302	}
1303
1304#if defined(RT2560_DEBUG) && NBPFILTER > 0
1305	if (ic->ic_rawbpf != NULL)
1306		bpf_mtap(ic->ic_rawbpf, data->m, BPF_DIRECTION_OUT);
1307#endif
1308
1309	DPRINTFN(15, ("beacon expired\n"));
1310}
1311
1312void
1313rt2560_wakeup_expire(struct rt2560_softc *sc)
1314{
1315	DPRINTFN(15, ("wakeup expired\n"));
1316}
1317
1318int
1319rt2560_intr(void *arg)
1320{
1321	struct rt2560_softc *sc = arg;
1322	struct ifnet *ifp = &sc->sc_ic.ic_if;
1323	uint32_t r;
1324
1325	if ((r = RAL_READ(sc, RT2560_CSR7)) == 0)
1326		return 0;	/* not for us */
1327
1328	/* disable interrupts */
1329	RAL_WRITE(sc, RT2560_CSR8, 0xffffffff);
1330
1331	/* acknowledge interrupts */
1332	RAL_WRITE(sc, RT2560_CSR7, r);
1333
1334	/* don't re-enable interrupts if we're shutting down */
1335	if (!(ifp->if_flags & IFF_RUNNING))
1336		return 0;
1337
1338	if (r & RT2560_BEACON_EXPIRE)
1339		rt2560_beacon_expire(sc);
1340
1341	if (r & RT2560_WAKEUP_EXPIRE)
1342		rt2560_wakeup_expire(sc);
1343
1344	if (r & RT2560_ENCRYPTION_DONE)
1345		rt2560_encryption_intr(sc);
1346
1347	if (r & RT2560_TX_DONE)
1348		rt2560_tx_intr(sc);
1349
1350	if (r & RT2560_PRIO_DONE)
1351		rt2560_prio_intr(sc);
1352
1353	if (r & RT2560_DECRYPTION_DONE)
1354		rt2560_decryption_intr(sc);
1355
1356	if (r & RT2560_RX_DONE)
1357		rt2560_rx_intr(sc);
1358
1359	/* re-enable interrupts */
1360	RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK);
1361
1362	return 1;
1363}
1364
1365/* quickly determine if a given rate is CCK or OFDM */
1366#define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22)
1367
1368#define RAL_ACK_SIZE	14	/* 10 + 4(FCS) */
1369#define RAL_CTS_SIZE	14	/* 10 + 4(FCS) */
1370
1371#define RAL_SIFS		10	/* us */
1372
1373#define RT2560_RXTX_TURNAROUND	10	/* us */
1374
1375/*
1376 * This function is only used by the Rx radiotap code. It returns the rate at
1377 * which a given frame was received.
1378 */
1379#if NBPFILTER > 0
1380uint8_t
1381rt2560_rxrate(const struct rt2560_rx_desc *desc)
1382{
1383	if (letoh32(desc->flags) & RT2560_RX_OFDM) {
1384		/* reverse function of rt2560_plcp_signal */
1385		switch (desc->rate) {
1386		case 0xb:	return 12;
1387		case 0xf:	return 18;
1388		case 0xa:	return 24;
1389		case 0xe:	return 36;
1390		case 0x9:	return 48;
1391		case 0xd:	return 72;
1392		case 0x8:	return 96;
1393		case 0xc:	return 108;
1394		}
1395	} else {
1396		if (desc->rate == 10)
1397			return 2;
1398		if (desc->rate == 20)
1399			return 4;
1400		if (desc->rate == 55)
1401			return 11;
1402		if (desc->rate == 110)
1403			return 22;
1404	}
1405	return 2;	/* should not get there */
1406}
1407#endif
1408
1409/*
1410 * Return the expected ack rate for a frame transmitted at rate `rate'.
1411 */
1412int
1413rt2560_ack_rate(struct ieee80211com *ic, int rate)
1414{
1415	switch (rate) {
1416	/* CCK rates */
1417	case 2:
1418		return 2;
1419	case 4:
1420	case 11:
1421	case 22:
1422		return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate;
1423
1424	/* OFDM rates */
1425	case 12:
1426	case 18:
1427		return 12;
1428	case 24:
1429	case 36:
1430		return 24;
1431	case 48:
1432	case 72:
1433	case 96:
1434	case 108:
1435		return 48;
1436	}
1437
1438	/* default to 1Mbps */
1439	return 2;
1440}
1441
1442/*
1443 * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'.
1444 * The function automatically determines the operating mode depending on the
1445 * given rate. `flags' indicates whether short preamble is in use or not.
1446 */
1447uint16_t
1448rt2560_txtime(int len, int rate, uint32_t flags)
1449{
1450	uint16_t txtime;
1451
1452	if (RAL_RATE_IS_OFDM(rate)) {
1453		/* IEEE Std 802.11g-2003, pp. 44 */
1454		txtime = (8 + 4 * len + 3 + rate - 1) / rate;
1455		txtime = 16 + 4 + 4 * txtime + 6;
1456	} else {
1457		/* IEEE Std 802.11b-1999, pp. 28 */
1458		txtime = (16 * len + rate - 1) / rate;
1459		if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE))
1460			txtime +=  72 + 24;
1461		else
1462			txtime += 144 + 48;
1463	}
1464	return txtime;
1465}
1466
1467uint8_t
1468rt2560_plcp_signal(int rate)
1469{
1470	switch (rate) {
1471	/* CCK rates (returned values are device-dependent) */
1472	case 2:		return 0x0;
1473	case 4:		return 0x1;
1474	case 11:	return 0x2;
1475	case 22:	return 0x3;
1476
1477	/* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */
1478	case 12:	return 0xb;
1479	case 18:	return 0xf;
1480	case 24:	return 0xa;
1481	case 36:	return 0xe;
1482	case 48:	return 0x9;
1483	case 72:	return 0xd;
1484	case 96:	return 0x8;
1485	case 108:	return 0xc;
1486
1487	/* unsupported rates (should not get there) */
1488	default:	return 0xff;
1489	}
1490}
1491
1492void
1493rt2560_setup_tx_desc(struct rt2560_softc *sc, struct rt2560_tx_desc *desc,
1494    uint32_t flags, int len, int rate, int encrypt, bus_addr_t physaddr)
1495{
1496	struct ieee80211com *ic = &sc->sc_ic;
1497	uint16_t plcp_length;
1498	int remainder;
1499
1500	desc->flags = htole32(flags);
1501	desc->flags |= htole32(len << 16);
1502	desc->flags |= encrypt ? htole32(RT2560_TX_CIPHER_BUSY) :
1503	    htole32(RT2560_TX_BUSY | RT2560_TX_VALID);
1504
1505	desc->physaddr = htole32(physaddr);
1506	desc->wme = htole16(
1507	    RT2560_AIFSN(2) |
1508	    RT2560_LOGCWMIN(3) |
1509	    RT2560_LOGCWMAX(8));
1510
1511	/* setup PLCP fields */
1512	desc->plcp_signal  = rt2560_plcp_signal(rate);
1513	desc->plcp_service = 4;
1514
1515	len += IEEE80211_CRC_LEN;
1516	if (RAL_RATE_IS_OFDM(rate)) {
1517		desc->flags |= htole32(RT2560_TX_OFDM);
1518
1519		plcp_length = len & 0xfff;
1520		desc->plcp_length_hi = plcp_length >> 6;
1521		desc->plcp_length_lo = plcp_length & 0x3f;
1522	} else {
1523		plcp_length = (16 * len + rate - 1) / rate;
1524		if (rate == 22) {
1525			remainder = (16 * len) % 22;
1526			if (remainder != 0 && remainder < 7)
1527				desc->plcp_service |= RT2560_PLCP_LENGEXT;
1528		}
1529		desc->plcp_length_hi = plcp_length >> 8;
1530		desc->plcp_length_lo = plcp_length & 0xff;
1531
1532		if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE))
1533			desc->plcp_signal |= 0x08;
1534	}
1535}
1536
1537int
1538rt2560_tx_bcn(struct rt2560_softc *sc, struct mbuf *m0,
1539    struct ieee80211_node *ni)
1540{
1541	struct ieee80211com *ic = &sc->sc_ic;
1542	struct rt2560_tx_desc *desc;
1543	struct rt2560_tx_data *data;
1544	int rate = 2, error;
1545
1546	desc = &sc->bcnq.desc[sc->bcnq.cur];
1547	data = &sc->bcnq.data[sc->bcnq.cur];
1548
1549	error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0,
1550	    BUS_DMA_NOWAIT);
1551	if (error != 0) {
1552		printf("%s: could not map mbuf (error %d)\n",
1553		    sc->sc_dev.dv_xname, error);
1554		m_freem(m0);
1555		return error;
1556	}
1557
1558	data->m = m0;
1559	data->ni = ni;
1560
1561	rt2560_setup_tx_desc(sc, desc, RT2560_TX_IFS_NEWBACKOFF |
1562	    RT2560_TX_TIMESTAMP, m0->m_pkthdr.len, rate, 0,
1563	    data->map->dm_segs->ds_addr);
1564
1565	bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize,
1566	    BUS_DMASYNC_PREWRITE);
1567	bus_dmamap_sync(sc->sc_dmat, sc->bcnq.map,
1568	    sc->bcnq.cur * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE,
1569	    BUS_DMASYNC_PREWRITE);
1570
1571	/*
1572	 * Store pointer to ERP Information Element so that we can update it
1573	 * dynamically when the slot time changes.
1574	 * XXX: this is ugly since it depends on how net80211 builds beacon
1575	 * frames but ieee80211_beacon_alloc() don't store offsets for us.
1576	 */
1577	if (ic->ic_curmode == IEEE80211_MODE_11G) {
1578		sc->erp =
1579		    mtod(m0, uint8_t *) +
1580		    sizeof (struct ieee80211_frame) +
1581		    8 + 2 + 2 +
1582		    ((ic->ic_flags & IEEE80211_F_HIDENWID) ?
1583			1 : 2 + ni->ni_esslen) +
1584		    2 + min(ni->ni_rates.rs_nrates, IEEE80211_RATE_SIZE) +
1585		    2 + 1 +
1586		    ((ic->ic_opmode == IEEE80211_M_IBSS) ? 4 : 6) +
1587		    2;
1588	}
1589
1590	return 0;
1591}
1592
1593int
1594rt2560_tx_mgt(struct rt2560_softc *sc, struct mbuf *m0,
1595    struct ieee80211_node *ni)
1596{
1597	struct ieee80211com *ic = &sc->sc_ic;
1598	struct ifnet *ifp = &ic->ic_if;
1599	struct rt2560_tx_desc *desc;
1600	struct rt2560_tx_data *data;
1601	struct ieee80211_frame *wh;
1602	uint16_t dur;
1603	uint32_t flags = 0;
1604	int rate = 2, error;
1605
1606	desc = &sc->prioq.desc[sc->prioq.cur];
1607	data = &sc->prioq.data[sc->prioq.cur];
1608
1609	wh = mtod(m0, struct ieee80211_frame *);
1610
1611	if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1612		m0 = ieee80211_wep_crypt(ifp, m0, 1);
1613		if (m0 == NULL)
1614			return ENOBUFS;
1615
1616		/* packet header may have moved, reset our local pointer */
1617		wh = mtod(m0, struct ieee80211_frame *);
1618	}
1619
1620	error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0,
1621	    BUS_DMA_NOWAIT);
1622	if (error != 0) {
1623		printf("%s: could not map mbuf (error %d)\n",
1624		    sc->sc_dev.dv_xname, error);
1625		m_freem(m0);
1626		return error;
1627	}
1628
1629#if NBPFILTER > 0
1630	if (sc->sc_drvbpf != NULL) {
1631		struct mbuf mb;
1632		struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap;
1633
1634		tap->wt_flags = 0;
1635		tap->wt_rate = rate;
1636		tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq);
1637		tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags);
1638		tap->wt_antenna = sc->tx_ant;
1639
1640		mb.m_data = (caddr_t)tap;
1641		mb.m_len = sc->sc_txtap_len;
1642		mb.m_next = m0;
1643		mb.m_nextpkt = NULL;
1644		mb.m_type = 0;
1645		mb.m_flags = 0;
1646		bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_OUT);
1647	}
1648#endif
1649
1650	data->m = m0;
1651	data->ni = ni;
1652
1653	wh = mtod(m0, struct ieee80211_frame *);
1654
1655	if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1656		flags |= RT2560_TX_NEED_ACK;
1657
1658		dur = rt2560_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) +
1659		    RAL_SIFS;
1660		*(uint16_t *)wh->i_dur = htole16(dur);
1661
1662		/* tell hardware to set timestamp for probe responses */
1663		if ((wh->i_fc[0] &
1664		    (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) ==
1665		    (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP))
1666			flags |= RT2560_TX_TIMESTAMP;
1667	}
1668
1669	rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 0,
1670	    data->map->dm_segs->ds_addr);
1671
1672	bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize,
1673	    BUS_DMASYNC_PREWRITE);
1674	bus_dmamap_sync(sc->sc_dmat, sc->prioq.map,
1675	    sc->prioq.cur * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE,
1676	    BUS_DMASYNC_PREWRITE);
1677
1678	DPRINTFN(10, ("sending mgt frame len=%u idx=%u rate=%u\n",
1679	    m0->m_pkthdr.len, sc->prioq.cur, rate));
1680
1681	/* kick prio */
1682	sc->prioq.queued++;
1683	sc->prioq.cur = (sc->prioq.cur + 1) % RT2560_PRIO_RING_COUNT;
1684	RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_PRIO);
1685
1686	return 0;
1687}
1688
1689int
1690rt2560_tx_data(struct rt2560_softc *sc, struct mbuf *m0,
1691    struct ieee80211_node *ni)
1692{
1693	struct ieee80211com *ic = &sc->sc_ic;
1694	struct ifnet *ifp = &ic->ic_if;
1695	struct rt2560_tx_ring *txq = &sc->txq;
1696	struct rt2560_tx_desc *desc;
1697	struct rt2560_tx_data *data;
1698	struct ieee80211_frame *wh;
1699	struct mbuf *mnew;
1700	uint16_t dur;
1701	uint32_t flags = 0;
1702	int pktlen, rate, needcts = 0, needrts = 0, error;
1703
1704	wh = mtod(m0, struct ieee80211_frame *);
1705
1706	if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1707		m0 = ieee80211_wep_crypt(ifp, m0, 1);
1708		if (m0 == NULL)
1709			return ENOBUFS;
1710
1711		/* packet header may have moved, reset our local pointer */
1712		wh = mtod(m0, struct ieee80211_frame *);
1713	}
1714
1715	/* compute actual packet length (including CRC and crypto overhead) */
1716	pktlen = m0->m_pkthdr.len + IEEE80211_CRC_LEN;
1717
1718	/* pickup a rate */
1719	if (IEEE80211_IS_MULTICAST(wh->i_addr1) ||
1720	    ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
1721	     IEEE80211_FC0_TYPE_MGT)) {
1722		/* mgmt/multicast frames are sent at the lowest avail. rate */
1723		rate = ni->ni_rates.rs_rates[0];
1724	} else if (ic->ic_fixed_rate != -1) {
1725		rate = ic->ic_sup_rates[ic->ic_curmode].
1726		    rs_rates[ic->ic_fixed_rate];
1727	} else
1728		rate = ni->ni_rates.rs_rates[ni->ni_txrate];
1729	if (rate == 0)
1730		rate = 2;	/* XXX should not happen */
1731	rate &= IEEE80211_RATE_VAL;
1732
1733	/*
1734	 * Packet Bursting: backoff after ppb=8 frames to give other STAs a
1735	 * chance to contend for the wireless medium.
1736	 */
1737	if (ic->ic_opmode == IEEE80211_M_STA && (ni->ni_txseq & 7))
1738		flags |= RT2560_TX_IFS_SIFS;
1739
1740	/* check if RTS/CTS or CTS-to-self protection must be used */
1741	if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1742		/* multicast frames are not sent at OFDM rates in 802.11b/g */
1743		if (pktlen > ic->ic_rtsthreshold) {
1744			needrts = 1;	/* RTS/CTS based on frame length */
1745		} else if ((ic->ic_flags & IEEE80211_F_USEPROT) &&
1746		    RAL_RATE_IS_OFDM(rate)) {
1747			if (ic->ic_protmode == IEEE80211_PROT_CTSONLY)
1748				needcts = 1;	/* CTS-to-self */
1749			else if (ic->ic_protmode == IEEE80211_PROT_RTSCTS)
1750				needrts = 1;	/* RTS/CTS */
1751		}
1752	}
1753	if (needrts || needcts) {
1754		struct mbuf *mprot;
1755		int protrate, ackrate;
1756
1757		protrate = 2;	/* XXX */
1758		ackrate  = rt2560_ack_rate(ic, rate);
1759
1760		dur = rt2560_txtime(pktlen, rate, ic->ic_flags) +
1761		      rt2560_txtime(RAL_ACK_SIZE, ackrate, ic->ic_flags) +
1762		      2 * RAL_SIFS;
1763		if (needrts) {
1764			dur += rt2560_txtime(RAL_CTS_SIZE, rt2560_ack_rate(ic,
1765			    protrate), ic->ic_flags) + RAL_SIFS;
1766			mprot = ieee80211_get_rts(ic, wh, dur);
1767		} else {
1768			mprot = ieee80211_get_cts_to_self(ic, dur);
1769		}
1770		if (mprot == NULL) {
1771			printf("%s: could not allocate protection frame\n",
1772			    sc->sc_dev.dv_xname);
1773			m_freem(m0);
1774			return ENOBUFS;
1775		}
1776
1777		desc = &txq->desc[txq->cur_encrypt];
1778		data = &txq->data[txq->cur_encrypt];
1779
1780		error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, mprot,
1781		    BUS_DMA_NOWAIT);
1782		if (error != 0) {
1783			printf("%s: could not map mbuf (error %d)\n",
1784			    sc->sc_dev.dv_xname, error);
1785			m_freem(mprot);
1786			m_freem(m0);
1787			return error;
1788		}
1789
1790		data->m = mprot;
1791		/* avoid multiple free() of the same node for each fragment */
1792		data->ni = ieee80211_ref_node(ni);
1793
1794		/* XXX may want to pass the protection frame to BPF */
1795
1796		rt2560_setup_tx_desc(sc, desc,
1797		    (needrts ? RT2560_TX_NEED_ACK : 0) | RT2560_TX_MORE_FRAG,
1798		    mprot->m_pkthdr.len, protrate, 1,
1799		    data->map->dm_segs->ds_addr);
1800
1801		bus_dmamap_sync(sc->sc_dmat, data->map, 0,
1802		    data->map->dm_mapsize, BUS_DMASYNC_PREWRITE);
1803		bus_dmamap_sync(sc->sc_dmat, txq->map,
1804		    txq->cur_encrypt * RT2560_TX_DESC_SIZE,
1805		    RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE);
1806
1807		txq->queued++;
1808		if (++txq->cur_encrypt >= txq->count)
1809			txq->cur_encrypt = 0;
1810
1811		flags |= RT2560_TX_LONG_RETRY | RT2560_TX_IFS_SIFS;
1812	}
1813
1814	data = &txq->data[txq->cur_encrypt];
1815	desc = &txq->desc[txq->cur_encrypt];
1816
1817	error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0,
1818	    BUS_DMA_NOWAIT);
1819	if (error != 0 && error != EFBIG) {
1820		printf("%s: could not map mbuf (error %d)\n",
1821		    sc->sc_dev.dv_xname, error);
1822		m_freem(m0);
1823		return error;
1824	}
1825	if (error != 0) {
1826		/* too many fragments, linearize */
1827
1828		MGETHDR(mnew, M_DONTWAIT, MT_DATA);
1829		if (mnew == NULL) {
1830			m_freem(m0);
1831			return ENOMEM;
1832		}
1833		M_DUP_PKTHDR(mnew, m0);
1834		if (m0->m_pkthdr.len > MHLEN) {
1835			MCLGET(mnew, M_DONTWAIT);
1836			if (!(mnew->m_flags & M_EXT)) {
1837				m_freem(m0);
1838				m_freem(mnew);
1839				return ENOMEM;
1840			}
1841		}
1842
1843		m_copydata(m0, 0, m0->m_pkthdr.len, mtod(mnew, caddr_t));
1844		m_freem(m0);
1845		mnew->m_len = mnew->m_pkthdr.len;
1846		m0 = mnew;
1847
1848		error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0,
1849		    BUS_DMA_NOWAIT);
1850		if (error != 0) {
1851			printf("%s: could not map mbuf (error %d)\n",
1852			    sc->sc_dev.dv_xname, error);
1853			m_freem(m0);
1854			return error;
1855		}
1856
1857		/* packet header have moved, reset our local pointer */
1858		wh = mtod(m0, struct ieee80211_frame *);
1859	}
1860
1861#if NBPFILTER > 0
1862	if (sc->sc_drvbpf != NULL) {
1863		struct mbuf mb;
1864		struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap;
1865
1866		tap->wt_flags = 0;
1867		tap->wt_rate = rate;
1868		tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq);
1869		tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags);
1870		tap->wt_antenna = sc->tx_ant;
1871
1872		mb.m_data = (caddr_t)tap;
1873		mb.m_len = sc->sc_txtap_len;
1874		mb.m_next = m0;
1875		mb.m_nextpkt = NULL;
1876		mb.m_type = 0;
1877		mb.m_flags = 0;
1878		bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_OUT);
1879	}
1880#endif
1881
1882	data->m = m0;
1883	data->ni = ni;
1884
1885	if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1886		flags |= RT2560_TX_NEED_ACK;
1887
1888		dur = rt2560_txtime(RAL_ACK_SIZE, rt2560_ack_rate(ic, rate),
1889		    ic->ic_flags) + RAL_SIFS;
1890		*(uint16_t *)wh->i_dur = htole16(dur);
1891	}
1892
1893	rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 1,
1894	    data->map->dm_segs->ds_addr);
1895
1896	bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize,
1897	    BUS_DMASYNC_PREWRITE);
1898	bus_dmamap_sync(sc->sc_dmat, txq->map,
1899	    txq->cur_encrypt * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE,
1900	    BUS_DMASYNC_PREWRITE);
1901
1902	DPRINTFN(10, ("sending frame len=%u idx=%u rate=%u\n",
1903	    m0->m_pkthdr.len, txq->cur_encrypt, rate));
1904
1905	/* kick encrypt */
1906	txq->queued++;
1907	if (++txq->cur_encrypt >= txq->count)
1908		txq->cur_encrypt = 0;
1909	RAL_WRITE(sc, RT2560_SECCSR1, RT2560_KICK_ENCRYPT);
1910
1911	return 0;
1912}
1913
1914void
1915rt2560_start(struct ifnet *ifp)
1916{
1917	struct rt2560_softc *sc = ifp->if_softc;
1918	struct ieee80211com *ic = &sc->sc_ic;
1919	struct mbuf *m0;
1920	struct ieee80211_node *ni;
1921
1922	/*
1923	 * net80211 may still try to send management frames even if the
1924	 * IFF_RUNNING flag is not set...
1925	 */
1926	if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING)
1927		return;
1928
1929	for (;;) {
1930		IF_POLL(&ic->ic_mgtq, m0);
1931		if (m0 != NULL) {
1932			if (sc->prioq.queued >= RT2560_PRIO_RING_COUNT) {
1933				ifp->if_flags |= IFF_OACTIVE;
1934				break;
1935			}
1936			IF_DEQUEUE(&ic->ic_mgtq, m0);
1937
1938			ni = (struct ieee80211_node *)m0->m_pkthdr.rcvif;
1939			m0->m_pkthdr.rcvif = NULL;
1940#if NBPFILTER > 0
1941			if (ic->ic_rawbpf != NULL)
1942				bpf_mtap(ic->ic_rawbpf, m0, BPF_DIRECTION_OUT);
1943#endif
1944			if (rt2560_tx_mgt(sc, m0, ni) != 0)
1945				break;
1946
1947		} else {
1948			if (ic->ic_state != IEEE80211_S_RUN)
1949				break;
1950			IFQ_POLL(&ifp->if_snd, m0);
1951			if (m0 == NULL)
1952				break;
1953			if (sc->txq.queued >= RT2560_TX_RING_COUNT - 1) {
1954				ifp->if_flags |= IFF_OACTIVE;
1955				break;
1956			}
1957			IFQ_DEQUEUE(&ifp->if_snd, m0);
1958#if NBPFILTER > 0
1959			if (ifp->if_bpf != NULL)
1960				bpf_mtap(ifp->if_bpf, m0, BPF_DIRECTION_OUT);
1961#endif
1962			m0 = ieee80211_encap(ifp, m0, &ni);
1963			if (m0 == NULL)
1964				continue;
1965#if NBPFILTER > 0
1966			if (ic->ic_rawbpf != NULL)
1967				bpf_mtap(ic->ic_rawbpf, m0, BPF_DIRECTION_OUT);
1968#endif
1969			if (rt2560_tx_data(sc, m0, ni) != 0) {
1970				if (ni != NULL)
1971					ieee80211_release_node(ic, ni);
1972				ifp->if_oerrors++;
1973				break;
1974			}
1975		}
1976
1977		sc->sc_tx_timer = 5;
1978		ifp->if_timer = 1;
1979	}
1980}
1981
1982void
1983rt2560_watchdog(struct ifnet *ifp)
1984{
1985	struct rt2560_softc *sc = ifp->if_softc;
1986
1987	ifp->if_timer = 0;
1988
1989	if (sc->sc_tx_timer > 0) {
1990		if (--sc->sc_tx_timer == 0) {
1991			printf("%s: device timeout\n", sc->sc_dev.dv_xname);
1992			rt2560_init(ifp);
1993			ifp->if_oerrors++;
1994			return;
1995		}
1996		ifp->if_timer = 1;
1997	}
1998
1999	ieee80211_watchdog(ifp);
2000}
2001
2002int
2003rt2560_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
2004{
2005	struct rt2560_softc *sc = ifp->if_softc;
2006	struct ieee80211com *ic = &sc->sc_ic;
2007	struct ifaddr *ifa;
2008	struct ifreq *ifr;
2009	int s, error = 0;
2010
2011	s = splnet();
2012
2013	switch (cmd) {
2014	case SIOCSIFADDR:
2015		ifa = (struct ifaddr *)data;
2016		ifp->if_flags |= IFF_UP;
2017#ifdef INET
2018		if (ifa->ifa_addr->sa_family == AF_INET)
2019			arp_ifinit(&ic->ic_ac, ifa);
2020#endif
2021		/* FALLTHROUGH */
2022	case SIOCSIFFLAGS:
2023		if (ifp->if_flags & IFF_UP) {
2024			if (ifp->if_flags & IFF_RUNNING)
2025				rt2560_update_promisc(sc);
2026			else
2027				rt2560_init(ifp);
2028		} else {
2029			if (ifp->if_flags & IFF_RUNNING)
2030				rt2560_stop(ifp, 1);
2031		}
2032		break;
2033
2034	case SIOCADDMULTI:
2035	case SIOCDELMULTI:
2036		ifr = (struct ifreq *)data;
2037		error = (cmd == SIOCADDMULTI) ?
2038		    ether_addmulti(ifr, &ic->ic_ac) :
2039		    ether_delmulti(ifr, &ic->ic_ac);
2040
2041		if (error == ENETRESET)
2042			error = 0;
2043		break;
2044
2045	case SIOCS80211CHANNEL:
2046		/*
2047		 * This allows for fast channel switching in monitor mode
2048		 * (used by kismet). In IBSS mode, we must explicitly reset
2049		 * the interface to generate a new beacon frame.
2050		 */
2051		error = ieee80211_ioctl(ifp, cmd, data);
2052		if (error == ENETRESET &&
2053		    ic->ic_opmode == IEEE80211_M_MONITOR) {
2054			if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) ==
2055			    (IFF_UP | IFF_RUNNING))
2056				rt2560_set_chan(sc, ic->ic_ibss_chan);
2057			error = 0;
2058		}
2059		break;
2060
2061	default:
2062		error = ieee80211_ioctl(ifp, cmd, data);
2063	}
2064
2065	if (error == ENETRESET) {
2066		if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) ==
2067		    (IFF_UP | IFF_RUNNING))
2068			rt2560_init(ifp);
2069		error = 0;
2070	}
2071
2072	splx(s);
2073
2074	return error;
2075}
2076
2077void
2078rt2560_bbp_write(struct rt2560_softc *sc, uint8_t reg, uint8_t val)
2079{
2080	uint32_t tmp;
2081	int ntries;
2082
2083	for (ntries = 0; ntries < 100; ntries++) {
2084		if (!(RAL_READ(sc, RT2560_BBPCSR) & RT2560_BBP_BUSY))
2085			break;
2086		DELAY(1);
2087	}
2088	if (ntries == 100) {
2089		printf("%s: could not write to BBP\n", sc->sc_dev.dv_xname);
2090		return;
2091	}
2092
2093	tmp = RT2560_BBP_WRITE | RT2560_BBP_BUSY | reg << 8 | val;
2094	RAL_WRITE(sc, RT2560_BBPCSR, tmp);
2095
2096	DPRINTFN(15, ("BBP R%u <- 0x%02x\n", reg, val));
2097}
2098
2099uint8_t
2100rt2560_bbp_read(struct rt2560_softc *sc, uint8_t reg)
2101{
2102	uint32_t val;
2103	int ntries;
2104
2105	val = RT2560_BBP_BUSY | reg << 8;
2106	RAL_WRITE(sc, RT2560_BBPCSR, val);
2107
2108	for (ntries = 0; ntries < 100; ntries++) {
2109		val = RAL_READ(sc, RT2560_BBPCSR);
2110		if (!(val & RT2560_BBP_BUSY))
2111			return val & 0xff;
2112		DELAY(1);
2113	}
2114
2115	printf("%s: could not read from BBP\n", sc->sc_dev.dv_xname);
2116	return 0;
2117}
2118
2119void
2120rt2560_rf_write(struct rt2560_softc *sc, uint8_t reg, uint32_t val)
2121{
2122	uint32_t tmp;
2123	int ntries;
2124
2125	for (ntries = 0; ntries < 100; ntries++) {
2126		if (!(RAL_READ(sc, RT2560_RFCSR) & RT2560_RF_BUSY))
2127			break;
2128		DELAY(1);
2129	}
2130	if (ntries == 100) {
2131		printf("%s: could not write to RF\n", sc->sc_dev.dv_xname);
2132		return;
2133	}
2134
2135	tmp = RT2560_RF_BUSY | RT2560_RF_20BIT | (val & 0xfffff) << 2 |
2136	    (reg & 0x3);
2137	RAL_WRITE(sc, RT2560_RFCSR, tmp);
2138
2139	/* remember last written value in sc */
2140	sc->rf_regs[reg] = val;
2141
2142	DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff));
2143}
2144
2145void
2146rt2560_set_chan(struct rt2560_softc *sc, struct ieee80211_channel *c)
2147{
2148	struct ieee80211com *ic = &sc->sc_ic;
2149	uint8_t power, tmp;
2150	u_int chan;
2151
2152	chan = ieee80211_chan2ieee(ic, c);
2153	if (chan == 0 || chan == IEEE80211_CHAN_ANY)
2154		return;
2155
2156	power = min(sc->txpow[chan - 1], 31);
2157
2158	DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power));
2159
2160	switch (sc->rf_rev) {
2161	case RT2560_RF_2522:
2162		rt2560_rf_write(sc, RT2560_RF1, 0x00814);
2163		rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2522_r2[chan - 1]);
2164		rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040);
2165		break;
2166
2167	case RT2560_RF_2523:
2168		rt2560_rf_write(sc, RT2560_RF1, 0x08804);
2169		rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2523_r2[chan - 1]);
2170		rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x38044);
2171		rt2560_rf_write(sc, RT2560_RF4,
2172		    (chan == 14) ? 0x00280 : 0x00286);
2173		break;
2174
2175	case RT2560_RF_2524:
2176		rt2560_rf_write(sc, RT2560_RF1, 0x0c808);
2177		rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2524_r2[chan - 1]);
2178		rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040);
2179		rt2560_rf_write(sc, RT2560_RF4,
2180		    (chan == 14) ? 0x00280 : 0x00286);
2181		break;
2182
2183	case RT2560_RF_2525:
2184		rt2560_rf_write(sc, RT2560_RF1, 0x08808);
2185		rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525_hi_r2[chan - 1]);
2186		rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044);
2187		rt2560_rf_write(sc, RT2560_RF4,
2188		    (chan == 14) ? 0x00280 : 0x00286);
2189
2190		rt2560_rf_write(sc, RT2560_RF1, 0x08808);
2191		rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525_r2[chan - 1]);
2192		rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044);
2193		rt2560_rf_write(sc, RT2560_RF4,
2194		    (chan == 14) ? 0x00280 : 0x00286);
2195		break;
2196
2197	case RT2560_RF_2525E:
2198		rt2560_rf_write(sc, RT2560_RF1, 0x08808);
2199		rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525e_r2[chan - 1]);
2200		rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044);
2201		rt2560_rf_write(sc, RT2560_RF4,
2202		    (chan == 14) ? 0x00286 : 0x00282);
2203		break;
2204
2205	case RT2560_RF_2526:
2206		rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2526_hi_r2[chan - 1]);
2207		rt2560_rf_write(sc, RT2560_RF4,
2208		   (chan & 1) ? 0x00386 : 0x00381);
2209		rt2560_rf_write(sc, RT2560_RF1, 0x08804);
2210
2211		rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2526_r2[chan - 1]);
2212		rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044);
2213		rt2560_rf_write(sc, RT2560_RF4,
2214		    (chan & 1) ? 0x00386 : 0x00381);
2215		break;
2216	}
2217
2218	if (ic->ic_opmode != IEEE80211_M_MONITOR &&
2219	    ic->ic_state != IEEE80211_S_SCAN) {
2220		/* set Japan filter bit for channel 14 */
2221		tmp = rt2560_bbp_read(sc, 70);
2222
2223		tmp &= ~RT2560_JAPAN_FILTER;
2224		if (chan == 14)
2225			tmp |= RT2560_JAPAN_FILTER;
2226
2227		rt2560_bbp_write(sc, 70, tmp);
2228
2229		DELAY(1000); /* RF needs a 1ms delay here */
2230		rt2560_disable_rf_tune(sc);
2231
2232		/* clear CRC errors */
2233		RAL_READ(sc, RT2560_CNT0);
2234	}
2235}
2236
2237/*
2238 * Disable RF auto-tuning.
2239 */
2240void
2241rt2560_disable_rf_tune(struct rt2560_softc *sc)
2242{
2243	uint32_t tmp;
2244
2245	if (sc->rf_rev != RT2560_RF_2523) {
2246		tmp = sc->rf_regs[RT2560_RF1] & ~RT2560_RF1_AUTOTUNE;
2247		rt2560_rf_write(sc, RT2560_RF1, tmp);
2248	}
2249
2250	tmp = sc->rf_regs[RT2560_RF3] & ~RT2560_RF3_AUTOTUNE;
2251	rt2560_rf_write(sc, RT2560_RF3, tmp);
2252
2253	DPRINTFN(2, ("disabling RF autotune\n"));
2254}
2255
2256/*
2257 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF
2258 * synchronization.
2259 */
2260void
2261rt2560_enable_tsf_sync(struct rt2560_softc *sc)
2262{
2263	struct ieee80211com *ic = &sc->sc_ic;
2264	uint16_t logcwmin, preload;
2265	uint32_t tmp;
2266
2267	/* first, disable TSF synchronization */
2268	RAL_WRITE(sc, RT2560_CSR14, 0);
2269
2270	tmp = 16 * ic->ic_bss->ni_intval;
2271	RAL_WRITE(sc, RT2560_CSR12, tmp);
2272
2273	RAL_WRITE(sc, RT2560_CSR13, 0);
2274
2275	logcwmin = 5;
2276	preload = (ic->ic_opmode == IEEE80211_M_STA) ? 384 : 1024;
2277	tmp = logcwmin << 16 | preload;
2278	RAL_WRITE(sc, RT2560_BCNOCSR, tmp);
2279
2280	/* finally, enable TSF synchronization */
2281	tmp = RT2560_ENABLE_TSF | RT2560_ENABLE_TBCN;
2282	if (ic->ic_opmode == IEEE80211_M_STA)
2283		tmp |= RT2560_ENABLE_TSF_SYNC(1);
2284	else
2285		tmp |= RT2560_ENABLE_TSF_SYNC(2) |
2286		       RT2560_ENABLE_BEACON_GENERATOR;
2287	RAL_WRITE(sc, RT2560_CSR14, tmp);
2288
2289	DPRINTF(("enabling TSF synchronization\n"));
2290}
2291
2292void
2293rt2560_update_plcp(struct rt2560_softc *sc)
2294{
2295	struct ieee80211com *ic = &sc->sc_ic;
2296
2297	/* no short preamble for 1Mbps */
2298	RAL_WRITE(sc, RT2560_PLCP1MCSR, 0x00700400);
2299
2300	if (!(ic->ic_flags & IEEE80211_F_SHPREAMBLE)) {
2301		/* values taken from the reference driver */
2302		RAL_WRITE(sc, RT2560_PLCP2MCSR,   0x00380401);
2303		RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x00150402);
2304		RAL_WRITE(sc, RT2560_PLCP11MCSR,  0x000b8403);
2305	} else {
2306		/* same values as above or'ed 0x8 */
2307		RAL_WRITE(sc, RT2560_PLCP2MCSR,   0x00380409);
2308		RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x0015040a);
2309		RAL_WRITE(sc, RT2560_PLCP11MCSR,  0x000b840b);
2310	}
2311
2312	DPRINTF(("updating PLCP for %s preamble\n",
2313	    (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ? "short" : "long"));
2314}
2315
2316void
2317rt2560_updateslot(struct ieee80211com *ic)
2318{
2319	struct rt2560_softc *sc = ic->ic_if.if_softc;
2320
2321	if (ic->ic_opmode == IEEE80211_M_HOSTAP) {
2322		/*
2323		 * In HostAP mode, we defer setting of new slot time until
2324		 * updated ERP Information Element has propagated to all
2325		 * associated STAs.
2326		 */
2327		sc->sc_flags |= RT2560_UPDATE_SLOT;
2328	} else
2329		rt2560_set_slottime(sc);
2330}
2331
2332/*
2333 * IEEE 802.11a (and possibly 802.11g) use short slot time. Refer to
2334 * IEEE Std 802.11-1999 pp. 85 to know how these values are computed.
2335 */
2336void
2337rt2560_set_slottime(struct rt2560_softc *sc)
2338{
2339	struct ieee80211com *ic = &sc->sc_ic;
2340	uint8_t slottime;
2341	uint16_t sifs, pifs, difs, eifs;
2342	uint32_t tmp;
2343
2344	slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20;
2345
2346	/* define the MAC slot boundaries */
2347	sifs = RAL_SIFS - RT2560_RXTX_TURNAROUND;
2348	pifs = sifs + slottime;
2349	difs = sifs + 2 * slottime;
2350	eifs = (ic->ic_curmode == IEEE80211_MODE_11B) ? 364 : 60;
2351
2352	tmp = RAL_READ(sc, RT2560_CSR11);
2353	tmp = (tmp & ~0x1f00) | slottime << 8;
2354	RAL_WRITE(sc, RT2560_CSR11, tmp);
2355
2356	tmp = pifs << 16 | sifs;
2357	RAL_WRITE(sc, RT2560_CSR18, tmp);
2358
2359	tmp = eifs << 16 | difs;
2360	RAL_WRITE(sc, RT2560_CSR19, tmp);
2361
2362	DPRINTF(("setting slottime to %uus\n", slottime));
2363}
2364
2365void
2366rt2560_set_basicrates(struct rt2560_softc *sc)
2367{
2368	struct ieee80211com *ic = &sc->sc_ic;
2369
2370	/* update basic rate set */
2371	if (ic->ic_curmode == IEEE80211_MODE_11B) {
2372		/* 11b basic rates: 1, 2Mbps */
2373		RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x3);
2374	} else {
2375		/* 11b/g basic rates: 1, 2, 5.5, 11Mbps */
2376		RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0xf);
2377	}
2378}
2379
2380void
2381rt2560_update_led(struct rt2560_softc *sc, int led1, int led2)
2382{
2383	uint32_t tmp;
2384
2385	/* set ON period to 70ms and OFF period to 30ms */
2386	tmp = led1 << 16 | led2 << 17 | 70 << 8 | 30;
2387	RAL_WRITE(sc, RT2560_LEDCSR, tmp);
2388}
2389
2390void
2391rt2560_set_bssid(struct rt2560_softc *sc, uint8_t *bssid)
2392{
2393	uint32_t tmp;
2394
2395	tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24;
2396	RAL_WRITE(sc, RT2560_CSR5, tmp);
2397
2398	tmp = bssid[4] | bssid[5] << 8;
2399	RAL_WRITE(sc, RT2560_CSR6, tmp);
2400
2401	DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid)));
2402}
2403
2404void
2405rt2560_set_macaddr(struct rt2560_softc *sc, uint8_t *addr)
2406{
2407	uint32_t tmp;
2408
2409	tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24;
2410	RAL_WRITE(sc, RT2560_CSR3, tmp);
2411
2412	tmp = addr[4] | addr[5] << 8;
2413	RAL_WRITE(sc, RT2560_CSR4, tmp);
2414
2415	DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr)));
2416}
2417
2418void
2419rt2560_get_macaddr(struct rt2560_softc *sc, uint8_t *addr)
2420{
2421	uint32_t tmp;
2422
2423	tmp = RAL_READ(sc, RT2560_CSR3);
2424	addr[0] = tmp & 0xff;
2425	addr[1] = (tmp >>  8) & 0xff;
2426	addr[2] = (tmp >> 16) & 0xff;
2427	addr[3] = (tmp >> 24);
2428
2429	tmp = RAL_READ(sc, RT2560_CSR4);
2430	addr[4] = tmp & 0xff;
2431	addr[5] = (tmp >> 8) & 0xff;
2432}
2433
2434void
2435rt2560_update_promisc(struct rt2560_softc *sc)
2436{
2437	struct ifnet *ifp = &sc->sc_ic.ic_if;
2438	uint32_t tmp;
2439
2440	tmp = RAL_READ(sc, RT2560_RXCSR0);
2441
2442	tmp &= ~RT2560_DROP_NOT_TO_ME;
2443	if (!(ifp->if_flags & IFF_PROMISC))
2444		tmp |= RT2560_DROP_NOT_TO_ME;
2445
2446	RAL_WRITE(sc, RT2560_RXCSR0, tmp);
2447
2448	DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ?
2449	    "entering" : "leaving"));
2450}
2451
2452void
2453rt2560_set_txantenna(struct rt2560_softc *sc, int antenna)
2454{
2455	uint32_t tmp;
2456	uint8_t tx;
2457
2458	tx = rt2560_bbp_read(sc, RT2560_BBP_TX) & ~RT2560_BBP_ANTMASK;
2459	if (antenna == 1)
2460		tx |= RT2560_BBP_ANTA;
2461	else if (antenna == 2)
2462		tx |= RT2560_BBP_ANTB;
2463	else
2464		tx |= RT2560_BBP_DIVERSITY;
2465
2466	/* need to force I/Q flip for RF 2525e, 2526 and 5222 */
2467	if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526 ||
2468	    sc->rf_rev == RT2560_RF_5222)
2469		tx |= RT2560_BBP_FLIPIQ;
2470
2471	rt2560_bbp_write(sc, RT2560_BBP_TX, tx);
2472
2473	/* update values for CCK and OFDM in BBPCSR1 */
2474	tmp = RAL_READ(sc, RT2560_BBPCSR1) & ~0x00070007;
2475	tmp |= (tx & 0x7) << 16 | (tx & 0x7);
2476	RAL_WRITE(sc, RT2560_BBPCSR1, tmp);
2477}
2478
2479void
2480rt2560_set_rxantenna(struct rt2560_softc *sc, int antenna)
2481{
2482	uint8_t rx;
2483
2484	rx = rt2560_bbp_read(sc, RT2560_BBP_RX) & ~RT2560_BBP_ANTMASK;
2485	if (antenna == 1)
2486		rx |= RT2560_BBP_ANTA;
2487	else if (antenna == 2)
2488		rx |= RT2560_BBP_ANTB;
2489	else
2490		rx |= RT2560_BBP_DIVERSITY;
2491
2492	/* need to force no I/Q flip for RF 2525e and 2526 */
2493	if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526)
2494		rx &= ~RT2560_BBP_FLIPIQ;
2495
2496	rt2560_bbp_write(sc, RT2560_BBP_RX, rx);
2497}
2498
2499const char *
2500rt2560_get_rf(int rev)
2501{
2502	switch (rev) {
2503	case RT2560_RF_2522:	return "RT2522";
2504	case RT2560_RF_2523:	return "RT2523";
2505	case RT2560_RF_2524:	return "RT2524";
2506	case RT2560_RF_2525:	return "RT2525";
2507	case RT2560_RF_2525E:	return "RT2525e";
2508	case RT2560_RF_2526:	return "RT2526";
2509	case RT2560_RF_5222:	return "RT5222";
2510	default:		return "unknown";
2511	}
2512}
2513
2514void
2515rt2560_read_eeprom(struct rt2560_softc *sc)
2516{
2517	uint16_t val;
2518	int i;
2519
2520	val = rt2560_eeprom_read(sc, RT2560_EEPROM_CONFIG0);
2521	sc->rf_rev =   (val >> 11) & 0x1f;
2522	sc->hw_radio = (val >> 10) & 0x1;
2523	sc->led_mode = (val >> 6)  & 0x7;
2524	sc->rx_ant =   (val >> 4)  & 0x3;
2525	sc->tx_ant =   (val >> 2)  & 0x3;
2526	sc->nb_ant =   val & 0x3;
2527
2528	/* read default values for BBP registers */
2529	for (i = 0; i < 16; i++) {
2530		val = rt2560_eeprom_read(sc, RT2560_EEPROM_BBP_BASE + i);
2531		sc->bbp_prom[i].reg = val >> 8;
2532		sc->bbp_prom[i].val = val & 0xff;
2533	}
2534
2535	/* read Tx power for all b/g channels */
2536	for (i = 0; i < 14 / 2; i++) {
2537		val = rt2560_eeprom_read(sc, RT2560_EEPROM_TXPOWER + i);
2538		sc->txpow[i * 2] = val >> 8;
2539		sc->txpow[i * 2 + 1] = val & 0xff;
2540	}
2541}
2542
2543int
2544rt2560_bbp_init(struct rt2560_softc *sc)
2545{
2546#define N(a)	(sizeof (a) / sizeof ((a)[0]))
2547	int i, ntries;
2548
2549	/* wait for BBP to be ready */
2550	for (ntries = 0; ntries < 100; ntries++) {
2551		if (rt2560_bbp_read(sc, RT2560_BBP_VERSION) != 0)
2552			break;
2553		DELAY(1);
2554	}
2555	if (ntries == 100) {
2556		printf("%s: timeout waiting for BBP\n", sc->sc_dev.dv_xname);
2557		return EIO;
2558	}
2559
2560	/* initialize BBP registers to default values */
2561	for (i = 0; i < N(rt2560_def_bbp); i++) {
2562		rt2560_bbp_write(sc, rt2560_def_bbp[i].reg,
2563		    rt2560_def_bbp[i].val);
2564	}
2565#if 0
2566	/* initialize BBP registers to values stored in EEPROM */
2567	for (i = 0; i < 16; i++) {
2568		if (sc->bbp_prom[i].reg == 0xff)
2569			continue;
2570		rt2560_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);
2571	}
2572#endif
2573
2574	return 0;
2575#undef N
2576}
2577
2578int
2579rt2560_init(struct ifnet *ifp)
2580{
2581#define N(a)	(sizeof (a) / sizeof ((a)[0]))
2582	struct rt2560_softc *sc = ifp->if_softc;
2583	struct ieee80211com *ic = &sc->sc_ic;
2584	uint32_t tmp;
2585	int i;
2586
2587	/* for CardBus, power on the socket */
2588	if (!(sc->sc_flags & RT2560_ENABLED)) {
2589		if (sc->sc_enable != NULL && (*sc->sc_enable)(sc) != 0) {
2590			printf("%s: could not enable device\n",
2591			    sc->sc_dev.dv_xname);
2592			return EIO;
2593		}
2594		sc->sc_flags |= RT2560_ENABLED;
2595	}
2596
2597	rt2560_stop(ifp, 0);
2598
2599	/* setup tx rings */
2600	tmp = RT2560_PRIO_RING_COUNT << 24 |
2601	      RT2560_ATIM_RING_COUNT << 16 |
2602	      RT2560_TX_RING_COUNT   <<  8 |
2603	      RT2560_TX_DESC_SIZE;
2604
2605	/* rings _must_ be initialized in this _exact_ order! */
2606	RAL_WRITE(sc, RT2560_TXCSR2, tmp);
2607	RAL_WRITE(sc, RT2560_TXCSR3, sc->txq.physaddr);
2608	RAL_WRITE(sc, RT2560_TXCSR5, sc->prioq.physaddr);
2609	RAL_WRITE(sc, RT2560_TXCSR4, sc->atimq.physaddr);
2610	RAL_WRITE(sc, RT2560_TXCSR6, sc->bcnq.physaddr);
2611
2612	/* setup rx ring */
2613	tmp = RT2560_RX_RING_COUNT << 8 | RT2560_RX_DESC_SIZE;
2614
2615	RAL_WRITE(sc, RT2560_RXCSR1, tmp);
2616	RAL_WRITE(sc, RT2560_RXCSR2, sc->rxq.physaddr);
2617
2618	/* initialize MAC registers to default values */
2619	for (i = 0; i < N(rt2560_def_mac); i++)
2620		RAL_WRITE(sc, rt2560_def_mac[i].reg, rt2560_def_mac[i].val);
2621
2622	IEEE80211_ADDR_COPY(ic->ic_myaddr, LLADDR(ifp->if_sadl));
2623	rt2560_set_macaddr(sc, ic->ic_myaddr);
2624
2625	/* set basic rate set (will be updated later) */
2626	RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x153);
2627
2628	rt2560_set_txantenna(sc, 1);
2629	rt2560_set_rxantenna(sc, 1);
2630	rt2560_set_slottime(sc);
2631	rt2560_update_plcp(sc);
2632	rt2560_update_led(sc, 0, 0);
2633
2634	RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC);
2635	RAL_WRITE(sc, RT2560_CSR1, RT2560_HOST_READY);
2636
2637	if (rt2560_bbp_init(sc) != 0) {
2638		rt2560_stop(ifp, 1);
2639		return EIO;
2640	}
2641
2642	/* set default BSS channel */
2643	ic->ic_bss->ni_chan = ic->ic_ibss_chan;
2644	rt2560_set_chan(sc, ic->ic_bss->ni_chan);
2645
2646	/* kick Rx */
2647	tmp = RT2560_DROP_PHY_ERROR | RT2560_DROP_CRC_ERROR;
2648	if (ic->ic_opmode != IEEE80211_M_MONITOR) {
2649		tmp |= RT2560_DROP_CTL | RT2560_DROP_VERSION_ERROR;
2650		if (ic->ic_opmode != IEEE80211_M_HOSTAP)
2651			tmp |= RT2560_DROP_TODS;
2652		if (!(ifp->if_flags & IFF_PROMISC))
2653			tmp |= RT2560_DROP_NOT_TO_ME;
2654	}
2655	RAL_WRITE(sc, RT2560_RXCSR0, tmp);
2656
2657	/* clear old FCS and Rx FIFO errors */
2658	RAL_READ(sc, RT2560_CNT0);
2659	RAL_READ(sc, RT2560_CNT4);
2660
2661	/* clear any pending interrupts */
2662	RAL_WRITE(sc, RT2560_CSR7, 0xffffffff);
2663
2664	/* enable interrupts */
2665	RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK);
2666
2667	ifp->if_flags &= ~IFF_OACTIVE;
2668	ifp->if_flags |= IFF_RUNNING;
2669
2670	if (ic->ic_opmode == IEEE80211_M_MONITOR)
2671		ieee80211_new_state(ic, IEEE80211_S_RUN, -1);
2672	else
2673		ieee80211_new_state(ic, IEEE80211_S_SCAN, -1);
2674
2675	return 0;
2676#undef N
2677}
2678
2679void
2680rt2560_stop(struct ifnet *ifp, int disable)
2681{
2682	struct rt2560_softc *sc = ifp->if_softc;
2683	struct ieee80211com *ic = &sc->sc_ic;
2684
2685	sc->sc_tx_timer = 0;
2686	ifp->if_timer = 0;
2687	ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
2688
2689	ieee80211_new_state(ic, IEEE80211_S_INIT, -1);	/* free all nodes */
2690
2691	/* abort Tx */
2692	RAL_WRITE(sc, RT2560_TXCSR0, RT2560_ABORT_TX);
2693
2694	/* disable Rx */
2695	RAL_WRITE(sc, RT2560_RXCSR0, RT2560_DISABLE_RX);
2696
2697	/* reset ASIC (and thus, BBP) */
2698	RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC);
2699	RAL_WRITE(sc, RT2560_CSR1, 0);
2700
2701	/* disable interrupts */
2702	RAL_WRITE(sc, RT2560_CSR8, 0xffffffff);
2703
2704	/* clear any pending interrupt */
2705	RAL_WRITE(sc, RT2560_CSR7, 0xffffffff);
2706
2707	/* reset Tx and Rx rings */
2708	rt2560_reset_tx_ring(sc, &sc->txq);
2709	rt2560_reset_tx_ring(sc, &sc->atimq);
2710	rt2560_reset_tx_ring(sc, &sc->prioq);
2711	rt2560_reset_tx_ring(sc, &sc->bcnq);
2712	rt2560_reset_rx_ring(sc, &sc->rxq);
2713
2714	/* for CardBus, power down the socket */
2715	if (disable && sc->sc_disable != NULL) {
2716		if (sc->sc_flags & RT2560_ENABLED) {
2717			(*sc->sc_disable)(sc);
2718			sc->sc_flags &= ~RT2560_ENABLED;
2719		}
2720	}
2721}
2722
2723void
2724rt2560_power(int why, void *arg)
2725{
2726	struct rt2560_softc *sc = arg;
2727	struct ifnet *ifp = &sc->sc_ic.ic_if;
2728	int s;
2729
2730	DPRINTF(("%s: rt2560_power(%d)\n", sc->sc_dev.dv_xname, why));
2731
2732	s = splnet();
2733	switch (why) {
2734	case PWR_SUSPEND:
2735	case PWR_STANDBY:
2736		rt2560_stop(ifp, 1);
2737		if (sc->sc_power != NULL)
2738			(*sc->sc_power)(sc, why);
2739		break;
2740	case PWR_RESUME:
2741		if (ifp->if_flags & IFF_UP) {
2742			rt2560_init(ifp);
2743			if (sc->sc_power != NULL)
2744				(*sc->sc_power)(sc, why);
2745			if (ifp->if_flags & IFF_RUNNING)
2746				rt2560_start(ifp);
2747		}
2748		break;
2749	}
2750	splx(s);
2751}
2752
2753void
2754rt2560_shutdown(void *arg)
2755{
2756	struct rt2560_softc *sc = arg;
2757
2758	rt2560_stop(&sc->sc_ic.ic_if, 1);
2759}
2760
2761struct cfdriver ral_cd = {
2762	NULL, "ral", DV_IFNET
2763};
2764