rt2560.c revision 1.14
1/* $OpenBSD: rt2560.c,v 1.14 2006/03/27 20:54:15 damien Exp $ */ 2 3/*- 4 * Copyright (c) 2005, 2006 5 * Damien Bergamini <damien.bergamini@free.fr> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20/*- 21 * Ralink Technology RT2560 chipset driver 22 * http://www.ralinktech.com/ 23 */ 24 25#include "bpfilter.h" 26 27#include <sys/param.h> 28#include <sys/sockio.h> 29#include <sys/sysctl.h> 30#include <sys/mbuf.h> 31#include <sys/kernel.h> 32#include <sys/socket.h> 33#include <sys/systm.h> 34#include <sys/malloc.h> 35#include <sys/timeout.h> 36#include <sys/conf.h> 37#include <sys/device.h> 38 39#include <machine/bus.h> 40#include <machine/endian.h> 41#include <machine/intr.h> 42 43#if NBPFILTER > 0 44#include <net/bpf.h> 45#endif 46#include <net/if.h> 47#include <net/if_arp.h> 48#include <net/if_dl.h> 49#include <net/if_media.h> 50#include <net/if_types.h> 51 52#include <netinet/in.h> 53#include <netinet/in_systm.h> 54#include <netinet/in_var.h> 55#include <netinet/if_ether.h> 56#include <netinet/ip.h> 57 58#include <net80211/ieee80211_var.h> 59#include <net80211/ieee80211_rssadapt.h> 60#include <net80211/ieee80211_radiotap.h> 61 62#include <dev/ic/rt2560reg.h> 63#include <dev/ic/rt2560var.h> 64 65#include <dev/pci/pcireg.h> 66#include <dev/pci/pcivar.h> 67#include <dev/pci/pcidevs.h> 68 69#ifdef RAL_DEBUG 70#define DPRINTF(x) do { if (rt2560_debug > 0) printf x; } while (0) 71#define DPRINTFN(n, x) do { if (rt2560_debug >= (n)) printf x; } while (0) 72int rt2560_debug = 0; 73#else 74#define DPRINTF(x) 75#define DPRINTFN(n, x) 76#endif 77 78int rt2560_alloc_tx_ring(struct rt2560_softc *, 79 struct rt2560_tx_ring *, int); 80void rt2560_reset_tx_ring(struct rt2560_softc *, 81 struct rt2560_tx_ring *); 82void rt2560_free_tx_ring(struct rt2560_softc *, 83 struct rt2560_tx_ring *); 84int rt2560_alloc_rx_ring(struct rt2560_softc *, 85 struct rt2560_rx_ring *, int); 86void rt2560_reset_rx_ring(struct rt2560_softc *, 87 struct rt2560_rx_ring *); 88void rt2560_free_rx_ring(struct rt2560_softc *, 89 struct rt2560_rx_ring *); 90struct ieee80211_node *rt2560_node_alloc(struct ieee80211com *); 91void rt2560_node_copy(struct ieee80211com *ic, 92 struct ieee80211_node *, const struct ieee80211_node *); 93int rt2560_media_change(struct ifnet *); 94void rt2560_next_scan(void *); 95void rt2560_iter_func(void *, struct ieee80211_node *); 96void rt2560_rssadapt_updatestats(void *); 97int rt2560_newstate(struct ieee80211com *, enum ieee80211_state, 98 int); 99uint16_t rt2560_eeprom_read(struct rt2560_softc *, uint8_t); 100void rt2560_encryption_intr(struct rt2560_softc *); 101void rt2560_tx_intr(struct rt2560_softc *); 102void rt2560_prio_intr(struct rt2560_softc *); 103void rt2560_decryption_intr(struct rt2560_softc *); 104void rt2560_rx_intr(struct rt2560_softc *); 105void rt2560_beacon_expire(struct rt2560_softc *); 106void rt2560_wakeup_expire(struct rt2560_softc *); 107#if NBPFILTER > 0 108uint8_t rt2560_rxrate(struct rt2560_rx_desc *); 109#endif 110int rt2560_ack_rate(struct ieee80211com *, int); 111uint16_t rt2560_txtime(int, int, uint32_t); 112uint8_t rt2560_plcp_signal(int); 113void rt2560_setup_tx_desc(struct rt2560_softc *, 114 struct rt2560_tx_desc *, uint32_t, int, int, int, 115 bus_addr_t); 116int rt2560_tx_bcn(struct rt2560_softc *, struct mbuf *, 117 struct ieee80211_node *); 118int rt2560_tx_mgt(struct rt2560_softc *, struct mbuf *, 119 struct ieee80211_node *); 120struct mbuf *rt2560_get_rts(struct rt2560_softc *, 121 struct ieee80211_frame *, uint16_t); 122int rt2560_tx_data(struct rt2560_softc *, struct mbuf *, 123 struct ieee80211_node *); 124void rt2560_start(struct ifnet *); 125void rt2560_watchdog(struct ifnet *); 126int rt2560_ioctl(struct ifnet *, u_long, caddr_t); 127void rt2560_bbp_write(struct rt2560_softc *, uint8_t, uint8_t); 128uint8_t rt2560_bbp_read(struct rt2560_softc *, uint8_t); 129void rt2560_rf_write(struct rt2560_softc *, uint8_t, uint32_t); 130void rt2560_set_chan(struct rt2560_softc *, 131 struct ieee80211_channel *); 132void rt2560_disable_rf_tune(struct rt2560_softc *); 133void rt2560_enable_tsf_sync(struct rt2560_softc *); 134void rt2560_update_plcp(struct rt2560_softc *); 135void rt2560_update_slot(struct rt2560_softc *); 136void rt2560_set_basicrates(struct rt2560_softc *); 137void rt2560_update_led(struct rt2560_softc *, int, int); 138void rt2560_set_bssid(struct rt2560_softc *, uint8_t *); 139void rt2560_set_macaddr(struct rt2560_softc *, uint8_t *); 140void rt2560_get_macaddr(struct rt2560_softc *, uint8_t *); 141void rt2560_update_promisc(struct rt2560_softc *); 142void rt2560_set_txantenna(struct rt2560_softc *, int); 143void rt2560_set_rxantenna(struct rt2560_softc *, int); 144const char *rt2560_get_rf(int); 145void rt2560_read_eeprom(struct rt2560_softc *); 146int rt2560_bbp_init(struct rt2560_softc *); 147int rt2560_init(struct ifnet *); 148void rt2560_stop(struct ifnet *, int); 149 150/* 151 * Supported rates for 802.11a/b/g modes (in 500Kbps unit). 152 */ 153static const struct ieee80211_rateset rt2560_rateset_11a = 154 { 8, { 12, 18, 24, 36, 48, 72, 96, 108 } }; 155 156static const struct ieee80211_rateset rt2560_rateset_11b = 157 { 4, { 2, 4, 11, 22 } }; 158 159static const struct ieee80211_rateset rt2560_rateset_11g = 160 { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } }; 161 162/* 163 * Default values for MAC registers; values taken from the reference driver. 164 */ 165static const struct { 166 uint32_t reg; 167 uint32_t val; 168} rt2560_def_mac[] = { 169 { RT2560_PSCSR0, 0x00020002 }, 170 { RT2560_PSCSR1, 0x00000002 }, 171 { RT2560_PSCSR2, 0x00020002 }, 172 { RT2560_PSCSR3, 0x00000002 }, 173 { RT2560_TIMECSR, 0x00003f21 }, 174 { RT2560_CSR9, 0x00000780 }, 175 { RT2560_CSR11, 0x07041483 }, 176 { RT2560_CNT3, 0x00000000 }, 177 { RT2560_TXCSR1, 0x07614562 }, 178 { RT2560_ARSP_PLCP_0, 0x8c8d8b8a }, 179 { RT2560_ACKPCTCSR, 0x7038140a }, 180 { RT2560_ARTCSR1, 0x1d21252d }, 181 { RT2560_ARTCSR2, 0x1919191d }, 182 { RT2560_RXCSR0, 0xffffffff }, 183 { RT2560_RXCSR3, 0xb3aab3af }, 184 { RT2560_PCICSR, 0x000003b8 }, 185 { RT2560_PWRCSR0, 0x3f3b3100 }, 186 { RT2560_GPIOCSR, 0x0000ff00 }, 187 { RT2560_TESTCSR, 0x000000f0 }, 188 { RT2560_PWRCSR1, 0x000001ff }, 189 { RT2560_MACCSR0, 0x00213223 }, 190 { RT2560_MACCSR1, 0x00235518 }, 191 { RT2560_RLPWCSR, 0x00000040 }, 192 { RT2560_RALINKCSR, 0x9a009a11 }, 193 { RT2560_CSR7, 0xffffffff }, 194 { RT2560_BBPCSR1, 0x82188200 }, 195 { RT2560_TXACKCSR0, 0x00000020 }, 196 { RT2560_SECCSR3, 0x0000e78f } 197}; 198 199/* 200 * Default values for BBP registers; values taken from the reference driver. 201 */ 202static const struct { 203 uint8_t reg; 204 uint8_t val; 205} rt2560_def_bbp[] = { 206 { 3, 0x02 }, 207 { 4, 0x19 }, 208 { 14, 0x1c }, 209 { 15, 0x30 }, 210 { 16, 0xac }, 211 { 17, 0x48 }, 212 { 18, 0x18 }, 213 { 19, 0xff }, 214 { 20, 0x1e }, 215 { 21, 0x08 }, 216 { 22, 0x08 }, 217 { 23, 0x08 }, 218 { 24, 0x80 }, 219 { 25, 0x50 }, 220 { 26, 0x08 }, 221 { 27, 0x23 }, 222 { 30, 0x10 }, 223 { 31, 0x2b }, 224 { 32, 0xb9 }, 225 { 34, 0x12 }, 226 { 35, 0x50 }, 227 { 39, 0xc4 }, 228 { 40, 0x02 }, 229 { 41, 0x60 }, 230 { 53, 0x10 }, 231 { 54, 0x18 }, 232 { 56, 0x08 }, 233 { 57, 0x10 }, 234 { 58, 0x08 }, 235 { 61, 0x60 }, 236 { 62, 0x10 }, 237 { 75, 0xff } 238}; 239 240/* 241 * Default values for RF register R2 indexed by channel numbers; values taken 242 * from the reference driver. 243 */ 244static const uint32_t rt2560_rf2522_r2[] = { 245 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814, 246 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e 247}; 248 249static const uint32_t rt2560_rf2523_r2[] = { 250 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 251 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 252}; 253 254static const uint32_t rt2560_rf2524_r2[] = { 255 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 256 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 257}; 258 259static const uint32_t rt2560_rf2525_r2[] = { 260 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d, 261 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346 262}; 263 264static const uint32_t rt2560_rf2525_hi_r2[] = { 265 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345, 266 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e 267}; 268 269static const uint32_t rt2560_rf2525e_r2[] = { 270 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463, 271 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b 272}; 273 274static const uint32_t rt2560_rf2526_hi_r2[] = { 275 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d, 276 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241 277}; 278 279static const uint32_t rt2560_rf2526_r2[] = { 280 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229, 281 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d 282}; 283 284/* 285 * For dual-band RF, RF registers R1 and R4 also depend on channel number; 286 * values taken from the reference driver. 287 */ 288static const struct { 289 uint8_t chan; 290 uint32_t r1; 291 uint32_t r2; 292 uint32_t r4; 293} rt2560_rf5222[] = { 294 { 1, 0x08808, 0x0044d, 0x00282 }, 295 { 2, 0x08808, 0x0044e, 0x00282 }, 296 { 3, 0x08808, 0x0044f, 0x00282 }, 297 { 4, 0x08808, 0x00460, 0x00282 }, 298 { 5, 0x08808, 0x00461, 0x00282 }, 299 { 6, 0x08808, 0x00462, 0x00282 }, 300 { 7, 0x08808, 0x00463, 0x00282 }, 301 { 8, 0x08808, 0x00464, 0x00282 }, 302 { 9, 0x08808, 0x00465, 0x00282 }, 303 { 10, 0x08808, 0x00466, 0x00282 }, 304 { 11, 0x08808, 0x00467, 0x00282 }, 305 { 12, 0x08808, 0x00468, 0x00282 }, 306 { 13, 0x08808, 0x00469, 0x00282 }, 307 { 14, 0x08808, 0x0046b, 0x00286 }, 308 309 { 36, 0x08804, 0x06225, 0x00287 }, 310 { 40, 0x08804, 0x06226, 0x00287 }, 311 { 44, 0x08804, 0x06227, 0x00287 }, 312 { 48, 0x08804, 0x06228, 0x00287 }, 313 { 52, 0x08804, 0x06229, 0x00287 }, 314 { 56, 0x08804, 0x0622a, 0x00287 }, 315 { 60, 0x08804, 0x0622b, 0x00287 }, 316 { 64, 0x08804, 0x0622c, 0x00287 }, 317 318 { 100, 0x08804, 0x02200, 0x00283 }, 319 { 104, 0x08804, 0x02201, 0x00283 }, 320 { 108, 0x08804, 0x02202, 0x00283 }, 321 { 112, 0x08804, 0x02203, 0x00283 }, 322 { 116, 0x08804, 0x02204, 0x00283 }, 323 { 120, 0x08804, 0x02205, 0x00283 }, 324 { 124, 0x08804, 0x02206, 0x00283 }, 325 { 128, 0x08804, 0x02207, 0x00283 }, 326 { 132, 0x08804, 0x02208, 0x00283 }, 327 { 136, 0x08804, 0x02209, 0x00283 }, 328 { 140, 0x08804, 0x0220a, 0x00283 }, 329 330 { 149, 0x08808, 0x02429, 0x00281 }, 331 { 153, 0x08808, 0x0242b, 0x00281 }, 332 { 157, 0x08808, 0x0242d, 0x00281 }, 333 { 161, 0x08808, 0x0242f, 0x00281 } 334}; 335 336int 337rt2560_attach(void *xsc, int id) 338{ 339 struct rt2560_softc *sc = xsc; 340 struct ieee80211com *ic = &sc->sc_ic; 341 struct ifnet *ifp = &ic->ic_if; 342 int error, i; 343 344 timeout_set(&sc->scan_ch, rt2560_next_scan, sc); 345 timeout_set(&sc->rssadapt_ch, rt2560_rssadapt_updatestats, sc); 346 347 /* retrieve RT2560 rev. no */ 348 sc->asic_rev = RAL_READ(sc, RT2560_CSR0); 349 350 /* retrieve MAC address */ 351 rt2560_get_macaddr(sc, ic->ic_myaddr); 352 printf(", address %s\n", ether_sprintf(ic->ic_myaddr)); 353 354 /* retrieve RF rev. no and various other things from EEPROM */ 355 rt2560_read_eeprom(sc); 356 357 printf("%s: MAC/BBP RT2560 (rev 0x%02x), RF %s\n", sc->sc_dev.dv_xname, 358 sc->asic_rev, rt2560_get_rf(sc->rf_rev)); 359 360 /* 361 * Allocate Tx and Rx rings. 362 */ 363 error = rt2560_alloc_tx_ring(sc, &sc->txq, RT2560_TX_RING_COUNT); 364 if (error != 0) { 365 printf("%s: could not allocate Tx ring\n", 366 sc->sc_dev.dv_xname); 367 goto fail1; 368 } 369 370 error = rt2560_alloc_tx_ring(sc, &sc->atimq, RT2560_ATIM_RING_COUNT); 371 if (error != 0) { 372 printf("%s: could not allocate ATIM ring\n", 373 sc->sc_dev.dv_xname); 374 goto fail2; 375 } 376 377 error = rt2560_alloc_tx_ring(sc, &sc->prioq, RT2560_PRIO_RING_COUNT); 378 if (error != 0) { 379 printf("%s: could not allocate Prio ring\n", 380 sc->sc_dev.dv_xname); 381 goto fail3; 382 } 383 384 error = rt2560_alloc_tx_ring(sc, &sc->bcnq, RT2560_BEACON_RING_COUNT); 385 if (error != 0) { 386 printf("%s: could not allocate Beacon ring\n", 387 sc->sc_dev.dv_xname); 388 goto fail4; 389 } 390 391 error = rt2560_alloc_rx_ring(sc, &sc->rxq, RT2560_RX_RING_COUNT); 392 if (error != 0) { 393 printf("%s: could not allocate Rx ring\n", 394 sc->sc_dev.dv_xname); 395 goto fail5; 396 } 397 398 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 399 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 400 ic->ic_state = IEEE80211_S_INIT; 401 402 /* set device capabilities */ 403 ic->ic_caps = 404 IEEE80211_C_IBSS | /* IBSS mode supported */ 405 IEEE80211_C_MONITOR | /* monitor mode supported */ 406 IEEE80211_C_HOSTAP | /* HostAp mode supported */ 407 IEEE80211_C_TXPMGT | /* tx power management */ 408 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 409 IEEE80211_C_SHSLOT | /* short slot time supported */ 410 IEEE80211_C_WEP; /* s/w WEP */ 411 412 if (sc->rf_rev == RT2560_RF_5222) { 413 /* set supported .11a rates */ 414 ic->ic_sup_rates[IEEE80211_MODE_11A] = rt2560_rateset_11a; 415 416 /* set supported .11a channels */ 417 for (i = 36; i <= 64; i += 4) { 418 ic->ic_channels[i].ic_freq = 419 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 420 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 421 } 422 for (i = 100; i <= 140; i += 4) { 423 ic->ic_channels[i].ic_freq = 424 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 425 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 426 } 427 for (i = 149; i <= 161; i += 4) { 428 ic->ic_channels[i].ic_freq = 429 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 430 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 431 } 432 } 433 434 /* set supported .11b and .11g rates */ 435 ic->ic_sup_rates[IEEE80211_MODE_11B] = rt2560_rateset_11b; 436 ic->ic_sup_rates[IEEE80211_MODE_11G] = rt2560_rateset_11g; 437 438 /* set supported .11b and .11g channels (1 through 14) */ 439 for (i = 1; i <= 14; i++) { 440 ic->ic_channels[i].ic_freq = 441 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 442 ic->ic_channels[i].ic_flags = 443 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 444 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 445 } 446 447 ifp->if_softc = sc; 448 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 449 ifp->if_init = rt2560_init; 450 ifp->if_ioctl = rt2560_ioctl; 451 ifp->if_start = rt2560_start; 452 ifp->if_watchdog = rt2560_watchdog; 453 IFQ_SET_READY(&ifp->if_snd); 454 memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ); 455 456 if_attach(ifp); 457 ieee80211_ifattach(ifp); 458 ic->ic_node_alloc = rt2560_node_alloc; 459 ic->ic_node_copy = rt2560_node_copy; 460 461 /* override state transition machine */ 462 sc->sc_newstate = ic->ic_newstate; 463 ic->ic_newstate = rt2560_newstate; 464 ieee80211_media_init(ifp, rt2560_media_change, ieee80211_media_status); 465 466#if NBPFILTER > 0 467 bpfattach(&sc->sc_drvbpf, ifp, DLT_IEEE802_11_RADIO, 468 sizeof (struct ieee80211_frame) + 64); 469 470 sc->sc_rxtap_len = sizeof sc->sc_rxtapu; 471 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 472 sc->sc_rxtap.wr_ihdr.it_present = htole32(RT2560_RX_RADIOTAP_PRESENT); 473 474 sc->sc_txtap_len = sizeof sc->sc_txtapu; 475 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 476 sc->sc_txtap.wt_ihdr.it_present = htole32(RT2560_TX_RADIOTAP_PRESENT); 477#endif 478 479 return 0; 480 481fail5: rt2560_free_tx_ring(sc, &sc->bcnq); 482fail4: rt2560_free_tx_ring(sc, &sc->prioq); 483fail3: rt2560_free_tx_ring(sc, &sc->atimq); 484fail2: rt2560_free_tx_ring(sc, &sc->txq); 485fail1: return ENXIO; 486} 487 488int 489rt2560_detach(void *xsc) 490{ 491 struct rt2560_softc *sc = xsc; 492 struct ifnet *ifp = &sc->sc_ic.ic_if; 493 494 timeout_del(&sc->scan_ch); 495 timeout_del(&sc->rssadapt_ch); 496 497 ieee80211_ifdetach(ifp); /* free all nodes */ 498 if_detach(ifp); 499 500 rt2560_free_tx_ring(sc, &sc->txq); 501 rt2560_free_tx_ring(sc, &sc->atimq); 502 rt2560_free_tx_ring(sc, &sc->prioq); 503 rt2560_free_tx_ring(sc, &sc->bcnq); 504 rt2560_free_rx_ring(sc, &sc->rxq); 505 506 return 0; 507} 508 509int 510rt2560_alloc_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring, 511 int count) 512{ 513 int i, nsegs, error; 514 515 ring->count = count; 516 ring->queued = 0; 517 ring->cur = ring->next = 0; 518 ring->cur_encrypt = ring->next_encrypt = 0; 519 520 error = bus_dmamap_create(sc->sc_dmat, count * RT2560_TX_DESC_SIZE, 1, 521 count * RT2560_TX_DESC_SIZE, 0, BUS_DMA_NOWAIT, &ring->map); 522 if (error != 0) { 523 printf("%s: could not create desc DMA map\n", 524 sc->sc_dev.dv_xname); 525 goto fail; 526 } 527 528 error = bus_dmamem_alloc(sc->sc_dmat, count * RT2560_TX_DESC_SIZE, 529 PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT); 530 if (error != 0) { 531 printf("%s: could not allocate DMA memory\n", 532 sc->sc_dev.dv_xname); 533 goto fail; 534 } 535 536 error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs, 537 count * RT2560_TX_DESC_SIZE, (caddr_t *)&ring->desc, 538 BUS_DMA_NOWAIT); 539 if (error != 0) { 540 printf("%s: could not map desc DMA memory\n", 541 sc->sc_dev.dv_xname); 542 goto fail; 543 } 544 545 error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc, 546 count * RT2560_TX_DESC_SIZE, NULL, BUS_DMA_NOWAIT); 547 if (error != 0) { 548 printf("%s: could not load desc DMA map\n", 549 sc->sc_dev.dv_xname); 550 goto fail; 551 } 552 553 memset(ring->desc, 0, count * RT2560_TX_DESC_SIZE); 554 ring->physaddr = ring->map->dm_segs->ds_addr; 555 556 ring->data = malloc(count * sizeof (struct rt2560_tx_data), M_DEVBUF, 557 M_NOWAIT); 558 if (ring->data == NULL) { 559 printf("%s: could not allocate soft data\n", 560 sc->sc_dev.dv_xname); 561 error = ENOMEM; 562 goto fail; 563 } 564 565 memset(ring->data, 0, count * sizeof (struct rt2560_tx_data)); 566 for (i = 0; i < count; i++) { 567 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 568 RT2560_MAX_SCATTER, MCLBYTES, 0, BUS_DMA_NOWAIT, 569 &ring->data[i].map); 570 if (error != 0) { 571 printf("%s: could not create DMA map\n", 572 sc->sc_dev.dv_xname); 573 goto fail; 574 } 575 } 576 577 return 0; 578 579fail: rt2560_free_tx_ring(sc, ring); 580 return error; 581} 582 583void 584rt2560_reset_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring) 585{ 586 struct rt2560_tx_desc *desc; 587 struct rt2560_tx_data *data; 588 int i; 589 590 for (i = 0; i < ring->count; i++) { 591 desc = &ring->desc[i]; 592 data = &ring->data[i]; 593 594 if (data->m != NULL) { 595 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 596 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 597 bus_dmamap_unload(sc->sc_dmat, data->map); 598 m_freem(data->m); 599 data->m = NULL; 600 } 601 602 /* 603 * The node has already been freed at that point so don't call 604 * ieee80211_release_node() here. 605 */ 606 data->ni = NULL; 607 608 desc->flags = 0; 609 } 610 611 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 612 BUS_DMASYNC_PREWRITE); 613 614 ring->queued = 0; 615 ring->cur = ring->next = 0; 616 ring->cur_encrypt = ring->next_encrypt = 0; 617} 618 619void 620rt2560_free_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring) 621{ 622 struct rt2560_tx_data *data; 623 int i; 624 625 if (ring->desc != NULL) { 626 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, 627 ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 628 bus_dmamap_unload(sc->sc_dmat, ring->map); 629 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)ring->desc, 630 ring->count * RT2560_TX_DESC_SIZE); 631 bus_dmamem_free(sc->sc_dmat, &ring->seg, 1); 632 } 633 634 if (ring->data != NULL) { 635 for (i = 0; i < ring->count; i++) { 636 data = &ring->data[i]; 637 638 if (data->m != NULL) { 639 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 640 data->map->dm_mapsize, 641 BUS_DMASYNC_POSTWRITE); 642 bus_dmamap_unload(sc->sc_dmat, data->map); 643 m_freem(data->m); 644 } 645 646 /* 647 * The node has already been freed at that point so 648 * don't call ieee80211_release_node() here. 649 */ 650 data->ni = NULL; 651 652 if (data->map != NULL) 653 bus_dmamap_destroy(sc->sc_dmat, data->map); 654 } 655 free(ring->data, M_DEVBUF); 656 } 657} 658 659int 660rt2560_alloc_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring, 661 int count) 662{ 663 struct rt2560_rx_desc *desc; 664 struct rt2560_rx_data *data; 665 int i, nsegs, error; 666 667 ring->count = count; 668 ring->cur = ring->next = 0; 669 ring->cur_decrypt = 0; 670 671 error = bus_dmamap_create(sc->sc_dmat, count * RT2560_RX_DESC_SIZE, 1, 672 count * RT2560_RX_DESC_SIZE, 0, BUS_DMA_NOWAIT, &ring->map); 673 if (error != 0) { 674 printf("%s: could not create desc DMA map\n", 675 sc->sc_dev.dv_xname); 676 goto fail; 677 } 678 679 error = bus_dmamem_alloc(sc->sc_dmat, count * RT2560_RX_DESC_SIZE, 680 PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT); 681 if (error != 0) { 682 printf("%s: could not allocate DMA memory\n", 683 sc->sc_dev.dv_xname); 684 goto fail; 685 } 686 687 error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs, 688 count * RT2560_RX_DESC_SIZE, (caddr_t *)&ring->desc, 689 BUS_DMA_NOWAIT); 690 if (error != 0) { 691 printf("%s: could not map desc DMA memory\n", 692 sc->sc_dev.dv_xname); 693 goto fail; 694 } 695 696 error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc, 697 count * RT2560_RX_DESC_SIZE, NULL, BUS_DMA_NOWAIT); 698 if (error != 0) { 699 printf("%s: could not load desc DMA map\n", 700 sc->sc_dev.dv_xname); 701 goto fail; 702 } 703 704 memset(ring->desc, 0, count * RT2560_RX_DESC_SIZE); 705 ring->physaddr = ring->map->dm_segs->ds_addr; 706 707 ring->data = malloc(count * sizeof (struct rt2560_rx_data), M_DEVBUF, 708 M_NOWAIT); 709 if (ring->data == NULL) { 710 printf("%s: could not allocate soft data\n", 711 sc->sc_dev.dv_xname); 712 error = ENOMEM; 713 goto fail; 714 } 715 716 /* 717 * Pre-allocate Rx buffers and populate Rx ring. 718 */ 719 memset(ring->data, 0, count * sizeof (struct rt2560_rx_data)); 720 for (i = 0; i < count; i++) { 721 desc = &sc->rxq.desc[i]; 722 data = &sc->rxq.data[i]; 723 724 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES, 725 0, BUS_DMA_NOWAIT, &data->map); 726 if (error != 0) { 727 printf("%s: could not create DMA map\n", 728 sc->sc_dev.dv_xname); 729 goto fail; 730 } 731 732 MGETHDR(data->m, M_DONTWAIT, MT_DATA); 733 if (data->m == NULL) { 734 printf("%s: could not allocate rx mbuf\n", 735 sc->sc_dev.dv_xname); 736 error = ENOMEM; 737 goto fail; 738 } 739 740 MCLGET(data->m, M_DONTWAIT); 741 if (!(data->m->m_flags & M_EXT)) { 742 printf("%s: could not allocate rx mbuf cluster\n", 743 sc->sc_dev.dv_xname); 744 error = ENOMEM; 745 goto fail; 746 } 747 748 error = bus_dmamap_load(sc->sc_dmat, data->map, 749 mtod(data->m, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT); 750 if (error != 0) { 751 printf("%s: could not load rx buf DMA map", 752 sc->sc_dev.dv_xname); 753 goto fail; 754 } 755 756 desc->flags = htole32(RT2560_RX_BUSY); 757 desc->physaddr = htole32(data->map->dm_segs->ds_addr); 758 } 759 760 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 761 BUS_DMASYNC_PREWRITE); 762 763 return 0; 764 765fail: rt2560_free_rx_ring(sc, ring); 766 return error; 767} 768 769void 770rt2560_reset_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring) 771{ 772 int i; 773 774 for (i = 0; i < ring->count; i++) { 775 ring->desc[i].flags = htole32(RT2560_RX_BUSY); 776 ring->data[i].drop = 0; 777 } 778 779 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 780 BUS_DMASYNC_PREWRITE); 781 782 ring->cur = ring->next = 0; 783 ring->cur_decrypt = 0; 784} 785 786void 787rt2560_free_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring) 788{ 789 struct rt2560_rx_data *data; 790 int i; 791 792 if (ring->desc != NULL) { 793 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, 794 ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 795 bus_dmamap_unload(sc->sc_dmat, ring->map); 796 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)ring->desc, 797 ring->count * RT2560_RX_DESC_SIZE); 798 bus_dmamem_free(sc->sc_dmat, &ring->seg, 1); 799 } 800 801 if (ring->data != NULL) { 802 for (i = 0; i < ring->count; i++) { 803 data = &ring->data[i]; 804 805 if (data->m != NULL) { 806 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 807 data->map->dm_mapsize, 808 BUS_DMASYNC_POSTREAD); 809 bus_dmamap_unload(sc->sc_dmat, data->map); 810 m_freem(data->m); 811 } 812 813 if (data->map != NULL) 814 bus_dmamap_destroy(sc->sc_dmat, data->map); 815 } 816 free(ring->data, M_DEVBUF); 817 } 818} 819 820struct ieee80211_node * 821rt2560_node_alloc(struct ieee80211com *ic) 822{ 823 struct rt2560_node *rn; 824 825 rn = malloc(sizeof (struct rt2560_node), M_DEVBUF, M_NOWAIT); 826 if (rn == NULL) 827 return NULL; 828 829 memset(rn, 0, sizeof (struct rt2560_node)); 830 831 return &rn->ni; 832} 833 834void 835rt2560_node_copy(struct ieee80211com *ic, struct ieee80211_node *dst, 836 const struct ieee80211_node *src) 837{ 838 *(struct rt2560_node *)dst = *(const struct rt2560_node *)src; 839} 840 841int 842rt2560_media_change(struct ifnet *ifp) 843{ 844 int error; 845 846 error = ieee80211_media_change(ifp); 847 if (error != ENETRESET) 848 return error; 849 850 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 851 rt2560_init(ifp); 852 853 return 0; 854} 855 856/* 857 * This function is called periodically (every 200ms) during scanning to 858 * switch from one channel to another. 859 */ 860void 861rt2560_next_scan(void *arg) 862{ 863 struct rt2560_softc *sc = arg; 864 struct ieee80211com *ic = &sc->sc_ic; 865 struct ifnet *ifp = &ic->ic_if; 866 867 if (ic->ic_state == IEEE80211_S_SCAN) 868 ieee80211_next_scan(ifp); 869} 870 871/* 872 * This function is called for each neighbor node. 873 */ 874void 875rt2560_iter_func(void *arg, struct ieee80211_node *ni) 876{ 877 struct rt2560_node *rn = (struct rt2560_node *)ni; 878 879 ieee80211_rssadapt_updatestats(&rn->rssadapt); 880} 881 882/* 883 * This function is called periodically (every 100ms) in RUN state to update 884 * the rate adaptation statistics. 885 */ 886void 887rt2560_rssadapt_updatestats(void *arg) 888{ 889 struct rt2560_softc *sc = arg; 890 struct ieee80211com *ic = &sc->sc_ic; 891 892 ieee80211_iterate_nodes(ic, rt2560_iter_func, arg); 893 894 timeout_add(&sc->rssadapt_ch, hz / 10); 895} 896 897int 898rt2560_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg) 899{ 900 struct rt2560_softc *sc = ic->ic_if.if_softc; 901 enum ieee80211_state ostate; 902 struct ieee80211_node *ni; 903 struct mbuf *m; 904 int error = 0; 905 906 ostate = ic->ic_state; 907 timeout_del(&sc->scan_ch); 908 909 switch (nstate) { 910 case IEEE80211_S_INIT: 911 timeout_del(&sc->rssadapt_ch); 912 913 if (ostate == IEEE80211_S_RUN) { 914 /* abort TSF synchronization */ 915 RAL_WRITE(sc, RT2560_CSR14, 0); 916 917 /* turn association led off */ 918 rt2560_update_led(sc, 0, 0); 919 } 920 break; 921 922 case IEEE80211_S_SCAN: 923 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 924 timeout_add(&sc->scan_ch, hz / 5); 925 break; 926 927 case IEEE80211_S_AUTH: 928 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 929 break; 930 931 case IEEE80211_S_ASSOC: 932 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 933 break; 934 935 case IEEE80211_S_RUN: 936 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 937 938 ni = ic->ic_bss; 939 940 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 941 rt2560_update_slot(sc); 942 rt2560_set_basicrates(sc); 943 rt2560_set_bssid(sc, ni->ni_bssid); 944 } 945 946 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 947 ic->ic_opmode == IEEE80211_M_IBSS) { 948 m = ieee80211_beacon_alloc(ic, ni); 949 if (m == NULL) { 950 printf("%s: could not allocate beacon\n", 951 sc->sc_dev.dv_xname); 952 error = ENOBUFS; 953 break; 954 } 955 956 error = rt2560_tx_bcn(sc, m, ni); 957 if (error != 0) 958 break; 959 } 960 961 /* turn assocation led on */ 962 rt2560_update_led(sc, 1, 0); 963 964 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 965 timeout_add(&sc->rssadapt_ch, hz / 10); 966 rt2560_enable_tsf_sync(sc); 967 } 968 break; 969 } 970 971 return (error != 0) ? error : sc->sc_newstate(ic, nstate, arg); 972} 973 974/* 975 * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46 or 976 * 93C66). 977 */ 978uint16_t 979rt2560_eeprom_read(struct rt2560_softc *sc, uint8_t addr) 980{ 981 uint32_t tmp; 982 uint16_t val; 983 int n; 984 985 /* clock C once before the first command */ 986 RT2560_EEPROM_CTL(sc, 0); 987 988 RT2560_EEPROM_CTL(sc, RT2560_S); 989 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 990 RT2560_EEPROM_CTL(sc, RT2560_S); 991 992 /* write start bit (1) */ 993 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D); 994 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C); 995 996 /* write READ opcode (10) */ 997 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D); 998 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C); 999 RT2560_EEPROM_CTL(sc, RT2560_S); 1000 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 1001 1002 /* write address (A5-A0 or A7-A0) */ 1003 n = (RAL_READ(sc, RT2560_CSR21) & RT2560_93C46) ? 5 : 7; 1004 for (; n >= 0; n--) { 1005 RT2560_EEPROM_CTL(sc, RT2560_S | 1006 (((addr >> n) & 1) << RT2560_SHIFT_D)); 1007 RT2560_EEPROM_CTL(sc, RT2560_S | 1008 (((addr >> n) & 1) << RT2560_SHIFT_D) | RT2560_C); 1009 } 1010 1011 RT2560_EEPROM_CTL(sc, RT2560_S); 1012 1013 /* read data Q15-Q0 */ 1014 val = 0; 1015 for (n = 15; n >= 0; n--) { 1016 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 1017 tmp = RAL_READ(sc, RT2560_CSR21); 1018 val |= ((tmp & RT2560_Q) >> RT2560_SHIFT_Q) << n; 1019 RT2560_EEPROM_CTL(sc, RT2560_S); 1020 } 1021 1022 RT2560_EEPROM_CTL(sc, 0); 1023 1024 /* clear Chip Select and clock C */ 1025 RT2560_EEPROM_CTL(sc, RT2560_S); 1026 RT2560_EEPROM_CTL(sc, 0); 1027 RT2560_EEPROM_CTL(sc, RT2560_C); 1028 1029 return val; 1030} 1031 1032/* 1033 * Some frames were processed by the hardware cipher engine and are ready for 1034 * transmission. 1035 */ 1036void 1037rt2560_encryption_intr(struct rt2560_softc *sc) 1038{ 1039 struct rt2560_tx_desc *desc; 1040 int hw; 1041 1042 /* retrieve last descriptor index processed by cipher engine */ 1043 hw = (RAL_READ(sc, RT2560_SECCSR1) - sc->txq.physaddr) / 1044 RT2560_TX_DESC_SIZE; 1045 1046 for (; sc->txq.next_encrypt != hw;) { 1047 desc = &sc->txq.desc[sc->txq.next_encrypt]; 1048 1049 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1050 sc->txq.next_encrypt * RT2560_TX_DESC_SIZE, 1051 RT2560_TX_DESC_SIZE, BUS_DMASYNC_POSTREAD); 1052 1053 if (letoh32(desc->flags) & 1054 (RT2560_TX_BUSY | RT2560_TX_CIPHER_BUSY)) 1055 break; 1056 1057 /* for TKIP, swap eiv field to fix a bug in ASIC */ 1058 if ((letoh32(desc->flags) & RT2560_TX_CIPHER_MASK) == 1059 RT2560_TX_CIPHER_TKIP) 1060 desc->eiv = swap32(desc->eiv); 1061 1062 /* mark the frame ready for transmission */ 1063 desc->flags |= htole32(RT2560_TX_BUSY | RT2560_TX_VALID); 1064 1065 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1066 sc->txq.next_encrypt * RT2560_TX_DESC_SIZE, 1067 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 1068 1069 DPRINTFN(15, ("encryption done idx=%u\n", 1070 sc->txq.next_encrypt)); 1071 1072 sc->txq.next_encrypt = 1073 (sc->txq.next_encrypt + 1) % RT2560_TX_RING_COUNT; 1074 } 1075 1076 /* kick Tx */ 1077 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_TX); 1078} 1079 1080void 1081rt2560_tx_intr(struct rt2560_softc *sc) 1082{ 1083 struct ieee80211com *ic = &sc->sc_ic; 1084 struct ifnet *ifp = &ic->ic_if; 1085 struct rt2560_tx_desc *desc; 1086 struct rt2560_tx_data *data; 1087 struct rt2560_node *rn; 1088 1089 for (;;) { 1090 desc = &sc->txq.desc[sc->txq.next]; 1091 data = &sc->txq.data[sc->txq.next]; 1092 1093 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1094 sc->txq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1095 BUS_DMASYNC_POSTREAD); 1096 1097 if ((letoh32(desc->flags) & RT2560_TX_BUSY) || 1098 (letoh32(desc->flags) & RT2560_TX_CIPHER_BUSY) || 1099 !(letoh32(desc->flags) & RT2560_TX_VALID)) 1100 break; 1101 1102 rn = (struct rt2560_node *)data->ni; 1103 1104 switch (letoh32(desc->flags) & RT2560_TX_RESULT_MASK) { 1105 case RT2560_TX_SUCCESS: 1106 DPRINTFN(10, ("data frame sent successfully\n")); 1107 if (data->id.id_node != NULL) { 1108 ieee80211_rssadapt_raise_rate(ic, 1109 &rn->rssadapt, &data->id); 1110 } 1111 ifp->if_opackets++; 1112 break; 1113 1114 case RT2560_TX_SUCCESS_RETRY: 1115 DPRINTFN(9, ("data frame sent after %u retries\n", 1116 (letoh32(desc->flags) >> 5) & 0x7)); 1117 ifp->if_opackets++; 1118 break; 1119 1120 case RT2560_TX_FAIL_RETRY: 1121 DPRINTFN(9, ("sending data frame failed (too much " 1122 "retries)\n")); 1123 if (data->id.id_node != NULL) { 1124 ieee80211_rssadapt_lower_rate(ic, data->ni, 1125 &rn->rssadapt, &data->id); 1126 } 1127 ifp->if_oerrors++; 1128 break; 1129 1130 case RT2560_TX_FAIL_INVALID: 1131 case RT2560_TX_FAIL_OTHER: 1132 default: 1133 printf("%s: sending data frame failed 0x%08x\n", 1134 sc->sc_dev.dv_xname, letoh32(desc->flags)); 1135 ifp->if_oerrors++; 1136 } 1137 1138 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1139 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 1140 bus_dmamap_unload(sc->sc_dmat, data->map); 1141 m_freem(data->m); 1142 data->m = NULL; 1143 ieee80211_release_node(ic, data->ni); 1144 data->ni = NULL; 1145 1146 /* descriptor is no longer valid */ 1147 desc->flags &= ~htole32(RT2560_TX_VALID); 1148 1149 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1150 sc->txq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1151 BUS_DMASYNC_PREWRITE); 1152 1153 DPRINTFN(15, ("tx done idx=%u\n", sc->txq.next)); 1154 1155 sc->txq.queued--; 1156 sc->txq.next = (sc->txq.next + 1) % RT2560_TX_RING_COUNT; 1157 } 1158 1159 sc->sc_tx_timer = 0; 1160 ifp->if_flags &= ~IFF_OACTIVE; 1161 rt2560_start(ifp); 1162} 1163 1164void 1165rt2560_prio_intr(struct rt2560_softc *sc) 1166{ 1167 struct ieee80211com *ic = &sc->sc_ic; 1168 struct ifnet *ifp = &ic->ic_if; 1169 struct rt2560_tx_desc *desc; 1170 struct rt2560_tx_data *data; 1171 1172 for (;;) { 1173 desc = &sc->prioq.desc[sc->prioq.next]; 1174 data = &sc->prioq.data[sc->prioq.next]; 1175 1176 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1177 sc->prioq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1178 BUS_DMASYNC_POSTREAD); 1179 1180 if ((letoh32(desc->flags) & RT2560_TX_BUSY) || 1181 !(letoh32(desc->flags) & RT2560_TX_VALID)) 1182 break; 1183 1184 switch (letoh32(desc->flags) & RT2560_TX_RESULT_MASK) { 1185 case RT2560_TX_SUCCESS: 1186 DPRINTFN(10, ("mgt frame sent successfully\n")); 1187 break; 1188 1189 case RT2560_TX_SUCCESS_RETRY: 1190 DPRINTFN(9, ("mgt frame sent after %u retries\n", 1191 (letoh32(desc->flags) >> 5) & 0x7)); 1192 break; 1193 1194 case RT2560_TX_FAIL_RETRY: 1195 DPRINTFN(9, ("sending mgt frame failed (too much " 1196 "retries)\n")); 1197 break; 1198 1199 case RT2560_TX_FAIL_INVALID: 1200 case RT2560_TX_FAIL_OTHER: 1201 default: 1202 printf("%s: sending mgt frame failed 0x%08x\n", 1203 sc->sc_dev.dv_xname, letoh32(desc->flags)); 1204 } 1205 1206 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1207 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 1208 bus_dmamap_unload(sc->sc_dmat, data->map); 1209 m_freem(data->m); 1210 data->m = NULL; 1211 ieee80211_release_node(ic, data->ni); 1212 data->ni = NULL; 1213 1214 /* descriptor is no longer valid */ 1215 desc->flags &= ~htole32(RT2560_TX_VALID); 1216 1217 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1218 sc->prioq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1219 BUS_DMASYNC_PREWRITE); 1220 1221 DPRINTFN(15, ("prio done idx=%u\n", sc->prioq.next)); 1222 1223 sc->prioq.queued--; 1224 sc->prioq.next = (sc->prioq.next + 1) % RT2560_PRIO_RING_COUNT; 1225 } 1226 1227 sc->sc_tx_timer = 0; 1228 ifp->if_flags &= ~IFF_OACTIVE; 1229 rt2560_start(ifp); 1230} 1231 1232/* 1233 * Some frames were processed by the hardware cipher engine and are ready for 1234 * transmission to the IEEE802.11 layer. 1235 */ 1236void 1237rt2560_decryption_intr(struct rt2560_softc *sc) 1238{ 1239 struct ieee80211com *ic = &sc->sc_ic; 1240 struct ifnet *ifp = &ic->ic_if; 1241 struct rt2560_rx_desc *desc; 1242 struct rt2560_rx_data *data; 1243 struct rt2560_node *rn; 1244 struct ieee80211_frame *wh; 1245 struct ieee80211_node *ni; 1246 struct mbuf *mnew, *m; 1247 int hw, error; 1248 1249 /* retrieve last decriptor index processed by cipher engine */ 1250 hw = (RAL_READ(sc, RT2560_SECCSR0) - sc->rxq.physaddr) / 1251 RT2560_RX_DESC_SIZE; 1252 1253 for (; sc->rxq.cur_decrypt != hw;) { 1254 desc = &sc->rxq.desc[sc->rxq.cur_decrypt]; 1255 data = &sc->rxq.data[sc->rxq.cur_decrypt]; 1256 1257 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1258 sc->rxq.cur_decrypt * RT2560_TX_DESC_SIZE, 1259 RT2560_TX_DESC_SIZE, BUS_DMASYNC_POSTREAD); 1260 1261 if (letoh32(desc->flags) & 1262 (RT2560_RX_BUSY | RT2560_RX_CIPHER_BUSY)) 1263 break; 1264 1265 if (data->drop) { 1266 ifp->if_ierrors++; 1267 goto skip; 1268 } 1269 1270 if ((letoh32(desc->flags) & RT2560_RX_CIPHER_MASK) != 0 && 1271 (letoh32(desc->flags) & RT2560_RX_ICV_ERROR)) { 1272 ifp->if_ierrors++; 1273 goto skip; 1274 } 1275 1276 /* 1277 * Try to allocate a new mbuf for this ring element and load it 1278 * before processing the current mbuf. If the ring element 1279 * cannot be loaded, drop the received packet and reuse the old 1280 * mbuf. In the unlikely case that the old mbuf can't be 1281 * reloaded either, explicitly panic. 1282 */ 1283 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 1284 if (mnew == NULL) { 1285 ifp->if_ierrors++; 1286 goto skip; 1287 } 1288 1289 MCLGET(mnew, M_DONTWAIT); 1290 if (!(mnew->m_flags & M_EXT)) { 1291 m_freem(mnew); 1292 ifp->if_ierrors++; 1293 goto skip; 1294 } 1295 1296 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1297 data->map->dm_mapsize, BUS_DMASYNC_POSTREAD); 1298 bus_dmamap_unload(sc->sc_dmat, data->map); 1299 1300 error = bus_dmamap_load(sc->sc_dmat, data->map, 1301 mtod(mnew, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT); 1302 if (error != 0) { 1303 m_freem(mnew); 1304 1305 /* try to reload the old mbuf */ 1306 error = bus_dmamap_load(sc->sc_dmat, data->map, 1307 mtod(data->m, void *), MCLBYTES, NULL, 1308 BUS_DMA_NOWAIT); 1309 if (error != 0) { 1310 /* very unlikely that it will fail... */ 1311 panic("%s: could not load old rx mbuf", 1312 sc->sc_dev.dv_xname); 1313 } 1314 ifp->if_ierrors++; 1315 goto skip; 1316 } 1317 1318 /* 1319 * New mbuf successfully loaded, update Rx ring and continue 1320 * processing. 1321 */ 1322 m = data->m; 1323 data->m = mnew; 1324 desc->physaddr = htole32(data->map->dm_segs->ds_addr); 1325 1326 /* finalize mbuf */ 1327 m->m_pkthdr.rcvif = ifp; 1328 m->m_pkthdr.len = m->m_len = 1329 (letoh32(desc->flags) >> 16) & 0xfff; 1330 1331#if NBPFILTER > 0 1332 if (sc->sc_drvbpf != NULL) { 1333 struct mbuf mb; 1334 struct rt2560_rx_radiotap_header *tap = &sc->sc_rxtap; 1335 uint32_t tsf_lo, tsf_hi; 1336 1337 /* get timestamp (low and high 32 bits) */ 1338 tsf_hi = RAL_READ(sc, RT2560_CSR17); 1339 tsf_lo = RAL_READ(sc, RT2560_CSR16); 1340 1341 tap->wr_tsf = 1342 htole64(((uint64_t)tsf_hi << 32) | tsf_lo); 1343 tap->wr_flags = 0; 1344 tap->wr_rate = rt2560_rxrate(desc); 1345 tap->wr_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 1346 tap->wr_chan_flags = 1347 htole16(ic->ic_ibss_chan->ic_flags); 1348 tap->wr_antenna = sc->rx_ant; 1349 tap->wr_antsignal = desc->rssi; 1350 1351 M_DUP_PKTHDR(&mb, m); 1352 mb.m_data = (caddr_t)tap; 1353 mb.m_len = sc->sc_txtap_len; 1354 mb.m_next = m; 1355 mb.m_pkthdr.len += mb.m_len; 1356 bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_IN); 1357 } 1358#endif 1359 1360 wh = mtod(m, struct ieee80211_frame *); 1361 ni = ieee80211_find_rxnode(ic, wh); 1362 1363 /* send the frame to the 802.11 layer */ 1364 ieee80211_input(ifp, m, ni, desc->rssi, 0); 1365 1366 /* give rssi to the rate adatation algorithm */ 1367 rn = (struct rt2560_node *)ni; 1368 ieee80211_rssadapt_input(ic, ni, &rn->rssadapt, desc->rssi); 1369 1370 /* node is no longer needed */ 1371 ieee80211_release_node(ic, ni); 1372 1373skip: desc->flags = htole32(RT2560_RX_BUSY); 1374 1375 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1376 sc->rxq.cur_decrypt * RT2560_TX_DESC_SIZE, 1377 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 1378 1379 DPRINTFN(15, ("decryption done idx=%u\n", sc->rxq.cur_decrypt)); 1380 1381 sc->rxq.cur_decrypt = 1382 (sc->rxq.cur_decrypt + 1) % RT2560_RX_RING_COUNT; 1383 } 1384 1385 /* 1386 * In HostAP mode, ieee80211_input() will enqueue packets in if_snd 1387 * without calling if_start(). 1388 */ 1389 if (!IFQ_IS_EMPTY(&ifp->if_snd) && !(ifp->if_flags & IFF_OACTIVE)) 1390 rt2560_start(ifp); 1391} 1392 1393/* 1394 * Some frames were received. Pass them to the hardware cipher engine before 1395 * sending them to the 802.11 layer. 1396 */ 1397void 1398rt2560_rx_intr(struct rt2560_softc *sc) 1399{ 1400 struct rt2560_rx_desc *desc; 1401 struct rt2560_rx_data *data; 1402 1403 for (;;) { 1404 desc = &sc->rxq.desc[sc->rxq.cur]; 1405 data = &sc->rxq.data[sc->rxq.cur]; 1406 1407 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1408 sc->rxq.cur * RT2560_RX_DESC_SIZE, RT2560_RX_DESC_SIZE, 1409 BUS_DMASYNC_POSTREAD); 1410 1411 if (letoh32(desc->flags) & 1412 (RT2560_RX_BUSY | RT2560_RX_CIPHER_BUSY)) 1413 break; 1414 1415 data->drop = 0; 1416 1417 if (letoh32(desc->flags) & 1418 (RT2560_RX_PHY_ERROR | RT2560_RX_CRC_ERROR)) { 1419 /* 1420 * This should not happen since we did not request 1421 * to receive those frames when we filled RXCSR0. 1422 */ 1423 DPRINTFN(5, ("PHY or CRC error flags 0x%08x\n", 1424 letoh32(desc->flags))); 1425 data->drop = 1; 1426 } 1427 1428 if (((letoh32(desc->flags) >> 16) & 0xfff) > MCLBYTES) { 1429 DPRINTFN(5, ("bad length\n")); 1430 data->drop = 1; 1431 } 1432 1433 /* mark the frame for decryption */ 1434 desc->flags |= htole32(RT2560_RX_CIPHER_BUSY); 1435 1436 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1437 sc->rxq.cur * RT2560_RX_DESC_SIZE, RT2560_RX_DESC_SIZE, 1438 BUS_DMASYNC_PREWRITE); 1439 1440 DPRINTFN(15, ("rx done idx=%u\n", sc->rxq.cur)); 1441 1442 sc->rxq.cur = (sc->rxq.cur + 1) % RT2560_RX_RING_COUNT; 1443 } 1444 1445 /* kick decrypt */ 1446 RAL_WRITE(sc, RT2560_SECCSR0, RT2560_KICK_DECRYPT); 1447} 1448 1449/* 1450 * This function is called periodically in IBSS mode when a new beacon must be 1451 * sent out. 1452 */ 1453void 1454rt2560_beacon_expire(struct rt2560_softc *sc) 1455{ 1456 struct ieee80211com *ic = &sc->sc_ic; 1457 struct rt2560_tx_data *data; 1458 1459 if (ic->ic_opmode != IEEE80211_M_IBSS && 1460 ic->ic_opmode != IEEE80211_M_HOSTAP) 1461 return; 1462 1463 data = &sc->bcnq.data[sc->bcnq.next]; 1464 1465#if NBPFILTER > 0 1466 if (ic->ic_rawbpf != NULL) 1467 bpf_mtap(ic->ic_rawbpf, data->m, BPF_DIRECTION_OUT); 1468#endif 1469 1470 DPRINTFN(15, ("beacon expired\n")); 1471} 1472 1473void 1474rt2560_wakeup_expire(struct rt2560_softc *sc) 1475{ 1476 DPRINTFN(15, ("wakeup expired\n")); 1477} 1478 1479int 1480rt2560_intr(void *arg) 1481{ 1482 struct rt2560_softc *sc = arg; 1483 struct ifnet *ifp = &sc->sc_ic.ic_if; 1484 uint32_t r; 1485 1486 /* disable interrupts */ 1487 RAL_WRITE(sc, RT2560_CSR8, 0xffffffff); 1488 1489 /* don't re-enable interrupts if we're shutting down */ 1490 if (!(ifp->if_flags & IFF_RUNNING)) 1491 return 0; 1492 1493 r = RAL_READ(sc, RT2560_CSR7); 1494 RAL_WRITE(sc, RT2560_CSR7, r); 1495 1496 if (r & RT2560_BEACON_EXPIRE) 1497 rt2560_beacon_expire(sc); 1498 1499 if (r & RT2560_WAKEUP_EXPIRE) 1500 rt2560_wakeup_expire(sc); 1501 1502 if (r & RT2560_ENCRYPTION_DONE) 1503 rt2560_encryption_intr(sc); 1504 1505 if (r & RT2560_TX_DONE) 1506 rt2560_tx_intr(sc); 1507 1508 if (r & RT2560_PRIO_DONE) 1509 rt2560_prio_intr(sc); 1510 1511 if (r & RT2560_DECRYPTION_DONE) 1512 rt2560_decryption_intr(sc); 1513 1514 if (r & RT2560_RX_DONE) 1515 rt2560_rx_intr(sc); 1516 1517 /* re-enable interrupts */ 1518 RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK); 1519 1520 return 1; 1521} 1522 1523/* quickly determine if a given rate is CCK or OFDM */ 1524#define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22) 1525 1526#define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */ 1527#define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */ 1528 1529#define RAL_SIFS 10 /* us */ 1530 1531#define RT2560_RXTX_TURNAROUND 10 /* us */ 1532 1533/* 1534 * This function is only used by the Rx radiotap code. It returns the rate at 1535 * which a given frame was received. 1536 */ 1537#if NBPFILTER > 0 1538uint8_t 1539rt2560_rxrate(struct rt2560_rx_desc *desc) 1540{ 1541 if (letoh32(desc->flags) & RT2560_RX_OFDM) { 1542 /* reverse function of rt2560_plcp_signal */ 1543 switch (desc->rate) { 1544 case 0xb: return 12; 1545 case 0xf: return 18; 1546 case 0xa: return 24; 1547 case 0xe: return 36; 1548 case 0x9: return 48; 1549 case 0xd: return 72; 1550 case 0x8: return 96; 1551 case 0xc: return 108; 1552 } 1553 } else { 1554 if (desc->rate == 10) 1555 return 2; 1556 if (desc->rate == 20) 1557 return 4; 1558 if (desc->rate == 55) 1559 return 11; 1560 if (desc->rate == 110) 1561 return 22; 1562 } 1563 return 2; /* should not get there */ 1564} 1565#endif 1566 1567/* 1568 * Return the expected ack rate for a frame transmitted at rate `rate'. 1569 * XXX: this should depend on the destination node basic rate set. 1570 */ 1571int 1572rt2560_ack_rate(struct ieee80211com *ic, int rate) 1573{ 1574 switch (rate) { 1575 /* CCK rates */ 1576 case 2: 1577 return 2; 1578 case 4: 1579 case 11: 1580 case 22: 1581 return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate; 1582 1583 /* OFDM rates */ 1584 case 12: 1585 case 18: 1586 return 12; 1587 case 24: 1588 case 36: 1589 return 24; 1590 case 48: 1591 case 72: 1592 case 96: 1593 case 108: 1594 return 48; 1595 } 1596 1597 /* default to 1Mbps */ 1598 return 2; 1599} 1600 1601/* 1602 * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'. 1603 * The function automatically determines the operating mode depending on the 1604 * given rate. `flags' indicates whether short preamble is in use or not. 1605 */ 1606uint16_t 1607rt2560_txtime(int len, int rate, uint32_t flags) 1608{ 1609 uint16_t txtime; 1610 1611 if (RAL_RATE_IS_OFDM(rate)) { 1612 /* IEEE Std 802.11a-1999, pp. 37 */ 1613 txtime = (8 + 4 * len + 3 + rate - 1) / rate; 1614 txtime = 16 + 4 + 4 * txtime + 6; 1615 } else { 1616 /* IEEE Std 802.11b-1999, pp. 28 */ 1617 txtime = (16 * len + rate - 1) / rate; 1618 if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE)) 1619 txtime += 72 + 24; 1620 else 1621 txtime += 144 + 48; 1622 } 1623 return txtime; 1624} 1625 1626uint8_t 1627rt2560_plcp_signal(int rate) 1628{ 1629 switch (rate) { 1630 /* CCK rates (returned values are device-dependent) */ 1631 case 2: return 0x0; 1632 case 4: return 0x1; 1633 case 11: return 0x2; 1634 case 22: return 0x3; 1635 1636 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1637 case 12: return 0xb; 1638 case 18: return 0xf; 1639 case 24: return 0xa; 1640 case 36: return 0xe; 1641 case 48: return 0x9; 1642 case 72: return 0xd; 1643 case 96: return 0x8; 1644 case 108: return 0xc; 1645 1646 /* unsupported rates (should not get there) */ 1647 default: return 0xff; 1648 } 1649} 1650 1651void 1652rt2560_setup_tx_desc(struct rt2560_softc *sc, struct rt2560_tx_desc *desc, 1653 uint32_t flags, int len, int rate, int encrypt, bus_addr_t physaddr) 1654{ 1655 struct ieee80211com *ic = &sc->sc_ic; 1656 uint16_t plcp_length; 1657 int remainder; 1658 1659 desc->flags = htole32(flags); 1660 desc->flags |= htole32(len << 16); 1661 desc->flags |= encrypt ? htole32(RT2560_TX_CIPHER_BUSY) : 1662 htole32(RT2560_TX_BUSY | RT2560_TX_VALID); 1663 1664 desc->physaddr = htole32(physaddr); 1665 desc->wme = htole16( 1666 RT2560_AIFSN(2) | 1667 RT2560_LOGCWMIN(3) | 1668 RT2560_LOGCWMAX(8)); 1669 1670 /* setup PLCP fields */ 1671 desc->plcp_signal = rt2560_plcp_signal(rate); 1672 desc->plcp_service = 4; 1673 1674 len += IEEE80211_CRC_LEN; 1675 if (RAL_RATE_IS_OFDM(rate)) { 1676 desc->flags |= htole32(RT2560_TX_OFDM); 1677 1678 plcp_length = len & 0xfff; 1679 desc->plcp_length_hi = plcp_length >> 6; 1680 desc->plcp_length_lo = plcp_length & 0x3f; 1681 } else { 1682 plcp_length = (16 * len + rate - 1) / rate; 1683 if (rate == 22) { 1684 remainder = (16 * len) % 22; 1685 if (remainder != 0 && remainder < 7) 1686 desc->plcp_service |= RT2560_PLCP_LENGEXT; 1687 } 1688 desc->plcp_length_hi = plcp_length >> 8; 1689 desc->plcp_length_lo = plcp_length & 0xff; 1690 1691 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1692 desc->plcp_signal |= 0x08; 1693 } 1694} 1695 1696int 1697rt2560_tx_bcn(struct rt2560_softc *sc, struct mbuf *m0, 1698 struct ieee80211_node *ni) 1699{ 1700 struct rt2560_tx_desc *desc; 1701 struct rt2560_tx_data *data; 1702 int rate, error; 1703 1704 desc = &sc->bcnq.desc[sc->bcnq.cur]; 1705 data = &sc->bcnq.data[sc->bcnq.cur]; 1706 1707 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1708 1709 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1710 BUS_DMA_NOWAIT); 1711 if (error != 0) { 1712 printf("%s: could not map mbuf (error %d)\n", 1713 sc->sc_dev.dv_xname, error); 1714 m_freem(m0); 1715 return error; 1716 } 1717 1718 data->m = m0; 1719 data->ni = ni; 1720 1721 rt2560_setup_tx_desc(sc, desc, RT2560_TX_IFS_NEWBACKOFF | 1722 RT2560_TX_TIMESTAMP, m0->m_pkthdr.len, rate, 0, 1723 data->map->dm_segs->ds_addr); 1724 1725 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 1726 BUS_DMASYNC_PREWRITE); 1727 bus_dmamap_sync(sc->sc_dmat, sc->bcnq.map, 1728 sc->bcnq.cur * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1729 BUS_DMASYNC_PREWRITE); 1730 1731 return 0; 1732} 1733 1734int 1735rt2560_tx_mgt(struct rt2560_softc *sc, struct mbuf *m0, 1736 struct ieee80211_node *ni) 1737{ 1738 struct ieee80211com *ic = &sc->sc_ic; 1739 struct rt2560_tx_desc *desc; 1740 struct rt2560_tx_data *data; 1741 struct ieee80211_frame *wh; 1742 uint16_t dur; 1743 uint32_t flags = 0; 1744 int rate, error; 1745 1746 desc = &sc->prioq.desc[sc->prioq.cur]; 1747 data = &sc->prioq.data[sc->prioq.cur]; 1748 1749 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1750 1751 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1752 BUS_DMA_NOWAIT); 1753 if (error != 0) { 1754 printf("%s: could not map mbuf (error %d)\n", 1755 sc->sc_dev.dv_xname, error); 1756 m_freem(m0); 1757 return error; 1758 } 1759 1760#if NBPFILTER > 0 1761 if (sc->sc_drvbpf != NULL) { 1762 struct mbuf mb; 1763 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap; 1764 1765 tap->wt_flags = 0; 1766 tap->wt_rate = rate; 1767 tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 1768 tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags); 1769 tap->wt_antenna = sc->tx_ant; 1770 1771 M_DUP_PKTHDR(&mb, m0); 1772 mb.m_data = (caddr_t)tap; 1773 mb.m_len = sc->sc_txtap_len; 1774 mb.m_next = m0; 1775 mb.m_pkthdr.len += mb.m_len; 1776 bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_OUT); 1777 } 1778#endif 1779 1780 data->m = m0; 1781 data->ni = ni; 1782 1783 wh = mtod(m0, struct ieee80211_frame *); 1784 1785 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1786 flags |= RT2560_TX_ACK; 1787 1788 dur = rt2560_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) + 1789 RAL_SIFS; 1790 *(uint16_t *)wh->i_dur = htole16(dur); 1791 1792 /* tell hardware to add timestamp for probe responses */ 1793 if ((wh->i_fc[0] & 1794 (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) == 1795 (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP)) 1796 flags |= RT2560_TX_TIMESTAMP; 1797 } 1798 1799 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 0, 1800 data->map->dm_segs->ds_addr); 1801 1802 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 1803 BUS_DMASYNC_PREWRITE); 1804 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1805 sc->prioq.cur * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1806 BUS_DMASYNC_PREWRITE); 1807 1808 DPRINTFN(10, ("sending mgt frame len=%u idx=%u rate=%u\n", 1809 m0->m_pkthdr.len, sc->prioq.cur, rate)); 1810 1811 /* kick prio */ 1812 sc->prioq.queued++; 1813 sc->prioq.cur = (sc->prioq.cur + 1) % RT2560_PRIO_RING_COUNT; 1814 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_PRIO); 1815 1816 return 0; 1817} 1818 1819/* 1820 * Build a RTS control frame. 1821 */ 1822struct mbuf * 1823rt2560_get_rts(struct rt2560_softc *sc, struct ieee80211_frame *wh, 1824 uint16_t dur) 1825{ 1826 struct ieee80211_frame_rts *rts; 1827 struct mbuf *m; 1828 1829 MGETHDR(m, M_DONTWAIT, MT_DATA); 1830 if (m == NULL) { 1831 sc->sc_ic.ic_stats.is_tx_nombuf++; 1832 printf("%s: could not allocate RTS frame\n", 1833 sc->sc_dev.dv_xname); 1834 return NULL; 1835 } 1836 1837 rts = mtod(m, struct ieee80211_frame_rts *); 1838 1839 rts->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_CTL | 1840 IEEE80211_FC0_SUBTYPE_RTS; 1841 rts->i_fc[1] = IEEE80211_FC1_DIR_NODS; 1842 *(uint16_t *)rts->i_dur = htole16(dur); 1843 IEEE80211_ADDR_COPY(rts->i_ra, wh->i_addr1); 1844 IEEE80211_ADDR_COPY(rts->i_ta, wh->i_addr2); 1845 1846 m->m_pkthdr.len = m->m_len = sizeof (struct ieee80211_frame_rts); 1847 1848 return m; 1849} 1850 1851int 1852rt2560_tx_data(struct rt2560_softc *sc, struct mbuf *m0, 1853 struct ieee80211_node *ni) 1854{ 1855 struct ieee80211com *ic = &sc->sc_ic; 1856 struct ifnet *ifp = &ic->ic_if; 1857 struct rt2560_tx_desc *desc; 1858 struct rt2560_tx_data *data; 1859 struct rt2560_node *rn; 1860 struct ieee80211_rateset *rs; 1861 struct ieee80211_frame *wh; 1862 struct mbuf *mnew; 1863 uint16_t dur; 1864 uint32_t flags = 0; 1865 int rate, error; 1866 1867 wh = mtod(m0, struct ieee80211_frame *); 1868 1869 /* XXX this should be reworked! */ 1870 if (ic->ic_fixed_rate != -1) { 1871 if (ic->ic_curmode != IEEE80211_MODE_AUTO) 1872 rs = &ic->ic_sup_rates[ic->ic_curmode]; 1873 else 1874 rs = &ic->ic_sup_rates[IEEE80211_MODE_11G]; 1875 1876 rate = rs->rs_rates[ic->ic_fixed_rate]; 1877 } else { 1878 rs = &ni->ni_rates; 1879 rn = (struct rt2560_node *)ni; 1880 ni->ni_txrate = ieee80211_rssadapt_choose(&rn->rssadapt, rs, 1881 wh, m0->m_pkthdr.len, -1, NULL, 0); 1882 rate = rs->rs_rates[ni->ni_txrate]; 1883 } 1884 rate &= IEEE80211_RATE_VAL; 1885 if (rate == 0) 1886 rate = 2; /* fallback to 1Mbps; should not happen */ 1887 1888 if (ic->ic_flags & IEEE80211_F_WEPON) { 1889 m0 = ieee80211_wep_crypt(ifp, m0, 1); 1890 if (m0 == NULL) 1891 return ENOBUFS; 1892 1893 /* packet header may have moved, reset our local pointer */ 1894 wh = mtod(m0, struct ieee80211_frame *); 1895 } 1896 1897 /* 1898 * IEEE Std 802.11-1999, pp 82: "A STA shall use an RTS/CTS exchange 1899 * for directed frames only when the length of the MPDU is greater 1900 * than the length threshold indicated by [...]" ic_rtsthreshold. 1901 */ 1902 if (!IEEE80211_IS_MULTICAST(wh->i_addr1) && 1903 m0->m_pkthdr.len > ic->ic_rtsthreshold) { 1904 struct mbuf *m; 1905 uint16_t dur; 1906 int rtsrate, ackrate; 1907 1908 rtsrate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1909 ackrate = rt2560_ack_rate(ic, rate); 1910 1911 dur = rt2560_txtime(m0->m_pkthdr.len + 4, rate, ic->ic_flags) + 1912 rt2560_txtime(RAL_CTS_SIZE, rtsrate, ic->ic_flags) + 1913 rt2560_txtime(RAL_ACK_SIZE, ackrate, ic->ic_flags) + 1914 3 * RAL_SIFS; 1915 1916 m = rt2560_get_rts(sc, wh, dur); 1917 1918 desc = &sc->txq.desc[sc->txq.cur_encrypt]; 1919 data = &sc->txq.data[sc->txq.cur_encrypt]; 1920 1921 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m, 1922 BUS_DMA_NOWAIT); 1923 if (error != 0) { 1924 printf("%s: could not map mbuf (error %d)\n", 1925 sc->sc_dev.dv_xname, error); 1926 m_freem(m); 1927 m_freem(m0); 1928 return error; 1929 } 1930 1931 /* avoid multiple free() of the same node for each fragment */ 1932 ieee80211_ref_node(ni); 1933 1934 data->m = m; 1935 data->ni = ni; 1936 1937 /* RTS frames are not taken into account for rssadapt */ 1938 data->id.id_node = NULL; 1939 1940 rt2560_setup_tx_desc(sc, desc, RT2560_TX_ACK | 1941 RT2560_TX_MORE_FRAG, m->m_pkthdr.len, rtsrate, 1, 1942 data->map->dm_segs->ds_addr); 1943 1944 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1945 data->map->dm_mapsize, BUS_DMASYNC_PREWRITE); 1946 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1947 sc->txq.cur_encrypt * RT2560_TX_DESC_SIZE, 1948 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 1949 1950 sc->txq.queued++; 1951 sc->txq.cur_encrypt = 1952 (sc->txq.cur_encrypt + 1) % RT2560_TX_RING_COUNT; 1953 1954 /* 1955 * IEEE Std 802.11-1999: when an RTS/CTS exchange is used, the 1956 * asynchronous data frame shall be transmitted after the CTS 1957 * frame and a SIFS period. 1958 */ 1959 flags |= RT2560_TX_LONG_RETRY | RT2560_TX_IFS_SIFS; 1960 } 1961 1962 data = &sc->txq.data[sc->txq.cur_encrypt]; 1963 desc = &sc->txq.desc[sc->txq.cur_encrypt]; 1964 1965 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1966 BUS_DMA_NOWAIT); 1967 if (error != 0 && error != EFBIG) { 1968 printf("%s: could not map mbuf (error %d)\n", 1969 sc->sc_dev.dv_xname, error); 1970 m_freem(m0); 1971 return error; 1972 } 1973 if (error != 0) { 1974 /* too many fragments, linearize */ 1975 1976 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 1977 if (mnew == NULL) { 1978 m_freem(m0); 1979 return ENOMEM; 1980 } 1981 1982 M_DUP_PKTHDR(mnew, m0); 1983 if (m0->m_pkthdr.len > MHLEN) { 1984 MCLGET(mnew, M_DONTWAIT); 1985 if (!(mnew->m_flags & M_EXT)) { 1986 m_freem(m0); 1987 m_freem(mnew); 1988 return ENOMEM; 1989 } 1990 } 1991 1992 m_copydata(m0, 0, m0->m_pkthdr.len, mtod(mnew, caddr_t)); 1993 m_freem(m0); 1994 mnew->m_len = mnew->m_pkthdr.len; 1995 m0 = mnew; 1996 1997 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1998 BUS_DMA_NOWAIT); 1999 if (error != 0) { 2000 printf("%s: could not map mbuf (error %d)\n", 2001 sc->sc_dev.dv_xname, error); 2002 m_freem(m0); 2003 return error; 2004 } 2005 2006 /* packet header have moved, reset our local pointer */ 2007 wh = mtod(m0, struct ieee80211_frame *); 2008 } 2009 2010#if NBPFILTER > 0 2011 if (sc->sc_drvbpf != NULL) { 2012 struct mbuf mb; 2013 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap; 2014 2015 tap->wt_flags = 0; 2016 tap->wt_rate = rate; 2017 tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 2018 tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags); 2019 tap->wt_antenna = sc->tx_ant; 2020 2021 M_DUP_PKTHDR(&mb, m0); 2022 mb.m_data = (caddr_t)tap; 2023 mb.m_len = sc->sc_txtap_len; 2024 mb.m_next = m0; 2025 mb.m_pkthdr.len += mb.m_len; 2026 bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_OUT); 2027 } 2028#endif 2029 2030 data->m = m0; 2031 data->ni = ni; 2032 2033 /* remember link conditions for rate adaptation algorithm */ 2034 if (ic->ic_fixed_rate == -1) { 2035 data->id.id_len = m0->m_pkthdr.len; 2036 data->id.id_rateidx = ni->ni_txrate; 2037 data->id.id_node = ni; 2038 data->id.id_rssi = ni->ni_rssi; 2039 } else 2040 data->id.id_node = NULL; 2041 2042 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 2043 flags |= RT2560_TX_ACK; 2044 2045 dur = rt2560_txtime(RAL_ACK_SIZE, rt2560_ack_rate(ic, rate), 2046 ic->ic_flags) + RAL_SIFS; 2047 *(uint16_t *)wh->i_dur = htole16(dur); 2048 } 2049 2050 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 1, 2051 data->map->dm_segs->ds_addr); 2052 2053 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 2054 BUS_DMASYNC_PREWRITE); 2055 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 2056 sc->txq.cur_encrypt * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 2057 BUS_DMASYNC_PREWRITE); 2058 2059 DPRINTFN(10, ("sending data frame len=%u idx=%u rate=%u\n", 2060 m0->m_pkthdr.len, sc->txq.cur_encrypt, rate)); 2061 2062 /* kick encrypt */ 2063 sc->txq.queued++; 2064 sc->txq.cur_encrypt = (sc->txq.cur_encrypt + 1) % RT2560_TX_RING_COUNT; 2065 RAL_WRITE(sc, RT2560_SECCSR1, RT2560_KICK_ENCRYPT); 2066 2067 return 0; 2068} 2069 2070void 2071rt2560_start(struct ifnet *ifp) 2072{ 2073 struct rt2560_softc *sc = ifp->if_softc; 2074 struct ieee80211com *ic = &sc->sc_ic; 2075 struct mbuf *m0; 2076 struct ieee80211_node *ni; 2077 2078 /* 2079 * net80211 may still try to send management frames even if the 2080 * IFF_RUNNING flag is not set... 2081 */ 2082 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 2083 return; 2084 2085 for (;;) { 2086 IF_POLL(&ic->ic_mgtq, m0); 2087 if (m0 != NULL) { 2088 if (sc->prioq.queued >= RT2560_PRIO_RING_COUNT) { 2089 ifp->if_flags |= IFF_OACTIVE; 2090 break; 2091 } 2092 IF_DEQUEUE(&ic->ic_mgtq, m0); 2093 2094 ni = (struct ieee80211_node *)m0->m_pkthdr.rcvif; 2095 m0->m_pkthdr.rcvif = NULL; 2096#if NBPFILTER > 0 2097 if (ic->ic_rawbpf != NULL) 2098 bpf_mtap(ic->ic_rawbpf, m0, 2099 BPF_DIRECTION_OUT); 2100#endif 2101 if (rt2560_tx_mgt(sc, m0, ni) != 0) 2102 break; 2103 2104 } else { 2105 if (ic->ic_state != IEEE80211_S_RUN) 2106 break; 2107 IFQ_DEQUEUE(&ifp->if_snd, m0); 2108 if (m0 == NULL) 2109 break; 2110 if (sc->txq.queued >= RT2560_TX_RING_COUNT - 1) { 2111 IF_PREPEND(&ifp->if_snd, m0); 2112 ifp->if_flags |= IFF_OACTIVE; 2113 break; 2114 } 2115#if NBPFILTER > 0 2116 if (ifp->if_bpf != NULL) 2117 bpf_mtap(ifp->if_bpf, m0, BPF_DIRECTION_OUT); 2118#endif 2119 m0 = ieee80211_encap(ifp, m0, &ni); 2120 if (m0 == NULL) 2121 continue; 2122#if NBPFILTER > 0 2123 if (ic->ic_rawbpf != NULL) 2124 bpf_mtap(ic->ic_rawbpf, m0, 2125 BPF_DIRECTION_OUT); 2126#endif 2127 if (rt2560_tx_data(sc, m0, ni) != 0) { 2128 if (ni != NULL) 2129 ieee80211_release_node(ic, ni); 2130 ifp->if_oerrors++; 2131 break; 2132 } 2133 } 2134 2135 sc->sc_tx_timer = 5; 2136 ifp->if_timer = 1; 2137 } 2138} 2139 2140void 2141rt2560_watchdog(struct ifnet *ifp) 2142{ 2143 struct rt2560_softc *sc = ifp->if_softc; 2144 2145 ifp->if_timer = 0; 2146 2147 if (sc->sc_tx_timer > 0) { 2148 if (--sc->sc_tx_timer == 0) { 2149 printf("%s: device timeout\n", sc->sc_dev.dv_xname); 2150 rt2560_init(ifp); 2151 ifp->if_oerrors++; 2152 return; 2153 } 2154 ifp->if_timer = 1; 2155 } 2156 2157 ieee80211_watchdog(ifp); 2158} 2159 2160int 2161rt2560_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 2162{ 2163 struct rt2560_softc *sc = ifp->if_softc; 2164 struct ieee80211com *ic = &sc->sc_ic; 2165 struct ifaddr *ifa; 2166 struct ifreq *ifr; 2167 int s, error = 0; 2168 2169 s = splnet(); 2170 2171 switch (cmd) { 2172 case SIOCSIFADDR: 2173 ifa = (struct ifaddr *)data; 2174 ifp->if_flags |= IFF_UP; 2175#ifdef INET 2176 if (ifa->ifa_addr->sa_family == AF_INET) 2177 arp_ifinit(&ic->ic_ac, ifa); 2178#endif 2179 /* FALLTHROUGH */ 2180 case SIOCSIFFLAGS: 2181 if (ifp->if_flags & IFF_UP) { 2182 if (ifp->if_flags & IFF_RUNNING) 2183 rt2560_update_promisc(sc); 2184 else 2185 rt2560_init(ifp); 2186 } else { 2187 if (ifp->if_flags & IFF_RUNNING) 2188 rt2560_stop(ifp, 1); 2189 } 2190 break; 2191 2192 case SIOCADDMULTI: 2193 case SIOCDELMULTI: 2194 ifr = (struct ifreq *)data; 2195 error = (cmd == SIOCADDMULTI) ? 2196 ether_addmulti(ifr, &ic->ic_ac) : 2197 ether_delmulti(ifr, &ic->ic_ac); 2198 2199 if (error == ENETRESET) 2200 error = 0; 2201 break; 2202 2203 case SIOCS80211CHANNEL: 2204 /* 2205 * This allows for fast channel switching in monitor mode 2206 * (used by kismet). In IBSS mode, we must explicitly reset 2207 * the interface to generate a new beacon frame. 2208 */ 2209 error = ieee80211_ioctl(ifp, cmd, data); 2210 if (error == ENETRESET && 2211 ic->ic_opmode == IEEE80211_M_MONITOR) { 2212 rt2560_set_chan(sc, ic->ic_ibss_chan); 2213 error = 0; 2214 } 2215 break; 2216 2217 default: 2218 error = ieee80211_ioctl(ifp, cmd, data); 2219 } 2220 2221 if (error == ENETRESET) { 2222 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 2223 (IFF_UP | IFF_RUNNING)) 2224 rt2560_init(ifp); 2225 error = 0; 2226 } 2227 2228 splx(s); 2229 2230 return error; 2231} 2232 2233void 2234rt2560_bbp_write(struct rt2560_softc *sc, uint8_t reg, uint8_t val) 2235{ 2236 uint32_t tmp; 2237 int ntries; 2238 2239 for (ntries = 0; ntries < 100; ntries++) { 2240 if (!(RAL_READ(sc, RT2560_BBPCSR) & RT2560_BBP_BUSY)) 2241 break; 2242 DELAY(1); 2243 } 2244 if (ntries == 100) { 2245 printf("%s: could not write to BBP\n", sc->sc_dev.dv_xname); 2246 return; 2247 } 2248 2249 tmp = RT2560_BBP_WRITE | RT2560_BBP_BUSY | reg << 8 | val; 2250 RAL_WRITE(sc, RT2560_BBPCSR, tmp); 2251 2252 DPRINTFN(15, ("BBP R%u <- 0x%02x\n", reg, val)); 2253} 2254 2255uint8_t 2256rt2560_bbp_read(struct rt2560_softc *sc, uint8_t reg) 2257{ 2258 uint32_t val; 2259 int ntries; 2260 2261 val = RT2560_BBP_BUSY | reg << 8; 2262 RAL_WRITE(sc, RT2560_BBPCSR, val); 2263 2264 for (ntries = 0; ntries < 100; ntries++) { 2265 val = RAL_READ(sc, RT2560_BBPCSR); 2266 if (!(val & RT2560_BBP_BUSY)) 2267 return val & 0xff; 2268 DELAY(1); 2269 } 2270 2271 printf("%s: could not read from BBP\n", sc->sc_dev.dv_xname); 2272 return 0; 2273} 2274 2275void 2276rt2560_rf_write(struct rt2560_softc *sc, uint8_t reg, uint32_t val) 2277{ 2278 uint32_t tmp; 2279 int ntries; 2280 2281 for (ntries = 0; ntries < 100; ntries++) { 2282 if (!(RAL_READ(sc, RT2560_RFCSR) & RT2560_RF_BUSY)) 2283 break; 2284 DELAY(1); 2285 } 2286 if (ntries == 100) { 2287 printf("%s: could not write to RF\n", sc->sc_dev.dv_xname); 2288 return; 2289 } 2290 2291 tmp = RT2560_RF_BUSY | RT2560_RF_20BIT | (val & 0xfffff) << 2 | 2292 (reg & 0x3); 2293 RAL_WRITE(sc, RT2560_RFCSR, tmp); 2294 2295 /* remember last written value in sc */ 2296 sc->rf_regs[reg] = val; 2297 2298 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff)); 2299} 2300 2301void 2302rt2560_set_chan(struct rt2560_softc *sc, struct ieee80211_channel *c) 2303{ 2304 struct ieee80211com *ic = &sc->sc_ic; 2305 uint8_t power, tmp; 2306 u_int i, chan; 2307 2308 chan = ieee80211_chan2ieee(ic, c); 2309 if (chan == 0 || chan == IEEE80211_CHAN_ANY) 2310 return; 2311 2312 if (IEEE80211_IS_CHAN_2GHZ(c)) 2313 power = min(sc->txpow[chan - 1], 31); 2314 else 2315 power = 31; 2316 2317 DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power)); 2318 2319 switch (sc->rf_rev) { 2320 case RT2560_RF_2522: 2321 rt2560_rf_write(sc, RT2560_RF1, 0x00814); 2322 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2522_r2[chan - 1]); 2323 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040); 2324 break; 2325 2326 case RT2560_RF_2523: 2327 rt2560_rf_write(sc, RT2560_RF1, 0x08804); 2328 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2523_r2[chan - 1]); 2329 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x38044); 2330 rt2560_rf_write(sc, RT2560_RF4, 2331 (chan == 14) ? 0x00280 : 0x00286); 2332 break; 2333 2334 case RT2560_RF_2524: 2335 rt2560_rf_write(sc, RT2560_RF1, 0x0c808); 2336 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2524_r2[chan - 1]); 2337 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040); 2338 rt2560_rf_write(sc, RT2560_RF4, 2339 (chan == 14) ? 0x00280 : 0x00286); 2340 break; 2341 2342 case RT2560_RF_2525: 2343 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2344 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525_hi_r2[chan - 1]); 2345 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2346 rt2560_rf_write(sc, RT2560_RF4, 2347 (chan == 14) ? 0x00280 : 0x00286); 2348 2349 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2350 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525_r2[chan - 1]); 2351 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2352 rt2560_rf_write(sc, RT2560_RF4, 2353 (chan == 14) ? 0x00280 : 0x00286); 2354 break; 2355 2356 case RT2560_RF_2525E: 2357 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2358 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525e_r2[chan - 1]); 2359 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2360 rt2560_rf_write(sc, RT2560_RF4, 2361 (chan == 14) ? 0x00286 : 0x00282); 2362 break; 2363 2364 case RT2560_RF_2526: 2365 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2526_hi_r2[chan - 1]); 2366 rt2560_rf_write(sc, RT2560_RF4, 2367 (chan & 1) ? 0x00386 : 0x00381); 2368 rt2560_rf_write(sc, RT2560_RF1, 0x08804); 2369 2370 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2526_r2[chan - 1]); 2371 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2372 rt2560_rf_write(sc, RT2560_RF4, 2373 (chan & 1) ? 0x00386 : 0x00381); 2374 break; 2375 2376 /* dual-band RF */ 2377 case RT2560_RF_5222: 2378 for (i = 0; rt2560_rf5222[i].chan != chan; i++); 2379 2380 rt2560_rf_write(sc, RT2560_RF1, rt2560_rf5222[i].r1); 2381 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf5222[i].r2); 2382 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040); 2383 rt2560_rf_write(sc, RT2560_RF4, rt2560_rf5222[i].r4); 2384 break; 2385 } 2386 2387 if (ic->ic_opmode != IEEE80211_M_MONITOR && 2388 ic->ic_state != IEEE80211_S_SCAN) { 2389 /* set Japan filter bit for channel 14 */ 2390 tmp = rt2560_bbp_read(sc, 70); 2391 2392 tmp &= ~RT2560_JAPAN_FILTER; 2393 if (chan == 14) 2394 tmp |= RT2560_JAPAN_FILTER; 2395 2396 rt2560_bbp_write(sc, 70, tmp); 2397 2398 DELAY(1000); /* RF needs a 1ms delay here */ 2399 rt2560_disable_rf_tune(sc); 2400 2401 /* clear CRC errors */ 2402 RAL_READ(sc, RT2560_CNT0); 2403 } 2404} 2405 2406/* 2407 * Disable RF auto-tuning. 2408 */ 2409void 2410rt2560_disable_rf_tune(struct rt2560_softc *sc) 2411{ 2412 uint32_t tmp; 2413 2414 if (sc->rf_rev != RT2560_RF_2523) { 2415 tmp = sc->rf_regs[RT2560_RF1] & ~RT2560_RF1_AUTOTUNE; 2416 rt2560_rf_write(sc, RT2560_RF1, tmp); 2417 } 2418 2419 tmp = sc->rf_regs[RT2560_RF3] & ~RT2560_RF3_AUTOTUNE; 2420 rt2560_rf_write(sc, RT2560_RF3, tmp); 2421 2422 DPRINTFN(2, ("disabling RF autotune\n")); 2423} 2424 2425/* 2426 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF 2427 * synchronization. 2428 */ 2429void 2430rt2560_enable_tsf_sync(struct rt2560_softc *sc) 2431{ 2432 struct ieee80211com *ic = &sc->sc_ic; 2433 uint16_t logcwmin, preload; 2434 uint32_t tmp; 2435 2436 /* first, disable TSF synchronization */ 2437 RAL_WRITE(sc, RT2560_CSR14, 0); 2438 2439 tmp = 16 * ic->ic_bss->ni_intval; 2440 RAL_WRITE(sc, RT2560_CSR12, tmp); 2441 2442 RAL_WRITE(sc, RT2560_CSR13, 0); 2443 2444 logcwmin = 5; 2445 preload = (ic->ic_opmode == IEEE80211_M_STA) ? 384 : 1024; 2446 tmp = logcwmin << 16 | preload; 2447 RAL_WRITE(sc, RT2560_BCNOCSR, tmp); 2448 2449 /* finally, enable TSF synchronization */ 2450 tmp = RT2560_ENABLE_TSF | RT2560_ENABLE_TBCN; 2451 if (ic->ic_opmode == IEEE80211_M_STA) 2452 tmp |= RT2560_ENABLE_TSF_SYNC(1); 2453 else 2454 tmp |= RT2560_ENABLE_TSF_SYNC(2) | 2455 RT2560_ENABLE_BEACON_GENERATOR; 2456 RAL_WRITE(sc, RT2560_CSR14, tmp); 2457 2458 DPRINTF(("enabling TSF synchronization\n")); 2459} 2460 2461void 2462rt2560_update_plcp(struct rt2560_softc *sc) 2463{ 2464 struct ieee80211com *ic = &sc->sc_ic; 2465 2466 /* no short preamble for 1Mbps */ 2467 RAL_WRITE(sc, RT2560_PLCP1MCSR, 0x00700400); 2468 2469 if (!(ic->ic_flags & IEEE80211_F_SHPREAMBLE)) { 2470 /* values taken from the reference driver */ 2471 RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380401); 2472 RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x00150402); 2473 RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b8403); 2474 } else { 2475 /* same values as above or'ed 0x8 */ 2476 RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380409); 2477 RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x0015040a); 2478 RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b840b); 2479 } 2480 2481 DPRINTF(("updating PLCP for %s preamble\n", 2482 (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ? "short" : "long")); 2483} 2484 2485/* 2486 * IEEE 802.11a uses short slot time. Refer to IEEE Std 802.11-1999 pp. 85 to 2487 * know how these values are computed. 2488 */ 2489void 2490rt2560_update_slot(struct rt2560_softc *sc) 2491{ 2492 struct ieee80211com *ic = &sc->sc_ic; 2493 uint8_t slottime; 2494 uint16_t sifs, pifs, difs, eifs; 2495 uint32_t tmp; 2496 2497 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 2498 2499 /* define the MAC slot boundaries */ 2500 sifs = RAL_SIFS - RT2560_RXTX_TURNAROUND; 2501 pifs = sifs + slottime; 2502 difs = sifs + 2 * slottime; 2503 eifs = (ic->ic_curmode == IEEE80211_MODE_11B) ? 364 : 60; 2504 2505 tmp = RAL_READ(sc, RT2560_CSR11); 2506 tmp = (tmp & ~0x1f00) | slottime << 8; 2507 RAL_WRITE(sc, RT2560_CSR11, tmp); 2508 2509 tmp = pifs << 16 | sifs; 2510 RAL_WRITE(sc, RT2560_CSR18, tmp); 2511 2512 tmp = eifs << 16 | difs; 2513 RAL_WRITE(sc, RT2560_CSR19, tmp); 2514 2515 DPRINTF(("setting slottime to %uus\n", slottime)); 2516} 2517 2518void 2519rt2560_set_basicrates(struct rt2560_softc *sc) 2520{ 2521 struct ieee80211com *ic = &sc->sc_ic; 2522 2523 /* update basic rate set */ 2524 if (ic->ic_curmode == IEEE80211_MODE_11B) { 2525 /* 11b basic rates: 1, 2Mbps */ 2526 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x3); 2527 } else if (IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan)) { 2528 /* 11a basic rates: 6, 12, 24Mbps */ 2529 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x150); 2530 } else { 2531 /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */ 2532 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x15f); 2533 } 2534} 2535 2536void 2537rt2560_update_led(struct rt2560_softc *sc, int led1, int led2) 2538{ 2539 uint32_t tmp; 2540 2541 /* set ON period to 70ms and OFF period to 30ms */ 2542 tmp = led1 << 16 | led2 << 17 | 70 << 8 | 30; 2543 RAL_WRITE(sc, RT2560_LEDCSR, tmp); 2544} 2545 2546void 2547rt2560_set_bssid(struct rt2560_softc *sc, uint8_t *bssid) 2548{ 2549 uint32_t tmp; 2550 2551 tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24; 2552 RAL_WRITE(sc, RT2560_CSR5, tmp); 2553 2554 tmp = bssid[4] | bssid[5] << 8; 2555 RAL_WRITE(sc, RT2560_CSR6, tmp); 2556 2557 DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid))); 2558} 2559 2560void 2561rt2560_set_macaddr(struct rt2560_softc *sc, uint8_t *addr) 2562{ 2563 uint32_t tmp; 2564 2565 tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24; 2566 RAL_WRITE(sc, RT2560_CSR3, tmp); 2567 2568 tmp = addr[4] | addr[5] << 8; 2569 RAL_WRITE(sc, RT2560_CSR4, tmp); 2570 2571 DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr))); 2572} 2573 2574void 2575rt2560_get_macaddr(struct rt2560_softc *sc, uint8_t *addr) 2576{ 2577 uint32_t tmp; 2578 2579 tmp = RAL_READ(sc, RT2560_CSR3); 2580 addr[0] = tmp & 0xff; 2581 addr[1] = (tmp >> 8) & 0xff; 2582 addr[2] = (tmp >> 16) & 0xff; 2583 addr[3] = (tmp >> 24); 2584 2585 tmp = RAL_READ(sc, RT2560_CSR4); 2586 addr[4] = tmp & 0xff; 2587 addr[5] = (tmp >> 8) & 0xff; 2588} 2589 2590void 2591rt2560_update_promisc(struct rt2560_softc *sc) 2592{ 2593 struct ifnet *ifp = &sc->sc_ic.ic_if; 2594 uint32_t tmp; 2595 2596 tmp = RAL_READ(sc, RT2560_RXCSR0); 2597 2598 tmp &= ~RT2560_DROP_NOT_TO_ME; 2599 if (!(ifp->if_flags & IFF_PROMISC)) 2600 tmp |= RT2560_DROP_NOT_TO_ME; 2601 2602 RAL_WRITE(sc, RT2560_RXCSR0, tmp); 2603 2604 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? 2605 "entering" : "leaving")); 2606} 2607 2608void 2609rt2560_set_txantenna(struct rt2560_softc *sc, int antenna) 2610{ 2611 uint32_t tmp; 2612 uint8_t tx; 2613 2614 tx = rt2560_bbp_read(sc, RT2560_BBP_TX) & ~RT2560_BBP_ANTMASK; 2615 if (antenna == 1) 2616 tx |= RT2560_BBP_ANTA; 2617 else if (antenna == 2) 2618 tx |= RT2560_BBP_ANTB; 2619 else 2620 tx |= RT2560_BBP_DIVERSITY; 2621 2622 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */ 2623 if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526 || 2624 sc->rf_rev == RT2560_RF_5222) 2625 tx |= RT2560_BBP_FLIPIQ; 2626 2627 rt2560_bbp_write(sc, RT2560_BBP_TX, tx); 2628 2629 /* update values for CCK and OFDM in BBPCSR1 */ 2630 tmp = RAL_READ(sc, RT2560_BBPCSR1) & ~0x00070007; 2631 tmp |= (tx & 0x7) << 16 | (tx & 0x7); 2632 RAL_WRITE(sc, RT2560_BBPCSR1, tmp); 2633} 2634 2635void 2636rt2560_set_rxantenna(struct rt2560_softc *sc, int antenna) 2637{ 2638 uint8_t rx; 2639 2640 rx = rt2560_bbp_read(sc, RT2560_BBP_RX) & ~RT2560_BBP_ANTMASK; 2641 if (antenna == 1) 2642 rx |= RT2560_BBP_ANTA; 2643 else if (antenna == 2) 2644 rx |= RT2560_BBP_ANTB; 2645 else 2646 rx |= RT2560_BBP_DIVERSITY; 2647 2648 /* need to force no I/Q flip for RF 2525e and 2526 */ 2649 if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526) 2650 rx &= ~RT2560_BBP_FLIPIQ; 2651 2652 rt2560_bbp_write(sc, RT2560_BBP_RX, rx); 2653} 2654 2655const char * 2656rt2560_get_rf(int rev) 2657{ 2658 switch (rev) { 2659 case RT2560_RF_2522: return "RT2522"; 2660 case RT2560_RF_2523: return "RT2523"; 2661 case RT2560_RF_2524: return "RT2524"; 2662 case RT2560_RF_2525: return "RT2525"; 2663 case RT2560_RF_2525E: return "RT2525e"; 2664 case RT2560_RF_2526: return "RT2526"; 2665 case RT2560_RF_5222: return "RT5222"; 2666 default: return "unknown"; 2667 } 2668} 2669 2670void 2671rt2560_read_eeprom(struct rt2560_softc *sc) 2672{ 2673 uint16_t val; 2674 int i; 2675 2676 val = rt2560_eeprom_read(sc, RT2560_EEPROM_CONFIG0); 2677 sc->rf_rev = (val >> 11) & 0x1f; 2678 sc->hw_radio = (val >> 10) & 0x1; 2679 sc->led_mode = (val >> 6) & 0x7; 2680 sc->rx_ant = (val >> 4) & 0x3; 2681 sc->tx_ant = (val >> 2) & 0x3; 2682 sc->nb_ant = val & 0x3; 2683 2684 /* read default values for BBP registers */ 2685 for (i = 0; i < 16; i++) { 2686 val = rt2560_eeprom_read(sc, RT2560_EEPROM_BBP_BASE + i); 2687 sc->bbp_prom[i].reg = val >> 8; 2688 sc->bbp_prom[i].val = val & 0xff; 2689 } 2690 2691 /* read Tx power for all b/g channels */ 2692 for (i = 0; i < 14 / 2; i++) { 2693 val = rt2560_eeprom_read(sc, RT2560_EEPROM_TXPOWER + i); 2694 sc->txpow[i * 2] = val >> 8; 2695 sc->txpow[i * 2 + 1] = val & 0xff; 2696 } 2697} 2698 2699int 2700rt2560_bbp_init(struct rt2560_softc *sc) 2701{ 2702#define N(a) (sizeof (a) / sizeof ((a)[0])) 2703 int i, ntries; 2704 2705 /* wait for BBP to be ready */ 2706 for (ntries = 0; ntries < 100; ntries++) { 2707 if (rt2560_bbp_read(sc, RT2560_BBP_VERSION) != 0) 2708 break; 2709 DELAY(1); 2710 } 2711 if (ntries == 100) { 2712 printf("%s: timeout waiting for BBP\n", sc->sc_dev.dv_xname); 2713 return EIO; 2714 } 2715 2716 /* initialize BBP registers to default values */ 2717 for (i = 0; i < N(rt2560_def_bbp); i++) { 2718 rt2560_bbp_write(sc, rt2560_def_bbp[i].reg, 2719 rt2560_def_bbp[i].val); 2720 } 2721#if 0 2722 /* initialize BBP registers to values stored in EEPROM */ 2723 for (i = 0; i < 16; i++) { 2724 if (sc->bbp_prom[i].reg == 0xff) 2725 continue; 2726 rt2560_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 2727 } 2728#endif 2729 2730 return 0; 2731#undef N 2732} 2733 2734int 2735rt2560_init(struct ifnet *ifp) 2736{ 2737#define N(a) (sizeof (a) / sizeof ((a)[0])) 2738 struct rt2560_softc *sc = ifp->if_softc; 2739 struct ieee80211com *ic = &sc->sc_ic; 2740 uint32_t tmp; 2741 int i; 2742 2743 /* for CardBus, power on the socket */ 2744 if (!(sc->sc_flags & RT2560_ENABLED)) { 2745 if (sc->sc_enable != NULL && (*sc->sc_enable)(sc) != 0) { 2746 printf("%s: could not enable device\n"); 2747 return EIO; 2748 } 2749 sc->sc_flags |= RT2560_ENABLED; 2750 } 2751 2752 rt2560_stop(ifp, 0); 2753 2754 /* setup tx rings */ 2755 tmp = RT2560_PRIO_RING_COUNT << 24 | 2756 RT2560_ATIM_RING_COUNT << 16 | 2757 RT2560_TX_RING_COUNT << 8 | 2758 RT2560_TX_DESC_SIZE; 2759 2760 /* rings _must_ be initialized in this _exact_ order! */ 2761 RAL_WRITE(sc, RT2560_TXCSR2, tmp); 2762 RAL_WRITE(sc, RT2560_TXCSR3, sc->txq.physaddr); 2763 RAL_WRITE(sc, RT2560_TXCSR5, sc->prioq.physaddr); 2764 RAL_WRITE(sc, RT2560_TXCSR4, sc->atimq.physaddr); 2765 RAL_WRITE(sc, RT2560_TXCSR6, sc->bcnq.physaddr); 2766 2767 /* setup rx ring */ 2768 tmp = RT2560_RX_RING_COUNT << 8 | RT2560_RX_DESC_SIZE; 2769 2770 RAL_WRITE(sc, RT2560_RXCSR1, tmp); 2771 RAL_WRITE(sc, RT2560_RXCSR2, sc->rxq.physaddr); 2772 2773 /* initialize MAC registers to default values */ 2774 for (i = 0; i < N(rt2560_def_mac); i++) 2775 RAL_WRITE(sc, rt2560_def_mac[i].reg, rt2560_def_mac[i].val); 2776 2777 IEEE80211_ADDR_COPY(ic->ic_myaddr, LLADDR(ifp->if_sadl)); 2778 rt2560_set_macaddr(sc, ic->ic_myaddr); 2779 2780 /* set basic rate set (will be updated later) */ 2781 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x153); 2782 2783 rt2560_set_txantenna(sc, 1); 2784 rt2560_set_rxantenna(sc, 1); 2785 rt2560_update_slot(sc); 2786 rt2560_update_plcp(sc); 2787 rt2560_update_led(sc, 0, 0); 2788 2789 RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC); 2790 RAL_WRITE(sc, RT2560_CSR1, RT2560_HOST_READY); 2791 2792 if (rt2560_bbp_init(sc) != 0) { 2793 rt2560_stop(ifp, 1); 2794 return EIO; 2795 } 2796 2797 /* set default BSS channel */ 2798 ic->ic_bss->ni_chan = ic->ic_ibss_chan; 2799 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 2800 2801 /* kick Rx */ 2802 tmp = RT2560_DROP_PHY_ERROR | RT2560_DROP_CRC_ERROR; 2803 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2804 tmp |= RT2560_DROP_CTL | RT2560_DROP_VERSION_ERROR; 2805 if (ic->ic_opmode != IEEE80211_M_HOSTAP) 2806 tmp |= RT2560_DROP_TODS; 2807 if (!(ifp->if_flags & IFF_PROMISC)) 2808 tmp |= RT2560_DROP_NOT_TO_ME; 2809 } 2810 RAL_WRITE(sc, RT2560_RXCSR0, tmp); 2811 2812 /* clear old FCS and Rx FIFO errors */ 2813 RAL_READ(sc, RT2560_CNT0); 2814 RAL_READ(sc, RT2560_CNT4); 2815 2816 /* clear any pending interrupts */ 2817 RAL_WRITE(sc, RT2560_CSR7, 0xffffffff); 2818 2819 /* enable interrupts */ 2820 RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK); 2821 2822 ifp->if_flags &= ~IFF_OACTIVE; 2823 ifp->if_flags |= IFF_RUNNING; 2824 2825 if (ic->ic_opmode == IEEE80211_M_MONITOR) 2826 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 2827 else 2828 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 2829 2830 return 0; 2831#undef N 2832} 2833 2834void 2835rt2560_stop(struct ifnet *ifp, int disable) 2836{ 2837 struct rt2560_softc *sc = ifp->if_softc; 2838 struct ieee80211com *ic = &sc->sc_ic; 2839 2840 sc->sc_tx_timer = 0; 2841 ifp->if_timer = 0; 2842 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 2843 2844 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); /* free all nodes */ 2845 2846 /* abort Tx */ 2847 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_ABORT_TX); 2848 2849 /* disable Rx */ 2850 RAL_WRITE(sc, RT2560_RXCSR0, RT2560_DISABLE_RX); 2851 2852 /* reset ASIC (and thus, BBP) */ 2853 RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC); 2854 RAL_WRITE(sc, RT2560_CSR1, 0); 2855 2856 /* disable interrupts */ 2857 RAL_WRITE(sc, RT2560_CSR8, 0xffffffff); 2858 2859 /* clear any pending interrupt */ 2860 RAL_WRITE(sc, RT2560_CSR7, 0xffffffff); 2861 2862 /* reset Tx and Rx rings */ 2863 rt2560_reset_tx_ring(sc, &sc->txq); 2864 rt2560_reset_tx_ring(sc, &sc->atimq); 2865 rt2560_reset_tx_ring(sc, &sc->prioq); 2866 rt2560_reset_tx_ring(sc, &sc->bcnq); 2867 rt2560_reset_rx_ring(sc, &sc->rxq); 2868 2869 /* for CardBus, power down the socket */ 2870 if (disable && sc->sc_disable != NULL) { 2871 if (sc->sc_flags & RT2560_ENABLED) { 2872 (*sc->sc_disable)(sc); 2873 sc->sc_flags &= ~RT2560_ENABLED; 2874 } 2875 } 2876} 2877 2878struct cfdriver ral_cd = { 2879 0, "ral", DV_IFNET 2880}; 2881