if_fxp_cardbus.c revision 1.34 
1/*	$OpenBSD: if_fxp_cardbus.c,v 1.34 2014/12/19 22:44:58 guenther Exp $ */
2/*	$NetBSD: if_fxp_cardbus.c,v 1.12 2000/05/08 18:23:36 thorpej Exp $	*/
3
4/*
5 * Copyright (c) 1999 The NetBSD Foundation, Inc.
6 * All rights reserved.
7 *
8 * This code is derived from software contributed to The NetBSD Foundation
9 * by Johan Danielsson.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 *    notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 *    notice, this list of conditions and the following disclaimer in the
18 *    documentation and/or other materials provided with the distribution.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 * POSSIBILITY OF SUCH DAMAGE.
31 */
32
33/*
34 * CardBus front-end for the Intel i8255x family of Ethernet chips.
35 */
36
37#include "bpfilter.h"
38
39#include <sys/param.h>
40#include <sys/systm.h>
41#include <sys/mbuf.h>
42#include <sys/socket.h>
43#include <sys/ioctl.h>
44#include <sys/errno.h>
45#include <sys/malloc.h>
46#include <sys/kernel.h>
47#include <sys/timeout.h>
48#include <sys/device.h>
49#include <sys/endian.h>
50
51#include <net/if.h>
52#include <net/if_dl.h>
53#include <net/if_types.h>
54#include <net/if_media.h>
55
56#if NBPFILTER > 0
57#include <net/bpf.h>
58#endif
59
60#include <netinet/in.h>
61#include <netinet/if_ether.h>
62
63#include <machine/bus.h>
64#include <machine/intr.h>
65
66#include <dev/mii/miivar.h>
67
68#include <dev/ic/fxpreg.h>
69#include <dev/ic/fxpvar.h>
70
71#include <dev/pci/pcivar.h>
72#include <dev/pci/pcireg.h>
73#include <dev/pci/pcidevs.h>
74
75#include <dev/cardbus/cardbusvar.h>
76
77int fxp_cardbus_match(struct device *, void *, void *);
78void fxp_cardbus_attach(struct device *, struct device *, void *);
79int fxp_cardbus_detach(struct device *, int);
80void fxp_cardbus_setup(struct fxp_softc *);
81
82struct fxp_cardbus_softc {
83	struct fxp_softc sc;
84	cardbus_devfunc_t ct;
85	pcitag_t ct_tag;
86	pcireg_t base0_reg;
87	pcireg_t base1_reg;
88	bus_size_t size;
89	pci_chipset_tag_t pc;
90};
91
92struct cfattach fxp_cardbus_ca = {
93	sizeof(struct fxp_cardbus_softc), fxp_cardbus_match, fxp_cardbus_attach,
94	    fxp_cardbus_detach
95};
96
97const struct pci_matchid fxp_cardbus_devices[] = {
98	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_8255x },
99};
100
101#ifdef CBB_DEBUG
102#define DPRINTF(X) printf X
103#else
104#define DPRINTF(X)
105#endif
106
107int
108fxp_cardbus_match(struct device *parent, void *match, void *aux)
109{
110	return (cardbus_matchbyid((struct cardbus_attach_args *)aux,
111	    fxp_cardbus_devices, nitems(fxp_cardbus_devices)));
112}
113
114void
115fxp_cardbus_attach(struct device *parent, struct device *self, void *aux)
116{
117	char intrstr[16];
118	struct fxp_softc *sc = (struct fxp_softc *) self;
119	struct fxp_cardbus_softc *csc = (struct fxp_cardbus_softc *) self;
120	struct cardbus_attach_args *ca = aux;
121	struct cardbus_softc *psc =
122	    (struct cardbus_softc *)sc->sc_dev.dv_parent;
123	cardbus_chipset_tag_t cc = psc->sc_cc;
124	cardbus_function_tag_t cf = psc->sc_cf;
125	bus_space_tag_t iot, memt;
126	bus_space_handle_t ioh, memh;
127
128	bus_addr_t adr;
129	bus_size_t size;
130
131	csc->ct = ca->ca_ct;
132	csc->pc = ca->ca_pc;
133
134	/*
135	 * Map control/status registers.
136	 */
137	if (Cardbus_mapreg_map(csc->ct, CARDBUS_BASE1_REG,
138	    PCI_MAPREG_TYPE_IO, 0, &iot, &ioh, &adr, &size) == 0) {
139		csc->base1_reg = adr | 1;
140		sc->sc_st = iot;
141		sc->sc_sh = ioh;
142		csc->size = size;
143	} else if (Cardbus_mapreg_map(csc->ct, CARDBUS_BASE0_REG,
144	    PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT,
145	    0, &memt, &memh, &adr, &size) == 0) {
146		csc->base0_reg = adr;
147		sc->sc_st = memt;
148		sc->sc_sh = memh;
149		csc->size = size;
150	} else
151		panic("%s: failed to allocate mem and io space", __func__);
152
153	sc->sc_dmat = ca->ca_dmat;
154#if 0
155	sc->sc_enable = fxp_cardbus_enable;
156	sc->sc_disable = fxp_cardbus_disable;
157	sc->sc_enabled = 0;
158#endif
159
160	Cardbus_function_enable(csc->ct);
161
162	fxp_cardbus_setup(sc);
163
164	/* Map and establish the interrupt. */
165	sc->sc_ih = cardbus_intr_establish(cc, cf, psc->sc_intrline, IPL_NET,
166	    fxp_intr, sc, sc->sc_dev.dv_xname);
167	if (NULL == sc->sc_ih) {
168		printf(": couldn't establish interrupt");
169		printf("at %d\n", ca->ca_intrline);
170		return;
171	}
172	snprintf(intrstr, sizeof(intrstr), "irq %d", ca->ca_intrline);
173
174	sc->sc_revision = PCI_REVISION(ca->ca_class);
175
176	fxp_attach(sc, intrstr);
177}
178
179void
180fxp_cardbus_setup(struct fxp_softc *sc)
181{
182	struct fxp_cardbus_softc *csc = (struct fxp_cardbus_softc *) sc;
183	struct cardbus_softc *psc =
184	    (struct cardbus_softc *) sc->sc_dev.dv_parent;
185	cardbus_chipset_tag_t cc = psc->sc_cc;
186	pci_chipset_tag_t pc = csc->pc;
187	cardbus_function_tag_t cf = psc->sc_cf;
188	pcireg_t command;
189
190	csc->ct_tag = pci_make_tag(pc, csc->ct->ct_bus,
191	    csc->ct->ct_dev, csc->ct->ct_func);
192
193	command = pci_conf_read(pc, csc->ct_tag, PCI_COMMAND_STATUS_REG);
194	if (csc->base0_reg) {
195		pci_conf_write(pc, csc->ct_tag, CARDBUS_BASE0_REG, csc->base0_reg);
196		(cf->cardbus_ctrl) (cc, CARDBUS_MEM_ENABLE);
197		command |= PCI_COMMAND_MEM_ENABLE |
198		    PCI_COMMAND_MASTER_ENABLE;
199	} else if (csc->base1_reg) {
200		pci_conf_write(pc, csc->ct_tag, CARDBUS_BASE1_REG, csc->base1_reg);
201		(cf->cardbus_ctrl) (cc, CARDBUS_IO_ENABLE);
202		command |= (PCI_COMMAND_IO_ENABLE |
203		    PCI_COMMAND_MASTER_ENABLE);
204	}
205
206	(cf->cardbus_ctrl) (cc, CARDBUS_BM_ENABLE);
207
208	/* enable the card */
209	pci_conf_write(pc, csc->ct_tag, PCI_COMMAND_STATUS_REG, command);
210}
211
212int
213fxp_cardbus_detach(struct device *self, int flags)
214{
215	struct fxp_softc *sc = (struct fxp_softc *) self;
216	struct fxp_cardbus_softc *csc = (struct fxp_cardbus_softc *) self;
217	struct cardbus_devfunc *ct = csc->ct;
218	int reg;
219
220	cardbus_intr_disestablish(ct->ct_cc, ct->ct_cf, sc->sc_ih);
221	fxp_detach(sc);
222
223	if (csc->base0_reg)
224		reg = CARDBUS_BASE0_REG;
225	else
226		reg = CARDBUS_BASE1_REG;
227	Cardbus_mapreg_unmap(ct, reg, sc->sc_st, sc->sc_sh, csc->size);
228	return (0);
229}
230