iommuvar.h revision 1.7
1/* $OpenBSD: iommuvar.h,v 1.7 2003/02/17 01:29:20 henric Exp $ */ 2/* $NetBSD: iommuvar.h,v 1.9 2001/10/07 20:30:41 eeh Exp $ */ 3 4/* 5 * Copyright (c) 1999 Matthew R. Green 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. The name of the author may not be used to endorse or promote products 17 * derived from this software without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 20 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 21 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 22 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 23 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 24 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 26 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 27 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 */ 31 32#ifndef _SPARC64_DEV_IOMMUVAR_H_ 33#define _SPARC64_DEV_IOMMUVAR_H_ 34 35/* 36 * per-Streaming Buffer state 37 */ 38 39struct strbuf_ctl { 40 bus_space_tag_t sb_bustag; /* streaming buffer registers */ 41 bus_space_handle_t sb_sb; /* Handle for our regs */ 42 paddr_t sb_flushpa; /* to flush streaming buffers */ 43 volatile int64_t *sb_flush; 44}; 45 46/* 47 * per-IOMMU state 48 */ 49struct iommu_state { 50 paddr_t is_ptsb; /* TSB physical address */ 51 int64_t *is_tsb; /* TSB virtual address */ 52 int is_tsbsize; /* 0 = 8K, ... */ 53 u_int is_dvmabase; 54 u_int is_dvmaend; 55 int64_t is_cr; /* IOMMU control register value */ 56 struct extent *is_dvmamap; /* DVMA map for this instance */ 57 58 struct strbuf_ctl *is_sb[2]; /* Streaming buffers if any */ 59 60 /* copies of our parents state, to allow us to be self contained */ 61 bus_space_tag_t is_bustag; /* our bus tag */ 62 bus_space_handle_t is_iommu; /* IOMMU registers */ 63}; 64 65/* interfaces for PCI/SBUS code */ 66void iommu_init(char *, struct iommu_state *, int, u_int32_t); 67void iommu_reset(struct iommu_state *); 68void iommu_enter(struct iommu_state *, vaddr_t, int64_t, int); 69void iommu_remove(struct iommu_state *, vaddr_t, size_t); 70paddr_t iommu_extract(struct iommu_state *, vaddr_t); 71 72int iommu_dvmamap_load(bus_dma_tag_t, struct iommu_state *, 73 bus_dmamap_t, void *, bus_size_t, struct proc *, int); 74void iommu_dvmamap_unload(bus_dma_tag_t, struct iommu_state *, 75 bus_dmamap_t); 76int iommu_dvmamap_load_raw(bus_dma_tag_t, struct iommu_state *, 77 bus_dmamap_t, bus_dma_segment_t *, int, int, bus_size_t); 78void iommu_dvmamap_sync(bus_dma_tag_t, struct iommu_state *, 79 bus_dmamap_t, bus_addr_t, bus_size_t, int); 80int iommu_dvmamem_alloc(bus_dma_tag_t, struct iommu_state *, 81 bus_size_t, bus_size_t, bus_size_t, bus_dma_segment_t *, 82 int, int *, int); 83void iommu_dvmamem_free(bus_dma_tag_t, struct iommu_state *, 84 bus_dma_segment_t *, int); 85int iommu_dvmamem_map(bus_dma_tag_t, struct iommu_state *, 86 bus_dma_segment_t *, int, size_t, caddr_t *, int); 87void iommu_dvmamem_unmap(bus_dma_tag_t, struct iommu_state *, 88 caddr_t, size_t); 89 90#define IOMMUREG_READ(is, reg) \ 91 bus_space_read_8((is)->is_bustag, \ 92 (is)->is_iommu, \ 93 IOMMUREG(reg)) 94 95#define IOMMUREG_WRITE(is, reg, v) \ 96 bus_space_write_8((is)->is_bustag, \ 97 (is)->is_iommu, \ 98 IOMMUREG(reg), \ 99 (v)) 100 101#endif /* _SPARC64_DEV_IOMMUVAR_H_ */ 102 103