ce4231.c revision 1.40
1/*	$OpenBSD: ce4231.c,v 1.40 2022/10/19 19:14:16 kn Exp $	*/
2
3/*
4 * Copyright (c) 1999 Jason L. Wright (jason@thought.net)
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
18 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19 * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
20 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
24 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
25 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 * POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/*
30 * Driver for CS4231 based audio found in some sun4u systems (cs4231)
31 * based on ideas from the S/Linux project and the NetBSD project.
32 *
33 * Effort sponsored in part by the Defense Advanced Research Projects
34 * Agency (DARPA) and Air Force Research Laboratory, Air Force
35 * Materiel Command, USAF, under agreement number F30602-01-2-0537.
36 *
37 */
38
39#include <sys/param.h>
40#include <sys/systm.h>
41#include <sys/errno.h>
42#include <sys/ioctl.h>
43#include <sys/device.h>
44#include <sys/proc.h>
45#include <sys/malloc.h>
46
47#include <machine/cpu.h>
48#include <machine/bus.h>
49#include <machine/intr.h>
50#include <machine/autoconf.h>
51
52#include <sys/audioio.h>
53#include <dev/audio_if.h>
54
55#include <sparc64/dev/ebusreg.h>
56#include <sparc64/dev/ebusvar.h>
57#include <sparc64/dev/ce4231var.h>
58
59/* AD1418 provides basic registers, CS4231 extends with more */
60#include <dev/ic/ad1848reg.h>
61#include <dev/ic/cs4231reg.h>
62
63/* Mixer classes and mixer knobs */
64#define CSAUDIO_INPUT_CLASS	0
65#define CSAUDIO_OUTPUT_CLASS	1
66#define CSAUDIO_RECORD_CLASS	2
67#define CSAUDIO_DAC_LVL		3
68#define CSAUDIO_DAC_MUTE	4
69#define CSAUDIO_OUTPUTS		5
70#define CSAUDIO_CD_LVL		6
71#define CSAUDIO_CD_MUTE		7
72#define CSAUDIO_LINE_IN_LVL	8
73#define CSAUDIO_LINE_IN_MUTE	9
74#define CSAUDIO_MONITOR_LVL	10
75#define CSAUDIO_MONITOR_MUTE	11
76#define CSAUDIO_REC_LVL		12
77#define CSAUDIO_RECORD_SOURCE	13
78#define CSAUDIO_MIC_PREAMP	14
79
80/* Recording sources */
81#define REC_PORT_LINE	0
82#define REC_PORT_CD	1
83#define REC_PORT_MIC	2
84#define REC_PORT_MIX	3
85
86/* Output ports. */
87#define OUT_PORT_LINE	0x1
88#define OUT_PORT_HP	0x2
89#define OUT_PORT_SPKR	0x4
90
91/* Bits on the ADC reg that determine recording source */
92#define CS_REC_SRC_BITS 0xc0
93
94#ifdef AUDIO_DEBUG
95#define	DPRINTF(x)	printf x
96#else
97#define	DPRINTF(x)
98#endif
99
100#define	CS_TIMEOUT	90000
101
102/* Read/write CS4231 direct registers */
103#define CS_WRITE(sc,r,v)	\
104    bus_space_write_1((sc)->sc_bustag, (sc)->sc_cshandle, (r) << 2, (v))
105#define	CS_READ(sc,r)		\
106    bus_space_read_1((sc)->sc_bustag, (sc)->sc_cshandle, (r) << 2)
107
108/* Read/write EBDMA playback registers */
109#define	P_WRITE(sc,r,v)		\
110    bus_space_write_4((sc)->sc_bustag, (sc)->sc_pdmahandle, (r), (v))
111#define	P_READ(sc,r)		\
112    bus_space_read_4((sc)->sc_bustag, (sc)->sc_pdmahandle, (r))
113
114/* Read/write EBDMA capture registers */
115#define	C_WRITE(sc,r,v)		\
116    bus_space_write_4((sc)->sc_bustag, (sc)->sc_cdmahandle, (r), (v))
117#define	C_READ(sc,r)		\
118    bus_space_read_4((sc)->sc_bustag, (sc)->sc_cdmahandle, (r))
119
120int	ce4231_match(struct device *, void *, void *);
121void	ce4231_attach(struct device *, struct device *, void *);
122int	ce4231_cintr(void *);
123int	ce4231_pintr(void *);
124
125int	ce4231_set_speed(struct ce4231_softc *, u_long *);
126
127void	ce4231_set_outputs(struct ce4231_softc *, int);
128int	ce4231_get_outputs(struct ce4231_softc *);
129
130void		ce4231_write(struct ce4231_softc *, u_int8_t, u_int8_t);
131u_int8_t	ce4231_read(struct ce4231_softc *, u_int8_t);
132
133/* Audio interface */
134int	ce4231_open(void *, int);
135void	ce4231_close(void *);
136int	ce4231_set_params(void *, int, int, struct audio_params *,
137    struct audio_params *);
138int	ce4231_round_blocksize(void *, int);
139int	ce4231_commit_settings(void *);
140int	ce4231_halt_output(void *);
141int	ce4231_halt_input(void *);
142int	ce4231_set_port(void *, mixer_ctrl_t *);
143int	ce4231_get_port(void *, mixer_ctrl_t *);
144int	ce4231_query_devinfo(void *addr, mixer_devinfo_t *);
145void *	ce4231_alloc(void *, int, size_t, int, int);
146void	ce4231_free(void *, void *, int);
147int	ce4231_get_props(void *);
148int	ce4231_trigger_output(void *, void *, void *, int,
149    void (*intr)(void *), void *arg, struct audio_params *);
150int	ce4231_trigger_input(void *, void *, void *, int,
151    void (*intr)(void *), void *arg, struct audio_params *);
152
153const struct audio_hw_if ce4231_sa_hw_if = {
154	.open = ce4231_open,
155	.close = ce4231_close,
156	.set_params = ce4231_set_params,
157	.round_blocksize = ce4231_round_blocksize,
158	.commit_settings = ce4231_commit_settings,
159	.halt_output = ce4231_halt_output,
160	.halt_input = ce4231_halt_input,
161	.set_port = ce4231_set_port,
162	.get_port = ce4231_get_port,
163	.query_devinfo = ce4231_query_devinfo,
164	.allocm = ce4231_alloc,
165	.freem = ce4231_free,
166	.get_props = ce4231_get_props,
167	.trigger_output = ce4231_trigger_output,
168	.trigger_input = ce4231_trigger_input,
169};
170
171const struct cfattach audioce_ca = {
172	sizeof (struct ce4231_softc), ce4231_match, ce4231_attach
173};
174
175struct cfdriver audioce_cd = {
176	NULL, "audioce", DV_DULL
177};
178
179int
180ce4231_match(struct device *parent, void *vcf, void *aux)
181{
182	struct ebus_attach_args *ea = aux;
183
184	if (!strcmp("SUNW,CS4231", ea->ea_name) ||
185	    !strcmp("audio", ea->ea_name))
186		return (1);
187	return (0);
188}
189
190void
191ce4231_attach(struct device *parent, struct device *self, void *aux)
192{
193	struct ebus_attach_args *ea = aux;
194	struct ce4231_softc *sc = (struct ce4231_softc *)self;
195	mixer_ctrl_t cp;
196	int node;
197
198	node = ea->ea_node;
199
200	sc->sc_last_format = 0xffffffff;
201
202	/* Pass on the bus tags */
203	sc->sc_bustag = ea->ea_memtag;
204	sc->sc_dmatag = ea->ea_dmatag;
205
206	/* Make sure things are sane. */
207	if (ea->ea_nintrs != 2) {
208		printf(": expected 2 interrupts, got %d\n", ea->ea_nintrs);
209		return;
210	}
211	if (ea->ea_nregs != 4) {
212		printf(": expected 4 register set, got %d\n",
213		    ea->ea_nregs);
214		return;
215	}
216
217	sc->sc_cih = bus_intr_establish(sc->sc_bustag, ea->ea_intrs[0],
218	    IPL_AUDIO, BUS_INTR_ESTABLISH_MPSAFE, ce4231_cintr,
219	    sc, self->dv_xname);
220	if (sc->sc_cih == NULL) {
221		printf(": couldn't establish capture interrupt\n");
222		return;
223	}
224	sc->sc_pih = bus_intr_establish(sc->sc_bustag, ea->ea_intrs[1],
225	    IPL_AUDIO, BUS_INTR_ESTABLISH_MPSAFE, ce4231_pintr,
226	    sc, self->dv_xname);
227	if (sc->sc_pih == NULL) {
228		printf(": couldn't establish play interrupt1\n");
229		return;
230	}
231
232	/* XXX what if prom has already mapped?! */
233
234	if (ebus_bus_map(sc->sc_bustag, 0,
235	    EBUS_PADDR_FROM_REG(&ea->ea_regs[0]), ea->ea_regs[0].size,
236	    BUS_SPACE_MAP_LINEAR, 0, &sc->sc_cshandle) != 0) {
237		printf(": couldn't map cs4231 registers\n");
238		return;
239	}
240
241	if (ebus_bus_map(sc->sc_bustag, 0,
242	    EBUS_PADDR_FROM_REG(&ea->ea_regs[1]), ea->ea_regs[1].size,
243	    BUS_SPACE_MAP_LINEAR, 0, &sc->sc_pdmahandle) != 0) {
244		printf(": couldn't map dma1 registers\n");
245		return;
246	}
247
248	if (ebus_bus_map(sc->sc_bustag, 0,
249	    EBUS_PADDR_FROM_REG(&ea->ea_regs[2]), ea->ea_regs[2].size,
250	    BUS_SPACE_MAP_LINEAR, 0, &sc->sc_cdmahandle) != 0) {
251		printf(": couldn't map dma2 registers\n");
252		return;
253	}
254
255	if (ebus_bus_map(sc->sc_bustag, 0,
256	    EBUS_PADDR_FROM_REG(&ea->ea_regs[3]), ea->ea_regs[3].size,
257	    BUS_SPACE_MAP_LINEAR, 0, &sc->sc_auxhandle) != 0) {
258		printf(": couldn't map aux registers\n");
259		return;
260	}
261
262	printf(": nvaddrs %d\n", ea->ea_nvaddrs);
263
264	audio_attach_mi(&ce4231_sa_hw_if, sc, NULL, &sc->sc_dev);
265
266	/* Enable mode 2. */
267	ce4231_write(sc, SP_MISC_INFO, ce4231_read(sc, SP_MISC_INFO) | MODE2);
268
269	/* Attenuate DAC, CD and line-in.  -22.5 dB for all. */
270	cp.dev = CSAUDIO_DAC_LVL;
271	cp.type = AUDIO_MIXER_VALUE;
272	cp.un.value.num_channels = 2;
273	cp.un.value.level[AUDIO_MIXER_LEVEL_LEFT] = 195;
274	cp.un.value.level[AUDIO_MIXER_LEVEL_RIGHT] = 195;
275	ce4231_set_port(sc, &cp);
276
277	cp.dev = CSAUDIO_CD_LVL;
278	cp.un.value.level[AUDIO_MIXER_LEVEL_LEFT] = 135;
279	cp.un.value.level[AUDIO_MIXER_LEVEL_RIGHT] = 135;
280	ce4231_set_port(sc, &cp);
281
282	cp.dev = CSAUDIO_LINE_IN_LVL;
283	ce4231_set_port(sc, &cp);
284
285	/* Unmute DAC, CD and line-in */
286	cp.dev = CSAUDIO_DAC_MUTE;
287	cp.type = AUDIO_MIXER_ENUM;
288	cp.un.ord = 0;
289	ce4231_set_port(sc, &cp);
290
291	cp.dev = CSAUDIO_CD_MUTE;
292	ce4231_set_port(sc, &cp);
293
294	cp.dev = CSAUDIO_LINE_IN_MUTE;
295	ce4231_set_port(sc, &cp);
296
297	/* XXX get real burst... */
298	sc->sc_burst = EBDCSR_BURST_8;
299}
300
301/*
302 * Write to one of the indexed registers of cs4231.
303 */
304void
305ce4231_write(struct ce4231_softc *sc, u_int8_t r, u_int8_t v)
306{
307	CS_WRITE(sc, AD1848_IADDR, r);
308	CS_WRITE(sc, AD1848_IDATA, v);
309}
310
311/*
312 * Read from one of the indexed registers of cs4231.
313 */
314u_int8_t
315ce4231_read(struct ce4231_softc *sc, u_int8_t r)
316{
317	CS_WRITE(sc, AD1848_IADDR, r);
318	return (CS_READ(sc, AD1848_IDATA));
319}
320
321int
322ce4231_set_speed(struct ce4231_softc *sc, u_long *argp)
323{
324	/*
325	 * The available speeds are in the following table. Keep the speeds in
326	 * the increasing order.
327	 */
328	typedef struct {
329		int speed;
330		u_char bits;
331	} speed_struct;
332	u_long arg = *argp;
333
334	static speed_struct speed_table[] = {
335		{5510,	(0 << 1) | CLOCK_XTAL2},
336		{5510,	(0 << 1) | CLOCK_XTAL2},
337		{6620,	(7 << 1) | CLOCK_XTAL2},
338		{8000,	(0 << 1) | CLOCK_XTAL1},
339		{9600,	(7 << 1) | CLOCK_XTAL1},
340		{11025,	(1 << 1) | CLOCK_XTAL2},
341		{16000,	(1 << 1) | CLOCK_XTAL1},
342		{18900,	(2 << 1) | CLOCK_XTAL2},
343		{22050,	(3 << 1) | CLOCK_XTAL2},
344		{27420,	(2 << 1) | CLOCK_XTAL1},
345		{32000,	(3 << 1) | CLOCK_XTAL1},
346		{33075,	(6 << 1) | CLOCK_XTAL2},
347		{33075,	(4 << 1) | CLOCK_XTAL2},
348		{44100,	(5 << 1) | CLOCK_XTAL2},
349		{48000,	(6 << 1) | CLOCK_XTAL1},
350	};
351
352	int i, n, selected = -1;
353
354	n = sizeof(speed_table) / sizeof(speed_struct);
355
356	if (arg < speed_table[0].speed)
357		selected = 0;
358	if (arg > speed_table[n - 1].speed)
359		selected = n - 1;
360
361	for (i = 1; selected == -1 && i < n; i++) {
362		if (speed_table[i].speed == arg)
363			selected = i;
364		else if (speed_table[i].speed > arg) {
365			int diff1, diff2;
366
367			diff1 = arg - speed_table[i - 1].speed;
368			diff2 = speed_table[i].speed - arg;
369			if (diff1 < diff2)
370				selected = i - 1;
371			else
372				selected = i;
373		}
374	}
375
376	if (selected == -1)
377		selected = 3;
378
379	sc->sc_speed_bits = speed_table[selected].bits;
380	sc->sc_need_commit = 1;
381	*argp = speed_table[selected].speed;
382
383	return (0);
384}
385
386/*
387 * Audio interface functions
388 */
389int
390ce4231_open(void *addr, int flags)
391{
392	struct ce4231_softc *sc = addr;
393	int tries;
394
395	DPRINTF(("ce4231_open\n"));
396
397	if (sc->sc_open)
398		return (EBUSY);
399
400	sc->sc_open = 1;
401	sc->sc_rintr = 0;
402	sc->sc_rarg = 0;
403	sc->sc_pintr = 0;
404	sc->sc_parg = 0;
405
406	P_WRITE(sc, EBDMA_DCSR, EBDCSR_RESET);
407	C_WRITE(sc, EBDMA_DCSR, EBDCSR_RESET);
408	P_WRITE(sc, EBDMA_DCSR, sc->sc_burst);
409	C_WRITE(sc, EBDMA_DCSR, sc->sc_burst);
410
411	DELAY(20);
412
413	for (tries = CS_TIMEOUT;
414	     tries && CS_READ(sc, AD1848_IADDR) == SP_IN_INIT; tries--)
415		DELAY(10);
416	if (tries == 0)
417		printf("%s: timeout waiting for reset\n", sc->sc_dev.dv_xname);
418
419	ce4231_write(sc, SP_PIN_CONTROL,
420	    ce4231_read(sc, SP_PIN_CONTROL) | INTERRUPT_ENABLE);
421
422	return (0);
423}
424
425void
426ce4231_close(void *addr)
427{
428	struct ce4231_softc *sc = addr;
429
430	ce4231_halt_input(sc);
431	ce4231_halt_output(sc);
432	ce4231_write(sc, SP_PIN_CONTROL,
433	    ce4231_read(sc, SP_PIN_CONTROL) & (~INTERRUPT_ENABLE));
434	sc->sc_open = 0;
435}
436
437int
438ce4231_set_params(void *addr, int setmode, int usemode, struct audio_params *p,
439    struct audio_params *r)
440{
441	struct ce4231_softc *sc = (struct ce4231_softc *)addr;
442	int err, bits, enc = p->encoding;
443
444	if (p->precision > 16)
445		p->precision = 16;
446	switch (enc) {
447	case AUDIO_ENCODING_ULAW:
448		p->precision = 8;
449		bits = FMT_ULAW >> 5;
450		break;
451	case AUDIO_ENCODING_ALAW:
452		p->precision = 8;
453		bits = FMT_ALAW >> 5;
454		break;
455	case AUDIO_ENCODING_SLINEAR_LE:
456		p->precision = 16;
457		bits = FMT_TWOS_COMP >> 5;
458		break;
459	case AUDIO_ENCODING_SLINEAR_BE:
460		p->precision = 16;
461		bits = FMT_TWOS_COMP_BE >> 5;
462		break;
463	case AUDIO_ENCODING_ULINEAR_LE:
464	case AUDIO_ENCODING_ULINEAR_BE:
465		p->precision = 8;
466		break;
467	default:
468		return (EINVAL);
469	}
470
471	if (p->channels > 2)
472		p->channels = 2;
473
474	err = ce4231_set_speed(sc, &p->sample_rate);
475	if (err)
476		return (err);
477
478	p->bps = AUDIO_BPS(p->precision);
479	r->bps = AUDIO_BPS(r->precision);
480	p->msb = r->msb = 1;
481
482	sc->sc_format_bits = bits;
483	sc->sc_channels = p->channels;
484	sc->sc_precision = p->precision;
485	sc->sc_need_commit = 1;
486	return (0);
487}
488
489int
490ce4231_round_blocksize(void *addr, int blk)
491{
492	return ((blk + 3) & (-4));
493}
494
495int
496ce4231_commit_settings(void *addr)
497{
498	struct ce4231_softc *sc = (struct ce4231_softc *)addr;
499	int tries;
500	u_int8_t r, fs;
501
502	if (sc->sc_need_commit == 0)
503		return (0);
504
505	fs = sc->sc_speed_bits | (sc->sc_format_bits << 5);
506	if (sc->sc_channels == 2)
507		fs |= FMT_STEREO;
508
509	if (sc->sc_last_format == fs) {
510		sc->sc_need_commit = 0;
511		return (0);
512	}
513
514	/* XXX: this code is called before DMA (this intrs) is stopped */
515	mtx_enter(&audio_lock);
516
517	r = ce4231_read(sc, SP_INTERFACE_CONFIG) | AUTO_CAL_ENABLE;
518	CS_WRITE(sc, AD1848_IADDR, MODE_CHANGE_ENABLE);
519	CS_WRITE(sc, AD1848_IADDR, MODE_CHANGE_ENABLE | SP_INTERFACE_CONFIG);
520	CS_WRITE(sc, AD1848_IDATA, r);
521
522	CS_WRITE(sc, AD1848_IADDR, MODE_CHANGE_ENABLE | SP_CLOCK_DATA_FORMAT);
523	CS_WRITE(sc, AD1848_IDATA, fs);
524	CS_READ(sc, AD1848_IDATA);
525	CS_READ(sc, AD1848_IDATA);
526	tries = CS_TIMEOUT;
527	for (tries = CS_TIMEOUT;
528	     tries && CS_READ(sc, AD1848_IADDR) == SP_IN_INIT; tries--)
529		DELAY(10);
530	if (tries == 0)
531		printf("%s: timeout committing fspb\n", sc->sc_dev.dv_xname);
532
533	CS_WRITE(sc, AD1848_IADDR, MODE_CHANGE_ENABLE | CS_REC_FORMAT);
534	CS_WRITE(sc, AD1848_IDATA, fs);
535	CS_READ(sc, AD1848_IDATA);
536	CS_READ(sc, AD1848_IDATA);
537	for (tries = CS_TIMEOUT;
538	     tries && CS_READ(sc, AD1848_IADDR) == SP_IN_INIT; tries--)
539		DELAY(10);
540	if (tries == 0)
541		printf("%s: timeout committing cdf\n", sc->sc_dev.dv_xname);
542
543	CS_WRITE(sc, AD1848_IADDR, 0);
544	for (tries = CS_TIMEOUT;
545	     tries && CS_READ(sc, AD1848_IADDR) == SP_IN_INIT; tries--)
546		DELAY(10);
547	if (tries == 0)
548		printf("%s: timeout waiting for !mce\n", sc->sc_dev.dv_xname);
549
550	CS_WRITE(sc, AD1848_IADDR, SP_TEST_AND_INIT);
551	for (tries = CS_TIMEOUT;
552	     tries && CS_READ(sc, AD1848_IDATA) & AUTO_CAL_IN_PROG; tries--)
553		DELAY(10);
554	if (tries == 0)
555		printf("%s: timeout waiting for autocalibration\n",
556		    sc->sc_dev.dv_xname);
557
558	mtx_leave(&audio_lock);
559
560	sc->sc_need_commit = 0;
561	return (0);
562}
563
564int
565ce4231_halt_output(void *addr)
566{
567	struct ce4231_softc *sc = (struct ce4231_softc *)addr;
568
569	P_WRITE(sc, EBDMA_DCSR,
570	    P_READ(sc, EBDMA_DCSR) & ~EBDCSR_DMAEN);
571	ce4231_write(sc, SP_INTERFACE_CONFIG,
572	    ce4231_read(sc, SP_INTERFACE_CONFIG) & (~PLAYBACK_ENABLE));
573	return (0);
574}
575
576int
577ce4231_halt_input(void *addr)
578{
579	struct ce4231_softc *sc = (struct ce4231_softc *)addr;
580
581	C_WRITE(sc, EBDMA_DCSR,
582	    C_READ(sc, EBDMA_DCSR) & ~EBDCSR_DMAEN);
583	ce4231_write(sc, SP_INTERFACE_CONFIG,
584	    ce4231_read(sc, SP_INTERFACE_CONFIG) & (~CAPTURE_ENABLE));
585	return (0);
586}
587
588void
589ce4231_set_outputs(struct ce4231_softc *sc, int mask)
590{
591	u_int8_t val;
592
593	val = ce4231_read(sc, CS_MONO_IO_CONTROL) & ~MONO_OUTPUT_MUTE;
594	if (!(mask & OUT_PORT_SPKR))
595		val |= MONO_OUTPUT_MUTE;
596	ce4231_write(sc, CS_MONO_IO_CONTROL, val);
597
598	val = ce4231_read(sc, SP_PIN_CONTROL) & ~(XCTL0_ENABLE | XCTL1_ENABLE);
599	if (!(mask & OUT_PORT_LINE))
600		val |= XCTL0_ENABLE;
601	if (!(mask & OUT_PORT_HP))
602		val |= XCTL1_ENABLE;
603	ce4231_write(sc, SP_PIN_CONTROL, val);
604}
605
606int
607ce4231_get_outputs(struct ce4231_softc *sc)
608{
609	int mask = 0;
610	u_int8_t val;
611
612	if (!(ce4231_read(sc, CS_MONO_IO_CONTROL) & MONO_OUTPUT_MUTE))
613		mask |= OUT_PORT_SPKR;
614
615	val = ce4231_read(sc, SP_PIN_CONTROL);
616	if (!(val & XCTL0_ENABLE))
617		mask |= OUT_PORT_LINE;
618	if (!(val & XCTL1_ENABLE))
619		mask |= OUT_PORT_HP;
620
621	return (mask);
622}
623
624int
625ce4231_set_port(void *addr, mixer_ctrl_t *cp)
626{
627	struct ce4231_softc *sc = (struct ce4231_softc *)addr;
628	u_int8_t l, r;
629
630	DPRINTF(("ce4231_set_port: dev=%d type=%d\n", cp->dev, cp->type));
631
632	switch (cp->dev) {
633
634	case CSAUDIO_DAC_LVL:
635		if (cp->type != AUDIO_MIXER_VALUE)
636			return (EINVAL);
637		l = ce4231_read(sc, SP_LEFT_OUTPUT_CONTROL) &
638		    OUTPUT_ATTEN_MASK;
639		r = ce4231_read(sc, SP_RIGHT_OUTPUT_CONTROL) &
640		    OUTPUT_ATTEN_MASK;
641		l |= (AUDIO_MAX_GAIN -
642		    cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT]) >> 2;
643		r |= (AUDIO_MAX_GAIN -
644		    cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT]) >> 2;
645		ce4231_write(sc, SP_LEFT_OUTPUT_CONTROL, l);
646		ce4231_write(sc, SP_RIGHT_OUTPUT_CONTROL, r);
647		break;
648	case CSAUDIO_DAC_MUTE:
649		if (cp->type != AUDIO_MIXER_ENUM)
650			return (EINVAL);
651		l = ce4231_read(sc, SP_LEFT_OUTPUT_CONTROL) & ~OUTPUT_MUTE;
652		r = ce4231_read(sc, SP_RIGHT_OUTPUT_CONTROL) & ~OUTPUT_MUTE;
653		if (cp->un.ord) {
654			l |= OUTPUT_MUTE;
655			r |= OUTPUT_MUTE;
656		}
657		ce4231_write(sc, SP_LEFT_OUTPUT_CONTROL, l);
658		ce4231_write(sc, SP_RIGHT_OUTPUT_CONTROL, r);
659		break;
660
661	case CSAUDIO_OUTPUTS:
662		if (cp->type != AUDIO_MIXER_SET)
663			return (EINVAL);
664		ce4231_set_outputs(sc, cp->un.mask);
665		break;
666
667	case CSAUDIO_CD_LVL:
668		if (cp->type != AUDIO_MIXER_VALUE)
669			return (EINVAL);
670		l = ce4231_read(sc, SP_LEFT_AUX1_CONTROL) &
671		    AUX_INPUT_ATTEN_MASK;
672		r = ce4231_read(sc, SP_RIGHT_AUX1_CONTROL) &
673		    AUX_INPUT_ATTEN_MASK;
674		l |= (AUDIO_MAX_GAIN -
675		    cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT]) >> 3;
676		r |= (AUDIO_MAX_GAIN -
677		    cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT]) >> 3;
678		ce4231_write(sc, SP_LEFT_AUX1_CONTROL, l);
679		ce4231_write(sc, SP_RIGHT_AUX1_CONTROL, r);
680		break;
681	case CSAUDIO_CD_MUTE:
682		if (cp->type != AUDIO_MIXER_ENUM)
683			return (EINVAL);
684		l = ce4231_read(sc, SP_LEFT_AUX1_CONTROL) & ~AUX_INPUT_MUTE;
685		r = ce4231_read(sc, SP_RIGHT_AUX1_CONTROL) & ~AUX_INPUT_MUTE;
686		if (cp->un.ord) {
687			l |= AUX_INPUT_MUTE;
688			r |= AUX_INPUT_MUTE;
689		}
690		ce4231_write(sc, SP_LEFT_AUX1_CONTROL, l);
691		ce4231_write(sc, SP_RIGHT_AUX1_CONTROL, r);
692		break;
693
694	case CSAUDIO_LINE_IN_LVL:
695		if (cp->type != AUDIO_MIXER_VALUE)
696			return (EINVAL);
697		l = ce4231_read(sc, CS_LEFT_LINE_CONTROL) &
698		    LINE_INPUT_ATTEN_MASK;
699		r = ce4231_read(sc, CS_RIGHT_LINE_CONTROL) &
700		    LINE_INPUT_ATTEN_MASK;
701		l |= (AUDIO_MAX_GAIN -
702		    cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT]) >> 3;
703		r |= (AUDIO_MAX_GAIN -
704		    cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT]) >> 3;
705		ce4231_write(sc, CS_LEFT_LINE_CONTROL, l);
706		ce4231_write(sc, CS_RIGHT_LINE_CONTROL, r);
707		break;
708	case CSAUDIO_LINE_IN_MUTE:
709		l = ce4231_read(sc, CS_LEFT_LINE_CONTROL) & ~LINE_INPUT_MUTE;
710		r = ce4231_read(sc, CS_RIGHT_LINE_CONTROL) & ~LINE_INPUT_MUTE;
711		if (cp->un.ord) {
712			l |= LINE_INPUT_MUTE;
713			r |= LINE_INPUT_MUTE;
714		}
715		ce4231_write(sc, CS_LEFT_LINE_CONTROL, l);
716		ce4231_write(sc, CS_RIGHT_LINE_CONTROL, r);
717		break;
718
719	case CSAUDIO_MONITOR_LVL:
720		if (cp->type != AUDIO_MIXER_VALUE)
721			return (EINVAL);
722		if (cp->un.value.num_channels != 1)
723			return (EINVAL);
724		l = ce4231_read(sc, SP_DIGITAL_MIX) & ~MIX_ATTEN_MASK;
725		l |= (AUDIO_MAX_GAIN -
726		    cp->un.value.level[AUDIO_MIXER_LEVEL_MONO]) &
727		    MIX_ATTEN_MASK;
728		ce4231_write(sc, SP_DIGITAL_MIX, l);
729		break;
730	case CSAUDIO_MONITOR_MUTE:
731		if (cp->type != AUDIO_MIXER_ENUM)
732			return (EINVAL);
733		l = ce4231_read(sc, SP_DIGITAL_MIX) & ~DIGITAL_MIX1_ENABLE;
734		if (!cp->un.ord)
735			l |= DIGITAL_MIX1_ENABLE;
736		ce4231_write(sc, SP_DIGITAL_MIX, l);
737		break;
738
739	case CSAUDIO_REC_LVL:
740		if (cp->type != AUDIO_MIXER_VALUE)
741			return (EINVAL);
742		l = ce4231_read(sc, SP_LEFT_INPUT_CONTROL) & INPUT_GAIN_MASK;
743		r = ce4231_read(sc, SP_RIGHT_INPUT_CONTROL) & INPUT_GAIN_MASK;
744		l = cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT] >> 4;
745		r = cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] >> 4;
746		ce4231_write(sc, SP_LEFT_INPUT_CONTROL, l);
747		ce4231_write(sc, SP_RIGHT_INPUT_CONTROL, r);
748		break;
749	case CSAUDIO_RECORD_SOURCE:
750		if (cp->type != AUDIO_MIXER_ENUM)
751			return (EINVAL);
752		l = ce4231_read(sc, SP_LEFT_INPUT_CONTROL) & INPUT_SOURCE_MASK;
753		r = ce4231_read(sc, SP_RIGHT_INPUT_CONTROL) & INPUT_SOURCE_MASK;
754		l |= cp->un.ord << 6;
755		r |= cp->un.ord << 6;
756		ce4231_write(sc, SP_LEFT_INPUT_CONTROL, l);
757		ce4231_write(sc, SP_RIGHT_INPUT_CONTROL, r);
758		break;
759
760	case CSAUDIO_MIC_PREAMP:
761		if (cp->type != AUDIO_MIXER_ENUM)
762			return (EINVAL);
763		l = ce4231_read(sc, SP_LEFT_INPUT_CONTROL) &
764		    ~INPUT_MIC_GAIN_ENABLE;
765		r = ce4231_read(sc, SP_RIGHT_INPUT_CONTROL) &
766		    ~INPUT_MIC_GAIN_ENABLE;
767		if (cp->un.ord) {
768			l |= INPUT_MIC_GAIN_ENABLE;
769			r |= INPUT_MIC_GAIN_ENABLE;
770		}
771		ce4231_write(sc, SP_LEFT_INPUT_CONTROL, l);
772		ce4231_write(sc, SP_RIGHT_INPUT_CONTROL, r);
773		break;
774
775	default:
776		return (EINVAL);
777	}
778
779	return (0);
780}
781
782int
783ce4231_get_port(void *addr, mixer_ctrl_t *cp)
784{
785	struct ce4231_softc *sc = (struct ce4231_softc *)addr;
786
787	DPRINTF(("ce4231_get_port: port=%d type=%d\n", cp->dev, cp->type));
788
789	switch (cp->dev) {
790
791	case CSAUDIO_DAC_LVL:
792		if (cp->type != AUDIO_MIXER_VALUE)
793			return (EINVAL);
794		cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT] =
795		    AUDIO_MAX_GAIN - ((ce4231_read(sc, SP_LEFT_OUTPUT_CONTROL) &
796		    OUTPUT_ATTEN_BITS) << 2);
797		cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] =
798		    AUDIO_MAX_GAIN - ((ce4231_read(sc, SP_RIGHT_OUTPUT_CONTROL) &
799		    OUTPUT_ATTEN_BITS) << 2);
800		break;
801	case CSAUDIO_DAC_MUTE:
802		if (cp->type != AUDIO_MIXER_ENUM)
803			return (EINVAL);
804		cp->un.ord = (ce4231_read(sc, SP_LEFT_OUTPUT_CONTROL) &
805		    OUTPUT_MUTE) ? 1 : 0;
806		break;
807
808	case CSAUDIO_OUTPUTS:
809		if (cp->type != AUDIO_MIXER_SET)
810			return (EINVAL);
811		cp->un.mask = ce4231_get_outputs(sc);
812		break;
813
814	case CSAUDIO_CD_LVL:
815		if (cp->type != AUDIO_MIXER_VALUE)
816			return (EINVAL);
817		cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT] =
818		    AUDIO_MAX_GAIN - ((ce4231_read(sc, SP_LEFT_AUX1_CONTROL) &
819		    AUX_INPUT_ATTEN_BITS) << 3);
820		cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] =
821		    AUDIO_MAX_GAIN - ((ce4231_read(sc, SP_RIGHT_AUX1_CONTROL) &
822		    AUX_INPUT_ATTEN_BITS) << 3);
823		break;
824	case CSAUDIO_CD_MUTE:
825		if (cp->type != AUDIO_MIXER_ENUM)
826			return (EINVAL);
827		cp->un.ord = (ce4231_read(sc, SP_LEFT_AUX1_CONTROL) &
828		    AUX_INPUT_MUTE) ? 1 : 0;
829		break;
830
831	case CSAUDIO_LINE_IN_LVL:
832		if (cp->type != AUDIO_MIXER_VALUE)
833			return (EINVAL);
834		cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT] =
835		    AUDIO_MAX_GAIN - ((ce4231_read(sc, CS_LEFT_LINE_CONTROL) &
836		    LINE_INPUT_ATTEN_BITS) << 3);
837		cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] =
838		    AUDIO_MAX_GAIN - ((ce4231_read(sc, CS_RIGHT_LINE_CONTROL) &
839		    LINE_INPUT_ATTEN_BITS) << 3);
840		break;
841	case CSAUDIO_LINE_IN_MUTE:
842		if (cp->type != AUDIO_MIXER_ENUM)
843			return (EINVAL);
844		cp->un.ord = (ce4231_read(sc, CS_LEFT_LINE_CONTROL) &
845		    LINE_INPUT_MUTE) ? 1 : 0;
846		break;
847
848	case CSAUDIO_MONITOR_LVL:
849		if (cp->type != AUDIO_MIXER_VALUE)
850			return (EINVAL);
851		if (cp->un.value.num_channels != 1)
852			return (EINVAL);
853		cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] =
854		    AUDIO_MAX_GAIN - (ce4231_read(sc, SP_DIGITAL_MIX) &
855		    MIX_ATTEN_MASK);
856		break;
857	case CSAUDIO_MONITOR_MUTE:
858		if (cp->type != AUDIO_MIXER_ENUM)
859			return (EINVAL);
860		cp->un.ord = (ce4231_read(sc, SP_DIGITAL_MIX) &
861		    DIGITAL_MIX1_ENABLE) ? 0 : 1;
862		break;
863
864	case CSAUDIO_REC_LVL:
865		if (cp->type != AUDIO_MIXER_VALUE)
866			return (EINVAL);
867		cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT] =
868		    (ce4231_read(sc, SP_LEFT_INPUT_CONTROL) &
869		    ~INPUT_GAIN_MASK) << 4;
870		cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] =
871		    (ce4231_read(sc, SP_RIGHT_INPUT_CONTROL) &
872		    ~INPUT_GAIN_MASK) << 4;
873		break;
874	case CSAUDIO_RECORD_SOURCE:
875		if (cp->type != AUDIO_MIXER_ENUM)
876			return (EINVAL);
877		cp->un.ord = (ce4231_read(sc, SP_LEFT_INPUT_CONTROL) &
878		    CS_REC_SRC_BITS) >> 6;
879		break;
880
881	case CSAUDIO_MIC_PREAMP:
882		if (cp->type != AUDIO_MIXER_ENUM)
883			return (EINVAL);
884		cp->un.ord = (ce4231_read(sc, SP_LEFT_INPUT_CONTROL) &
885		    INPUT_MIC_GAIN_ENABLE) ? 1 : 0;
886		break;
887
888	default:
889		return (EINVAL);
890	}
891	return (0);
892}
893
894int
895ce4231_query_devinfo(void *addr, mixer_devinfo_t *dip)
896{
897	size_t nsize = MAX_AUDIO_DEV_LEN;
898	int err = 0;
899
900	switch (dip->index) {
901	case CSAUDIO_INPUT_CLASS:
902		dip->type = AUDIO_MIXER_CLASS;
903		dip->mixer_class = CSAUDIO_INPUT_CLASS;
904		dip->prev = dip->next = AUDIO_MIXER_LAST;
905		strlcpy(dip->label.name, AudioCinputs, nsize);
906		break;
907	case CSAUDIO_OUTPUT_CLASS:
908		dip->type = AUDIO_MIXER_CLASS;
909		dip->mixer_class = CSAUDIO_OUTPUT_CLASS;
910		dip->prev = dip->next = AUDIO_MIXER_LAST;
911		strlcpy(dip->label.name, AudioCoutputs, nsize);
912		break;
913	case CSAUDIO_RECORD_CLASS:
914		dip->type = AUDIO_MIXER_CLASS;
915		dip->mixer_class = CSAUDIO_RECORD_CLASS;
916		dip->prev = dip->next = AUDIO_MIXER_LAST;
917		strlcpy(dip->label.name, AudioCrecord, nsize);
918		break;
919
920	case CSAUDIO_DAC_LVL:
921		dip->type = AUDIO_MIXER_VALUE;
922		dip->mixer_class = CSAUDIO_OUTPUT_CLASS;
923		dip->prev = AUDIO_MIXER_LAST;
924		dip->next = CSAUDIO_DAC_MUTE;
925		strlcpy(dip->label.name, AudioNdac, nsize);
926		dip->un.v.num_channels = 2;
927		dip->un.v.delta = 4;
928		strlcpy(dip->un.v.units.name, AudioNvolume, nsize);
929		break;
930	case CSAUDIO_DAC_MUTE:
931		dip->type = AUDIO_MIXER_ENUM;
932		dip->mixer_class = CSAUDIO_OUTPUT_CLASS;
933		dip->prev = CSAUDIO_DAC_LVL;
934		dip->next = AUDIO_MIXER_LAST;
935		strlcpy(dip->label.name, AudioNmute, nsize);
936		goto onoff;
937
938	case CSAUDIO_OUTPUTS:
939		dip->type = AUDIO_MIXER_SET;
940		dip->mixer_class = CSAUDIO_OUTPUT_CLASS;
941		dip->prev = dip->next = AUDIO_MIXER_LAST;
942		strlcpy(dip->label.name, AudioNoutput, nsize);
943		dip->un.s.num_mem = 3;
944		strlcpy(dip->un.s.member[0].label.name, AudioNline, nsize);
945		dip->un.s.member[0].mask = OUT_PORT_LINE;
946		strlcpy(dip->un.s.member[1].label.name, AudioNheadphone, nsize);
947		dip->un.s.member[1].mask = OUT_PORT_HP;
948		strlcpy(dip->un.s.member[2].label.name, AudioNspeaker, nsize);
949		dip->un.s.member[2].mask = OUT_PORT_SPKR;
950		break;
951
952	case CSAUDIO_CD_LVL:
953		dip->type = AUDIO_MIXER_VALUE;
954		dip->mixer_class = CSAUDIO_INPUT_CLASS;
955		dip->prev = AUDIO_MIXER_LAST;
956		dip->next = CSAUDIO_CD_MUTE;
957		strlcpy(dip->label.name, AudioNcd, nsize);
958		dip->un.v.num_channels = 2;
959		dip->un.v.delta = 8;
960		strlcpy(dip->un.v.units.name, AudioNvolume, nsize);
961		break;
962	case CSAUDIO_CD_MUTE:
963		dip->type = AUDIO_MIXER_ENUM;
964		dip->mixer_class = CSAUDIO_INPUT_CLASS;
965		dip->prev = CSAUDIO_CD_LVL;
966		dip->next = AUDIO_MIXER_LAST;
967		strlcpy(dip->label.name, AudioNmute, nsize);
968		goto onoff;
969
970	case CSAUDIO_LINE_IN_LVL:
971		dip->type = AUDIO_MIXER_VALUE;
972		dip->mixer_class = CSAUDIO_INPUT_CLASS;
973		dip->prev = AUDIO_MIXER_LAST;
974		dip->next = CSAUDIO_LINE_IN_MUTE;
975		strlcpy(dip->label.name, AudioNline, nsize);
976		dip->un.v.num_channels = 2;
977		dip->un.v.delta = 8;
978		strlcpy(dip->un.v.units.name, AudioNvolume, nsize);
979		break;
980	case CSAUDIO_LINE_IN_MUTE:
981		dip->type = AUDIO_MIXER_ENUM;
982		dip->mixer_class = CSAUDIO_INPUT_CLASS;
983		dip->prev = CSAUDIO_LINE_IN_LVL;
984		dip->next = AUDIO_MIXER_LAST;
985		strlcpy(dip->label.name, AudioNmute, nsize);
986		goto onoff;
987
988	case CSAUDIO_MONITOR_LVL:
989		dip->type = AUDIO_MIXER_VALUE;
990		dip->mixer_class = CSAUDIO_OUTPUT_CLASS;
991		dip->prev = AUDIO_MIXER_LAST;
992		dip->next = CSAUDIO_MONITOR_MUTE;
993		strlcpy(dip->label.name, AudioNmonitor, nsize);
994		dip->un.v.num_channels = 1;
995		dip->un.v.delta = 4;
996		strlcpy(dip->un.v.units.name, AudioNvolume, nsize);
997		break;
998	case CSAUDIO_MONITOR_MUTE:
999		dip->type = AUDIO_MIXER_ENUM;
1000		dip->mixer_class = CSAUDIO_OUTPUT_CLASS;
1001		dip->prev = CSAUDIO_MONITOR_LVL;
1002		dip->next = AUDIO_MIXER_LAST;
1003		strlcpy(dip->label.name, AudioNmute, nsize);
1004		goto onoff;
1005
1006	case CSAUDIO_REC_LVL:
1007		dip->type = AUDIO_MIXER_VALUE;
1008		dip->mixer_class = CSAUDIO_RECORD_CLASS;
1009		dip->prev = dip->next = AUDIO_MIXER_LAST;
1010		strlcpy(dip->label.name, AudioNvolume, nsize);
1011		dip->un.v.num_channels = 2;
1012		dip->un.v.delta = 16;
1013		strlcpy(dip->un.v.units.name, AudioNvolume, nsize);
1014		break;
1015	case CSAUDIO_RECORD_SOURCE:
1016		dip->type = AUDIO_MIXER_ENUM;
1017		dip->mixer_class = CSAUDIO_RECORD_CLASS;
1018		dip->prev = dip->next = AUDIO_MIXER_LAST;
1019		strlcpy(dip->label.name, AudioNsource, nsize);
1020		dip->un.e.num_mem = 4;
1021		strlcpy(dip->un.e.member[0].label.name, AudioNline, nsize);
1022		dip->un.e.member[0].ord = REC_PORT_LINE;
1023		strlcpy(dip->un.e.member[1].label.name, AudioNcd, nsize);
1024		dip->un.e.member[1].ord = REC_PORT_CD;
1025		strlcpy(dip->un.e.member[2].label.name, AudioNmicrophone, nsize);
1026		dip->un.e.member[2].ord = REC_PORT_MIC;
1027		strlcpy(dip->un.e.member[3].label.name, AudioNmixerout, nsize);
1028		dip->un.e.member[3].ord = REC_PORT_MIX;
1029		break;
1030
1031	case CSAUDIO_MIC_PREAMP:
1032		dip->type = AUDIO_MIXER_ENUM;
1033		dip->mixer_class = CSAUDIO_RECORD_CLASS;
1034		dip->prev = dip->next = AUDIO_MIXER_LAST;
1035		snprintf(dip->label.name, nsize, "%s_%s", AudioNmicrophone,
1036		   AudioNpreamp);
1037		goto onoff;
1038
1039onoff:
1040		dip->un.e.num_mem = 2;
1041		strlcpy(dip->un.e.member[0].label.name, AudioNon, nsize);
1042		dip->un.e.member[0].ord = 1;
1043		strlcpy(dip->un.e.member[1].label.name, AudioNoff, nsize);
1044		dip->un.e.member[1].ord = 0;
1045		break;
1046
1047	default:
1048		err = ENXIO;
1049	}
1050
1051	return (err);
1052}
1053
1054int
1055ce4231_get_props(void *addr)
1056{
1057	return (AUDIO_PROP_FULLDUPLEX);
1058}
1059
1060/*
1061 * Hardware interrupt handler
1062 */
1063/*
1064 * Don't bother with the AD1848_STATUS register.  It's interrupt bit gets
1065 * set for both recording and playback interrupts.  But we have separate
1066 * handlers for playback and recording, and if we clear the status in
1067 * one handler while there is an interrupt pending for the other direction
1068 * as well, we'll never notice the interrupt for the other direction.
1069 *
1070 * Instead rely solely on CS_IRQ_STATUS, which has separate bits for
1071 * playback and recording interrupts.  Also note that resetting
1072 * AD1848_STATUS clears the interrupt bits in CS_IRQ_STATUS.
1073 */
1074
1075int
1076ce4231_pintr(void *v)
1077{
1078	struct ce4231_softc *sc = (struct ce4231_softc *)v;
1079	u_int32_t csr;
1080	u_int8_t reg;
1081	struct cs_dma *p;
1082	struct cs_chdma *chdma = &sc->sc_pchdma;
1083	int r = 0;
1084
1085	mtx_enter(&audio_lock);
1086	csr = P_READ(sc, EBDMA_DCSR);
1087
1088	reg = ce4231_read(sc, CS_IRQ_STATUS);
1089	if (reg & CS_IRQ_PI) {
1090		ce4231_write(sc, SP_LOWER_BASE_COUNT, 0xff);
1091		ce4231_write(sc, SP_UPPER_BASE_COUNT, 0xff);
1092		ce4231_write(sc, CS_IRQ_STATUS, reg & ~CS_IRQ_PI);
1093	}
1094
1095	P_WRITE(sc, EBDMA_DCSR, csr);
1096
1097	if (csr & EBDCSR_INT)
1098		r = 1;
1099
1100	if ((csr & EBDCSR_TC) || ((csr & EBDCSR_A_LOADED) == 0)) {
1101		u_long nextaddr, togo;
1102
1103		p = chdma->cur_dma;
1104		togo = chdma->segsz - chdma->count;
1105		if (togo == 0) {
1106			nextaddr = (u_int32_t)p->dmamap->dm_segs[0].ds_addr;
1107			chdma->count = togo = chdma->blksz;
1108		} else {
1109			nextaddr = chdma->lastaddr;
1110			if (togo > chdma->blksz)
1111				togo = chdma->blksz;
1112			chdma->count += togo;
1113		}
1114
1115		P_WRITE(sc, EBDMA_DCNT, togo);
1116		P_WRITE(sc, EBDMA_DADDR, nextaddr);
1117		chdma->lastaddr = nextaddr + togo;
1118
1119		if (sc->sc_pintr != NULL)
1120			(*sc->sc_pintr)(sc->sc_parg);
1121		r = 1;
1122	}
1123	mtx_leave(&audio_lock);
1124	return (r);
1125}
1126
1127int
1128ce4231_cintr(void *v)
1129{
1130	struct ce4231_softc *sc = (struct ce4231_softc *)v;
1131	u_int32_t csr;
1132	u_int8_t reg;
1133	struct cs_dma *p;
1134	struct cs_chdma *chdma = &sc->sc_rchdma;
1135	int r = 0;
1136
1137	mtx_enter(&audio_lock);
1138	csr = C_READ(sc, EBDMA_DCSR);
1139
1140	reg = ce4231_read(sc, CS_IRQ_STATUS);
1141	if (reg & CS_IRQ_CI) {
1142		ce4231_write(sc, CS_LOWER_REC_CNT, 0xff);
1143		ce4231_write(sc, CS_UPPER_REC_CNT, 0xff);
1144		ce4231_write(sc, CS_IRQ_STATUS, reg & ~CS_IRQ_CI);
1145	}
1146
1147	C_WRITE(sc, EBDMA_DCSR, csr);
1148
1149	if (csr & EBDCSR_INT)
1150		r = 1;
1151
1152	if ((csr & EBDCSR_TC) || ((csr & EBDCSR_A_LOADED) == 0)) {
1153		u_long nextaddr, togo;
1154
1155		p = chdma->cur_dma;
1156		togo = chdma->segsz - chdma->count;
1157		if (togo == 0) {
1158			nextaddr = (u_int32_t)p->dmamap->dm_segs[0].ds_addr;
1159			chdma->count = togo = chdma->blksz;
1160		} else {
1161			nextaddr = chdma->lastaddr;
1162			if (togo > chdma->blksz)
1163				togo = chdma->blksz;
1164			chdma->count += togo;
1165		}
1166
1167		C_WRITE(sc, EBDMA_DCNT, togo);
1168		C_WRITE(sc, EBDMA_DADDR, nextaddr);
1169		chdma->lastaddr = nextaddr + togo;
1170
1171		if (sc->sc_rintr != NULL)
1172			(*sc->sc_rintr)(sc->sc_rarg);
1173		r = 1;
1174	}
1175	mtx_leave(&audio_lock);
1176	return (r);
1177}
1178
1179void *
1180ce4231_alloc(void *addr, int direction, size_t size, int pool, int flags)
1181{
1182	struct ce4231_softc *sc = (struct ce4231_softc *)addr;
1183	bus_dma_tag_t dmat = sc->sc_dmatag;
1184	struct cs_dma *p;
1185
1186	p = (struct cs_dma *)malloc(sizeof(struct cs_dma), pool, flags);
1187	if (p == NULL)
1188		return (NULL);
1189
1190	if (bus_dmamap_create(dmat, size, 1, size, 0,
1191	    BUS_DMA_NOWAIT, &p->dmamap) != 0)
1192		goto fail;
1193
1194	p->size = size;
1195
1196	if (bus_dmamem_alloc(dmat, size, 64*1024, 0, p->segs,
1197	    sizeof(p->segs)/sizeof(p->segs[0]), &p->nsegs,
1198	    BUS_DMA_NOWAIT) != 0)
1199		goto fail1;
1200
1201	if (bus_dmamem_map(dmat, p->segs, p->nsegs, p->size,
1202	    &p->addr, BUS_DMA_NOWAIT | BUS_DMA_COHERENT) != 0)
1203		goto fail2;
1204
1205	if (bus_dmamap_load(dmat, p->dmamap, p->addr, size, NULL,
1206	    BUS_DMA_NOWAIT) != 0)
1207		goto fail3;
1208
1209	p->next = sc->sc_dmas;
1210	sc->sc_dmas = p;
1211	return (p->addr);
1212
1213fail3:
1214	bus_dmamem_unmap(dmat, p->addr, p->size);
1215fail2:
1216	bus_dmamem_free(dmat, p->segs, p->nsegs);
1217fail1:
1218	bus_dmamap_destroy(dmat, p->dmamap);
1219fail:
1220	free(p, pool, 0);
1221	return (NULL);
1222}
1223
1224void
1225ce4231_free(void *addr, void *ptr, int pool)
1226{
1227	struct ce4231_softc *sc = addr;
1228	bus_dma_tag_t dmat = sc->sc_dmatag;
1229	struct cs_dma *p, **pp;
1230
1231	for (pp = &sc->sc_dmas; (p = *pp) != NULL; pp = &(*pp)->next) {
1232		if (p->addr != ptr)
1233			continue;
1234		bus_dmamap_unload(dmat, p->dmamap);
1235		bus_dmamem_unmap(dmat, p->addr, p->size);
1236		bus_dmamem_free(dmat, p->segs, p->nsegs);
1237		bus_dmamap_destroy(dmat, p->dmamap);
1238		*pp = p->next;
1239		free(p, pool, 0);
1240		return;
1241	}
1242	printf("%s: attempt to free rogue pointer\n", sc->sc_dev.dv_xname);
1243}
1244
1245int
1246ce4231_trigger_output(void *addr, void *start, void *end, int blksize,
1247    void (*intr)(void *), void *arg, struct audio_params *param)
1248{
1249	struct ce4231_softc *sc = addr;
1250	struct cs_dma *p;
1251	struct cs_chdma *chdma = &sc->sc_pchdma;
1252	u_int32_t csr;
1253	vaddr_t n;
1254
1255	sc->sc_pintr = intr;
1256	sc->sc_parg = arg;
1257
1258	for (p = sc->sc_dmas; p->addr != start; p = p->next)
1259		/*EMPTY*/;
1260	if (p == NULL) {
1261		printf("%s: trigger_output: bad addr: %p\n",
1262		    sc->sc_dev.dv_xname, start);
1263		return (EINVAL);
1264	}
1265
1266	n = (char *)end - (char *)start;
1267
1268	/*
1269	 * Do only `blksize' at a time, so audio_pint() is kept
1270	 * synchronous with us...
1271	 */
1272	chdma->cur_dma = p;
1273	chdma->blksz = blksize;
1274	chdma->segsz = n;
1275
1276	if (n > chdma->blksz)
1277		n = chdma->blksz;
1278
1279	chdma->count = n;
1280
1281	csr = P_READ(sc, EBDMA_DCSR);
1282	if (csr & EBDCSR_DMAEN) {
1283		P_WRITE(sc, EBDMA_DCNT, (u_long)n);
1284		P_WRITE(sc, EBDMA_DADDR,
1285		    (u_long)p->dmamap->dm_segs[0].ds_addr);
1286	} else {
1287		P_WRITE(sc, EBDMA_DCSR, EBDCSR_RESET);
1288		P_WRITE(sc, EBDMA_DCSR, sc->sc_burst);
1289
1290		P_WRITE(sc, EBDMA_DCNT, (u_long)n);
1291		P_WRITE(sc, EBDMA_DADDR,
1292		    (u_long)p->dmamap->dm_segs[0].ds_addr);
1293
1294		P_WRITE(sc, EBDMA_DCSR, sc->sc_burst | EBDCSR_DMAEN |
1295		    EBDCSR_INTEN | EBDCSR_CNTEN | EBDCSR_NEXTEN);
1296
1297		ce4231_write(sc, SP_LOWER_BASE_COUNT, 0xff);
1298		ce4231_write(sc, SP_UPPER_BASE_COUNT, 0xff);
1299		ce4231_write(sc, SP_INTERFACE_CONFIG,
1300		    ce4231_read(sc, SP_INTERFACE_CONFIG) | PLAYBACK_ENABLE);
1301	}
1302	chdma->lastaddr = p->dmamap->dm_segs[0].ds_addr + n;
1303
1304	return (0);
1305}
1306
1307int
1308ce4231_trigger_input(void *addr, void *start, void *end, int blksize,
1309    void (*intr)(void *), void *arg, struct audio_params *param)
1310{
1311	struct ce4231_softc *sc = addr;
1312	struct cs_dma *p;
1313	struct cs_chdma *chdma = &sc->sc_rchdma;
1314	u_int32_t csr;
1315	vaddr_t n;
1316
1317	sc->sc_rintr = intr;
1318	sc->sc_rarg = arg;
1319
1320	for (p = sc->sc_dmas; p->addr != start; p = p->next)
1321		/*EMPTY*/;
1322	if (p == NULL) {
1323		printf("%s: trigger_input: bad addr: %p\n",
1324		    sc->sc_dev.dv_xname, start);
1325		return (EINVAL);
1326	}
1327
1328	n = (char *)end - (char *)start;
1329
1330	/*
1331	 * Do only `blksize' at a time, so audio_rint() is kept
1332	 * synchronous with us...
1333	 */
1334	chdma->cur_dma = p;
1335	chdma->blksz = blksize;
1336	chdma->segsz = n;
1337
1338	if (n > chdma->blksz)
1339		n = chdma->blksz;
1340
1341	chdma->count = n;
1342
1343	csr = C_READ(sc, EBDMA_DCSR);
1344	if (csr & EBDCSR_DMAEN) {
1345		C_WRITE(sc, EBDMA_DCNT, (u_long)n);
1346		C_WRITE(sc, EBDMA_DADDR,
1347		    (u_long)p->dmamap->dm_segs[0].ds_addr);
1348	} else {
1349		C_WRITE(sc, EBDMA_DCSR, EBDCSR_RESET);
1350		C_WRITE(sc, EBDMA_DCSR, sc->sc_burst);
1351
1352		C_WRITE(sc, EBDMA_DCNT, (u_long)n);
1353		C_WRITE(sc, EBDMA_DADDR,
1354		    (u_long)p->dmamap->dm_segs[0].ds_addr);
1355
1356		C_WRITE(sc, EBDMA_DCSR, sc->sc_burst | EBDCSR_WRITE |
1357		    EBDCSR_DMAEN | EBDCSR_INTEN | EBDCSR_CNTEN | EBDCSR_NEXTEN);
1358
1359		ce4231_write(sc, CS_LOWER_REC_CNT, 0xff);
1360		ce4231_write(sc, CS_UPPER_REC_CNT, 0xff);
1361		ce4231_write(sc, SP_INTERFACE_CONFIG,
1362		    ce4231_read(sc, SP_INTERFACE_CONFIG) | CAPTURE_ENABLE);
1363	}
1364	chdma->lastaddr = p->dmamap->dm_segs[0].ds_addr + n;
1365
1366	return (0);
1367}
1368