1/* $OpenBSD: tmureg.h,v 1.1.1.1 2006/10/06 21:02:55 miod Exp $ */ 2/* $NetBSD: tmureg.h,v 1.11 2006/03/04 01:55:03 uwe Exp $ */ 3 4/*- 5 * Copyright (C) 1999 SAITOH Masanobu. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the author may not be used to endorse or promote products 16 * derived from this software without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30#ifndef _SH_TMUREG_H_ 31#define _SH_TMUREG_H_ 32#include <sh/devreg.h> 33 34/* 35 * TMU 36 */ 37#define SH3_TOCR 0xfffffe90 38#define SH3_TSTR 0xfffffe92 39#define SH3_TCOR0 0xfffffe94 40#define SH3_TCNT0 0xfffffe98 41#define SH3_TCR0 0xfffffe9c 42#define SH3_TCOR1 0xfffffea0 43#define SH3_TCNT1 0xfffffea4 44#define SH3_TCR1 0xfffffea8 45#define SH3_TCOR2 0xfffffeac 46#define SH3_TCNT2 0xfffffeb0 47#define SH3_TCR2 0xfffffeb4 48#define SH3_TCPR2 0xfffffeb8 49 50#define SH4_TOCR 0xffd80000 51#define SH4_TSTR 0xffd80004 52#define SH4_TCOR0 0xffd80008 53#define SH4_TCNT0 0xffd8000c 54#define SH4_TCR0 0xffd80010 55#define SH4_TCOR1 0xffd80014 56#define SH4_TCNT1 0xffd80018 57#define SH4_TCR1 0xffd8001c 58#define SH4_TCOR2 0xffd80020 59#define SH4_TCNT2 0xffd80024 60#define SH4_TCR2 0xffd80028 61#define SH4_TCPR2 0xffd8002c 62#define SH4_TSTR2 0xfe100004 63#define SH4_TCOR3 0xfe100008 64#define SH4_TCNT3 0xfe10000c 65#define SH4_TCR3 0xfe100010 66#define SH4_TCOR4 0xfe100014 67#define SH4_TCNT4 0xfe100018 68#define SH4_TCR4 0xfe10001c 69 70 71#define TOCR_TCOE 0x01 72#define TSTR_STR2 0x04 73#define TSTR_STR1 0x02 74#define TSTR_STR0 0x01 75#define TCR_ICPF 0x0200 76#define TCR_UNF 0x0100 77#define TCR_ICPE1 0x0080 78#define TCR_ICPE0 0x0040 79#define TCR_UNIE 0x0020 80#define TCR_CKEG1 0x0010 81#define TCR_CKEG0 0x0008 82#define TCR_TPSC2 0x0004 83#define TCR_TPSC1 0x0002 84#define TCR_TPSC0 0x0001 85#define TCR_TPSC_P4 0x0000 86#define TCR_TPSC_P16 0x0001 87#define TCR_TPSC_P64 0x0002 88#define TCR_TPSC_P256 0x0003 89#define SH3_TCR_TPSC_RTC 0x0004 90#define SH3_TCR_TPSC_TCLK 0x0005 91#define SH4_TCR_TPSC_P1024 0x0004 92#define SH4_TCR_TPSC_RTC 0x0006 93#define SH4_TCR_TPSC_TCLK 0x0007 94#define SH4_TSTR2_STR4 0x02 95#define SH4_TSTR2_STR3 0x01 96 97 98#ifndef _LOCORE 99#if defined(SH3) && defined(SH4) 100extern uint32_t __sh_TOCR; 101extern uint32_t __sh_TSTR; 102extern uint32_t __sh_TCOR0; 103extern uint32_t __sh_TCNT0; 104extern uint32_t __sh_TCR0; 105extern uint32_t __sh_TCOR1; 106extern uint32_t __sh_TCNT1; 107extern uint32_t __sh_TCR1; 108extern uint32_t __sh_TCOR2; 109extern uint32_t __sh_TCNT2; 110extern uint32_t __sh_TCR2; 111extern uint32_t __sh_TCPR2; 112#endif /* SH3 && SH4 */ 113#endif /* !_LOCORE */ 114 115#endif /* !_SH_TMUREG_H_ */ 116