1/* $OpenBSD: intr.h,v 1.56 2018/08/20 15:02:07 visa Exp $ */ 2 3/* 4 * Copyright (c) 1997 Per Fogelstrom, Opsycon AB and RTMX Inc, USA. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed under OpenBSD by 17 * Per Fogelstrom, Opsycon AB, Sweden for RTMX Inc, North Carolina USA. 18 * 4. The name of the author may not be used to endorse or promote products 19 * derived from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS 22 * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 23 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY 25 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 * 33 */ 34 35#ifndef _POWERPC_INTR_H_ 36#define _POWERPC_INTR_H_ 37 38#define IPL_NONE 0 39#define IPL_SOFT 1 40#define IPL_SOFTCLOCK 2 41#define IPL_SOFTNET 3 42#define IPL_SOFTTTY 4 43#define IPL_BIO 5 44#define IPL_NET 6 45#define IPL_TTY 7 46#define IPL_VM 8 47#define IPL_AUDIO 9 48#define IPL_CLOCK 10 49#define IPL_SCHED 11 50#define IPL_HIGH 12 51#define IPL_NUM 13 52 53#define IPL_MPFLOOR IPL_TTY 54#define IPL_MPSAFE 0x100 55 56#define IST_NONE 0 57#define IST_PULSE 1 58#define IST_EDGE 2 59#define IST_LEVEL 3 60 61#if defined(_KERNEL) && !defined(_LOCORE) 62 63#include <sys/evcount.h> 64#include <machine/atomic.h> 65 66#define PPC_NIRQ 66 67#define PPC_CLK_IRQ 64 68#define PPC_STAT_IRQ 65 69 70int splraise(int); 71int spllower(int); 72void splx(int); 73 74typedef int (ppc_splraise_t) (int); 75typedef int (ppc_spllower_t) (int); 76typedef void (ppc_splx_t) (int); 77 78extern struct ppc_intr_func { 79 ppc_splraise_t *raise; 80 ppc_spllower_t *lower; 81 ppc_splx_t *x; 82}ppc_intr_func; 83 84extern int ppc_smask[IPL_NUM]; 85 86void ppc_smask_init(void); 87char *ppc_intr_typename(int type); 88 89void do_pending_int(void); 90 91/* SPL asserts */ 92#ifdef DIAGNOSTIC 93/* 94 * Although this function is implemented in MI code, it must be in this MD 95 * header because we don't want this header to include MI includes. 96 */ 97void splassert_fail(int, int, const char *); 98extern int splassert_ctl; 99void splassert_check(int, const char *); 100#define splassert(__wantipl) do { \ 101 if (splassert_ctl > 0) { \ 102 splassert_check(__wantipl, __func__); \ 103 } \ 104} while (0) 105#define splsoftassert(wantipl) splassert(wantipl) 106#else 107#define splassert(wantipl) do { /* nada */ } while (0) 108#define splsoftassert(wantipl) do { /* nada */ } while (0) 109#endif 110 111#define set_sint(p) atomic_setbits_int(&curcpu()->ci_ipending, p) 112 113#define splbio() splraise(IPL_BIO) 114#define splnet() splraise(IPL_NET) 115#define spltty() splraise(IPL_TTY) 116#define splaudio() splraise(IPL_AUDIO) 117#define splclock() splraise(IPL_CLOCK) 118#define splvm() splraise(IPL_VM) 119#define splsched() splhigh() 120#define splstatclock() splhigh() 121#define splsoftclock() splraise(IPL_SOFTCLOCK) 122#define splsoftnet() splraise(IPL_SOFTNET) 123#define splsofttty() splraise(IPL_SOFTTTY) 124 125#define SI_TO_IRQBIT(x) (1 << (x)) 126 127#define SI_SOFTCLOCK 0 /* for IPL_SOFTCLOCK */ 128#define SI_SOFTNET 1 /* for IPL_SOFTNET */ 129#define SI_SOFTTTY 2 /* for IPL_SOFTSERIAL */ 130 131#define SI_NQUEUES 3 132 133#include <sys/mutex.h> 134#include <sys/queue.h> 135 136struct soft_intrhand { 137 TAILQ_ENTRY(soft_intrhand) sih_list; 138 void (*sih_func)(void *); 139 void *sih_arg; 140 struct soft_intrq *sih_siq; 141 int sih_pending; 142}; 143 144struct soft_intrq { 145 TAILQ_HEAD(, soft_intrhand) siq_list; 146 int siq_si; 147 struct mutex siq_mtx; 148}; 149 150void softintr_disestablish(void *); 151void softintr_dispatch(int); 152void *softintr_establish(int, void (*)(void *), void *); 153void softintr_init(void); 154 155void softintr_schedule(void *); 156void dosoftint(int); 157 158#define splhigh() splraise(IPL_HIGH) 159#define spl0() spllower(IPL_NONE) 160 161/* 162 * Interrupt control struct used to control the ICU setup. 163 */ 164 165struct intrhand { 166 TAILQ_ENTRY(intrhand) ih_list; 167 int (*ih_fun)(void *); 168 void *ih_arg; 169 struct evcount ih_count; 170 int ih_type; 171 int ih_level; 172 int ih_flags; 173 int ih_irq; 174 const char *ih_what; 175}; 176 177struct intrq { 178 TAILQ_HEAD(, intrhand) iq_list; /* handler list */ 179 int iq_ipl; /* IPL_ to mask while handling */ 180 int iq_ist; /* share type */ 181}; 182 183extern int ppc_configed_intr_cnt; 184#define MAX_PRECONF_INTR 16 185extern struct intrhand ppc_configed_intr[MAX_PRECONF_INTR]; 186 187void intr_barrier(void *); 188 189#define PPC_IPI_NOP 0 190#define PPC_IPI_DDB 1 191 192void ppc_send_ipi(struct cpu_info *, int); 193 194#endif /* _LOCORE */ 195#endif /* _POWERPC_INTR_H_ */ 196