cache_octeon.c revision 1.4 
1/*	$OpenBSD: cache_octeon.c,v 1.4 2012/04/21 12:20:30 miod Exp $	*/
2/*
3 * Copyright (c) 2010 Takuya ASADA.
4 *
5 * Permission to use, copy, modify, and distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17/*
18 * Copyright (c) 1998-2004 Opsycon AB (www.opsycon.se)
19 *
20 * Redistribution and use in source and binary forms, with or without
21 * modification, are permitted provided that the following conditions
22 * are met:
23 * 1. Redistributions of source code must retain the above copyright
24 *    notice, this list of conditions and the following disclaimer.
25 * 2. Redistributions in binary form must reproduce the above copyright
26 *    notice, this list of conditions and the following disclaimer in the
27 *    documentation and/or other materials provided with the distribution.
28 *
29 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
30 * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
31 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
32 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
33 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
34 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
35 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
36 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
37 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
38 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
39 * SUCH DAMAGE.
40 *
41 */
42
43#include <sys/param.h>
44#include <sys/systm.h>
45#include <sys/kernel.h>
46
47#include <uvm/uvm_extern.h>
48
49#include <mips64/cache.h>
50#include <machine/cpu.h>
51
52#define SYNC() asm volatile("sync\n" ::: "memory")
53#define SYNCI() \
54	asm volatile( \
55		".set push\n" \
56		".set mips64r2\n" \
57		".word 0x041f0000\n" \
58		"nop\n" \
59		".set pop")
60
61void
62Octeon_ConfigCache(struct cpu_info *ci)
63{
64	ci->ci_cacheways = 4;
65	ci->ci_l1instcachesize = 32 * 1024;
66	ci->ci_l1instcacheline = 128;
67	ci->ci_l1datacachesize = 16 * 1024;
68	ci->ci_l1datacacheline = 128;
69	ci->ci_l2size = 128 * 1024;
70	ci->ci_l3size = 0;
71}
72
73void
74Octeon_SyncCache(struct cpu_info *ci)
75{
76	SYNC();
77}
78
79void
80Octeon_InvalidateICache(struct cpu_info *ci, vaddr_t va, size_t len)
81{
82	/* A SYNCI flushes the entire icache on OCTEON */
83	SYNCI();
84}
85
86void
87Octeon_SyncDCachePage(struct cpu_info *ci, vaddr_t va, paddr_t pa)
88{
89}
90
91void
92Octeon_HitSyncDCache(struct cpu_info *ci, vaddr_t va, size_t len)
93{
94}
95
96void
97Octeon_HitInvalidateDCache(struct cpu_info *ci, vaddr_t va, size_t len)
98{
99}
100
101void
102Octeon_IOSyncDCache(struct cpu_info *ci, vaddr_t va, size_t len, int how)
103{
104	switch (how) {
105	default:
106	case CACHE_SYNC_R:
107		break;
108	case CACHE_SYNC_W: /* writeback */
109	case CACHE_SYNC_X: /* writeback and invalidate */
110		SYNC();
111		break;
112	}
113}
114