i82093reg.h revision 1.4 
1/*	$OpenBSD: i82093reg.h,v 1.4 2008/06/26 05:42:10 ray Exp $	*/
2/* $NetBSD: i82093reg.h,v 1.1.2.2 2000/02/21 18:54:07 sommerfeld Exp $ */
3
4/*-
5 * Copyright (c) 2000 The NetBSD Foundation, Inc.
6 * All rights reserved.
7 *
8 * This code is derived from software contributed to The NetBSD Foundation
9 * by RedBack Networks Inc.
10 *
11 * Author: Bill Sommerfeld
12 *
13 * Redistribution and use in source and binary forms, with or without
14 * modification, are permitted provided that the following conditions
15 * are met:
16 * 1. Redistributions of source code must retain the above copyright
17 *    notice, this list of conditions and the following disclaimer.
18 * 2. Redistributions in binary form must reproduce the above copyright
19 *    notice, this list of conditions and the following disclaimer in the
20 *    documentation and/or other materials provided with the distribution.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
23 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
24 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
25 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
32 * POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/*
36 * Typically, the first apic lives here.
37 */
38#define IOAPIC_BASE_DEFAULT	0xfec00000
39
40/*
41 * Memory-space registers.
42 */
43
44/*
45 * The externally visible registers are all 32 bits wide;
46 * store the register number of interest in IOAPIC_REG, and store/fetch
47 * the real value in IOAPIC_DATA.
48 */
49#define	IOAPIC_REG		0x0000
50#define IOAPIC_DATA		0x0010
51
52/*
53 * Internal I/O APIC registers.
54 */
55
56#define IOAPIC_ID		0x00
57
58#define 	IOAPIC_ID_SHIFT		24
59#define		IOAPIC_ID_MASK		0x0f000000
60#define		IOAPIC_ID_MAX		\
61    ((IOAPIC_ID_MASK >> IOAPIC_ID_SHIFT) + 1)
62
63/* Version, and maximum interrupt pin number. */
64
65#define IOAPIC_VER		0x01
66
67#define		IOAPIC_VER_SHIFT		0
68#define		IOAPIC_VER_MASK			0x000000ff
69
70#define		IOAPIC_MAX_SHIFT	       	16
71#define		IOAPIC_MAX_MASK	       	0x00ff0000
72
73/*
74 * Arbitration ID.  Same format as IOAPIC_ID register.
75 */
76#define IOAPIC_ARB		0x02
77
78/*
79 * Redirection table registers.
80 */
81
82#define IOAPIC_REDHI(pin)	(0x11 + ((pin)<<1))
83#define IOAPIC_REDLO(pin)	(0x10 + ((pin)<<1))
84
85#define IOAPIC_REDHI_DEST_SHIFT		24	   /* destination. */
86#define IOAPIC_REDHI_DEST_MASK		0xff000000
87
88#define IOAPIC_REDLO_MASK		0x00010000 /* 0=enabled; 1=masked */
89
90#define IOAPIC_REDLO_LEVEL		0x00008000 /* 0=edge, 1=level */
91#define IOAPIC_REDLO_RIRR		0x00004000 /* remote IRR; read only */
92#define IOAPIC_REDLO_ACTLO		0x00002000 /* 0=act. hi; 1=act. lo */
93#define IOAPIC_REDLO_DELSTS		0x00001000 /* 0=idle; 1=send pending */
94#define IOAPIC_REDLO_DSTMOD		0x00000800 /* 0=physical; 1=logical */
95
96#define IOAPIC_REDLO_DEL_MASK		0x00000700 /* del. mode mask */
97#define IOAPIC_REDLO_DEL_SHIFT		8
98
99#define IOAPIC_REDLO_DEL_FIXED		0
100#define IOAPIC_REDLO_DEL_LOPRI		1
101#define IOAPIC_REDLO_DEL_SMI		2
102#define IOAPIC_REDLO_DEL_NMI		4
103#define IOAPIC_REDLO_DEL_INIT		5
104#define IOAPIC_REDLO_DEL_EXTINT		7
105
106#define IOAPIC_REDLO_VECTOR_MASK	0x000000ff /* delivery vector */
107
108#define IMCR_ADDR		0x22
109#define IMCR_DATA		0x23
110
111#define IMCR_REGISTER		0x70
112#define		IMCR_PIC	0x00
113#define 	IMCR_APIC	0x01
114
115#define ioapic_asm_ack(num) \
116    movl	$0,_C_LABEL(local_apic) + LAPIC_EOI
117