omap3.c revision 1.1
1/* $OpenBSD: omap3.c,v 1.1 2013/09/04 14:38:30 patrick Exp $ */ 2 3/* 4 * Copyright (c) 2011 Uwe Stuehler <uwe@openbsd.org> 5 * 6 * Permission to use, copy, modify, and distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19#include <sys/types.h> 20#include <sys/param.h> 21 22#include <machine/bus.h> 23 24#include <armv7/omap/omapvar.h> 25 26#define PRCM_ADDR 0x48004000 27#define PRCM_SIZE 0x2000 28 29#define INTC_ADDR 0x48200000 30#define INTC_SIZE 0x200 31 32#define GPTIMERx_SIZE 0x100 33#define GPTIMER1_ADDR 0x48318000 34#define GPTIMER1_IRQ 37 35#define GPTIMER2_ADDR 0x49032000 36#define GPTIMER2_IRQ 38 37 38#define WD_ADDR 0x48314000 39#define WD_SIZE 0x80 40 41#define GPIOx_SIZE 0x1000 42#define GPIO1_ADDR 0x48310000 43#define GPIO2_ADDR 0x49050000 44#define GPIO3_ADDR 0x49052000 45#define GPIO4_ADDR 0x49054000 46#define GPIO5_ADDR 0x49056000 47#define GPIO6_ADDR 0x49058000 48 49#define GPIO1_IRQ 29 50#define GPIO2_IRQ 30 51#define GPIO3_IRQ 31 52#define GPIO4_IRQ 32 53#define GPIO5_IRQ 33 54#define GPIO6_IRQ 34 55 56#define UARTx_SIZE 0x400 57#define UART1_ADDR 0x4806A000 58#define UART2_ADDR 0x4806C000 59#define UART3_ADDR 0x49020000 60 61#define UART1_IRQ 72 62#define UART2_IRQ 73 63#define UART3_IRQ 74 64 65#define HSMMCx_SIZE 0x200 66#define HSMMC1_ADDR 0x4809c000 67#define HSMMC1_IRQ 83 68 69#define USBTLL_ADDR 0x48062000 70#define USBTLL_SIZE 0x1000 71 72struct omap_dev omap3_devs[] = { 73 74 /* 75 * Power, Reset and Clock Manager 76 */ 77 78 { .name = "prcm", 79 .unit = 0, 80 .mem = { { PRCM_ADDR, PRCM_SIZE } }, 81 }, 82 83 /* 84 * Interrupt Controller 85 */ 86 87 { .name = "intc", 88 .unit = 0, 89 .mem = { { INTC_ADDR, INTC_SIZE } }, 90 }, 91 92 /* 93 * General Purpose Timers 94 */ 95 96 { .name = "gptimer", 97 .unit = 1, /* XXX see gptimer.c */ 98 .mem = { { GPTIMER1_ADDR, GPTIMERx_SIZE } }, 99 .irq = { GPTIMER1_IRQ } 100 }, 101 102 { .name = "gptimer", 103 .unit = 0, /* XXX see gptimer.c */ 104 .mem = { { GPTIMER2_ADDR, GPTIMERx_SIZE } }, 105 .irq = { GPTIMER2_IRQ } 106 }, 107 108 /* 109 * GPIO 110 */ 111 112 { .name = "omgpio", 113 .unit = 0, 114 .mem = { { GPIO1_ADDR, GPIOx_SIZE } }, 115 .irq = { GPIO1_IRQ } 116 }, 117 118 { .name = "omgpio", 119 .unit = 1, 120 .mem = { { GPIO2_ADDR, GPIOx_SIZE } }, 121 .irq = { GPIO2_IRQ } 122 }, 123 124 { .name = "omgpio", 125 .unit = 2, 126 .mem = { { GPIO3_ADDR, GPIOx_SIZE } }, 127 .irq = { GPIO3_IRQ } 128 }, 129 130 { .name = "omgpio", 131 .unit = 3, 132 .mem = { { GPIO4_ADDR, GPIOx_SIZE } }, 133 .irq = { GPIO4_IRQ } 134 }, 135 136 { .name = "omgpio", 137 .unit = 4, 138 .mem = { { GPIO5_ADDR, GPIOx_SIZE } }, 139 .irq = { GPIO5_IRQ } 140 }, 141 142 { .name = "omgpio", 143 .unit = 5, 144 .mem = { { GPIO6_ADDR, GPIOx_SIZE } }, 145 .irq = { GPIO6_IRQ } 146 }, 147 148 /* 149 * Watchdog Timer 150 */ 151 152 { .name = "omdog", 153 .unit = 0, 154 .mem = { { WD_ADDR, WD_SIZE } } 155 }, 156 157 /* 158 * UART 159 */ 160 161 { .name = "com", 162 .unit = 2, 163 .mem = { { UART3_ADDR, UARTx_SIZE } }, 164 .irq = { UART3_IRQ } 165 }, 166 167 /* 168 * MMC 169 */ 170 171 { .name = "ommmc", 172 .unit = 0, 173 .mem = { { HSMMC1_ADDR, HSMMCx_SIZE } }, 174 .irq = { HSMMC1_IRQ } 175 }, 176 177 /* 178 * USB 179 */ 180 181 { .name = "omusbtll", 182 .unit = 0, 183 .mem = { { USBTLL_ADDR, USBTLL_SIZE } }, 184 }, 185 186 /* Terminator */ 187 { .name = NULL, 188 .unit = 0, 189 } 190}; 191 192void 193omap3_init(void) 194{ 195 omap_set_devs(omap3_devs); 196} 197