acpipci.c revision 1.40
1/* $OpenBSD: acpipci.c,v 1.40 2023/09/12 08:32:58 jmatthew Exp $ */ 2/* 3 * Copyright (c) 2018 Mark Kettenis 4 * 5 * Permission to use, copy, modify, and distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18#include <sys/param.h> 19#include <sys/device.h> 20#include <sys/extent.h> 21#include <sys/malloc.h> 22#include <sys/systm.h> 23 24#include <machine/bus.h> 25 26#include <dev/acpi/acpireg.h> 27#include <dev/acpi/acpivar.h> 28#include <dev/acpi/acpidev.h> 29#include <dev/acpi/amltypes.h> 30#include <dev/acpi/dsdt.h> 31 32#include <dev/pci/pcidevs.h> 33#include <dev/pci/pcireg.h> 34#include <dev/pci/pcivar.h> 35#include <dev/pci/ppbreg.h> 36 37#include <arm64/dev/acpiiort.h> 38 39struct acpipci_mcfg { 40 SLIST_ENTRY(acpipci_mcfg) am_list; 41 42 uint16_t am_segment; 43 uint8_t am_min_bus; 44 uint8_t am_max_bus; 45 46 bus_space_tag_t am_iot; 47 bus_space_handle_t am_ioh; 48 49 struct machine_pci_chipset am_pc; 50}; 51 52struct acpipci_trans { 53 struct acpipci_trans *at_next; 54 bus_space_tag_t at_iot; 55 bus_addr_t at_base; 56 bus_size_t at_size; 57 bus_size_t at_offset; 58}; 59 60struct acpipci_softc { 61 struct device sc_dev; 62 struct acpi_softc *sc_acpi; 63 struct aml_node *sc_node; 64 bus_space_tag_t sc_iot; 65 pci_chipset_tag_t sc_pc; 66 67 struct bus_space sc_bus_iot; 68 struct bus_space sc_bus_memt; 69 struct acpipci_trans *sc_io_trans; 70 struct acpipci_trans *sc_mem_trans; 71 72 struct extent *sc_busex; 73 struct extent *sc_memex; 74 struct extent *sc_ioex; 75 char sc_busex_name[32]; 76 char sc_ioex_name[32]; 77 char sc_memex_name[32]; 78 int sc_bus; 79 uint32_t sc_seg; 80 81 struct interrupt_controller *sc_msi_ic; 82}; 83 84struct acpipci_intr_handle { 85 struct machine_intr_handle aih_ih; 86 bus_dma_tag_t aih_dmat; 87 bus_dmamap_t aih_map; 88}; 89 90int acpipci_match(struct device *, void *, void *); 91void acpipci_attach(struct device *, struct device *, void *); 92 93const struct cfattach acpipci_ca = { 94 sizeof(struct acpipci_softc), acpipci_match, acpipci_attach 95}; 96 97struct cfdriver acpipci_cd = { 98 NULL, "acpipci", DV_DULL 99}; 100 101const char *acpipci_hids[] = { 102 "PNP0A08", 103 NULL 104}; 105 106int acpipci_parse_resources(int, union acpi_resource *, void *); 107int acpipci_bs_map(bus_space_tag_t, bus_addr_t, bus_size_t, int, 108 bus_space_handle_t *); 109paddr_t acpipci_bs_mmap(bus_space_tag_t, bus_addr_t, off_t, int, int); 110 111void acpipci_attach_hook(struct device *, struct device *, 112 struct pcibus_attach_args *); 113int acpipci_bus_maxdevs(void *, int); 114pcitag_t acpipci_make_tag(void *, int, int, int); 115void acpipci_decompose_tag(void *, pcitag_t, int *, int *, int *); 116int acpipci_conf_size(void *, pcitag_t); 117pcireg_t acpipci_conf_read(void *, pcitag_t, int); 118void acpipci_conf_write(void *, pcitag_t, int, pcireg_t); 119int acpipci_probe_device_hook(void *, struct pci_attach_args *); 120 121int acpipci_intr_map(struct pci_attach_args *, pci_intr_handle_t *); 122const char *acpipci_intr_string(void *, pci_intr_handle_t); 123void *acpipci_intr_establish(void *, pci_intr_handle_t, int, 124 struct cpu_info *, int (*)(void *), void *, char *); 125void acpipci_intr_disestablish(void *, void *); 126 127uint32_t acpipci_iort_map_msi(pci_chipset_tag_t, pcitag_t, 128 struct interrupt_controller **); 129 130extern LIST_HEAD(, interrupt_controller) interrupt_controllers; 131 132int 133acpipci_match(struct device *parent, void *match, void *aux) 134{ 135 struct acpi_attach_args *aaa = aux; 136 struct cfdata *cf = match; 137 138 return acpi_matchhids(aaa, acpipci_hids, cf->cf_driver->cd_name); 139} 140 141void 142acpipci_attach(struct device *parent, struct device *self, void *aux) 143{ 144 struct acpi_attach_args *aaa = aux; 145 struct acpipci_softc *sc = (struct acpipci_softc *)self; 146 struct interrupt_controller *ic; 147 struct pcibus_attach_args pba; 148 struct aml_value res; 149 uint64_t bbn = 0; 150 uint64_t seg = 0; 151 152 sc->sc_acpi = (struct acpi_softc *)parent; 153 sc->sc_node = aaa->aaa_node; 154 printf(" %s", sc->sc_node->name); 155 156 if (aml_evalname(sc->sc_acpi, sc->sc_node, "_CRS", 0, NULL, &res)) { 157 printf(": can't find resources\n"); 158 return; 159 } 160 161 aml_evalinteger(sc->sc_acpi, sc->sc_node, "_BBN", 0, NULL, &bbn); 162 sc->sc_bus = bbn; 163 164 aml_evalinteger(sc->sc_acpi, sc->sc_node, "_SEG", 0, NULL, &seg); 165 sc->sc_seg = seg; 166 167 sc->sc_iot = aaa->aaa_memt; 168 169 printf("\n"); 170 171 /* Create extents for our address spaces. */ 172 snprintf(sc->sc_busex_name, sizeof(sc->sc_busex_name), 173 "%s pcibus", sc->sc_dev.dv_xname); 174 snprintf(sc->sc_ioex_name, sizeof(sc->sc_ioex_name), 175 "%s pciio", sc->sc_dev.dv_xname); 176 snprintf(sc->sc_memex_name, sizeof(sc->sc_memex_name), 177 "%s pcimem", sc->sc_dev.dv_xname); 178 sc->sc_busex = extent_create(sc->sc_busex_name, 0, 255, 179 M_DEVBUF, NULL, 0, EX_WAITOK | EX_FILLED); 180 sc->sc_ioex = extent_create(sc->sc_ioex_name, 0, 0xffffffff, 181 M_DEVBUF, NULL, 0, EX_WAITOK | EX_FILLED); 182 sc->sc_memex = extent_create(sc->sc_memex_name, 0, (u_long)-1, 183 M_DEVBUF, NULL, 0, EX_WAITOK | EX_FILLED); 184 185 aml_parse_resource(&res, acpipci_parse_resources, sc); 186 187 memcpy(&sc->sc_bus_iot, sc->sc_iot, sizeof(sc->sc_bus_iot)); 188 sc->sc_bus_iot.bus_private = sc->sc_io_trans; 189 sc->sc_bus_iot._space_map = acpipci_bs_map; 190 sc->sc_bus_iot._space_mmap = acpipci_bs_mmap; 191 memcpy(&sc->sc_bus_memt, sc->sc_iot, sizeof(sc->sc_bus_memt)); 192 sc->sc_bus_memt.bus_private = sc->sc_mem_trans; 193 sc->sc_bus_memt._space_map = acpipci_bs_map; 194 sc->sc_bus_memt._space_mmap = acpipci_bs_mmap; 195 196 LIST_FOREACH(ic, &interrupt_controllers, ic_list) { 197 if (ic->ic_establish_msi) 198 break; 199 } 200 sc->sc_msi_ic = ic; 201 202 sc->sc_pc = pci_lookup_segment(seg); 203 KASSERT(sc->sc_pc->pc_intr_v == NULL); 204 205 sc->sc_pc->pc_probe_device_hook = acpipci_probe_device_hook; 206 207 sc->sc_pc->pc_intr_v = sc; 208 sc->sc_pc->pc_intr_map = acpipci_intr_map; 209 sc->sc_pc->pc_intr_map_msi = _pci_intr_map_msi; 210 sc->sc_pc->pc_intr_map_msix = _pci_intr_map_msix; 211 sc->sc_pc->pc_intr_string = acpipci_intr_string; 212 sc->sc_pc->pc_intr_establish = acpipci_intr_establish; 213 sc->sc_pc->pc_intr_disestablish = acpipci_intr_disestablish; 214 215 memset(&pba, 0, sizeof(pba)); 216 pba.pba_busname = "pci"; 217 pba.pba_iot = &sc->sc_bus_iot; 218 pba.pba_memt = &sc->sc_bus_memt; 219 pba.pba_dmat = aaa->aaa_dmat; 220 pba.pba_pc = sc->sc_pc; 221 pba.pba_busex = sc->sc_busex; 222 pba.pba_ioex = sc->sc_ioex; 223 pba.pba_memex = sc->sc_memex; 224 pba.pba_pmemex = sc->sc_memex; 225 pba.pba_domain = pci_ndomains++; 226 pba.pba_bus = sc->sc_bus; 227 if (sc->sc_msi_ic) 228 pba.pba_flags |= PCI_FLAGS_MSI_ENABLED; 229 230 config_found(self, &pba, NULL); 231} 232 233int 234acpipci_parse_resources(int crsidx, union acpi_resource *crs, void *arg) 235{ 236 struct acpipci_softc *sc = arg; 237 struct acpipci_trans *at; 238 int type = AML_CRSTYPE(crs); 239 int restype, tflags; 240 u_long min, len = 0, tra; 241 242 switch (type) { 243 case LR_WORD: 244 restype = crs->lr_word.type; 245 tflags = crs->lr_word.tflags; 246 min = crs->lr_word._min; 247 len = crs->lr_word._len; 248 tra = crs->lr_word._tra; 249 break; 250 case LR_DWORD: 251 restype = crs->lr_dword.type; 252 tflags = crs->lr_dword.tflags; 253 min = crs->lr_dword._min; 254 len = crs->lr_dword._len; 255 tra = crs->lr_dword._tra; 256 break; 257 case LR_QWORD: 258 restype = crs->lr_qword.type; 259 tflags = crs->lr_qword.tflags; 260 min = crs->lr_qword._min; 261 len = crs->lr_qword._len; 262 tra = crs->lr_qword._tra; 263 break; 264 case LR_MEM32FIXED: 265 restype = LR_TYPE_MEMORY; 266 tflags = 0; 267 min = crs->lr_m32fixed._bas; 268 len = crs->lr_m32fixed._len; 269 tra = 0; 270 break; 271 } 272 273 if (len == 0) 274 return 0; 275 276 switch (restype) { 277 case LR_TYPE_MEMORY: 278 if (tflags & LR_MEMORY_TTP) 279 return 0; 280 extent_free(sc->sc_memex, min, len, EX_WAITOK); 281 at = malloc(sizeof(struct acpipci_trans), M_DEVBUF, M_WAITOK); 282 at->at_iot = sc->sc_iot; 283 at->at_base = min; 284 at->at_size = len; 285 at->at_offset = tra; 286 at->at_next = sc->sc_mem_trans; 287 sc->sc_mem_trans = at; 288 break; 289 case LR_TYPE_IO: 290 /* 291 * Don't check _TTP as various firmwares don't set it, 292 * even though they should!! 293 */ 294 extent_free(sc->sc_ioex, min, len, EX_WAITOK); 295 at = malloc(sizeof(struct acpipci_trans), M_DEVBUF, M_WAITOK); 296 at->at_iot = sc->sc_iot; 297 at->at_base = min; 298 at->at_size = len; 299 at->at_offset = tra; 300 at->at_next = sc->sc_io_trans; 301 sc->sc_io_trans = at; 302 break; 303 case LR_TYPE_BUS: 304 extent_free(sc->sc_busex, min, len, EX_WAITOK); 305 /* 306 * Let _CRS minimum bus number override _BBN. 307 */ 308 sc->sc_bus = min; 309 break; 310 } 311 312 return 0; 313} 314 315void 316acpipci_attach_hook(struct device *parent, struct device *self, 317 struct pcibus_attach_args *pba) 318{ 319} 320 321int 322acpipci_bus_maxdevs(void *v, int bus) 323{ 324 return 32; 325} 326 327pcitag_t 328acpipci_make_tag(void *v, int bus, int device, int function) 329{ 330 return ((bus << 20) | (device << 15) | (function << 12)); 331} 332 333void 334acpipci_decompose_tag(void *v, pcitag_t tag, int *bp, int *dp, int *fp) 335{ 336 if (bp != NULL) 337 *bp = (tag >> 20) & 0xff; 338 if (dp != NULL) 339 *dp = (tag >> 15) & 0x1f; 340 if (fp != NULL) 341 *fp = (tag >> 12) & 0x7; 342} 343 344int 345acpipci_conf_size(void *v, pcitag_t tag) 346{ 347 return PCIE_CONFIG_SPACE_SIZE; 348} 349 350pcireg_t 351acpipci_conf_read(void *v, pcitag_t tag, int reg) 352{ 353 struct acpipci_mcfg *am = v; 354 355 if (tag < (am->am_min_bus << 20) || 356 tag >= ((am->am_max_bus + 1) << 20)) 357 return 0xffffffff; 358 359 return bus_space_read_4(am->am_iot, am->am_ioh, tag | reg); 360} 361 362void 363acpipci_conf_write(void *v, pcitag_t tag, int reg, pcireg_t data) 364{ 365 struct acpipci_mcfg *am = v; 366 367 if (tag < (am->am_min_bus << 20) || 368 tag >= ((am->am_max_bus + 1) << 20)) 369 return; 370 371 bus_space_write_4(am->am_iot, am->am_ioh, tag | reg, data); 372} 373 374int 375acpipci_probe_device_hook(void *v, struct pci_attach_args *pa) 376{ 377 struct acpipci_mcfg *am = v; 378 struct acpipci_trans *at; 379 struct acpi_table_header *hdr; 380 struct acpi_iort *iort = NULL; 381 struct acpi_iort_node *node; 382 struct acpi_iort_mapping *map; 383 struct acpi_iort_rc_node *rc; 384 struct acpi_q *entry; 385 uint32_t rid, offset; 386 int i; 387 388 rid = pci_requester_id(pa->pa_pc, pa->pa_tag); 389 390 /* Look for IORT table. */ 391 SIMPLEQ_FOREACH(entry, &acpi_softc->sc_tables, q_next) { 392 hdr = entry->q_table; 393 if (strncmp(hdr->signature, IORT_SIG, 394 sizeof(hdr->signature)) == 0) { 395 iort = entry->q_table; 396 break; 397 } 398 } 399 if (iort == NULL) 400 return 0; 401 402 /* Find our root complex. */ 403 offset = iort->offset; 404 for (i = 0; i < iort->number_of_nodes; i++) { 405 node = (struct acpi_iort_node *)((char *)iort + offset); 406 if (node->type == ACPI_IORT_ROOT_COMPLEX) { 407 rc = (struct acpi_iort_rc_node *)&node[1]; 408 if (rc->segment == am->am_segment) 409 break; 410 } 411 offset += node->length; 412 } 413 414 /* No RC found? Weird. */ 415 if (i >= iort->number_of_nodes) 416 return 0; 417 418 /* Find our output base towards SMMU. */ 419 map = (struct acpi_iort_mapping *)((char *)node + node->mapping_offset); 420 for (i = 0; i < node->number_of_mappings; i++) { 421 offset = map[i].output_reference; 422 423 if (map[i].flags & ACPI_IORT_MAPPING_SINGLE) { 424 rid = map[i].output_base; 425 break; 426 } 427 428 /* Mapping encodes number of IDs in the range minus one. */ 429 if (map[i].input_base <= rid && 430 rid <= map[i].input_base + map[i].number_of_ids) { 431 rid = map[i].output_base + (rid - map[i].input_base); 432 break; 433 } 434 } 435 436 /* No mapping found? Even weirder. */ 437 if (i >= node->number_of_mappings) 438 return 0; 439 440 node = (struct acpi_iort_node *)((char *)iort + offset); 441 if (node->type == ACPI_IORT_SMMU || node->type == ACPI_IORT_SMMU_V3) { 442 pa->pa_dmat = acpiiort_smmu_map(node, rid, pa->pa_dmat); 443 for (at = pa->pa_iot->bus_private; at; at = at->at_next) { 444 acpiiort_smmu_reserve_region(node, rid, 445 at->at_base, at->at_size); 446 } 447 for (at = pa->pa_memt->bus_private; at; at = at->at_next) { 448 acpiiort_smmu_reserve_region(node, rid, 449 at->at_base, at->at_size); 450 } 451 } 452 453 return 0; 454} 455 456int 457acpipci_intr_swizzle(struct pci_attach_args *pa, pci_intr_handle_t *ihp) 458{ 459 int dev, swizpin; 460 pcireg_t id; 461 462 if (pa->pa_bridgeih == NULL) 463 return -1; 464 465 pci_decompose_tag(pa->pa_pc, pa->pa_tag, NULL, &dev, NULL); 466 swizpin = PPB_INTERRUPT_SWIZZLE(pa->pa_rawintrpin, dev); 467 468 /* 469 * Qualcomm SC8280XP Root Complex violates PCI bridge 470 * interrupt swizzling rules. 471 */ 472 if (pa->pa_bridgetag) { 473 id = pci_conf_read(pa->pa_pc, *pa->pa_bridgetag, PCI_ID_REG); 474 if (PCI_VENDOR(id) == PCI_VENDOR_QUALCOMM && 475 PCI_PRODUCT(id) == PCI_PRODUCT_QUALCOMM_SC8280XP_PCIE) { 476 swizpin = (((swizpin - 1) + 3) % 4) + 1; 477 } 478 } 479 480 if (pa->pa_bridgeih[swizpin - 1].ih_type == PCI_NONE) 481 return -1; 482 483 *ihp = pa->pa_bridgeih[swizpin - 1]; 484 return 0; 485} 486 487int 488acpipci_getirq(int crsidx, union acpi_resource *crs, void *arg) 489{ 490 int *irq = arg; 491 492 switch (AML_CRSTYPE(crs)) { 493 case SR_IRQ: 494 *irq = ffs(letoh16(crs->sr_irq.irq_mask)) - 1; 495 break; 496 case LR_EXTIRQ: 497 *irq = letoh32(crs->lr_extirq.irq[0]); 498 break; 499 default: 500 break; 501 } 502 503 return 0; 504} 505 506int 507acpipci_intr_link(struct acpipci_softc *sc, struct aml_node *node, 508 struct aml_value *val) 509{ 510 struct aml_value res; 511 int64_t sta; 512 int irq = -1; 513 514 if (val->type == AML_OBJTYPE_NAMEREF) { 515 node = aml_searchrel(node, aml_getname(val->v_nameref)); 516 if (node) 517 val = node->value; 518 } 519 if (val->type == AML_OBJTYPE_OBJREF) 520 val = val->v_objref.ref; 521 if (val->type != AML_OBJTYPE_DEVICE) 522 return -1; 523 524 sta = acpi_getsta(sc->sc_acpi, val->node); 525 if ((sta & STA_PRESENT) == 0) 526 return -1; 527 528 if (aml_evalname(sc->sc_acpi, val->node, "_CRS", 0, NULL, &res)) 529 return -1; 530 aml_parse_resource(&res, acpipci_getirq, &irq); 531 aml_freevalue(&res); 532 533 return irq; 534} 535 536int 537acpipci_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp) 538{ 539 struct acpipci_softc *sc = pa->pa_pc->pc_intr_v; 540 struct aml_node *node = sc->sc_node; 541 struct aml_value res; 542 uint64_t addr, pin, source, index; 543 int i; 544 545 /* 546 * If we're behind a bridge, we need to look for a _PRT for 547 * it. If we don't find a _PRT, we need to swizzle. If we're 548 * not behind a bridge we need to look for a _PRT on the host 549 * bridge node itself. 550 */ 551 if (pa->pa_bridgetag) { 552 node = acpi_find_pci(pa->pa_pc, *pa->pa_bridgetag); 553 if (node == NULL) 554 return acpipci_intr_swizzle(pa, ihp); 555 } 556 557 if (aml_evalname(sc->sc_acpi, node, "_PRT", 0, NULL, &res)) 558 return acpipci_intr_swizzle(pa, ihp); 559 560 if (res.type != AML_OBJTYPE_PACKAGE) 561 return -1; 562 563 for (i = 0; i < res.length; i++) { 564 struct aml_value *val = res.v_package[i]; 565 566 if (val->type != AML_OBJTYPE_PACKAGE) 567 continue; 568 if (val->length != 4) 569 continue; 570 if (val->v_package[0]->type != AML_OBJTYPE_INTEGER || 571 val->v_package[1]->type != AML_OBJTYPE_INTEGER || 572 val->v_package[3]->type != AML_OBJTYPE_INTEGER) 573 continue; 574 575 addr = val->v_package[0]->v_integer; 576 pin = val->v_package[1]->v_integer; 577 if (ACPI_ADR_PCIDEV(addr) != pa->pa_device || 578 ACPI_ADR_PCIFUN(addr) != 0xffff || 579 pin != pa->pa_intrpin - 1) 580 continue; 581 582 if (val->v_package[2]->type == AML_OBJTYPE_INTEGER) { 583 source = val->v_package[2]->v_integer; 584 index = val->v_package[3]->v_integer; 585 } else { 586 source = 0; 587 index = acpipci_intr_link(sc, node, val->v_package[2]); 588 } 589 if (source != 0 || index == -1) 590 continue; 591 592 ihp->ih_pc = pa->pa_pc; 593 ihp->ih_tag = pa->pa_tag; 594 ihp->ih_intrpin = index; 595 ihp->ih_type = PCI_INTX; 596 597 return 0; 598 } 599 600 return -1; 601} 602 603const char * 604acpipci_intr_string(void *v, pci_intr_handle_t ih) 605{ 606 static char irqstr[32]; 607 608 switch (ih.ih_type) { 609 case PCI_MSI: 610 return "msi"; 611 case PCI_MSIX: 612 return "msix"; 613 } 614 615 snprintf(irqstr, sizeof(irqstr), "irq %d", ih.ih_intrpin); 616 return irqstr; 617} 618 619void * 620acpipci_intr_establish(void *v, pci_intr_handle_t ih, int level, 621 struct cpu_info *ci, int (*func)(void *), void *arg, char *name) 622{ 623 struct acpipci_softc *sc = v; 624 struct acpipci_intr_handle *aih; 625 void *cookie; 626 627 KASSERT(ih.ih_type != PCI_NONE); 628 629 if (ih.ih_type != PCI_INTX) { 630 struct interrupt_controller *ic = sc->sc_msi_ic; 631 bus_dma_segment_t seg; 632 uint64_t addr, data; 633 634 KASSERT(ic); 635 636 /* Map Requester ID through IORT to get sideband data. */ 637 data = acpipci_iort_map_msi(ih.ih_pc, ih.ih_tag, &ic); 638 cookie = ic->ic_establish_msi(ic->ic_cookie, &addr, 639 &data, level, ci, func, arg, name); 640 if (cookie == NULL) 641 return NULL; 642 643 aih = malloc(sizeof(*aih), M_DEVBUF, M_WAITOK); 644 aih->aih_ih.ih_ic = ic; 645 aih->aih_ih.ih_ih = cookie; 646 aih->aih_dmat = ih.ih_dmat; 647 648 if (bus_dmamap_create(aih->aih_dmat, sizeof(uint32_t), 1, 649 sizeof(uint32_t), 0, BUS_DMA_WAITOK, &aih->aih_map)) { 650 free(aih, M_DEVBUF, sizeof(*aih)); 651 ic->ic_disestablish(cookie); 652 return NULL; 653 } 654 655 memset(&seg, 0, sizeof(seg)); 656 seg.ds_addr = addr; 657 seg.ds_len = sizeof(uint32_t); 658 659 if (bus_dmamap_load_raw(aih->aih_dmat, aih->aih_map, 660 &seg, 1, sizeof(uint32_t), BUS_DMA_WAITOK)) { 661 bus_dmamap_destroy(aih->aih_dmat, aih->aih_map); 662 free(aih, M_DEVBUF, sizeof(*aih)); 663 ic->ic_disestablish(cookie); 664 return NULL; 665 } 666 667 addr = aih->aih_map->dm_segs[0].ds_addr; 668 if (ih.ih_type == PCI_MSIX) { 669 pci_msix_enable(ih.ih_pc, ih.ih_tag, 670 &sc->sc_bus_memt, ih.ih_intrpin, addr, data); 671 } else 672 pci_msi_enable(ih.ih_pc, ih.ih_tag, addr, data); 673 674 cookie = aih; 675 } else { 676 if (ci != NULL && !CPU_IS_PRIMARY(ci)) 677 return NULL; 678 cookie = acpi_intr_establish(ih.ih_intrpin, 0, level, 679 func, arg, name); 680 } 681 682 return cookie; 683} 684 685void 686acpipci_intr_disestablish(void *v, void *cookie) 687{ 688 struct acpipci_intr_handle *aih = cookie; 689 struct interrupt_controller *ic = aih->aih_ih.ih_ic; 690 691 if (ic->ic_establish_msi) { 692 ic->ic_disestablish(aih->aih_ih.ih_ih); 693 bus_dmamap_unload(aih->aih_dmat, aih->aih_map); 694 bus_dmamap_destroy(aih->aih_dmat, aih->aih_map); 695 free(aih, M_DEVBUF, sizeof(*aih)); 696 } else 697 acpi_intr_disestablish(cookie); 698} 699 700/* 701 * Translate memory address if needed. 702 */ 703int 704acpipci_bs_map(bus_space_tag_t t, bus_addr_t addr, bus_size_t size, 705 int flags, bus_space_handle_t *bshp) 706{ 707 struct acpipci_trans *at; 708 709 for (at = t->bus_private; at; at = at->at_next) { 710 if (addr >= at->at_base && addr < at->at_base + at->at_size) { 711 return bus_space_map(at->at_iot, 712 addr + at->at_offset, size, flags, bshp); 713 } 714 } 715 716 return ENXIO; 717} 718 719paddr_t 720acpipci_bs_mmap(bus_space_tag_t t, bus_addr_t addr, off_t off, 721 int prot, int flags) 722{ 723 struct acpipci_trans *at; 724 725 for (at = t->bus_private; at; at = at->at_next) { 726 if (addr >= at->at_base && addr < at->at_base + at->at_size) { 727 return bus_space_mmap(at->at_iot, 728 addr + at->at_offset, off, prot, flags); 729 } 730 } 731 732 return -1; 733} 734 735SLIST_HEAD(,acpipci_mcfg) acpipci_mcfgs = 736 SLIST_HEAD_INITIALIZER(acpipci_mcfgs); 737 738void 739pci_mcfg_init(bus_space_tag_t iot, bus_addr_t addr, int segment, 740 int min_bus, int max_bus) 741{ 742 struct acpipci_mcfg *am; 743 744 am = malloc(sizeof(struct acpipci_mcfg), M_DEVBUF, M_WAITOK | M_ZERO); 745 am->am_segment = segment; 746 am->am_min_bus = min_bus; 747 am->am_max_bus = max_bus; 748 749 am->am_iot = iot; 750 if (bus_space_map(iot, addr, (max_bus + 1) << 20, 0, &am->am_ioh)) 751 panic("%s: can't map config space", __func__); 752 753 am->am_pc.pc_conf_v = am; 754 am->am_pc.pc_attach_hook = acpipci_attach_hook; 755 am->am_pc.pc_bus_maxdevs = acpipci_bus_maxdevs; 756 am->am_pc.pc_make_tag = acpipci_make_tag; 757 am->am_pc.pc_decompose_tag = acpipci_decompose_tag; 758 am->am_pc.pc_conf_size = acpipci_conf_size; 759 am->am_pc.pc_conf_read = acpipci_conf_read; 760 am->am_pc.pc_conf_write = acpipci_conf_write; 761 SLIST_INSERT_HEAD(&acpipci_mcfgs, am, am_list); 762} 763 764pcireg_t 765acpipci_dummy_conf_read(void *v, pcitag_t tag, int reg) 766{ 767 return 0xffffffff; 768} 769 770void 771acpipci_dummy_conf_write(void *v, pcitag_t tag, int reg, pcireg_t data) 772{ 773} 774 775struct machine_pci_chipset acpipci_dummy_chipset = { 776 .pc_attach_hook = acpipci_attach_hook, 777 .pc_bus_maxdevs = acpipci_bus_maxdevs, 778 .pc_make_tag = acpipci_make_tag, 779 .pc_decompose_tag = acpipci_decompose_tag, 780 .pc_conf_size = acpipci_conf_size, 781 .pc_conf_read = acpipci_dummy_conf_read, 782 .pc_conf_write = acpipci_dummy_conf_write, 783}; 784 785pci_chipset_tag_t 786pci_lookup_segment(int segment) 787{ 788 struct acpipci_mcfg *am; 789 790 SLIST_FOREACH(am, &acpipci_mcfgs, am_list) { 791 if (am->am_segment == segment) 792 return &am->am_pc; 793 } 794 795 return &acpipci_dummy_chipset; 796} 797 798/* 799 * IORT support. 800 */ 801 802uint32_t acpipci_iort_map(struct acpi_iort *, uint32_t, uint32_t, 803 struct interrupt_controller **); 804 805uint32_t 806acpipci_iort_map_node(struct acpi_iort *iort, 807 struct acpi_iort_node *node, uint32_t id, struct interrupt_controller **ic) 808{ 809 struct acpi_iort_mapping *map = 810 (struct acpi_iort_mapping *)((char *)node + node->mapping_offset); 811 int i; 812 813 for (i = 0; i < node->number_of_mappings; i++) { 814 uint32_t offset = map[i].output_reference; 815 816 if (map[i].flags & ACPI_IORT_MAPPING_SINGLE) { 817 id = map[i].output_base; 818 return acpipci_iort_map(iort, offset, id, ic); 819 } 820 821 /* Mapping encodes number of IDs in the range minus one. */ 822 if (map[i].input_base <= id && 823 id <= map[i].input_base + map[i].number_of_ids) { 824 id = map[i].output_base + (id - map[i].input_base); 825 return acpipci_iort_map(iort, offset, id, ic); 826 } 827 } 828 829 return id; 830} 831 832uint32_t 833acpipci_iort_map(struct acpi_iort *iort, uint32_t offset, uint32_t id, 834 struct interrupt_controller **ic) 835{ 836 struct acpi_iort_node *node = 837 (struct acpi_iort_node *)((char *)iort + offset); 838 struct interrupt_controller *icl; 839 struct acpi_iort_its_node *itsn; 840 int i; 841 842 switch (node->type) { 843 case ACPI_IORT_ITS: 844 itsn = (struct acpi_iort_its_node *)&node[1]; 845 LIST_FOREACH(icl, &interrupt_controllers, ic_list) { 846 for (i = 0; i < itsn->number_of_itss; i++) { 847 if (icl->ic_gic_its_id == itsn->its_ids[i]) { 848 *ic = icl; 849 break; 850 } 851 } 852 } 853 854 return id; 855 case ACPI_IORT_SMMU: 856 case ACPI_IORT_SMMU_V3: 857 return acpipci_iort_map_node(iort, node, id, ic); 858 } 859 860 return id; 861} 862 863uint32_t 864acpipci_iort_map_msi(pci_chipset_tag_t pc, pcitag_t tag, 865 struct interrupt_controller **ic) 866{ 867 struct acpipci_softc *sc = pc->pc_intr_v; 868 struct acpi_table_header *hdr; 869 struct acpi_iort *iort = NULL; 870 struct acpi_iort_node *node; 871 struct acpi_iort_rc_node *rc; 872 struct acpi_q *entry; 873 uint32_t rid, offset; 874 int i; 875 876 rid = pci_requester_id(pc, tag); 877 878 /* Look for IORT table. */ 879 SIMPLEQ_FOREACH(entry, &sc->sc_acpi->sc_tables, q_next) { 880 hdr = entry->q_table; 881 if (strncmp(hdr->signature, IORT_SIG, 882 sizeof(hdr->signature)) == 0) { 883 iort = entry->q_table; 884 break; 885 } 886 } 887 if (iort == NULL) 888 return rid; 889 890 /* Find our root complex and map. */ 891 offset = iort->offset; 892 for (i = 0; i < iort->number_of_nodes; i++) { 893 node = (struct acpi_iort_node *)((char *)iort + offset); 894 switch (node->type) { 895 case ACPI_IORT_ROOT_COMPLEX: 896 rc = (struct acpi_iort_rc_node *)&node[1]; 897 if (rc->segment == sc->sc_seg) 898 return acpipci_iort_map_node(iort, node, rid, 899 ic); 900 break; 901 } 902 offset += node->length; 903 } 904 905 return rid; 906} 907