acpipci.c revision 1.39
1/* $OpenBSD: acpipci.c,v 1.39 2023/04/18 12:39:32 kettenis Exp $ */ 2/* 3 * Copyright (c) 2018 Mark Kettenis 4 * 5 * Permission to use, copy, modify, and distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18#include <sys/param.h> 19#include <sys/device.h> 20#include <sys/extent.h> 21#include <sys/malloc.h> 22#include <sys/systm.h> 23 24#include <machine/bus.h> 25 26#include <dev/acpi/acpireg.h> 27#include <dev/acpi/acpivar.h> 28#include <dev/acpi/acpidev.h> 29#include <dev/acpi/amltypes.h> 30#include <dev/acpi/dsdt.h> 31 32#include <dev/pci/pcidevs.h> 33#include <dev/pci/pcireg.h> 34#include <dev/pci/pcivar.h> 35#include <dev/pci/ppbreg.h> 36 37#include <arm64/dev/acpiiort.h> 38 39struct acpipci_mcfg { 40 SLIST_ENTRY(acpipci_mcfg) am_list; 41 42 uint16_t am_segment; 43 uint8_t am_min_bus; 44 uint8_t am_max_bus; 45 46 bus_space_tag_t am_iot; 47 bus_space_handle_t am_ioh; 48 49 struct machine_pci_chipset am_pc; 50}; 51 52struct acpipci_trans { 53 struct acpipci_trans *at_next; 54 bus_space_tag_t at_iot; 55 bus_addr_t at_base; 56 bus_size_t at_size; 57 bus_size_t at_offset; 58}; 59 60struct acpipci_softc { 61 struct device sc_dev; 62 struct acpi_softc *sc_acpi; 63 struct aml_node *sc_node; 64 bus_space_tag_t sc_iot; 65 pci_chipset_tag_t sc_pc; 66 67 struct bus_space sc_bus_iot; 68 struct bus_space sc_bus_memt; 69 struct acpipci_trans *sc_io_trans; 70 struct acpipci_trans *sc_mem_trans; 71 72 struct extent *sc_busex; 73 struct extent *sc_memex; 74 struct extent *sc_ioex; 75 char sc_busex_name[32]; 76 char sc_ioex_name[32]; 77 char sc_memex_name[32]; 78 int sc_bus; 79 uint32_t sc_seg; 80 81 struct interrupt_controller *sc_msi_ic; 82}; 83 84struct acpipci_intr_handle { 85 struct machine_intr_handle aih_ih; 86 bus_dma_tag_t aih_dmat; 87 bus_dmamap_t aih_map; 88}; 89 90int acpipci_match(struct device *, void *, void *); 91void acpipci_attach(struct device *, struct device *, void *); 92 93const struct cfattach acpipci_ca = { 94 sizeof(struct acpipci_softc), acpipci_match, acpipci_attach 95}; 96 97struct cfdriver acpipci_cd = { 98 NULL, "acpipci", DV_DULL 99}; 100 101const char *acpipci_hids[] = { 102 "PNP0A08", 103 NULL 104}; 105 106int acpipci_parse_resources(int, union acpi_resource *, void *); 107int acpipci_bs_map(bus_space_tag_t, bus_addr_t, bus_size_t, int, 108 bus_space_handle_t *); 109paddr_t acpipci_bs_mmap(bus_space_tag_t, bus_addr_t, off_t, int, int); 110 111void acpipci_attach_hook(struct device *, struct device *, 112 struct pcibus_attach_args *); 113int acpipci_bus_maxdevs(void *, int); 114pcitag_t acpipci_make_tag(void *, int, int, int); 115void acpipci_decompose_tag(void *, pcitag_t, int *, int *, int *); 116int acpipci_conf_size(void *, pcitag_t); 117pcireg_t acpipci_conf_read(void *, pcitag_t, int); 118void acpipci_conf_write(void *, pcitag_t, int, pcireg_t); 119int acpipci_probe_device_hook(void *, struct pci_attach_args *); 120 121int acpipci_intr_map(struct pci_attach_args *, pci_intr_handle_t *); 122const char *acpipci_intr_string(void *, pci_intr_handle_t); 123void *acpipci_intr_establish(void *, pci_intr_handle_t, int, 124 struct cpu_info *, int (*)(void *), void *, char *); 125void acpipci_intr_disestablish(void *, void *); 126 127uint32_t acpipci_iort_map_msi(pci_chipset_tag_t, pcitag_t); 128 129int 130acpipci_match(struct device *parent, void *match, void *aux) 131{ 132 struct acpi_attach_args *aaa = aux; 133 struct cfdata *cf = match; 134 135 return acpi_matchhids(aaa, acpipci_hids, cf->cf_driver->cd_name); 136} 137 138void 139acpipci_attach(struct device *parent, struct device *self, void *aux) 140{ 141 struct acpi_attach_args *aaa = aux; 142 struct acpipci_softc *sc = (struct acpipci_softc *)self; 143 struct interrupt_controller *ic; 144 struct pcibus_attach_args pba; 145 struct aml_value res; 146 uint64_t bbn = 0; 147 uint64_t seg = 0; 148 149 sc->sc_acpi = (struct acpi_softc *)parent; 150 sc->sc_node = aaa->aaa_node; 151 printf(" %s", sc->sc_node->name); 152 153 if (aml_evalname(sc->sc_acpi, sc->sc_node, "_CRS", 0, NULL, &res)) { 154 printf(": can't find resources\n"); 155 return; 156 } 157 158 aml_evalinteger(sc->sc_acpi, sc->sc_node, "_BBN", 0, NULL, &bbn); 159 sc->sc_bus = bbn; 160 161 aml_evalinteger(sc->sc_acpi, sc->sc_node, "_SEG", 0, NULL, &seg); 162 sc->sc_seg = seg; 163 164 sc->sc_iot = aaa->aaa_memt; 165 166 printf("\n"); 167 168 /* Create extents for our address spaces. */ 169 snprintf(sc->sc_busex_name, sizeof(sc->sc_busex_name), 170 "%s pcibus", sc->sc_dev.dv_xname); 171 snprintf(sc->sc_ioex_name, sizeof(sc->sc_ioex_name), 172 "%s pciio", sc->sc_dev.dv_xname); 173 snprintf(sc->sc_memex_name, sizeof(sc->sc_memex_name), 174 "%s pcimem", sc->sc_dev.dv_xname); 175 sc->sc_busex = extent_create(sc->sc_busex_name, 0, 255, 176 M_DEVBUF, NULL, 0, EX_WAITOK | EX_FILLED); 177 sc->sc_ioex = extent_create(sc->sc_ioex_name, 0, 0xffffffff, 178 M_DEVBUF, NULL, 0, EX_WAITOK | EX_FILLED); 179 sc->sc_memex = extent_create(sc->sc_memex_name, 0, (u_long)-1, 180 M_DEVBUF, NULL, 0, EX_WAITOK | EX_FILLED); 181 182 aml_parse_resource(&res, acpipci_parse_resources, sc); 183 184 memcpy(&sc->sc_bus_iot, sc->sc_iot, sizeof(sc->sc_bus_iot)); 185 sc->sc_bus_iot.bus_private = sc->sc_io_trans; 186 sc->sc_bus_iot._space_map = acpipci_bs_map; 187 sc->sc_bus_iot._space_mmap = acpipci_bs_mmap; 188 memcpy(&sc->sc_bus_memt, sc->sc_iot, sizeof(sc->sc_bus_memt)); 189 sc->sc_bus_memt.bus_private = sc->sc_mem_trans; 190 sc->sc_bus_memt._space_map = acpipci_bs_map; 191 sc->sc_bus_memt._space_mmap = acpipci_bs_mmap; 192 193 extern LIST_HEAD(, interrupt_controller) interrupt_controllers; 194 LIST_FOREACH(ic, &interrupt_controllers, ic_list) { 195 if (ic->ic_establish_msi) 196 break; 197 } 198 sc->sc_msi_ic = ic; 199 200 sc->sc_pc = pci_lookup_segment(seg); 201 KASSERT(sc->sc_pc->pc_intr_v == NULL); 202 203 sc->sc_pc->pc_probe_device_hook = acpipci_probe_device_hook; 204 205 sc->sc_pc->pc_intr_v = sc; 206 sc->sc_pc->pc_intr_map = acpipci_intr_map; 207 sc->sc_pc->pc_intr_map_msi = _pci_intr_map_msi; 208 sc->sc_pc->pc_intr_map_msix = _pci_intr_map_msix; 209 sc->sc_pc->pc_intr_string = acpipci_intr_string; 210 sc->sc_pc->pc_intr_establish = acpipci_intr_establish; 211 sc->sc_pc->pc_intr_disestablish = acpipci_intr_disestablish; 212 213 memset(&pba, 0, sizeof(pba)); 214 pba.pba_busname = "pci"; 215 pba.pba_iot = &sc->sc_bus_iot; 216 pba.pba_memt = &sc->sc_bus_memt; 217 pba.pba_dmat = aaa->aaa_dmat; 218 pba.pba_pc = sc->sc_pc; 219 pba.pba_busex = sc->sc_busex; 220 pba.pba_ioex = sc->sc_ioex; 221 pba.pba_memex = sc->sc_memex; 222 pba.pba_pmemex = sc->sc_memex; 223 pba.pba_domain = pci_ndomains++; 224 pba.pba_bus = sc->sc_bus; 225 if (sc->sc_msi_ic) 226 pba.pba_flags |= PCI_FLAGS_MSI_ENABLED; 227 228 config_found(self, &pba, NULL); 229} 230 231int 232acpipci_parse_resources(int crsidx, union acpi_resource *crs, void *arg) 233{ 234 struct acpipci_softc *sc = arg; 235 struct acpipci_trans *at; 236 int type = AML_CRSTYPE(crs); 237 int restype, tflags; 238 u_long min, len = 0, tra; 239 240 switch (type) { 241 case LR_WORD: 242 restype = crs->lr_word.type; 243 tflags = crs->lr_word.tflags; 244 min = crs->lr_word._min; 245 len = crs->lr_word._len; 246 tra = crs->lr_word._tra; 247 break; 248 case LR_DWORD: 249 restype = crs->lr_dword.type; 250 tflags = crs->lr_dword.tflags; 251 min = crs->lr_dword._min; 252 len = crs->lr_dword._len; 253 tra = crs->lr_dword._tra; 254 break; 255 case LR_QWORD: 256 restype = crs->lr_qword.type; 257 tflags = crs->lr_qword.tflags; 258 min = crs->lr_qword._min; 259 len = crs->lr_qword._len; 260 tra = crs->lr_qword._tra; 261 break; 262 case LR_MEM32FIXED: 263 restype = LR_TYPE_MEMORY; 264 tflags = 0; 265 min = crs->lr_m32fixed._bas; 266 len = crs->lr_m32fixed._len; 267 tra = 0; 268 break; 269 } 270 271 if (len == 0) 272 return 0; 273 274 switch (restype) { 275 case LR_TYPE_MEMORY: 276 if (tflags & LR_MEMORY_TTP) 277 return 0; 278 extent_free(sc->sc_memex, min, len, EX_WAITOK); 279 at = malloc(sizeof(struct acpipci_trans), M_DEVBUF, M_WAITOK); 280 at->at_iot = sc->sc_iot; 281 at->at_base = min; 282 at->at_size = len; 283 at->at_offset = tra; 284 at->at_next = sc->sc_mem_trans; 285 sc->sc_mem_trans = at; 286 break; 287 case LR_TYPE_IO: 288 /* 289 * Don't check _TTP as various firmwares don't set it, 290 * even though they should!! 291 */ 292 extent_free(sc->sc_ioex, min, len, EX_WAITOK); 293 at = malloc(sizeof(struct acpipci_trans), M_DEVBUF, M_WAITOK); 294 at->at_iot = sc->sc_iot; 295 at->at_base = min; 296 at->at_size = len; 297 at->at_offset = tra; 298 at->at_next = sc->sc_io_trans; 299 sc->sc_io_trans = at; 300 break; 301 case LR_TYPE_BUS: 302 extent_free(sc->sc_busex, min, len, EX_WAITOK); 303 /* 304 * Let _CRS minimum bus number override _BBN. 305 */ 306 sc->sc_bus = min; 307 break; 308 } 309 310 return 0; 311} 312 313void 314acpipci_attach_hook(struct device *parent, struct device *self, 315 struct pcibus_attach_args *pba) 316{ 317} 318 319int 320acpipci_bus_maxdevs(void *v, int bus) 321{ 322 return 32; 323} 324 325pcitag_t 326acpipci_make_tag(void *v, int bus, int device, int function) 327{ 328 return ((bus << 20) | (device << 15) | (function << 12)); 329} 330 331void 332acpipci_decompose_tag(void *v, pcitag_t tag, int *bp, int *dp, int *fp) 333{ 334 if (bp != NULL) 335 *bp = (tag >> 20) & 0xff; 336 if (dp != NULL) 337 *dp = (tag >> 15) & 0x1f; 338 if (fp != NULL) 339 *fp = (tag >> 12) & 0x7; 340} 341 342int 343acpipci_conf_size(void *v, pcitag_t tag) 344{ 345 return PCIE_CONFIG_SPACE_SIZE; 346} 347 348pcireg_t 349acpipci_conf_read(void *v, pcitag_t tag, int reg) 350{ 351 struct acpipci_mcfg *am = v; 352 353 if (tag < (am->am_min_bus << 20) || 354 tag >= ((am->am_max_bus + 1) << 20)) 355 return 0xffffffff; 356 357 return bus_space_read_4(am->am_iot, am->am_ioh, tag | reg); 358} 359 360void 361acpipci_conf_write(void *v, pcitag_t tag, int reg, pcireg_t data) 362{ 363 struct acpipci_mcfg *am = v; 364 365 if (tag < (am->am_min_bus << 20) || 366 tag >= ((am->am_max_bus + 1) << 20)) 367 return; 368 369 bus_space_write_4(am->am_iot, am->am_ioh, tag | reg, data); 370} 371 372int 373acpipci_probe_device_hook(void *v, struct pci_attach_args *pa) 374{ 375 struct acpipci_mcfg *am = v; 376 struct acpipci_trans *at; 377 struct acpi_table_header *hdr; 378 struct acpi_iort *iort = NULL; 379 struct acpi_iort_node *node; 380 struct acpi_iort_mapping *map; 381 struct acpi_iort_rc_node *rc; 382 struct acpi_q *entry; 383 uint32_t rid, offset; 384 int i; 385 386 rid = pci_requester_id(pa->pa_pc, pa->pa_tag); 387 388 /* Look for IORT table. */ 389 SIMPLEQ_FOREACH(entry, &acpi_softc->sc_tables, q_next) { 390 hdr = entry->q_table; 391 if (strncmp(hdr->signature, IORT_SIG, 392 sizeof(hdr->signature)) == 0) { 393 iort = entry->q_table; 394 break; 395 } 396 } 397 if (iort == NULL) 398 return 0; 399 400 /* Find our root complex. */ 401 offset = iort->offset; 402 for (i = 0; i < iort->number_of_nodes; i++) { 403 node = (struct acpi_iort_node *)((char *)iort + offset); 404 if (node->type == ACPI_IORT_ROOT_COMPLEX) { 405 rc = (struct acpi_iort_rc_node *)&node[1]; 406 if (rc->segment == am->am_segment) 407 break; 408 } 409 offset += node->length; 410 } 411 412 /* No RC found? Weird. */ 413 if (i >= iort->number_of_nodes) 414 return 0; 415 416 /* Find our output base towards SMMU. */ 417 map = (struct acpi_iort_mapping *)((char *)node + node->mapping_offset); 418 for (i = 0; i < node->number_of_mappings; i++) { 419 offset = map[i].output_reference; 420 421 if (map[i].flags & ACPI_IORT_MAPPING_SINGLE) { 422 rid = map[i].output_base; 423 break; 424 } 425 426 /* Mapping encodes number of IDs in the range minus one. */ 427 if (map[i].input_base <= rid && 428 rid <= map[i].input_base + map[i].number_of_ids) { 429 rid = map[i].output_base + (rid - map[i].input_base); 430 break; 431 } 432 } 433 434 /* No mapping found? Even weirder. */ 435 if (i >= node->number_of_mappings) 436 return 0; 437 438 node = (struct acpi_iort_node *)((char *)iort + offset); 439 if (node->type == ACPI_IORT_SMMU || node->type == ACPI_IORT_SMMU_V3) { 440 pa->pa_dmat = acpiiort_smmu_map(node, rid, pa->pa_dmat); 441 for (at = pa->pa_iot->bus_private; at; at = at->at_next) { 442 acpiiort_smmu_reserve_region(node, rid, 443 at->at_base, at->at_size); 444 } 445 for (at = pa->pa_memt->bus_private; at; at = at->at_next) { 446 acpiiort_smmu_reserve_region(node, rid, 447 at->at_base, at->at_size); 448 } 449 } 450 451 return 0; 452} 453 454int 455acpipci_intr_swizzle(struct pci_attach_args *pa, pci_intr_handle_t *ihp) 456{ 457 int dev, swizpin; 458 pcireg_t id; 459 460 if (pa->pa_bridgeih == NULL) 461 return -1; 462 463 pci_decompose_tag(pa->pa_pc, pa->pa_tag, NULL, &dev, NULL); 464 swizpin = PPB_INTERRUPT_SWIZZLE(pa->pa_rawintrpin, dev); 465 466 /* 467 * Qualcomm SC8280XP Root Complex violates PCI bridge 468 * interrupt swizzling rules. 469 */ 470 if (pa->pa_bridgetag) { 471 id = pci_conf_read(pa->pa_pc, *pa->pa_bridgetag, PCI_ID_REG); 472 if (PCI_VENDOR(id) == PCI_VENDOR_QUALCOMM && 473 PCI_PRODUCT(id) == PCI_PRODUCT_QUALCOMM_SC8280XP_PCIE) { 474 swizpin = (((swizpin - 1) + 3) % 4) + 1; 475 } 476 } 477 478 if (pa->pa_bridgeih[swizpin - 1].ih_type == PCI_NONE) 479 return -1; 480 481 *ihp = pa->pa_bridgeih[swizpin - 1]; 482 return 0; 483} 484 485int 486acpipci_getirq(int crsidx, union acpi_resource *crs, void *arg) 487{ 488 int *irq = arg; 489 490 switch (AML_CRSTYPE(crs)) { 491 case SR_IRQ: 492 *irq = ffs(letoh16(crs->sr_irq.irq_mask)) - 1; 493 break; 494 case LR_EXTIRQ: 495 *irq = letoh32(crs->lr_extirq.irq[0]); 496 break; 497 default: 498 break; 499 } 500 501 return 0; 502} 503 504int 505acpipci_intr_link(struct acpipci_softc *sc, struct aml_node *node, 506 struct aml_value *val) 507{ 508 struct aml_value res; 509 int64_t sta; 510 int irq = -1; 511 512 if (val->type == AML_OBJTYPE_NAMEREF) { 513 node = aml_searchrel(node, aml_getname(val->v_nameref)); 514 if (node) 515 val = node->value; 516 } 517 if (val->type == AML_OBJTYPE_OBJREF) 518 val = val->v_objref.ref; 519 if (val->type != AML_OBJTYPE_DEVICE) 520 return -1; 521 522 sta = acpi_getsta(sc->sc_acpi, val->node); 523 if ((sta & STA_PRESENT) == 0) 524 return -1; 525 526 if (aml_evalname(sc->sc_acpi, val->node, "_CRS", 0, NULL, &res)) 527 return -1; 528 aml_parse_resource(&res, acpipci_getirq, &irq); 529 aml_freevalue(&res); 530 531 return irq; 532} 533 534int 535acpipci_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp) 536{ 537 struct acpipci_softc *sc = pa->pa_pc->pc_intr_v; 538 struct aml_node *node = sc->sc_node; 539 struct aml_value res; 540 uint64_t addr, pin, source, index; 541 int i; 542 543 /* 544 * If we're behind a bridge, we need to look for a _PRT for 545 * it. If we don't find a _PRT, we need to swizzle. If we're 546 * not behind a bridge we need to look for a _PRT on the host 547 * bridge node itself. 548 */ 549 if (pa->pa_bridgetag) { 550 node = acpi_find_pci(pa->pa_pc, *pa->pa_bridgetag); 551 if (node == NULL) 552 return acpipci_intr_swizzle(pa, ihp); 553 } 554 555 if (aml_evalname(sc->sc_acpi, node, "_PRT", 0, NULL, &res)) 556 return acpipci_intr_swizzle(pa, ihp); 557 558 if (res.type != AML_OBJTYPE_PACKAGE) 559 return -1; 560 561 for (i = 0; i < res.length; i++) { 562 struct aml_value *val = res.v_package[i]; 563 564 if (val->type != AML_OBJTYPE_PACKAGE) 565 continue; 566 if (val->length != 4) 567 continue; 568 if (val->v_package[0]->type != AML_OBJTYPE_INTEGER || 569 val->v_package[1]->type != AML_OBJTYPE_INTEGER || 570 val->v_package[3]->type != AML_OBJTYPE_INTEGER) 571 continue; 572 573 addr = val->v_package[0]->v_integer; 574 pin = val->v_package[1]->v_integer; 575 if (ACPI_ADR_PCIDEV(addr) != pa->pa_device || 576 ACPI_ADR_PCIFUN(addr) != 0xffff || 577 pin != pa->pa_intrpin - 1) 578 continue; 579 580 if (val->v_package[2]->type == AML_OBJTYPE_INTEGER) { 581 source = val->v_package[2]->v_integer; 582 index = val->v_package[3]->v_integer; 583 } else { 584 source = 0; 585 index = acpipci_intr_link(sc, node, val->v_package[2]); 586 } 587 if (source != 0 || index == -1) 588 continue; 589 590 ihp->ih_pc = pa->pa_pc; 591 ihp->ih_tag = pa->pa_tag; 592 ihp->ih_intrpin = index; 593 ihp->ih_type = PCI_INTX; 594 595 return 0; 596 } 597 598 return -1; 599} 600 601const char * 602acpipci_intr_string(void *v, pci_intr_handle_t ih) 603{ 604 static char irqstr[32]; 605 606 switch (ih.ih_type) { 607 case PCI_MSI: 608 return "msi"; 609 case PCI_MSIX: 610 return "msix"; 611 } 612 613 snprintf(irqstr, sizeof(irqstr), "irq %d", ih.ih_intrpin); 614 return irqstr; 615} 616 617void * 618acpipci_intr_establish(void *v, pci_intr_handle_t ih, int level, 619 struct cpu_info *ci, int (*func)(void *), void *arg, char *name) 620{ 621 struct acpipci_softc *sc = v; 622 struct acpipci_intr_handle *aih; 623 void *cookie; 624 625 KASSERT(ih.ih_type != PCI_NONE); 626 627 if (ih.ih_type != PCI_INTX) { 628 struct interrupt_controller *ic = sc->sc_msi_ic; 629 bus_dma_segment_t seg; 630 uint64_t addr, data; 631 632 KASSERT(ic); 633 634 /* Map Requester ID through IORT to get sideband data. */ 635 data = acpipci_iort_map_msi(ih.ih_pc, ih.ih_tag); 636 cookie = ic->ic_establish_msi(ic->ic_cookie, &addr, 637 &data, level, ci, func, arg, name); 638 if (cookie == NULL) 639 return NULL; 640 641 aih = malloc(sizeof(*aih), M_DEVBUF, M_WAITOK); 642 aih->aih_ih.ih_ic = ic; 643 aih->aih_ih.ih_ih = cookie; 644 aih->aih_dmat = ih.ih_dmat; 645 646 if (bus_dmamap_create(aih->aih_dmat, sizeof(uint32_t), 1, 647 sizeof(uint32_t), 0, BUS_DMA_WAITOK, &aih->aih_map)) { 648 free(aih, M_DEVBUF, sizeof(*aih)); 649 ic->ic_disestablish(cookie); 650 return NULL; 651 } 652 653 memset(&seg, 0, sizeof(seg)); 654 seg.ds_addr = addr; 655 seg.ds_len = sizeof(uint32_t); 656 657 if (bus_dmamap_load_raw(aih->aih_dmat, aih->aih_map, 658 &seg, 1, sizeof(uint32_t), BUS_DMA_WAITOK)) { 659 bus_dmamap_destroy(aih->aih_dmat, aih->aih_map); 660 free(aih, M_DEVBUF, sizeof(*aih)); 661 ic->ic_disestablish(cookie); 662 return NULL; 663 } 664 665 addr = aih->aih_map->dm_segs[0].ds_addr; 666 if (ih.ih_type == PCI_MSIX) { 667 pci_msix_enable(ih.ih_pc, ih.ih_tag, 668 &sc->sc_bus_memt, ih.ih_intrpin, addr, data); 669 } else 670 pci_msi_enable(ih.ih_pc, ih.ih_tag, addr, data); 671 672 cookie = aih; 673 } else { 674 if (ci != NULL && !CPU_IS_PRIMARY(ci)) 675 return NULL; 676 cookie = acpi_intr_establish(ih.ih_intrpin, 0, level, 677 func, arg, name); 678 } 679 680 return cookie; 681} 682 683void 684acpipci_intr_disestablish(void *v, void *cookie) 685{ 686 struct acpipci_intr_handle *aih = cookie; 687 struct interrupt_controller *ic = aih->aih_ih.ih_ic; 688 689 if (ic->ic_establish_msi) { 690 ic->ic_disestablish(aih->aih_ih.ih_ih); 691 bus_dmamap_unload(aih->aih_dmat, aih->aih_map); 692 bus_dmamap_destroy(aih->aih_dmat, aih->aih_map); 693 free(aih, M_DEVBUF, sizeof(*aih)); 694 } else 695 acpi_intr_disestablish(cookie); 696} 697 698/* 699 * Translate memory address if needed. 700 */ 701int 702acpipci_bs_map(bus_space_tag_t t, bus_addr_t addr, bus_size_t size, 703 int flags, bus_space_handle_t *bshp) 704{ 705 struct acpipci_trans *at; 706 707 for (at = t->bus_private; at; at = at->at_next) { 708 if (addr >= at->at_base && addr < at->at_base + at->at_size) { 709 return bus_space_map(at->at_iot, 710 addr + at->at_offset, size, flags, bshp); 711 } 712 } 713 714 return ENXIO; 715} 716 717paddr_t 718acpipci_bs_mmap(bus_space_tag_t t, bus_addr_t addr, off_t off, 719 int prot, int flags) 720{ 721 struct acpipci_trans *at; 722 723 for (at = t->bus_private; at; at = at->at_next) { 724 if (addr >= at->at_base && addr < at->at_base + at->at_size) { 725 return bus_space_mmap(at->at_iot, 726 addr + at->at_offset, off, prot, flags); 727 } 728 } 729 730 return -1; 731} 732 733SLIST_HEAD(,acpipci_mcfg) acpipci_mcfgs = 734 SLIST_HEAD_INITIALIZER(acpipci_mcfgs); 735 736void 737pci_mcfg_init(bus_space_tag_t iot, bus_addr_t addr, int segment, 738 int min_bus, int max_bus) 739{ 740 struct acpipci_mcfg *am; 741 742 am = malloc(sizeof(struct acpipci_mcfg), M_DEVBUF, M_WAITOK | M_ZERO); 743 am->am_segment = segment; 744 am->am_min_bus = min_bus; 745 am->am_max_bus = max_bus; 746 747 am->am_iot = iot; 748 if (bus_space_map(iot, addr, (max_bus + 1) << 20, 0, &am->am_ioh)) 749 panic("%s: can't map config space", __func__); 750 751 am->am_pc.pc_conf_v = am; 752 am->am_pc.pc_attach_hook = acpipci_attach_hook; 753 am->am_pc.pc_bus_maxdevs = acpipci_bus_maxdevs; 754 am->am_pc.pc_make_tag = acpipci_make_tag; 755 am->am_pc.pc_decompose_tag = acpipci_decompose_tag; 756 am->am_pc.pc_conf_size = acpipci_conf_size; 757 am->am_pc.pc_conf_read = acpipci_conf_read; 758 am->am_pc.pc_conf_write = acpipci_conf_write; 759 SLIST_INSERT_HEAD(&acpipci_mcfgs, am, am_list); 760} 761 762pcireg_t 763acpipci_dummy_conf_read(void *v, pcitag_t tag, int reg) 764{ 765 return 0xffffffff; 766} 767 768void 769acpipci_dummy_conf_write(void *v, pcitag_t tag, int reg, pcireg_t data) 770{ 771} 772 773struct machine_pci_chipset acpipci_dummy_chipset = { 774 .pc_attach_hook = acpipci_attach_hook, 775 .pc_bus_maxdevs = acpipci_bus_maxdevs, 776 .pc_make_tag = acpipci_make_tag, 777 .pc_decompose_tag = acpipci_decompose_tag, 778 .pc_conf_size = acpipci_conf_size, 779 .pc_conf_read = acpipci_dummy_conf_read, 780 .pc_conf_write = acpipci_dummy_conf_write, 781}; 782 783pci_chipset_tag_t 784pci_lookup_segment(int segment) 785{ 786 struct acpipci_mcfg *am; 787 788 SLIST_FOREACH(am, &acpipci_mcfgs, am_list) { 789 if (am->am_segment == segment) 790 return &am->am_pc; 791 } 792 793 return &acpipci_dummy_chipset; 794} 795 796/* 797 * IORT support. 798 */ 799 800uint32_t acpipci_iort_map(struct acpi_iort *, uint32_t, uint32_t); 801 802uint32_t 803acpipci_iort_map_node(struct acpi_iort *iort, 804 struct acpi_iort_node *node, uint32_t id) 805{ 806 struct acpi_iort_mapping *map = 807 (struct acpi_iort_mapping *)((char *)node + node->mapping_offset); 808 int i; 809 810 for (i = 0; i < node->number_of_mappings; i++) { 811 uint32_t offset = map[i].output_reference; 812 813 if (map[i].flags & ACPI_IORT_MAPPING_SINGLE) { 814 id = map[i].output_base; 815 return acpipci_iort_map(iort, offset, id); 816 } 817 818 /* Mapping encodes number of IDs in the range minus one. */ 819 if (map[i].input_base <= id && 820 id <= map[i].input_base + map[i].number_of_ids) { 821 id = map[i].output_base + (id - map[i].input_base); 822 return acpipci_iort_map(iort, offset, id); 823 } 824 } 825 826 return id; 827} 828 829uint32_t 830acpipci_iort_map(struct acpi_iort *iort, uint32_t offset, uint32_t id) 831{ 832 struct acpi_iort_node *node = 833 (struct acpi_iort_node *)((char *)iort + offset); 834 835 switch (node->type) { 836 case ACPI_IORT_ITS: 837 return id; 838 case ACPI_IORT_SMMU: 839 case ACPI_IORT_SMMU_V3: 840 return acpipci_iort_map_node(iort, node, id); 841 } 842 843 return id; 844} 845 846uint32_t 847acpipci_iort_map_msi(pci_chipset_tag_t pc, pcitag_t tag) 848{ 849 struct acpipci_softc *sc = pc->pc_intr_v; 850 struct acpi_table_header *hdr; 851 struct acpi_iort *iort = NULL; 852 struct acpi_iort_node *node; 853 struct acpi_iort_rc_node *rc; 854 struct acpi_q *entry; 855 uint32_t rid, offset; 856 int i; 857 858 rid = pci_requester_id(pc, tag); 859 860 /* Look for IORT table. */ 861 SIMPLEQ_FOREACH(entry, &sc->sc_acpi->sc_tables, q_next) { 862 hdr = entry->q_table; 863 if (strncmp(hdr->signature, IORT_SIG, 864 sizeof(hdr->signature)) == 0) { 865 iort = entry->q_table; 866 break; 867 } 868 } 869 if (iort == NULL) 870 return rid; 871 872 /* Find our root complex and map. */ 873 offset = iort->offset; 874 for (i = 0; i < iort->number_of_nodes; i++) { 875 node = (struct acpi_iort_node *)((char *)iort + offset); 876 switch (node->type) { 877 case ACPI_IORT_ROOT_COMPLEX: 878 rc = (struct acpi_iort_rc_node *)&node[1]; 879 if (rc->segment == sc->sc_seg) 880 return acpipci_iort_map_node(iort, node, rid); 881 break; 882 } 883 offset += node->length; 884 } 885 886 return rid; 887} 888