acpipci.c revision 1.18
1/*	$OpenBSD: acpipci.c,v 1.18 2020/07/16 12:57:30 patrick Exp $	*/
2/*
3 * Copyright (c) 2018 Mark Kettenis
4 *
5 * Permission to use, copy, modify, and distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
18#include <sys/param.h>
19#include <sys/device.h>
20#include <sys/extent.h>
21#include <sys/malloc.h>
22#include <sys/systm.h>
23
24#include <machine/bus.h>
25
26#include <dev/acpi/acpireg.h>
27#include <dev/acpi/acpivar.h>
28#include <dev/acpi/acpidev.h>
29#include <dev/acpi/amltypes.h>
30#include <dev/acpi/dsdt.h>
31
32#include <dev/pci/pcidevs.h>
33#include <dev/pci/pcireg.h>
34#include <dev/pci/pcivar.h>
35#include <dev/pci/ppbreg.h>
36
37struct acpipci_mcfg {
38	SLIST_ENTRY(acpipci_mcfg) am_list;
39
40	uint16_t	am_segment;
41	uint8_t		am_min_bus;
42	uint8_t		am_max_bus;
43
44	bus_space_tag_t	am_iot;
45	bus_space_handle_t am_ioh;
46
47	struct arm64_pci_chipset am_pc;
48};
49
50struct acpipci_trans {
51	struct acpipci_trans *at_next;
52	bus_space_tag_t	at_iot;
53	bus_addr_t	at_base;
54	bus_size_t	at_size;
55	bus_size_t	at_offset;
56};
57
58struct acpipci_softc {
59	struct device	sc_dev;
60	struct acpi_softc *sc_acpi;
61	struct aml_node *sc_node;
62	bus_space_tag_t	sc_iot;
63	pci_chipset_tag_t sc_pc;
64
65	struct bus_space sc_bus_iot;
66	struct bus_space sc_bus_memt;
67	struct acpipci_trans *sc_io_trans;
68	struct acpipci_trans *sc_mem_trans;
69
70	struct extent	*sc_busex;
71	struct extent	*sc_memex;
72	struct extent	*sc_ioex;
73	char		sc_busex_name[32];
74	char		sc_ioex_name[32];
75	char		sc_memex_name[32];
76	int		sc_bus;
77	uint32_t	sc_seg;
78};
79
80int	acpipci_match(struct device *, void *, void *);
81void	acpipci_attach(struct device *, struct device *, void *);
82
83struct cfattach acpipci_ca = {
84	sizeof(struct acpipci_softc), acpipci_match, acpipci_attach
85};
86
87struct cfdriver acpipci_cd = {
88	NULL, "acpipci", DV_DULL
89};
90
91const char *acpipci_hids[] = {
92	"PNP0A08",
93	NULL
94};
95
96int	acpipci_parse_resources(int, union acpi_resource *, void *);
97int	acpipci_bs_map(bus_space_tag_t, bus_addr_t, bus_size_t, int,
98	    bus_space_handle_t *);
99
100void	acpipci_attach_hook(struct device *, struct device *,
101	    struct pcibus_attach_args *);
102int	acpipci_bus_maxdevs(void *, int);
103pcitag_t acpipci_make_tag(void *, int, int, int);
104void	acpipci_decompose_tag(void *, pcitag_t, int *, int *, int *);
105int	acpipci_conf_size(void *, pcitag_t);
106pcireg_t acpipci_conf_read(void *, pcitag_t, int);
107void	acpipci_conf_write(void *, pcitag_t, int, pcireg_t);
108
109int	acpipci_intr_map(struct pci_attach_args *, pci_intr_handle_t *);
110const char *acpipci_intr_string(void *, pci_intr_handle_t);
111void	*acpipci_intr_establish(void *, pci_intr_handle_t, int,
112	    struct cpu_info *, int (*)(void *), void *, char *);
113void	acpipci_intr_disestablish(void *, void *);
114
115uint32_t acpipci_iort_map_msi(pci_chipset_tag_t, pcitag_t);
116
117int
118acpipci_match(struct device *parent, void *match, void *aux)
119{
120	struct acpi_attach_args *aaa = aux;
121	struct cfdata *cf = match;
122
123	return acpi_matchhids(aaa, acpipci_hids, cf->cf_driver->cd_name);
124}
125
126void
127acpipci_attach(struct device *parent, struct device *self, void *aux)
128{
129	struct acpi_attach_args *aaa = aux;
130	struct acpipci_softc *sc = (struct acpipci_softc *)self;
131	struct pcibus_attach_args pba;
132	struct aml_value res;
133	uint64_t bbn = 0;
134	uint64_t seg = 0;
135
136	sc->sc_acpi = (struct acpi_softc *)parent;
137	sc->sc_node = aaa->aaa_node;
138	printf(" %s", sc->sc_node->name);
139
140	if (aml_evalname(sc->sc_acpi, sc->sc_node, "_CRS", 0, NULL, &res)) {
141		printf(": can't find resources\n");
142		return;
143	}
144
145	aml_evalinteger(sc->sc_acpi, sc->sc_node, "_BBN", 0, NULL, &bbn);
146	sc->sc_bus = bbn;
147
148	aml_evalinteger(sc->sc_acpi, sc->sc_node, "_SEG", 0, NULL, &seg);
149	sc->sc_seg = seg;
150
151	sc->sc_iot = aaa->aaa_memt;
152
153	printf("\n");
154
155	/* Create extents for our address spaces. */
156	snprintf(sc->sc_busex_name, sizeof(sc->sc_busex_name),
157	    "%s pcibus", sc->sc_dev.dv_xname);
158	snprintf(sc->sc_ioex_name, sizeof(sc->sc_ioex_name),
159	    "%s pciio", sc->sc_dev.dv_xname);
160	snprintf(sc->sc_memex_name, sizeof(sc->sc_memex_name),
161	    "%s pcimem", sc->sc_dev.dv_xname);
162	sc->sc_busex = extent_create(sc->sc_busex_name, 0, 255,
163	    M_DEVBUF, NULL, 0, EX_WAITOK | EX_FILLED);
164	sc->sc_ioex = extent_create(sc->sc_ioex_name, 0, 0xffffffff,
165	    M_DEVBUF, NULL, 0, EX_WAITOK | EX_FILLED);
166	sc->sc_memex = extent_create(sc->sc_memex_name, 0, (u_long)-1,
167	    M_DEVBUF, NULL, 0, EX_WAITOK | EX_FILLED);
168
169	aml_parse_resource(&res, acpipci_parse_resources, sc);
170
171	memcpy(&sc->sc_bus_iot, sc->sc_iot, sizeof(sc->sc_bus_iot));
172	sc->sc_bus_iot.bus_private = sc->sc_io_trans;
173	sc->sc_bus_iot._space_map = acpipci_bs_map;
174	memcpy(&sc->sc_bus_memt, sc->sc_iot, sizeof(sc->sc_bus_memt));
175	sc->sc_bus_memt.bus_private = sc->sc_mem_trans;
176	sc->sc_bus_memt._space_map = acpipci_bs_map;
177
178	sc->sc_pc = pci_lookup_segment(seg);
179	KASSERT(sc->sc_pc->pc_intr_v == NULL);
180
181	sc->sc_pc->pc_intr_v = sc;
182	sc->sc_pc->pc_intr_map = acpipci_intr_map;
183	sc->sc_pc->pc_intr_map_msi = _pci_intr_map_msi;
184	sc->sc_pc->pc_intr_map_msix = _pci_intr_map_msix;
185	sc->sc_pc->pc_intr_string = acpipci_intr_string;
186	sc->sc_pc->pc_intr_establish = acpipci_intr_establish;
187	sc->sc_pc->pc_intr_disestablish = acpipci_intr_disestablish;
188
189	memset(&pba, 0, sizeof(pba));
190	pba.pba_busname = "pci";
191	pba.pba_iot = &sc->sc_bus_iot;
192	pba.pba_memt = &sc->sc_bus_memt;
193	pba.pba_dmat = aaa->aaa_dmat;
194	pba.pba_pc = sc->sc_pc;
195	pba.pba_busex = sc->sc_busex;
196	pba.pba_ioex = sc->sc_ioex;
197	pba.pba_memex = sc->sc_memex;
198	pba.pba_pmemex = sc->sc_memex;
199	pba.pba_domain = pci_ndomains++;
200	pba.pba_bus = sc->sc_bus;
201	pba.pba_flags |= PCI_FLAGS_MSI_ENABLED;
202
203	config_found(self, &pba, NULL);
204}
205
206int
207acpipci_parse_resources(int crsidx, union acpi_resource *crs, void *arg)
208{
209	struct acpipci_softc *sc = arg;
210	struct acpipci_trans *at;
211	int type = AML_CRSTYPE(crs);
212	int restype, tflags;
213	u_long min, len = 0, tra;
214
215	switch (type) {
216	case LR_WORD:
217		restype = crs->lr_word.type;
218		tflags = crs->lr_word.tflags;
219		min = crs->lr_word._min;
220		len = crs->lr_word._len;
221		tra = crs->lr_word._tra;
222		break;
223	case LR_DWORD:
224		restype = crs->lr_dword.type;
225		tflags = crs->lr_dword.tflags;
226		min = crs->lr_dword._min;
227		len = crs->lr_dword._len;
228		tra = crs->lr_dword._tra;
229		break;
230	case LR_QWORD:
231		restype = crs->lr_qword.type;
232		tflags = crs->lr_qword.tflags;
233		min = crs->lr_qword._min;
234		len = crs->lr_qword._len;
235		tra = crs->lr_qword._tra;
236		break;
237	}
238
239	if (len == 0)
240		return 0;
241
242	switch (restype) {
243	case LR_TYPE_MEMORY:
244		if (tflags & LR_MEMORY_TTP)
245			return 0;
246		extent_free(sc->sc_memex, min, len, EX_WAITOK);
247		at = malloc(sizeof(struct acpipci_trans), M_DEVBUF, M_WAITOK);
248		at->at_iot = sc->sc_iot;
249		at->at_base = min;
250		at->at_size = len;
251		at->at_offset = tra;
252		at->at_next = sc->sc_mem_trans;
253		sc->sc_mem_trans = at;
254		break;
255	case LR_TYPE_IO:
256		/*
257		 * Don't check _TTP as various firmwares don't set it,
258		 * even though they should!!
259		 */
260		extent_free(sc->sc_ioex, min, len, EX_WAITOK);
261		at = malloc(sizeof(struct acpipci_trans), M_DEVBUF, M_WAITOK);
262		at->at_iot = sc->sc_iot;
263		at->at_base = min;
264		at->at_size = len;
265		at->at_offset = tra;
266		at->at_next = sc->sc_io_trans;
267		sc->sc_io_trans = at;
268		break;
269	case LR_TYPE_BUS:
270		extent_free(sc->sc_busex, min, len, EX_WAITOK);
271		/*
272		 * Let _CRS minimum bus number override _BBN.
273		 */
274		sc->sc_bus = min;
275		break;
276	}
277
278	return 0;
279}
280
281void
282acpipci_attach_hook(struct device *parent, struct device *self,
283    struct pcibus_attach_args *pba)
284{
285}
286
287int
288acpipci_bus_maxdevs(void *v, int bus)
289{
290	return 32;
291}
292
293pcitag_t
294acpipci_make_tag(void *v, int bus, int device, int function)
295{
296	return ((bus << 20) | (device << 15) | (function << 12));
297}
298
299void
300acpipci_decompose_tag(void *v, pcitag_t tag, int *bp, int *dp, int *fp)
301{
302	if (bp != NULL)
303		*bp = (tag >> 20) & 0xff;
304	if (dp != NULL)
305		*dp = (tag >> 15) & 0x1f;
306	if (fp != NULL)
307		*fp = (tag >> 12) & 0x7;
308}
309
310int
311acpipci_conf_size(void *v, pcitag_t tag)
312{
313	return PCIE_CONFIG_SPACE_SIZE;
314}
315
316pcireg_t
317acpipci_conf_read(void *v, pcitag_t tag, int reg)
318{
319	struct acpipci_mcfg *am = v;
320
321	if (tag < (am->am_min_bus << 20) ||
322	    tag >= ((am->am_max_bus + 1) << 20))
323		return 0xffffffff;
324
325	return bus_space_read_4(am->am_iot, am->am_ioh, tag | reg);
326}
327
328void
329acpipci_conf_write(void *v, pcitag_t tag, int reg, pcireg_t data)
330{
331	struct acpipci_mcfg *am = v;
332
333	if (tag < (am->am_min_bus << 20) ||
334	    tag >= ((am->am_max_bus + 1) << 20))
335		return;
336
337	bus_space_write_4(am->am_iot, am->am_ioh, tag | reg, data);
338}
339
340int
341acpipci_intr_swizzle(struct pci_attach_args *pa, pci_intr_handle_t *ihp)
342{
343	int dev, swizpin;
344
345	if (pa->pa_bridgeih == NULL)
346		return -1;
347
348	pci_decompose_tag(pa->pa_pc, pa->pa_tag, NULL, &dev, NULL);
349	swizpin = PPB_INTERRUPT_SWIZZLE(pa->pa_rawintrpin, dev);
350	if (pa->pa_bridgeih[swizpin - 1].ih_type == PCI_NONE)
351		return -1;
352
353	*ihp = pa->pa_bridgeih[swizpin - 1];
354	return 0;
355}
356
357int
358acpipci_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp)
359{
360	struct acpipci_softc *sc = pa->pa_pc->pc_intr_v;
361	struct aml_node *node = sc->sc_node;
362	struct aml_value res;
363	uint64_t addr, pin, source, index;
364	int i;
365
366	/*
367	 * If we're behind a bridge, we need to look for a _PRT for
368	 * it.  If we don't find a _PRT, we need to swizzle.  If we're
369	 * not behind a bridge we need to look for a _PRT on the host
370	 * bridge node itself.
371	 */
372	if (pa->pa_bridgetag) {
373		node = acpi_find_pci(pa->pa_pc, *pa->pa_bridgetag);
374		if (node == NULL)
375			return acpipci_intr_swizzle(pa, ihp);
376	}
377
378	if (aml_evalname(sc->sc_acpi, node, "_PRT", 0, NULL, &res))
379		return acpipci_intr_swizzle(pa, ihp);
380
381	if (res.type != AML_OBJTYPE_PACKAGE)
382		return -1;
383
384	for (i = 0; i < res.length; i++) {
385		struct aml_value *val = res.v_package[i];
386
387		if (val->type != AML_OBJTYPE_PACKAGE)
388			continue;
389		if (val->length != 4)
390			continue;
391		if (val->v_package[0]->type != AML_OBJTYPE_INTEGER ||
392		    val->v_package[1]->type != AML_OBJTYPE_INTEGER ||
393		    val->v_package[2]->type != AML_OBJTYPE_INTEGER ||
394		    val->v_package[3]->type != AML_OBJTYPE_INTEGER)
395			continue;
396
397		addr = val->v_package[0]->v_integer;
398		pin = val->v_package[1]->v_integer;
399		source = val->v_package[2]->v_integer;
400		index = val->v_package[3]->v_integer;
401		if (ACPI_ADR_PCIDEV(addr) != pa->pa_device ||
402		    ACPI_ADR_PCIFUN(addr) != 0xffff ||
403		    pin != pa->pa_intrpin - 1 || source != 0)
404			continue;
405
406		ihp->ih_pc = pa->pa_pc;
407		ihp->ih_tag = pa->pa_tag;
408		ihp->ih_intrpin = index;
409		ihp->ih_type = PCI_INTX;
410
411		return 0;
412	}
413
414	return -1;
415}
416
417const char *
418acpipci_intr_string(void *v, pci_intr_handle_t ih)
419{
420	static char irqstr[32];
421
422	switch (ih.ih_type) {
423	case PCI_MSI:
424		return "msi";
425	case PCI_MSIX:
426		return "msix";
427	}
428
429	snprintf(irqstr, sizeof(irqstr), "irq %d", ih.ih_intrpin);
430	return irqstr;
431}
432
433void *
434acpipci_intr_establish(void *v, pci_intr_handle_t ih, int level,
435    struct cpu_info *ci, int (*func)(void *), void *arg, char *name)
436{
437	struct acpipci_softc *sc = v;
438	struct interrupt_controller *ic;
439	struct arm_intr_handle *aih;
440	void *cookie;
441
442	extern LIST_HEAD(, interrupt_controller) interrupt_controllers;
443	LIST_FOREACH(ic, &interrupt_controllers, ic_list) {
444		if (ic->ic_establish_msi)
445			break;
446	}
447	if (ic == NULL)
448		return NULL;
449
450	KASSERT(ih.ih_type != PCI_NONE);
451
452	if (ih.ih_type != PCI_INTX) {
453		uint64_t addr, data;
454
455		/* Map Requester ID through IORT to get sideband data. */
456		data = acpipci_iort_map_msi(ih.ih_pc, ih.ih_tag);
457		cookie = ic->ic_establish_msi(ic->ic_cookie, &addr,
458		    &data, level, ci, func, arg, name);
459		if (cookie == NULL)
460			return NULL;
461
462		/* TODO: translate address to the PCI device's view */
463
464		if (ih.ih_type == PCI_MSIX) {
465			pci_msix_enable(ih.ih_pc, ih.ih_tag,
466			    &sc->sc_bus_memt, ih.ih_intrpin, addr, data);
467		} else
468			pci_msi_enable(ih.ih_pc, ih.ih_tag, addr, data);
469
470		aih = malloc(sizeof(*aih), M_DEVBUF, M_WAITOK);
471		aih->ih_ic = ic;
472		aih->ih_ih = cookie;
473		cookie = aih;
474	} else {
475		if (ci != NULL && !CPU_IS_PRIMARY(ci))
476			return NULL;
477		cookie = acpi_intr_establish(ih.ih_intrpin, 0, level,
478		    func, arg, name);
479	}
480
481	return cookie;
482}
483
484void
485acpipci_intr_disestablish(void *v, void *cookie)
486{
487	panic("%s", __func__);
488}
489
490/*
491 * Translate memory address if needed.
492 */
493int
494acpipci_bs_map(bus_space_tag_t t, bus_addr_t addr, bus_size_t size,
495    int flags, bus_space_handle_t *bshp)
496{
497	struct acpipci_trans *at;
498
499	for (at = t->bus_private; at; at = at->at_next) {
500		if (addr >= at->at_base && addr < at->at_base + at->at_size) {
501			return bus_space_map(at->at_iot,
502			    addr + at->at_offset, size, flags, bshp);
503		}
504	}
505
506	return ENXIO;
507}
508
509SLIST_HEAD(,acpipci_mcfg) acpipci_mcfgs =
510    SLIST_HEAD_INITIALIZER(acpipci_mcfgs);
511
512void
513pci_mcfg_init(bus_space_tag_t iot, bus_addr_t addr, int segment,
514    int min_bus, int max_bus)
515{
516	struct acpipci_mcfg *am;
517
518	am = malloc(sizeof(struct acpipci_mcfg), M_DEVBUF, M_WAITOK | M_ZERO);
519	am->am_segment = segment;
520	am->am_min_bus = min_bus;
521	am->am_max_bus = max_bus;
522
523	am->am_iot = iot;
524	if (bus_space_map(iot, addr, (max_bus + 1) << 20, 0, &am->am_ioh))
525		panic("%s: can't map config space", __func__);
526
527	am->am_pc.pc_conf_v = am;
528	am->am_pc.pc_attach_hook = acpipci_attach_hook;
529	am->am_pc.pc_bus_maxdevs = acpipci_bus_maxdevs;
530	am->am_pc.pc_make_tag = acpipci_make_tag;
531	am->am_pc.pc_decompose_tag = acpipci_decompose_tag;
532	am->am_pc.pc_conf_size = acpipci_conf_size;
533	am->am_pc.pc_conf_read = acpipci_conf_read;
534	am->am_pc.pc_conf_write = acpipci_conf_write;
535	SLIST_INSERT_HEAD(&acpipci_mcfgs, am, am_list);
536}
537
538pcireg_t
539acpipci_dummy_conf_read(void *v, pcitag_t tag, int reg)
540{
541	return 0xffffffff;
542}
543
544void
545acpipci_dummy_conf_write(void *v, pcitag_t tag, int reg, pcireg_t data)
546{
547}
548
549struct arm64_pci_chipset acpipci_dummy_chipset = {
550	.pc_attach_hook = acpipci_attach_hook,
551	.pc_bus_maxdevs = acpipci_bus_maxdevs,
552	.pc_make_tag = acpipci_make_tag,
553	.pc_decompose_tag = acpipci_decompose_tag,
554	.pc_conf_size = acpipci_conf_size,
555	.pc_conf_read = acpipci_dummy_conf_read,
556	.pc_conf_write = acpipci_dummy_conf_write,
557};
558
559pci_chipset_tag_t
560pci_lookup_segment(int segment)
561{
562	struct acpipci_mcfg *am;
563
564	SLIST_FOREACH(am, &acpipci_mcfgs, am_list) {
565		if (am->am_segment == segment)
566			return &am->am_pc;
567	}
568
569	return &acpipci_dummy_chipset;
570}
571
572/*
573 * IORT support.
574 */
575
576struct acpi_iort {
577	struct acpi_table_header	hdr;
578#define IORT_SIG	"IORT"
579	uint32_t	number_of_nodes;
580	uint32_t	offset;
581	uint32_t	reserved;
582} __packed;
583
584struct acpi_iort_node {
585	uint8_t		type;
586#define ACPI_IORT_ITS		0
587#define ACPI_IORT_ROOT_COMPLEX	2
588#define ACPI_IORT_SMMU		3
589	uint16_t	length;
590	uint8_t		revision;
591	uint32_t	reserved1;
592	uint32_t	number_of_mappings;
593	uint32_t	mapping_offset;
594	uint64_t	memory_access_properties;
595	uint32_t	atf_attributes;
596	uint32_t	segment;
597	uint8_t		memory_address_size_limit;
598	uint8_t		reserved2[3];
599} __packed;
600
601struct acpi_iort_mapping {
602	uint32_t	input_base;
603	uint32_t	number_of_ids;
604	uint32_t	output_base;
605	uint32_t	output_reference;
606	uint32_t	flags;
607#define ACPI_IORT_MAPPING_SINGLE	0x00000001
608} __packed;
609
610uint32_t acpipci_iort_map(struct acpi_iort *, uint32_t, uint32_t);
611
612uint32_t
613acpipci_iort_map_node(struct acpi_iort *iort,
614    struct acpi_iort_node *node, uint32_t id)
615{
616	struct acpi_iort_mapping *map =
617	    (struct acpi_iort_mapping *)((char *)node + node->mapping_offset);
618	int i;
619
620	for (i = 0; i < node->number_of_mappings; i++) {
621		uint32_t offset = map[i].output_reference;
622
623		if (map[i].flags & ACPI_IORT_MAPPING_SINGLE) {
624			id = map[i].output_base;
625			return acpipci_iort_map(iort, offset, id);
626		}
627
628		/* Mapping encodes number of IDs in the range minus one. */
629		if (map[i].input_base <= id &&
630		    id <= map[i].input_base + map[i].number_of_ids) {
631			id = map[i].output_base + (id - map[i].input_base);
632			return acpipci_iort_map(iort, offset, id);
633		}
634	}
635
636	return id;
637}
638
639uint32_t
640acpipci_iort_map(struct acpi_iort *iort, uint32_t offset, uint32_t id)
641{
642	struct acpi_iort_node *node =
643	    (struct acpi_iort_node *)((char *)iort + offset);
644
645	switch (node->type) {
646	case ACPI_IORT_ITS:
647		return id;
648	case ACPI_IORT_SMMU:
649		return acpipci_iort_map_node(iort, node, id);
650	}
651
652	return id;
653}
654
655uint32_t
656acpipci_iort_map_msi(pci_chipset_tag_t pc, pcitag_t tag)
657{
658	struct acpipci_softc *sc = pc->pc_intr_v;
659	struct acpi_table_header *hdr;
660	struct acpi_iort *iort = NULL;
661	struct acpi_iort_node *node;
662	struct acpi_q *entry;
663	uint32_t rid, offset;
664	int i;
665
666	rid = pci_requester_id(pc, tag);
667
668	/* Look for IORT table. */
669	SIMPLEQ_FOREACH(entry, &sc->sc_acpi->sc_tables, q_next) {
670		hdr = entry->q_table;
671		if (strncmp(hdr->signature, IORT_SIG,
672		    sizeof(hdr->signature)) == 0) {
673			iort = entry->q_table;
674			break;
675		}
676	}
677	if (iort == NULL)
678		return rid;
679
680	/* Find our root complex and map. */
681	offset = iort->offset;
682	for (i = 0; i < iort->number_of_nodes; i++) {
683		node = (struct acpi_iort_node *)((char *)iort + offset);
684		switch (node->type) {
685		case ACPI_IORT_ROOT_COMPLEX:
686			if (node->segment == sc->sc_seg)
687				return acpipci_iort_map_node(iort, node, rid);
688			break;
689		}
690		offset += node->length;
691	}
692
693	return rid;
694}
695