irongatereg.h revision 1.1
1/* $NetBSD: irongatereg.h,v 1.2 2000/06/26 02:42:10 thorpej Exp $ */ 2 3/*- 4 * Copyright (c) 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39/* 40 * Register definitions for the AMD 751 (``Irongate'') core logic 41 * chipset. 42 */ 43 44/* 45 * Address map. 46 * 47 * This from the Tsunami address map: 48 * EV6 has a new superpage which can pass through 44 address bits. (Umm, a 49 * superduperpage?) But, the firmware doesn't turn it on, so we use the old 50 * one and let the HW sign extend va/pa<40> to get us the pa<43> that makes 51 * the needed I/O space access. This is just as well; it means we don't have 52 * to worry about which GENERIC code might get called on other CPU models. 53 * 54 * E.g., we want this: 0x0801##fc00##0000 55 * We use this: 0x0101##fc00##0000 56 * ...mix in the old SP: 0xffff##fc00##0000##0000 57 * ...after PA sign ext: 0xffff##ff01##fc00##0000 58 * (PA<42:41> ignored) 59 * 60 * PCI memory and RAM: 0000.0000.0000 61 * IACK 0001.f800.0000 62 * PCI I/O: 0001.fc00.0000 63 * AMD 751 (also in PCI config space): 0001.fe00.0000 64 */ 65 66/* 67 * This hack allows us to map the I/O address space without using 68 * the KSEG sign extension hack. 69 */ 70#define IRONGATE_PHYSADDR(x) \ 71 (((x) & ~0x0100##0000##0000) | 0x0800##0000##0000) 72 73#define IRONGATE_KSEG_BIAS 0x0100##0000##0000UL 74 75#define IRONGATE_MEM_BASE (IRONGATE_KSEG_BIAS | 0x0000##0000##0000UL) 76#define IRONGATE_IACK_BASE (IRONGATE_KSEG_BIAS | 0x0001##f800##0000UL) 77#define IRONGATE_IO_BASE (IRONGATE_KSEG_BIAS | 0x0001##fc00##0000UL) 78#define IRONGATE_SELF_BASE (IRONGATE_KSEG_BIAS | 0x0001##fe00##0000UL) 79 80/* 81 * PCI configuration register access using done by using 82 * ``configuration mode 1'' (in PC lingo), using the I/O 83 * space addresses described in the PCI Local Bus Specification 84 * Revision 2.2. 85 */ 86#define IRONGATE_CONFADDR 0x0cf8 87#define IRONGATE_CONFDATA 0x0cfc 88 89#define CONFADDR_ENABLE 0x80000000U 90 91/* 92 * The AMD 751 PCI-Host bridge is located at device 0, and the 93 * AGP controller (seen as a PCI-PCI bridge) is at device 1. 94 */ 95#define IRONGATE_PCIHOST_DEV 0 96#define IRONGATE_PCIAGP_DEV 1 97