Makefile revision 1.10
1# $OpenBSD: Makefile,v 1.10 2023/11/11 18:35:36 robert Exp $ 2 3.include <bsd.own.mk> 4 5LLVM_SRCS= ${.CURDIR}/../../../../../llvm/llvm 6 7DEFS= Attributes.inc \ 8 IntrinsicImpl.inc \ 9 IntrinsicEnums.inc \ 10 IntrinsicsAArch64.h \ 11 IntrinsicsAMDGPU.h \ 12 IntrinsicsARM.h \ 13 IntrinsicsBPF.h \ 14 IntrinsicsDirectX.h \ 15 IntrinsicsHexagon.h \ 16 IntrinsicsLoongArch.h \ 17 IntrinsicsMips.h \ 18 IntrinsicsNVPTX.h \ 19 IntrinsicsPowerPC.h \ 20 IntrinsicsR600.h \ 21 IntrinsicsRISCV.h \ 22 IntrinsicsS390.h \ 23 IntrinsicsWebAssembly.h \ 24 IntrinsicsX86.h \ 25 IntrinsicsXCore.h \ 26 IntrinsicsVE.h 27 28INCDIR= /usr/include/llvm/IR 29 30all: ${DEFS} 31 32clean cleandir: 33 rm -f ${DEFS} 34 35Attributes.inc: ${LLVM_SRCS}/include/llvm/IR/Attributes.td 36 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-attrs \ 37 -I${LLVM_SRCS}/include/llvm/IR -I${LLVM_SRCS}/lib/Target \ 38 -I${LLVM_SRCS}/include \ 39 -o ${.TARGET} ${.ALLSRC} 40 41IntrinsicImpl.inc: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td 42 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-intrinsic-impl \ 43 -I${LLVM_SRCS}/include/llvm/IR -I${LLVM_SRCS}/lib/Target \ 44 -I${LLVM_SRCS}/include \ 45 -o ${.TARGET} ${.ALLSRC} 46 47IntrinsicEnums.inc: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td 48 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-intrinsic-enums \ 49 -I${LLVM_SRCS}/include/llvm/IR -I${LLVM_SRCS}/lib/Target \ 50 -I${LLVM_SRCS}/include \ 51 -o ${.TARGET} ${.ALLSRC} 52 53IntrinsicsAArch64.h: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td 54 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-intrinsic-enums -intrinsic-prefix=aarch64 \ 55 -I${LLVM_SRCS}/include/llvm/IR -I${LLVM_SRCS}/lib/Target \ 56 -I${LLVM_SRCS}/include \ 57 -o ${.TARGET} ${.ALLSRC} 58 59IntrinsicsAMDGPU.h: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td 60 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-intrinsic-enums -intrinsic-prefix=amdgcn \ 61 -I${LLVM_SRCS}/include/llvm/IR -I${LLVM_SRCS}/lib/Target \ 62 -I${LLVM_SRCS}/include \ 63 -o ${.TARGET} ${.ALLSRC} 64 65IntrinsicsARM.h: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td 66 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-intrinsic-enums -intrinsic-prefix=arm \ 67 -I${LLVM_SRCS}/include/llvm/IR -I${LLVM_SRCS}/lib/Target \ 68 -I${LLVM_SRCS}/include \ 69 -o ${.TARGET} ${.ALLSRC} 70 71IntrinsicsBPF.h: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td 72 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-intrinsic-enums -intrinsic-prefix=bpf \ 73 -I${LLVM_SRCS}/include/llvm/IR -I${LLVM_SRCS}/lib/Target \ 74 -I${LLVM_SRCS}/include \ 75 -o ${.TARGET} ${.ALLSRC} 76 77IntrinsicsDirectX.h: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td 78 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-intrinsic-enums -intrinsic-prefix=dx \ 79 -I${LLVM_SRCS}/include/llvm/IR -I${LLVM_SRCS}/lib/Target \ 80 -I${LLVM_SRCS}/include \ 81 -o ${.TARGET} ${.ALLSRC} 82 83IntrinsicsHexagon.h: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td 84 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-intrinsic-enums -intrinsic-prefix=hexagon \ 85 -I${LLVM_SRCS}/include/llvm/IR -I${LLVM_SRCS}/lib/Target \ 86 -I${LLVM_SRCS}/include \ 87 -o ${.TARGET} ${.ALLSRC} 88 89IntrinsicsLoongArch.h: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td 90 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-intrinsic-enums -intrinsic-prefix=loongarch \ 91 -I${LLVM_SRCS}/include/llvm/IR -I${LLVM_SRCS}/lib/Target \ 92 -I${LLVM_SRCS}/include \ 93 -o ${.TARGET} ${.ALLSRC} 94 95IntrinsicsMips.h: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td 96 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-intrinsic-enums -intrinsic-prefix=mips \ 97 -I${LLVM_SRCS}/include/llvm/IR -I${LLVM_SRCS}/lib/Target \ 98 -I${LLVM_SRCS}/include \ 99 -o ${.TARGET} ${.ALLSRC} 100 101IntrinsicsNVPTX.h: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td 102 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-intrinsic-enums -intrinsic-prefix=nvvm \ 103 -I${LLVM_SRCS}/include/llvm/IR -I${LLVM_SRCS}/lib/Target \ 104 -I${LLVM_SRCS}/include \ 105 -o ${.TARGET} ${.ALLSRC} 106 107IntrinsicsPowerPC.h: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td 108 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-intrinsic-enums -intrinsic-prefix=ppc \ 109 -I${LLVM_SRCS}/include/llvm/IR -I${LLVM_SRCS}/lib/Target \ 110 -I${LLVM_SRCS}/include \ 111 -o ${.TARGET} ${.ALLSRC} 112 113IntrinsicsR600.h: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td 114 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-intrinsic-enums -intrinsic-prefix=r600 \ 115 -I${LLVM_SRCS}/include/llvm/IR -I${LLVM_SRCS}/lib/Target \ 116 -I${LLVM_SRCS}/include \ 117 -o ${.TARGET} ${.ALLSRC} 118 119IntrinsicsRISCV.h: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td 120 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-intrinsic-enums -intrinsic-prefix=riscv \ 121 -I${LLVM_SRCS}/include/llvm/IR -I${LLVM_SRCS}/lib/Target \ 122 -I${LLVM_SRCS}/include \ 123 -o ${.TARGET} ${.ALLSRC} 124 125IntrinsicsS390.h: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td 126 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-intrinsic-enums -intrinsic-prefix=s390 \ 127 -I${LLVM_SRCS}/include/llvm/IR -I${LLVM_SRCS}/lib/Target \ 128 -I${LLVM_SRCS}/include \ 129 -o ${.TARGET} ${.ALLSRC} 130 131IntrinsicsWebAssembly.h: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td 132 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-intrinsic-enums -intrinsic-prefix=wasm \ 133 -I${LLVM_SRCS}/include/llvm/IR -I${LLVM_SRCS}/lib/Target \ 134 -I${LLVM_SRCS}/include \ 135 -o ${.TARGET} ${.ALLSRC} 136 137IntrinsicsX86.h: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td 138 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-intrinsic-enums -intrinsic-prefix=x86 \ 139 -I${LLVM_SRCS}/include/llvm/IR -I${LLVM_SRCS}/lib/Target \ 140 -I${LLVM_SRCS}/include \ 141 -o ${.TARGET} ${.ALLSRC} 142 143IntrinsicsXCore.h: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td 144 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-intrinsic-enums -intrinsic-prefix=xcore \ 145 -I${LLVM_SRCS}/include/llvm/IR -I${LLVM_SRCS}/lib/Target \ 146 -I${LLVM_SRCS}/include \ 147 -o ${.TARGET} ${.ALLSRC} 148 149IntrinsicsVE.h: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td 150 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-intrinsic-enums -intrinsic-prefix=ve \ 151 -I${LLVM_SRCS}/include/llvm/IR -I${LLVM_SRCS}/lib/Target \ 152 -I${LLVM_SRCS}/include \ 153 -o ${.TARGET} ${.ALLSRC} 154 155install includes: ${DEFS} 156 ${INSTALL} -d -m 755 ${DESTDIR}${INCDIR} 157 @cd ${.OBJDIR}; for i in $(DEFS); do \ 158 j="cmp -s $$i ${DESTDIR}${INCDIR}/$$i || \ 159 ${INSTALL} ${INSTALL_COPY} -o ${BINOWN} -g ${BINGRP} \ 160 -m 444 $$i ${DESTDIR}${INCDIR}"; \ 161 echo $$j; \ 162 eval "$$j"; \ 163 done 164 165.include <bsd.obj.mk> 166