sparc64-tdep.c revision 1.4
1/* Target-dependent code for UltraSPARC. 2 3 Copyright 2003, 2004 Free Software Foundation, Inc. 4 5 This file is part of GDB. 6 7 This program is free software; you can redistribute it and/or modify 8 it under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 2 of the License, or 10 (at your option) any later version. 11 12 This program is distributed in the hope that it will be useful, 13 but WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 GNU General Public License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with this program; if not, write to the Free Software 19 Foundation, Inc., 59 Temple Place - Suite 330, 20 Boston, MA 02111-1307, USA. */ 21 22#include "defs.h" 23#include "arch-utils.h" 24#include "floatformat.h" 25#include "frame.h" 26#include "frame-base.h" 27#include "frame-unwind.h" 28#include "gdbcore.h" 29#include "gdbtypes.h" 30#include "inferior.h" 31#include "symtab.h" 32#include "objfiles.h" 33#include "osabi.h" 34#include "regcache.h" 35#include "target.h" 36#include "value.h" 37 38#include "gdb_assert.h" 39#include "gdb_string.h" 40 41#include "sparc64-tdep.h" 42 43/* This file implements the The SPARC 64-bit ABI as defined by the 44 section "Low-Level System Information" of the SPARC Compliance 45 Definition (SCD) 2.4.1, which is the 64-bit System V psABI for 46 SPARC. */ 47 48/* Please use the sparc32_-prefix for 32-bit specific code, the 49 sparc64_-prefix for 64-bit specific code and the sparc_-prefix for 50 code can handle both. */ 51 52/* The functions on this page are intended to be used to classify 53 function arguments. */ 54 55/* Check whether TYPE is "Integral or Pointer". */ 56 57static int 58sparc64_integral_or_pointer_p (const struct type *type) 59{ 60 switch (TYPE_CODE (type)) 61 { 62 case TYPE_CODE_INT: 63 case TYPE_CODE_BOOL: 64 case TYPE_CODE_CHAR: 65 case TYPE_CODE_ENUM: 66 case TYPE_CODE_RANGE: 67 { 68 int len = TYPE_LENGTH (type); 69 gdb_assert (len == 1 || len == 2 || len == 4 || len == 8); 70 } 71 return 1; 72 case TYPE_CODE_PTR: 73 case TYPE_CODE_REF: 74 { 75 int len = TYPE_LENGTH (type); 76 gdb_assert (len == 8); 77 } 78 return 1; 79 default: 80 break; 81 } 82 83 return 0; 84} 85 86/* Check whether TYPE is "Floating". */ 87 88static int 89sparc64_floating_p (const struct type *type) 90{ 91 switch (TYPE_CODE (type)) 92 { 93 case TYPE_CODE_FLT: 94 { 95 int len = TYPE_LENGTH (type); 96 gdb_assert (len == 4 || len == 8 || len == 16); 97 } 98 return 1; 99 default: 100 break; 101 } 102 103 return 0; 104} 105 106/* Check whether TYPE is "Structure or Union". */ 107 108static int 109sparc64_structure_or_union_p (const struct type *type) 110{ 111 switch (TYPE_CODE (type)) 112 { 113 case TYPE_CODE_STRUCT: 114 case TYPE_CODE_UNION: 115 return 1; 116 default: 117 break; 118 } 119 120 return 0; 121} 122 123/* Register information. */ 124 125struct sparc64_register_info 126{ 127 char *name; 128 struct type **type; 129}; 130 131static struct sparc64_register_info sparc64_register_info[] = 132{ 133 { "g0", &builtin_type_int64 }, 134 { "g1", &builtin_type_int64 }, 135 { "g2", &builtin_type_int64 }, 136 { "g3", &builtin_type_int64 }, 137 { "g4", &builtin_type_int64 }, 138 { "g5", &builtin_type_int64 }, 139 { "g6", &builtin_type_int64 }, 140 { "g7", &builtin_type_int64 }, 141 142 { "o0", &builtin_type_int64 }, 143 { "o1", &builtin_type_int64 }, 144 { "o2", &builtin_type_int64 }, 145 { "o3", &builtin_type_int64 }, 146 { "o4", &builtin_type_int64 }, 147 { "o5", &builtin_type_int64 }, 148 { "sp", &builtin_type_void_data_ptr }, 149 { "o7", &builtin_type_int64 }, 150 151 { "l0", &builtin_type_int64 }, 152 { "l1", &builtin_type_int64 }, 153 { "l2", &builtin_type_int64 }, 154 { "l3", &builtin_type_int64 }, 155 { "l4", &builtin_type_int64 }, 156 { "l5", &builtin_type_int64 }, 157 { "l6", &builtin_type_int64 }, 158 { "l7", &builtin_type_int64 }, 159 160 { "i0", &builtin_type_int64 }, 161 { "i1", &builtin_type_int64 }, 162 { "i2", &builtin_type_int64 }, 163 { "i3", &builtin_type_int64 }, 164 { "i4", &builtin_type_int64 }, 165 { "i5", &builtin_type_int64 }, 166 { "fp", &builtin_type_void_data_ptr }, 167 { "i7", &builtin_type_int64 }, 168 169 { "f0", &builtin_type_float }, 170 { "f1", &builtin_type_float }, 171 { "f2", &builtin_type_float }, 172 { "f3", &builtin_type_float }, 173 { "f4", &builtin_type_float }, 174 { "f5", &builtin_type_float }, 175 { "f6", &builtin_type_float }, 176 { "f7", &builtin_type_float }, 177 { "f8", &builtin_type_float }, 178 { "f9", &builtin_type_float }, 179 { "f10", &builtin_type_float }, 180 { "f11", &builtin_type_float }, 181 { "f12", &builtin_type_float }, 182 { "f13", &builtin_type_float }, 183 { "f14", &builtin_type_float }, 184 { "f15", &builtin_type_float }, 185 { "f16", &builtin_type_float }, 186 { "f17", &builtin_type_float }, 187 { "f18", &builtin_type_float }, 188 { "f19", &builtin_type_float }, 189 { "f20", &builtin_type_float }, 190 { "f21", &builtin_type_float }, 191 { "f22", &builtin_type_float }, 192 { "f23", &builtin_type_float }, 193 { "f24", &builtin_type_float }, 194 { "f25", &builtin_type_float }, 195 { "f26", &builtin_type_float }, 196 { "f27", &builtin_type_float }, 197 { "f28", &builtin_type_float }, 198 { "f29", &builtin_type_float }, 199 { "f30", &builtin_type_float }, 200 { "f31", &builtin_type_float }, 201 { "f32", &builtin_type_double }, 202 { "f34", &builtin_type_double }, 203 { "f36", &builtin_type_double }, 204 { "f38", &builtin_type_double }, 205 { "f40", &builtin_type_double }, 206 { "f42", &builtin_type_double }, 207 { "f44", &builtin_type_double }, 208 { "f46", &builtin_type_double }, 209 { "f48", &builtin_type_double }, 210 { "f50", &builtin_type_double }, 211 { "f52", &builtin_type_double }, 212 { "f54", &builtin_type_double }, 213 { "f56", &builtin_type_double }, 214 { "f58", &builtin_type_double }, 215 { "f60", &builtin_type_double }, 216 { "f62", &builtin_type_double }, 217 218 { "pc", &builtin_type_void_func_ptr }, 219 { "npc", &builtin_type_void_func_ptr }, 220 221 /* This raw register contains the contents of %cwp, %pstate, %asi 222 and %ccr as laid out in a %tstate register. */ 223 /* FIXME: Give it a name until we start using register groups. */ 224 { "state", &builtin_type_int64 }, 225 226 { "fsr", &builtin_type_int64 }, 227 { "fprs", &builtin_type_int64 }, 228 229 /* "Although Y is a 64-bit register, its high-order 32 bits are 230 reserved and always read as 0." */ 231 { "y", &builtin_type_int64 } 232}; 233 234/* Total number of registers. */ 235#define SPARC64_NUM_REGS ARRAY_SIZE (sparc64_register_info) 236 237/* We provide the aliases %d0..%d62 and %q0..%q60 for the floating 238 registers as "psuedo" registers. */ 239 240static struct sparc64_register_info sparc64_pseudo_register_info[] = 241{ 242 { "cwp", &builtin_type_int64 }, 243 { "pstate", &builtin_type_int64 }, 244 { "asi", &builtin_type_int64 }, 245 { "ccr", &builtin_type_int64 }, 246 247 { "d0", &builtin_type_double }, 248 { "d2", &builtin_type_double }, 249 { "d4", &builtin_type_double }, 250 { "d6", &builtin_type_double }, 251 { "d8", &builtin_type_double }, 252 { "d10", &builtin_type_double }, 253 { "d12", &builtin_type_double }, 254 { "d14", &builtin_type_double }, 255 { "d16", &builtin_type_double }, 256 { "d18", &builtin_type_double }, 257 { "d20", &builtin_type_double }, 258 { "d22", &builtin_type_double }, 259 { "d24", &builtin_type_double }, 260 { "d26", &builtin_type_double }, 261 { "d28", &builtin_type_double }, 262 { "d30", &builtin_type_double }, 263 { "d32", &builtin_type_double }, 264 { "d34", &builtin_type_double }, 265 { "d36", &builtin_type_double }, 266 { "d38", &builtin_type_double }, 267 { "d40", &builtin_type_double }, 268 { "d42", &builtin_type_double }, 269 { "d44", &builtin_type_double }, 270 { "d46", &builtin_type_double }, 271 { "d48", &builtin_type_double }, 272 { "d50", &builtin_type_double }, 273 { "d52", &builtin_type_double }, 274 { "d54", &builtin_type_double }, 275 { "d56", &builtin_type_double }, 276 { "d58", &builtin_type_double }, 277 { "d60", &builtin_type_double }, 278 { "d62", &builtin_type_double }, 279 280 { "q0", &builtin_type_long_double }, 281 { "q4", &builtin_type_long_double }, 282 { "q8", &builtin_type_long_double }, 283 { "q12", &builtin_type_long_double }, 284 { "q16", &builtin_type_long_double }, 285 { "q20", &builtin_type_long_double }, 286 { "q24", &builtin_type_long_double }, 287 { "q28", &builtin_type_long_double }, 288 { "q32", &builtin_type_long_double }, 289 { "q36", &builtin_type_long_double }, 290 { "q40", &builtin_type_long_double }, 291 { "q44", &builtin_type_long_double }, 292 { "q48", &builtin_type_long_double }, 293 { "q52", &builtin_type_long_double }, 294 { "q56", &builtin_type_long_double }, 295 { "q60", &builtin_type_long_double } 296}; 297 298/* Total number of pseudo registers. */ 299#define SPARC64_NUM_PSEUDO_REGS ARRAY_SIZE (sparc64_pseudo_register_info) 300 301/* Return the name of register REGNUM. */ 302 303static const char * 304sparc64_register_name (int regnum) 305{ 306 if (regnum >= 0 && regnum < SPARC64_NUM_REGS) 307 return sparc64_register_info[regnum].name; 308 309 if (regnum >= SPARC64_NUM_REGS 310 && regnum < SPARC64_NUM_REGS + SPARC64_NUM_PSEUDO_REGS) 311 return sparc64_pseudo_register_info[regnum - SPARC64_NUM_REGS].name; 312 313 return NULL; 314} 315 316/* Return the GDB type object for the "standard" data type of data in 317 register REGNUM. */ 318 319static struct type * 320sparc64_register_type (struct gdbarch *gdbarch, int regnum) 321{ 322 if (regnum >= SPARC64_NUM_REGS 323 && regnum < SPARC64_NUM_REGS + SPARC64_NUM_PSEUDO_REGS) 324 return *sparc64_pseudo_register_info[regnum - SPARC64_NUM_REGS].type; 325 326 gdb_assert (regnum >= 0 && regnum < SPARC64_NUM_REGS); 327 return *sparc64_register_info[regnum].type; 328} 329 330static void 331sparc64_pseudo_register_read (struct gdbarch *gdbarch, 332 struct regcache *regcache, 333 int regnum, void *buf) 334{ 335 gdb_assert (regnum >= SPARC64_NUM_REGS); 336 337 if (regnum >= SPARC64_D0_REGNUM && regnum <= SPARC64_D30_REGNUM) 338 { 339 regnum = SPARC_F0_REGNUM + 2 * (regnum - SPARC64_D0_REGNUM); 340 regcache_raw_read (regcache, regnum, buf); 341 regcache_raw_read (regcache, regnum + 1, ((char *)buf) + 4); 342 } 343 else if (regnum >= SPARC64_D32_REGNUM && regnum <= SPARC64_D62_REGNUM) 344 { 345 regnum = SPARC64_F32_REGNUM + (regnum - SPARC64_D32_REGNUM); 346 regcache_raw_read (regcache, regnum, buf); 347 } 348 else if (regnum >= SPARC64_Q0_REGNUM && regnum <= SPARC64_Q28_REGNUM) 349 { 350 regnum = SPARC_F0_REGNUM + 4 * (regnum - SPARC64_Q0_REGNUM); 351 regcache_raw_read (regcache, regnum, buf); 352 regcache_raw_read (regcache, regnum + 1, ((char *)buf) + 4); 353 regcache_raw_read (regcache, regnum + 2, ((char *)buf) + 8); 354 regcache_raw_read (regcache, regnum + 3, ((char *)buf) + 12); 355 } 356 else if (regnum >= SPARC64_Q32_REGNUM && regnum <= SPARC64_Q60_REGNUM) 357 { 358 regnum = SPARC64_F32_REGNUM + 2 * (regnum - SPARC64_Q32_REGNUM); 359 regcache_raw_read (regcache, regnum, buf); 360 regcache_raw_read (regcache, regnum + 1, ((char *)buf) + 8); 361 } 362 else if (regnum == SPARC64_CWP_REGNUM 363 || regnum == SPARC64_PSTATE_REGNUM 364 || regnum == SPARC64_ASI_REGNUM 365 || regnum == SPARC64_CCR_REGNUM) 366 { 367 ULONGEST state; 368 369 regcache_raw_read_unsigned (regcache, SPARC64_STATE_REGNUM, &state); 370 switch (regnum) 371 { 372 case SPARC64_CWP_REGNUM: 373 state = (state >> 0) & ((1 << 5) - 1); 374 break; 375 case SPARC64_PSTATE_REGNUM: 376 state = (state >> 8) & ((1 << 12) - 1); 377 break; 378 case SPARC64_ASI_REGNUM: 379 state = (state >> 24) & ((1 << 8) - 1); 380 break; 381 case SPARC64_CCR_REGNUM: 382 state = (state >> 32) & ((1 << 8) - 1); 383 break; 384 } 385 store_unsigned_integer (buf, 8, state); 386 } 387} 388 389static void 390sparc64_pseudo_register_write (struct gdbarch *gdbarch, 391 struct regcache *regcache, 392 int regnum, const void *buf) 393{ 394 gdb_assert (regnum >= SPARC64_NUM_REGS); 395 396 if (regnum >= SPARC64_D0_REGNUM && regnum <= SPARC64_D30_REGNUM) 397 { 398 regnum = SPARC_F0_REGNUM + 2 * (regnum - SPARC64_D0_REGNUM); 399 regcache_raw_write (regcache, regnum, buf); 400 regcache_raw_write (regcache, regnum + 1, ((const char *)buf) + 4); 401 } 402 else if (regnum >= SPARC64_D32_REGNUM && regnum <= SPARC64_D62_REGNUM) 403 { 404 regnum = SPARC64_F32_REGNUM + (regnum - SPARC64_D32_REGNUM); 405 regcache_raw_write (regcache, regnum, buf); 406 } 407 else if (regnum >= SPARC64_Q0_REGNUM && regnum <= SPARC64_Q28_REGNUM) 408 { 409 regnum = SPARC_F0_REGNUM + 4 * (regnum - SPARC64_Q0_REGNUM); 410 regcache_raw_write (regcache, regnum, buf); 411 regcache_raw_write (regcache, regnum + 1, ((const char *)buf) + 4); 412 regcache_raw_write (regcache, regnum + 2, ((const char *)buf) + 8); 413 regcache_raw_write (regcache, regnum + 3, ((const char *)buf) + 12); 414 } 415 else if (regnum >= SPARC64_Q32_REGNUM && regnum <= SPARC64_Q60_REGNUM) 416 { 417 regnum = SPARC64_F32_REGNUM + 2 * (regnum - SPARC64_Q32_REGNUM); 418 regcache_raw_write (regcache, regnum, buf); 419 regcache_raw_write (regcache, regnum + 1, ((const char *)buf) + 8); 420 } 421 else if (regnum == SPARC64_CWP_REGNUM 422 || regnum == SPARC64_PSTATE_REGNUM 423 || regnum == SPARC64_ASI_REGNUM 424 || regnum == SPARC64_CCR_REGNUM) 425 { 426 ULONGEST state, bits; 427 428 regcache_raw_read_unsigned (regcache, SPARC64_STATE_REGNUM, &state); 429 bits = extract_unsigned_integer (buf, 8); 430 switch (regnum) 431 { 432 case SPARC64_CWP_REGNUM: 433 state |= ((bits & ((1 << 5) - 1)) << 0); 434 break; 435 case SPARC64_PSTATE_REGNUM: 436 state |= ((bits & ((1 << 12) - 1)) << 8); 437 break; 438 case SPARC64_ASI_REGNUM: 439 state |= ((bits & ((1 << 8) - 1)) << 24); 440 break; 441 case SPARC64_CCR_REGNUM: 442 state |= ((bits & ((1 << 8) - 1)) << 32); 443 break; 444 } 445 regcache_raw_write_unsigned (regcache, SPARC64_STATE_REGNUM, state); 446 } 447} 448 449 450/* Return PC of first real instruction of the function starting at 451 START_PC. */ 452 453static CORE_ADDR 454sparc64_skip_prologue (CORE_ADDR start_pc) 455{ 456 struct symtab_and_line sal; 457 CORE_ADDR func_start, func_end; 458 struct sparc_frame_cache cache; 459 460 /* This is the preferred method, find the end of the prologue by 461 using the debugging information. */ 462 if (find_pc_partial_function (start_pc, NULL, &func_start, &func_end)) 463 { 464 sal = find_pc_line (func_start, 0); 465 466 if (sal.end < func_end 467 && start_pc <= sal.end) 468 return sal.end; 469 } 470 471 return sparc_analyze_prologue (start_pc, 0xffffffffffffffffULL, &cache); 472} 473 474/* Normal frames. */ 475 476static struct sparc_frame_cache * 477sparc64_frame_cache (struct frame_info *next_frame, void **this_cache) 478{ 479 return sparc_frame_cache (next_frame, this_cache); 480} 481 482static void 483sparc64_frame_this_id (struct frame_info *next_frame, void **this_cache, 484 struct frame_id *this_id) 485{ 486 struct sparc_frame_cache *cache = 487 sparc64_frame_cache (next_frame, this_cache); 488 489 /* This marks the outermost frame. */ 490 if (cache->base == 0) 491 return; 492 493 (*this_id) = frame_id_build (cache->base, cache->pc); 494} 495 496static void 497sparc64_frame_prev_register (struct frame_info *next_frame, void **this_cache, 498 int regnum, int *optimizedp, 499 enum lval_type *lvalp, CORE_ADDR *addrp, 500 int *realnump, void *valuep) 501{ 502 struct sparc_frame_cache *cache = 503 sparc64_frame_cache (next_frame, this_cache); 504 505 if (regnum == SPARC64_PC_REGNUM || regnum == SPARC64_NPC_REGNUM) 506 { 507 *optimizedp = 0; 508 *lvalp = not_lval; 509 *addrp = 0; 510 *realnump = -1; 511 if (valuep) 512 { 513 CORE_ADDR pc = (regnum == SPARC64_NPC_REGNUM) ? 4 : 0; 514 515 regnum = cache->frameless_p ? SPARC_O7_REGNUM : SPARC_I7_REGNUM; 516 pc += frame_unwind_register_unsigned (next_frame, regnum) + 8; 517 store_unsigned_integer (valuep, 8, pc); 518 } 519 return; 520 } 521 522 /* Handle StackGhost. */ 523 { 524 ULONGEST wcookie = sparc_fetch_wcookie (); 525 526 if (wcookie != 0 && !cache->frameless_p && regnum == SPARC_I7_REGNUM) 527 { 528 *optimizedp = 0; 529 *lvalp = not_lval; 530 *addrp = 0; 531 *realnump = -1; 532 if (valuep) 533 { 534 CORE_ADDR addr = 535 cache->base + BIAS + (regnum - SPARC_L0_REGNUM) * 8; 536 ULONGEST i7; 537 538 /* Read the value in from memory. */ 539 i7 = get_frame_memory_unsigned (next_frame, addr, 8); 540 store_unsigned_integer (valuep, 8, i7 ^ wcookie); 541 } 542 return; 543 } 544 } 545 546 /* The previous frame's `local' and `in' registers have been saved 547 in the register save area. */ 548 if (!cache->frameless_p 549 && regnum >= SPARC_L0_REGNUM && regnum <= SPARC_I7_REGNUM) 550 { 551 *optimizedp = 0; 552 *lvalp = lval_memory; 553 *addrp = cache->base + BIAS + (regnum - SPARC_L0_REGNUM) * 8; 554 *realnump = -1; 555 if (valuep) 556 { 557 struct gdbarch *gdbarch = get_frame_arch (next_frame); 558 559 /* Read the value in from memory. */ 560 read_memory (*addrp, valuep, register_size (gdbarch, regnum)); 561 } 562 return; 563 } 564 565 /* The previous frame's `out' registers are accessable as the 566 current frame's `in' registers. */ 567 if (!cache->frameless_p 568 && regnum >= SPARC_O0_REGNUM && regnum <= SPARC_O7_REGNUM) 569 regnum += (SPARC_I0_REGNUM - SPARC_O0_REGNUM); 570 571 frame_register_unwind (next_frame, regnum, 572 optimizedp, lvalp, addrp, realnump, valuep); 573} 574 575static const struct frame_unwind sparc64_frame_unwind = 576{ 577 NORMAL_FRAME, 578 sparc64_frame_this_id, 579 sparc64_frame_prev_register 580}; 581 582static const struct frame_unwind * 583sparc64_frame_sniffer (struct frame_info *next_frame) 584{ 585 return &sparc64_frame_unwind; 586} 587 588 589static CORE_ADDR 590sparc64_frame_base_address (struct frame_info *next_frame, void **this_cache) 591{ 592 struct sparc_frame_cache *cache = 593 sparc64_frame_cache (next_frame, this_cache); 594 595 return cache->base + BIAS; 596} 597 598static const struct frame_base sparc64_frame_base = 599{ 600 &sparc64_frame_unwind, 601 sparc64_frame_base_address, 602 sparc64_frame_base_address, 603 sparc64_frame_base_address 604}; 605 606/* Check whether TYPE must be 16-byte aligned. */ 607 608static int 609sparc64_16_byte_align_p (struct type *type) 610{ 611 if (sparc64_floating_p (type) && TYPE_LENGTH (type) == 16) 612 return 1; 613 614 if (sparc64_structure_or_union_p (type)) 615 { 616 int i; 617 618 for (i = 0; i < TYPE_NFIELDS (type); i++) 619 { 620 struct type *subtype = check_typedef (TYPE_FIELD_TYPE (type, i)); 621 622 if (sparc64_16_byte_align_p (subtype)) 623 return 1; 624 } 625 } 626 627 return 0; 628} 629 630/* Store floating fields of element ELEMENT of an "parameter array" 631 that has type TYPE and is stored at BITPOS in VALBUF in the 632 apropriate registers of REGCACHE. This function can be called 633 recursively and therefore handles floating types in addition to 634 structures. */ 635 636static void 637sparc64_store_floating_fields (struct regcache *regcache, struct type *type, 638 char *valbuf, int element, int bitpos) 639{ 640 gdb_assert (element < 16); 641 642 if (sparc64_floating_p (type)) 643 { 644 int len = TYPE_LENGTH (type); 645 int regnum; 646 647 if (len == 16) 648 { 649 gdb_assert (bitpos == 0); 650 gdb_assert ((element % 2) == 0); 651 652 regnum = SPARC64_Q0_REGNUM + element / 2; 653 regcache_cooked_write (regcache, regnum, valbuf); 654 } 655 else if (len == 8) 656 { 657 gdb_assert (bitpos == 0 || bitpos == 64); 658 659 regnum = SPARC64_D0_REGNUM + element + bitpos / 64; 660 regcache_cooked_write (regcache, regnum, valbuf + (bitpos / 8)); 661 } 662 else 663 { 664 gdb_assert (len == 4); 665 gdb_assert (bitpos % 32 == 0 && bitpos >= 0 && bitpos < 128); 666 667 regnum = SPARC_F0_REGNUM + element * 2 + bitpos / 32; 668 regcache_cooked_write (regcache, regnum, valbuf + (bitpos / 8)); 669 } 670 } 671 else if (sparc64_structure_or_union_p (type)) 672 { 673 int i; 674 675 for (i = 0; i < TYPE_NFIELDS (type); i++) 676 { 677 struct type *subtype = check_typedef (TYPE_FIELD_TYPE (type, i)); 678 int subpos = bitpos + TYPE_FIELD_BITPOS (type, i); 679 680 sparc64_store_floating_fields (regcache, subtype, valbuf, 681 element, subpos); 682 } 683 684 /* GCC has an interesting bug. If TYPE is a structure that has 685 a single `float' member, GCC doesn't treat it as a structure 686 at all, but rather as an ordinary `float' argument. This 687 argument will be stored in %f1, as required by the psABI. 688 However, as a member of a structure the psABI requires it to 689 be stored in %f0. This bug is present in GCC 3.3.2, but 690 probably in older releases to. To appease GCC, if a 691 structure has only a single `float' member, we store its 692 value in %f1 too (we already have stored in %f0). */ 693 if (TYPE_NFIELDS (type) == 1) 694 { 695 struct type *subtype = check_typedef (TYPE_FIELD_TYPE (type, 0)); 696 697 if (sparc64_floating_p (subtype) && TYPE_LENGTH (subtype) == 4) 698 regcache_cooked_write (regcache, SPARC_F1_REGNUM, valbuf); 699 } 700 } 701} 702 703/* Fetch floating fields from a variable of type TYPE from the 704 appropriate registers for BITPOS in REGCACHE and store it at BITPOS 705 in VALBUF. This function can be called recursively and therefore 706 handles floating types in addition to structures. */ 707 708static void 709sparc64_extract_floating_fields (struct regcache *regcache, struct type *type, 710 char *valbuf, int bitpos) 711{ 712 if (sparc64_floating_p (type)) 713 { 714 int len = TYPE_LENGTH (type); 715 int regnum; 716 717 if (len == 16) 718 { 719 gdb_assert (bitpos == 0 || bitpos == 128); 720 721 regnum = SPARC64_Q0_REGNUM + bitpos / 128; 722 regcache_cooked_read (regcache, regnum, valbuf + (bitpos / 8)); 723 } 724 else if (len == 8) 725 { 726 gdb_assert (bitpos % 64 == 0 && bitpos >= 0 && bitpos < 256); 727 728 regnum = SPARC64_D0_REGNUM + bitpos / 64; 729 regcache_cooked_read (regcache, regnum, valbuf + (bitpos / 8)); 730 } 731 else 732 { 733 gdb_assert (len == 4); 734 gdb_assert (bitpos % 32 == 0 && bitpos >= 0 && bitpos < 256); 735 736 regnum = SPARC_F0_REGNUM + bitpos / 32; 737 regcache_cooked_read (regcache, regnum, valbuf + (bitpos / 8)); 738 } 739 } 740 else if (sparc64_structure_or_union_p (type)) 741 { 742 int i; 743 744 for (i = 0; i < TYPE_NFIELDS (type); i++) 745 { 746 struct type *subtype = check_typedef (TYPE_FIELD_TYPE (type, i)); 747 int subpos = bitpos + TYPE_FIELD_BITPOS (type, i); 748 749 sparc64_extract_floating_fields (regcache, subtype, valbuf, subpos); 750 } 751 } 752} 753 754/* Store the NARGS arguments ARGS and STRUCT_ADDR (if STRUCT_RETURN is 755 non-zero) in REGCACHE and on the stack (starting from address SP). */ 756 757static CORE_ADDR 758sparc64_store_arguments (struct regcache *regcache, int nargs, 759 struct value **args, CORE_ADDR sp, 760 int struct_return, CORE_ADDR struct_addr) 761{ 762 /* Number of extended words in the "parameter array". */ 763 int num_elements = 0; 764 int element = 0; 765 int i; 766 767 /* Take BIAS into account. */ 768 sp += BIAS; 769 770 /* First we calculate the number of extended words in the "parameter 771 array". While doing so we also convert some of the arguments. */ 772 773 if (struct_return) 774 num_elements++; 775 776 for (i = 0; i < nargs; i++) 777 { 778 struct type *type = VALUE_TYPE (args[i]); 779 int len = TYPE_LENGTH (type); 780 781 if (sparc64_structure_or_union_p (type)) 782 { 783 /* Structure or Union arguments. */ 784 if (len <= 16) 785 { 786 if (num_elements % 2 && sparc64_16_byte_align_p (type)) 787 num_elements++; 788 num_elements += ((len + 7) / 8); 789 } 790 else 791 { 792 /* The psABI says that "Structures or unions larger than 793 sixteen bytes are copied by the caller and passed 794 indirectly; the caller will pass the address of a 795 correctly aligned structure value. This sixty-four 796 bit address will occupy one word in the parameter 797 array, and may be promoted to an %o register like any 798 other pointer value." Allocate memory for these 799 values on the stack. */ 800 sp -= len; 801 802 /* Use 16-byte alignment for these values. That's 803 always correct, and wasting a few bytes shouldn't be 804 a problem. */ 805 sp &= ~0xf; 806 807 write_memory (sp, VALUE_CONTENTS (args[i]), len); 808 args[i] = value_from_pointer (lookup_pointer_type (type), sp); 809 num_elements++; 810 } 811 } 812 else if (sparc64_floating_p (type)) 813 { 814 /* Floating arguments. */ 815 816 if (len == 16) 817 { 818 /* The psABI says that "Each quad-precision parameter 819 value will be assigned to two extended words in the 820 parameter array. */ 821 num_elements += 2; 822 823 /* The psABI says that "Long doubles must be 824 quad-aligned, and thus a hole might be introduced 825 into the parameter array to force alignment." Skip 826 an element if necessary. */ 827 if (num_elements % 2) 828 num_elements++; 829 } 830 else 831 num_elements++; 832 } 833 else 834 { 835 /* Integral and pointer arguments. */ 836 gdb_assert (sparc64_integral_or_pointer_p (type)); 837 838 /* The psABI says that "Each argument value of integral type 839 smaller than an extended word will be widened by the 840 caller to an extended word according to the signed-ness 841 of the argument type." */ 842 if (len < 8) 843 args[i] = value_cast (builtin_type_int64, args[i]); 844 num_elements++; 845 } 846 } 847 848 /* Allocate the "parameter array". */ 849 sp -= num_elements * 8; 850 851 /* The psABI says that "Every stack frame must be 16-byte aligned." */ 852 sp &= ~0xf; 853 854 /* Now we store the arguments in to the "paramater array". Some 855 Integer or Pointer arguments and Structure or Union arguments 856 will be passed in %o registers. Some Floating arguments and 857 floating members of structures are passed in floating-point 858 registers. However, for functions with variable arguments, 859 floating arguments are stored in an %0 register, and for 860 functions without a prototype floating arguments are stored in 861 both a floating-point and an %o registers, or a floating-point 862 register and memory. To simplify the logic here we always pass 863 arguments in memory, an %o register, and a floating-point 864 register if appropriate. This should be no problem since the 865 contents of any unused memory or registers in the "parameter 866 array" are undefined. */ 867 868 if (struct_return) 869 { 870 regcache_cooked_write_unsigned (regcache, SPARC_O0_REGNUM, struct_addr); 871 element++; 872 } 873 874 for (i = 0; i < nargs; i++) 875 { 876 char *valbuf = VALUE_CONTENTS (args[i]); 877 struct type *type = VALUE_TYPE (args[i]); 878 int len = TYPE_LENGTH (type); 879 int regnum = -1; 880 char buf[16]; 881 882 if (sparc64_structure_or_union_p (type)) 883 { 884 /* Structure or Union arguments. */ 885 gdb_assert (len <= 16); 886 memset (buf, 0, sizeof (buf)); 887 valbuf = memcpy (buf, valbuf, len); 888 889 if (element % 2 && sparc64_16_byte_align_p (type)) 890 element++; 891 892 if (element < 6) 893 { 894 regnum = SPARC_O0_REGNUM + element; 895 if (len > 8 && element < 5) 896 regcache_cooked_write (regcache, regnum + 1, valbuf + 8); 897 } 898 899 if (element < 16) 900 sparc64_store_floating_fields (regcache, type, valbuf, element, 0); 901 } 902 else if (sparc64_floating_p (type)) 903 { 904 /* Floating arguments. */ 905 if (len == 16) 906 { 907 if (element % 2) 908 element++; 909 if (element < 16) 910 regnum = SPARC64_Q0_REGNUM + element / 2; 911 } 912 else if (len == 8) 913 { 914 if (element < 16) 915 regnum = SPARC64_D0_REGNUM + element; 916 } 917 else 918 { 919 /* The psABI says "Each single-precision parameter value 920 will be assigned to one extended word in the 921 parameter array, and right-justified within that 922 word; the left half (even floatregister) is 923 undefined." Even though the psABI says that "the 924 left half is undefined", set it to zero here. */ 925 memset (buf, 0, 4); 926 memcpy (buf + 4, valbuf, 4); 927 valbuf = buf; 928 len = 8; 929 if (element < 16) 930 regnum = SPARC64_D0_REGNUM + element; 931 } 932 } 933 else 934 { 935 /* Integral and pointer arguments. */ 936 gdb_assert (len == 8); 937 if (element < 6) 938 regnum = SPARC_O0_REGNUM + element; 939 } 940 941 if (regnum != -1) 942 { 943 regcache_cooked_write (regcache, regnum, valbuf); 944 945 /* If we're storing the value in a floating-point register, 946 also store it in the corresponding %0 register(s). */ 947 if (regnum >= SPARC64_D0_REGNUM && regnum <= SPARC64_D10_REGNUM) 948 { 949 gdb_assert (element < 6); 950 regnum = SPARC_O0_REGNUM + element; 951 regcache_cooked_write (regcache, regnum, valbuf); 952 } 953 else if (regnum >= SPARC64_Q0_REGNUM && regnum <= SPARC64_Q8_REGNUM) 954 { 955 gdb_assert (element < 6); 956 regnum = SPARC_O0_REGNUM + element; 957 regcache_cooked_write (regcache, regnum, valbuf); 958 regcache_cooked_write (regcache, regnum + 1, valbuf + 8); 959 } 960 } 961 962 /* Always store the argument in memeory. */ 963 write_memory (sp + element * 8, valbuf, len); 964 element += ((len + 7) / 8); 965 } 966 967 gdb_assert (element == num_elements); 968 969 /* Take BIAS into account. */ 970 sp -= BIAS; 971 return sp; 972} 973 974static CORE_ADDR 975sparc64_push_dummy_call (struct gdbarch *gdbarch, struct value *function, 976 struct regcache *regcache, CORE_ADDR bp_addr, 977 int nargs, struct value **args, CORE_ADDR sp, 978 int struct_return, CORE_ADDR struct_addr) 979{ 980 /* Set return address. */ 981 regcache_cooked_write_unsigned (regcache, SPARC_O7_REGNUM, bp_addr - 8); 982 983 /* Set up function arguments. */ 984 sp = sparc64_store_arguments (regcache, nargs, args, sp, 985 struct_return, struct_addr); 986 987 /* Allocate the register save area. */ 988 sp -= 16 * 8; 989 990 /* Stack should be 16-byte aligned at this point. */ 991 gdb_assert ((sp + BIAS) % 16 == 0); 992 993 /* Finally, update the stack pointer. */ 994 regcache_cooked_write_unsigned (regcache, SPARC_SP_REGNUM, sp); 995 996 return sp; 997} 998 999 1000/* Extract from an array REGBUF containing the (raw) register state, a 1001 function return value of TYPE, and copy that into VALBUF. */ 1002 1003static void 1004sparc64_extract_return_value (struct type *type, struct regcache *regcache, 1005 void *valbuf) 1006{ 1007 int len = TYPE_LENGTH (type); 1008 char buf[32]; 1009 int i; 1010 1011 if (sparc64_structure_or_union_p (type)) 1012 { 1013 /* Structure or Union return values. */ 1014 gdb_assert (len <= 32); 1015 1016 for (i = 0; i < ((len + 7) / 8); i++) 1017 regcache_cooked_read (regcache, SPARC_O0_REGNUM + i, buf + i * 8); 1018 if (TYPE_CODE (type) != TYPE_CODE_UNION) 1019 sparc64_extract_floating_fields (regcache, type, buf, 0); 1020 memcpy (valbuf, buf, len); 1021 } 1022 else if (sparc64_floating_p (type)) 1023 { 1024 /* Floating return values. */ 1025 for (i = 0; i < len / 4; i++) 1026 regcache_cooked_read (regcache, SPARC_F0_REGNUM + i, buf + i * 4); 1027 memcpy (valbuf, buf, len); 1028 } 1029 else 1030 { 1031 /* Integral and pointer return values. */ 1032 gdb_assert (sparc64_integral_or_pointer_p (type)); 1033 1034 /* Just stripping off any unused bytes should preserve the 1035 signed-ness just fine. */ 1036 regcache_cooked_read (regcache, SPARC_O0_REGNUM, buf); 1037 memcpy (valbuf, buf + 8 - len, len); 1038 } 1039} 1040 1041/* Write into the appropriate registers a function return value stored 1042 in VALBUF of type TYPE. */ 1043 1044static void 1045sparc64_store_return_value (struct type *type, struct regcache *regcache, 1046 const void *valbuf) 1047{ 1048 int len = TYPE_LENGTH (type); 1049 char buf[16]; 1050 int i; 1051 1052 if (sparc64_structure_or_union_p (type)) 1053 { 1054 /* Structure or Union return values. */ 1055 gdb_assert (len <= 32); 1056 1057 /* Simplify matters by storing the complete value (including 1058 floating members) into %o0 and %o1. Floating members are 1059 also store in the appropriate floating-point registers. */ 1060 memset (buf, 0, sizeof (buf)); 1061 memcpy (buf, valbuf, len); 1062 for (i = 0; i < ((len + 7) / 8); i++) 1063 regcache_cooked_write (regcache, SPARC_O0_REGNUM + i, buf + i * 8); 1064 if (TYPE_CODE (type) != TYPE_CODE_UNION) 1065 sparc64_store_floating_fields (regcache, type, buf, 0, 0); 1066 } 1067 else if (sparc64_floating_p (type)) 1068 { 1069 /* Floating return values. */ 1070 memcpy (buf, valbuf, len); 1071 for (i = 0; i < len / 4; i++) 1072 regcache_cooked_write (regcache, SPARC_F0_REGNUM + i, buf + i * 4); 1073 } 1074 else 1075 { 1076 /* Integral and pointer return values. */ 1077 gdb_assert (sparc64_integral_or_pointer_p (type)); 1078 1079 /* ??? Do we need to do any sign-extension here? */ 1080 memset (buf, 0, 8); 1081 memcpy (buf + 8 - len, valbuf, len); 1082 regcache_cooked_write (regcache, SPARC_O0_REGNUM, buf); 1083 } 1084} 1085 1086static enum return_value_convention 1087sparc64_return_value (struct gdbarch *gdbarch, struct type *type, 1088 struct regcache *regcache, void *readbuf, 1089 const void *writebuf) 1090{ 1091 if (TYPE_LENGTH (type) > 32) 1092 return RETURN_VALUE_STRUCT_CONVENTION; 1093 1094 if (readbuf) 1095 sparc64_extract_return_value (type, regcache, readbuf); 1096 if (writebuf) 1097 sparc64_store_return_value (type, regcache, writebuf); 1098 1099 return RETURN_VALUE_REGISTER_CONVENTION; 1100} 1101 1102 1103void 1104sparc64_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) 1105{ 1106 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); 1107 1108 tdep->pc_regnum = SPARC64_PC_REGNUM; 1109 tdep->npc_regnum = SPARC64_NPC_REGNUM; 1110 1111 /* This is what all the fuss is about. */ 1112 set_gdbarch_long_bit (gdbarch, 64); 1113 set_gdbarch_long_long_bit (gdbarch, 64); 1114 set_gdbarch_ptr_bit (gdbarch, 64); 1115 1116 set_gdbarch_num_regs (gdbarch, SPARC64_NUM_REGS); 1117 set_gdbarch_register_name (gdbarch, sparc64_register_name); 1118 set_gdbarch_register_type (gdbarch, sparc64_register_type); 1119 set_gdbarch_num_pseudo_regs (gdbarch, SPARC64_NUM_PSEUDO_REGS); 1120 set_gdbarch_pseudo_register_read (gdbarch, sparc64_pseudo_register_read); 1121 set_gdbarch_pseudo_register_write (gdbarch, sparc64_pseudo_register_write); 1122 1123 /* Register numbers of various important registers. */ 1124 set_gdbarch_pc_regnum (gdbarch, SPARC64_PC_REGNUM); /* %pc */ 1125 1126 /* Call dummy code. */ 1127 set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT); 1128 set_gdbarch_push_dummy_code (gdbarch, NULL); 1129 set_gdbarch_push_dummy_call (gdbarch, sparc64_push_dummy_call); 1130 1131 set_gdbarch_return_value (gdbarch, sparc64_return_value); 1132 set_gdbarch_stabs_argument_has_addr 1133 (gdbarch, default_stabs_argument_has_addr); 1134 1135 set_gdbarch_skip_prologue (gdbarch, sparc64_skip_prologue); 1136 1137 frame_unwind_append_sniffer (gdbarch, sparc64_frame_sniffer); 1138 frame_base_set_default (gdbarch, &sparc64_frame_base); 1139} 1140 1141 1142/* Helper functions for dealing with register sets. */ 1143 1144#define TSTATE_CWP 0x000000000000001fULL 1145#define TSTATE_ICC 0x0000000f00000000ULL 1146#define TSTATE_XCC 0x000000f000000000ULL 1147 1148#define PSR_S 0x00000080 1149#define PSR_ICC 0x00f00000 1150#define PSR_VERS 0x0f000000 1151#define PSR_IMPL 0xf0000000 1152#define PSR_V8PLUS 0xff000000 1153#define PSR_XCC 0x000f0000 1154 1155void 1156sparc64_supply_gregset (const struct sparc_gregset *gregset, 1157 struct regcache *regcache, 1158 int regnum, const void *gregs) 1159{ 1160 int sparc32 = (gdbarch_ptr_bit (current_gdbarch) == 32); 1161 const char *regs = gregs; 1162 int i; 1163 1164 if (sparc32) 1165 { 1166 if (regnum == SPARC32_PSR_REGNUM || regnum == -1) 1167 { 1168 int offset = gregset->r_tstate_offset; 1169 ULONGEST tstate, psr; 1170 char buf[4]; 1171 1172 tstate = extract_unsigned_integer (regs + offset, 8); 1173 psr = ((tstate & TSTATE_CWP) | PSR_S | ((tstate & TSTATE_ICC) >> 12) 1174 | ((tstate & TSTATE_XCC) >> 20) | PSR_V8PLUS); 1175 store_unsigned_integer (buf, 4, psr); 1176 regcache_raw_supply (regcache, SPARC32_PSR_REGNUM, buf); 1177 } 1178 1179 if (regnum == SPARC32_PC_REGNUM || regnum == -1) 1180 regcache_raw_supply (regcache, SPARC32_PC_REGNUM, 1181 regs + gregset->r_pc_offset + 4); 1182 1183 if (regnum == SPARC32_NPC_REGNUM || regnum == -1) 1184 regcache_raw_supply (regcache, SPARC32_NPC_REGNUM, 1185 regs + gregset->r_npc_offset + 4); 1186 1187 if (regnum == SPARC32_Y_REGNUM || regnum == -1) 1188 { 1189 int offset = gregset->r_y_offset + 8 - gregset->r_y_size; 1190 regcache_raw_supply (regcache, SPARC32_Y_REGNUM, regs + offset); 1191 } 1192 } 1193 else 1194 { 1195 if (regnum == SPARC64_STATE_REGNUM || regnum == -1) 1196 regcache_raw_supply (regcache, SPARC64_STATE_REGNUM, 1197 regs + gregset->r_tstate_offset); 1198 1199 if (regnum == SPARC64_PC_REGNUM || regnum == -1) 1200 regcache_raw_supply (regcache, SPARC64_PC_REGNUM, 1201 regs + gregset->r_pc_offset); 1202 1203 if (regnum == SPARC64_NPC_REGNUM || regnum == -1) 1204 regcache_raw_supply (regcache, SPARC64_NPC_REGNUM, 1205 regs + gregset->r_npc_offset); 1206 1207 if (regnum == SPARC64_Y_REGNUM || regnum == -1) 1208 { 1209 char buf[8]; 1210 1211 memset (buf, 0, 8); 1212 memcpy (buf + 8 - gregset->r_y_size, 1213 regs + gregset->r_y_offset, gregset->r_y_size); 1214 regcache_raw_supply (regcache, SPARC64_Y_REGNUM, buf); 1215 } 1216 1217 if ((regnum == SPARC64_FPRS_REGNUM || regnum == -1) 1218 && gregset->r_fprs_offset != -1) 1219 regcache_raw_supply (regcache, SPARC64_FPRS_REGNUM, 1220 regs + gregset->r_fprs_offset); 1221 } 1222 1223 if (regnum == SPARC_G0_REGNUM || regnum == -1) 1224 regcache_raw_supply (regcache, SPARC_G0_REGNUM, NULL); 1225 1226 if ((regnum >= SPARC_G1_REGNUM && regnum <= SPARC_O7_REGNUM) || regnum == -1) 1227 { 1228 int offset = gregset->r_g1_offset; 1229 1230 if (sparc32) 1231 offset += 4; 1232 1233 for (i = SPARC_G1_REGNUM; i <= SPARC_O7_REGNUM; i++) 1234 { 1235 if (regnum == i || regnum == -1) 1236 regcache_raw_supply (regcache, i, regs + offset); 1237 offset += 8; 1238 } 1239 } 1240 1241 if ((regnum >= SPARC_L0_REGNUM && regnum <= SPARC_I7_REGNUM) || regnum == -1) 1242 { 1243 /* Not all of the register set variants include Locals and 1244 Inputs. For those that don't, we read them off the stack. */ 1245 if (gregset->r_l0_offset == -1) 1246 { 1247 ULONGEST sp; 1248 1249 regcache_cooked_read_unsigned (regcache, SPARC_SP_REGNUM, &sp); 1250 sparc_supply_rwindow (regcache, sp, regnum); 1251 } 1252 else 1253 { 1254 int offset = gregset->r_l0_offset; 1255 1256 if (sparc32) 1257 offset += 4; 1258 1259 for (i = SPARC_L0_REGNUM; i <= SPARC_I7_REGNUM; i++) 1260 { 1261 if (regnum == i || regnum == -1) 1262 regcache_raw_supply (regcache, i, regs + offset); 1263 offset += 8; 1264 } 1265 } 1266 } 1267} 1268 1269void 1270sparc64_collect_gregset (const struct sparc_gregset *gregset, 1271 const struct regcache *regcache, 1272 int regnum, void *gregs) 1273{ 1274 int sparc32 = (gdbarch_ptr_bit (current_gdbarch) == 32); 1275 char *regs = gregs; 1276 int i; 1277 1278 if (sparc32) 1279 { 1280 if (regnum == SPARC32_PSR_REGNUM || regnum == -1) 1281 { 1282 int offset = gregset->r_tstate_offset; 1283 ULONGEST tstate, psr; 1284 char buf[8]; 1285 1286 tstate = extract_unsigned_integer (regs + offset, 8); 1287 regcache_raw_collect (regcache, SPARC32_PSR_REGNUM, buf); 1288 psr = extract_unsigned_integer (buf, 4); 1289 tstate |= (psr & PSR_ICC) << 12; 1290 if ((psr & (PSR_VERS | PSR_IMPL)) == PSR_V8PLUS) 1291 tstate |= (psr & PSR_XCC) << 20; 1292 store_unsigned_integer (buf, 8, tstate); 1293 memcpy (regs + offset, buf, 8); 1294 } 1295 1296 if (regnum == SPARC32_PC_REGNUM || regnum == -1) 1297 regcache_raw_collect (regcache, SPARC32_PC_REGNUM, 1298 regs + gregset->r_pc_offset + 4); 1299 1300 if (regnum == SPARC32_NPC_REGNUM || regnum == -1) 1301 regcache_raw_collect (regcache, SPARC32_NPC_REGNUM, 1302 regs + gregset->r_npc_offset + 4); 1303 1304 if (regnum == SPARC32_Y_REGNUM || regnum == -1) 1305 { 1306 int offset = gregset->r_y_offset + 8 - gregset->r_y_size; 1307 regcache_raw_collect (regcache, SPARC32_Y_REGNUM, regs + offset); 1308 } 1309 } 1310 else 1311 { 1312 if (regnum == SPARC64_STATE_REGNUM || regnum == -1) 1313 regcache_raw_collect (regcache, SPARC64_STATE_REGNUM, 1314 regs + gregset->r_tstate_offset); 1315 1316 if (regnum == SPARC64_PC_REGNUM || regnum == -1) 1317 regcache_raw_collect (regcache, SPARC64_PC_REGNUM, 1318 regs + gregset->r_pc_offset); 1319 1320 if (regnum == SPARC64_NPC_REGNUM || regnum == -1) 1321 regcache_raw_collect (regcache, SPARC64_NPC_REGNUM, 1322 regs + gregset->r_npc_offset); 1323 1324 if (regnum == SPARC64_Y_REGNUM || regnum == -1) 1325 { 1326 char buf[8]; 1327 1328 regcache_raw_collect (regcache, SPARC64_Y_REGNUM, buf); 1329 memcpy (regs + gregset->r_y_offset, 1330 buf + 8 - gregset->r_y_size, gregset->r_y_size); 1331 } 1332 1333 if ((regnum == SPARC64_FPRS_REGNUM || regnum == -1) 1334 && gregset->r_fprs_offset != -1) 1335 regcache_raw_collect (regcache, SPARC64_FPRS_REGNUM, 1336 regs + gregset->r_fprs_offset); 1337 1338 } 1339 1340 if ((regnum >= SPARC_G1_REGNUM && regnum <= SPARC_O7_REGNUM) || regnum == -1) 1341 { 1342 int offset = gregset->r_g1_offset; 1343 1344 if (sparc32) 1345 offset += 4; 1346 1347 /* %g0 is always zero. */ 1348 for (i = SPARC_G1_REGNUM; i <= SPARC_O7_REGNUM; i++) 1349 { 1350 if (regnum == i || regnum == -1) 1351 regcache_raw_collect (regcache, i, regs + offset); 1352 offset += 8; 1353 } 1354 } 1355 1356 if ((regnum >= SPARC_L0_REGNUM && regnum <= SPARC_I7_REGNUM) || regnum == -1) 1357 { 1358 /* Not all of the register set variants include Locals and 1359 Inputs. For those that don't, we read them off the stack. */ 1360 if (gregset->r_l0_offset != -1) 1361 { 1362 int offset = gregset->r_l0_offset; 1363 1364 if (sparc32) 1365 offset += 4; 1366 1367 for (i = SPARC_L0_REGNUM; i <= SPARC_I7_REGNUM; i++) 1368 { 1369 if (regnum == i || regnum == -1) 1370 regcache_raw_collect (regcache, i, regs + offset); 1371 offset += 8; 1372 } 1373 } 1374 } 1375} 1376 1377void 1378sparc64_supply_fpregset (struct regcache *regcache, 1379 int regnum, const void *fpregs) 1380{ 1381 int sparc32 = (gdbarch_ptr_bit (current_gdbarch) == 32); 1382 const char *regs = fpregs; 1383 int i; 1384 1385 for (i = 0; i < 32; i++) 1386 { 1387 if (regnum == (SPARC_F0_REGNUM + i) || regnum == -1) 1388 regcache_raw_supply (regcache, SPARC_F0_REGNUM + i, regs + (i * 4)); 1389 } 1390 1391 if (sparc32) 1392 { 1393 if (regnum == SPARC32_FSR_REGNUM || regnum == -1) 1394 regcache_raw_supply (regcache, SPARC32_FSR_REGNUM, 1395 regs + (32 * 4) + (16 * 8) + 4); 1396 } 1397 else 1398 { 1399 for (i = 0; i < 16; i++) 1400 { 1401 if (regnum == (SPARC64_F32_REGNUM + i) || regnum == -1) 1402 regcache_raw_supply (regcache, SPARC64_F32_REGNUM + i, 1403 regs + (32 * 4) + (i * 8)); 1404 } 1405 1406 if (regnum == SPARC64_FSR_REGNUM || regnum == -1) 1407 regcache_raw_supply (regcache, SPARC64_FSR_REGNUM, 1408 regs + (32 * 4) + (16 * 8)); 1409 } 1410} 1411 1412void 1413sparc64_collect_fpregset (const struct regcache *regcache, 1414 int regnum, void *fpregs) 1415{ 1416 int sparc32 = (gdbarch_ptr_bit (current_gdbarch) == 32); 1417 char *regs = fpregs; 1418 int i; 1419 1420 for (i = 0; i < 32; i++) 1421 { 1422 if (regnum == (SPARC_F0_REGNUM + i) || regnum == -1) 1423 regcache_raw_collect (regcache, SPARC_F0_REGNUM + i, regs + (i * 4)); 1424 } 1425 1426 if (sparc32) 1427 { 1428 if (regnum == SPARC32_FSR_REGNUM || regnum == -1) 1429 regcache_raw_collect (regcache, SPARC32_FSR_REGNUM, 1430 regs + (32 * 4) + (16 * 8) + 4); 1431 } 1432 else 1433 { 1434 for (i = 0; i < 16; i++) 1435 { 1436 if (regnum == (SPARC64_F32_REGNUM + i) || regnum == -1) 1437 regcache_raw_collect (regcache, SPARC64_F32_REGNUM + i, 1438 regs + (32 * 4) + (i * 8)); 1439 } 1440 1441 if (regnum == SPARC64_FSR_REGNUM || regnum == -1) 1442 regcache_raw_collect (regcache, SPARC64_FSR_REGNUM, 1443 regs + (32 * 4) + (16 * 8)); 1444 } 1445} 1446