sparc64-tdep.c revision 1.2
1/* Target-dependent code for UltraSPARC.
2
3   Copyright 2003, 2004 Free Software Foundation, Inc.
4
5   This file is part of GDB.
6
7   This program is free software; you can redistribute it and/or modify
8   it under the terms of the GNU General Public License as published by
9   the Free Software Foundation; either version 2 of the License, or
10   (at your option) any later version.
11
12   This program is distributed in the hope that it will be useful,
13   but WITHOUT ANY WARRANTY; without even the implied warranty of
14   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15   GNU General Public License for more details.
16
17   You should have received a copy of the GNU General Public License
18   along with this program; if not, write to the Free Software
19   Foundation, Inc., 59 Temple Place - Suite 330,
20   Boston, MA 02111-1307, USA.  */
21
22#include "defs.h"
23#include "arch-utils.h"
24#include "floatformat.h"
25#include "frame.h"
26#include "frame-base.h"
27#include "frame-unwind.h"
28#include "gdbcore.h"
29#include "gdbtypes.h"
30#include "inferior.h"
31#include "symtab.h"
32#include "objfiles.h"
33#include "osabi.h"
34#include "regcache.h"
35#include "target.h"
36#include "value.h"
37
38#include "gdb_assert.h"
39#include "gdb_string.h"
40
41#include "sparc64-tdep.h"
42
43/* This file implements the The SPARC 64-bit ABI as defined by the
44   section "Low-Level System Information" of the SPARC Compliance
45   Definition (SCD) 2.4.1, which is the 64-bit System V psABI for
46   SPARC.  */
47
48/* Please use the sparc32_-prefix for 32-bit specific code, the
49   sparc64_-prefix for 64-bit specific code and the sparc_-prefix for
50   code can handle both.  */
51
52/* The functions on this page are intended to be used to classify
53   function arguments.  */
54
55/* Check whether TYPE is "Integral or Pointer".  */
56
57static int
58sparc64_integral_or_pointer_p (const struct type *type)
59{
60  switch (TYPE_CODE (type))
61    {
62    case TYPE_CODE_INT:
63    case TYPE_CODE_BOOL:
64    case TYPE_CODE_CHAR:
65    case TYPE_CODE_ENUM:
66    case TYPE_CODE_RANGE:
67      {
68	int len = TYPE_LENGTH (type);
69	gdb_assert (len == 1 || len == 2 || len == 4 || len == 8);
70      }
71      return 1;
72    case TYPE_CODE_PTR:
73    case TYPE_CODE_REF:
74      {
75	int len = TYPE_LENGTH (type);
76	gdb_assert (len == 8);
77      }
78      return 1;
79    default:
80      break;
81    }
82
83  return 0;
84}
85
86/* Check whether TYPE is "Floating".  */
87
88static int
89sparc64_floating_p (const struct type *type)
90{
91  switch (TYPE_CODE (type))
92    {
93    case TYPE_CODE_FLT:
94      {
95	int len = TYPE_LENGTH (type);
96	gdb_assert (len == 4 || len == 8 || len == 16);
97      }
98      return 1;
99    default:
100      break;
101    }
102
103  return 0;
104}
105
106/* Check whether TYPE is "Structure or Union".  */
107
108static int
109sparc64_structure_or_union_p (const struct type *type)
110{
111  switch (TYPE_CODE (type))
112    {
113    case TYPE_CODE_STRUCT:
114    case TYPE_CODE_UNION:
115      return 1;
116    default:
117      break;
118    }
119
120  return 0;
121}
122
123/* Register information.  */
124
125struct sparc64_register_info
126{
127  char *name;
128  struct type **type;
129};
130
131static struct sparc64_register_info sparc64_register_info[] =
132{
133  { "g0", &builtin_type_int64 },
134  { "g1", &builtin_type_int64 },
135  { "g2", &builtin_type_int64 },
136  { "g3", &builtin_type_int64 },
137  { "g4", &builtin_type_int64 },
138  { "g5", &builtin_type_int64 },
139  { "g6", &builtin_type_int64 },
140  { "g7", &builtin_type_int64 },
141
142  { "o0", &builtin_type_int64 },
143  { "o1", &builtin_type_int64 },
144  { "o2", &builtin_type_int64 },
145  { "o3", &builtin_type_int64 },
146  { "o4", &builtin_type_int64 },
147  { "o5", &builtin_type_int64 },
148  { "sp", &builtin_type_void_data_ptr },
149  { "o7", &builtin_type_int64 },
150
151  { "l0", &builtin_type_int64 },
152  { "l1", &builtin_type_int64 },
153  { "l2", &builtin_type_int64 },
154  { "l3", &builtin_type_int64 },
155  { "l4", &builtin_type_int64 },
156  { "l5", &builtin_type_int64 },
157  { "l6", &builtin_type_int64 },
158  { "l7", &builtin_type_int64 },
159
160  { "i0", &builtin_type_int64 },
161  { "i1", &builtin_type_int64 },
162  { "i2", &builtin_type_int64 },
163  { "i3", &builtin_type_int64 },
164  { "i4", &builtin_type_int64 },
165  { "i5", &builtin_type_int64 },
166  { "fp", &builtin_type_void_data_ptr },
167  { "i7", &builtin_type_int64 },
168
169  { "f0", &builtin_type_float },
170  { "f1", &builtin_type_float },
171  { "f2", &builtin_type_float },
172  { "f3", &builtin_type_float },
173  { "f4", &builtin_type_float },
174  { "f5", &builtin_type_float },
175  { "f6", &builtin_type_float },
176  { "f7", &builtin_type_float },
177  { "f8", &builtin_type_float },
178  { "f9", &builtin_type_float },
179  { "f10", &builtin_type_float },
180  { "f11", &builtin_type_float },
181  { "f12", &builtin_type_float },
182  { "f13", &builtin_type_float },
183  { "f14", &builtin_type_float },
184  { "f15", &builtin_type_float },
185  { "f16", &builtin_type_float },
186  { "f17", &builtin_type_float },
187  { "f18", &builtin_type_float },
188  { "f19", &builtin_type_float },
189  { "f20", &builtin_type_float },
190  { "f21", &builtin_type_float },
191  { "f22", &builtin_type_float },
192  { "f23", &builtin_type_float },
193  { "f24", &builtin_type_float },
194  { "f25", &builtin_type_float },
195  { "f26", &builtin_type_float },
196  { "f27", &builtin_type_float },
197  { "f28", &builtin_type_float },
198  { "f29", &builtin_type_float },
199  { "f30", &builtin_type_float },
200  { "f31", &builtin_type_float },
201  { "f32", &builtin_type_double },
202  { "f34", &builtin_type_double },
203  { "f36", &builtin_type_double },
204  { "f38", &builtin_type_double },
205  { "f40", &builtin_type_double },
206  { "f42", &builtin_type_double },
207  { "f44", &builtin_type_double },
208  { "f46", &builtin_type_double },
209  { "f48", &builtin_type_double },
210  { "f50", &builtin_type_double },
211  { "f52", &builtin_type_double },
212  { "f54", &builtin_type_double },
213  { "f56", &builtin_type_double },
214  { "f58", &builtin_type_double },
215  { "f60", &builtin_type_double },
216  { "f62", &builtin_type_double },
217
218  { "pc", &builtin_type_void_func_ptr },
219  { "npc", &builtin_type_void_func_ptr },
220
221  /* This raw register contains the contents of %cwp, %pstate, %asi
222     and %ccr as laid out in a %tstate register.  */
223  /* FIXME: Give it a name until we start using register groups.  */
224  { "state", &builtin_type_int64 },
225
226  { "fsr", &builtin_type_int64 },
227  { "fprs", &builtin_type_int64 },
228
229  /* "Although Y is a 64-bit register, its high-order 32 bits are
230     reserved and always read as 0."  */
231  { "y", &builtin_type_int64 }
232};
233
234/* Total number of registers.  */
235#define SPARC64_NUM_REGS ARRAY_SIZE (sparc64_register_info)
236
237/* We provide the aliases %d0..%d62 and %q0..%q60 for the floating
238   registers as "psuedo" registers.  */
239
240static struct sparc64_register_info sparc64_pseudo_register_info[] =
241{
242  { "cwp", &builtin_type_int64 },
243  { "pstate", &builtin_type_int64 },
244  { "asi", &builtin_type_int64 },
245  { "ccr", &builtin_type_int64 },
246
247  { "d0", &builtin_type_double },
248  { "d2", &builtin_type_double },
249  { "d4", &builtin_type_double },
250  { "d6", &builtin_type_double },
251  { "d8", &builtin_type_double },
252  { "d10", &builtin_type_double },
253  { "d12", &builtin_type_double },
254  { "d14", &builtin_type_double },
255  { "d16", &builtin_type_double },
256  { "d18", &builtin_type_double },
257  { "d20", &builtin_type_double },
258  { "d22", &builtin_type_double },
259  { "d24", &builtin_type_double },
260  { "d26", &builtin_type_double },
261  { "d28", &builtin_type_double },
262  { "d30", &builtin_type_double },
263  { "d32", &builtin_type_double },
264  { "d34", &builtin_type_double },
265  { "d36", &builtin_type_double },
266  { "d38", &builtin_type_double },
267  { "d40", &builtin_type_double },
268  { "d42", &builtin_type_double },
269  { "d44", &builtin_type_double },
270  { "d46", &builtin_type_double },
271  { "d48", &builtin_type_double },
272  { "d50", &builtin_type_double },
273  { "d52", &builtin_type_double },
274  { "d54", &builtin_type_double },
275  { "d56", &builtin_type_double },
276  { "d58", &builtin_type_double },
277  { "d60", &builtin_type_double },
278  { "d62", &builtin_type_double },
279
280  { "q0", &builtin_type_long_double },
281  { "q4", &builtin_type_long_double },
282  { "q8", &builtin_type_long_double },
283  { "q12", &builtin_type_long_double },
284  { "q16", &builtin_type_long_double },
285  { "q20", &builtin_type_long_double },
286  { "q24", &builtin_type_long_double },
287  { "q28", &builtin_type_long_double },
288  { "q32", &builtin_type_long_double },
289  { "q36", &builtin_type_long_double },
290  { "q40", &builtin_type_long_double },
291  { "q44", &builtin_type_long_double },
292  { "q48", &builtin_type_long_double },
293  { "q52", &builtin_type_long_double },
294  { "q56", &builtin_type_long_double },
295  { "q60", &builtin_type_long_double }
296};
297
298/* Total number of pseudo registers.  */
299#define SPARC64_NUM_PSEUDO_REGS ARRAY_SIZE (sparc64_pseudo_register_info)
300
301/* Return the name of register REGNUM.  */
302
303static const char *
304sparc64_register_name (int regnum)
305{
306  if (regnum >= 0 && regnum < SPARC64_NUM_REGS)
307    return sparc64_register_info[regnum].name;
308
309  if (regnum >= SPARC64_NUM_REGS
310      && regnum < SPARC64_NUM_REGS + SPARC64_NUM_PSEUDO_REGS)
311    return sparc64_pseudo_register_info[regnum - SPARC64_NUM_REGS].name;
312
313  return NULL;
314}
315
316/* Return the GDB type object for the "standard" data type of data in
317   register REGNUM. */
318
319static struct type *
320sparc64_register_type (struct gdbarch *gdbarch, int regnum)
321{
322  if (regnum >= SPARC64_NUM_REGS
323      && regnum < SPARC64_NUM_REGS + SPARC64_NUM_PSEUDO_REGS)
324    return *sparc64_pseudo_register_info[regnum - SPARC64_NUM_REGS].type;
325
326  gdb_assert (regnum >= 0 && regnum < SPARC64_NUM_REGS);
327  return *sparc64_register_info[regnum].type;
328}
329
330static void
331sparc64_pseudo_register_read (struct gdbarch *gdbarch,
332			      struct regcache *regcache,
333			      int regnum, void *buf)
334{
335  gdb_assert (regnum >= SPARC64_NUM_REGS);
336
337  if (regnum >= SPARC64_D0_REGNUM && regnum <= SPARC64_D30_REGNUM)
338    {
339      regnum = SPARC_F0_REGNUM + 2 * (regnum - SPARC64_D0_REGNUM);
340      regcache_raw_read (regcache, regnum, buf);
341      regcache_raw_read (regcache, regnum + 1, ((char *)buf) + 4);
342    }
343  else if (regnum >= SPARC64_D32_REGNUM && regnum <= SPARC64_D62_REGNUM)
344    {
345      regnum = SPARC64_F32_REGNUM + (regnum - SPARC64_D32_REGNUM);
346      regcache_raw_read (regcache, regnum, buf);
347    }
348  else if (regnum >= SPARC64_Q0_REGNUM && regnum <= SPARC64_Q28_REGNUM)
349    {
350      regnum = SPARC_F0_REGNUM + 4 * (regnum - SPARC64_Q0_REGNUM);
351      regcache_raw_read (regcache, regnum, buf);
352      regcache_raw_read (regcache, regnum + 1, ((char *)buf) + 4);
353      regcache_raw_read (regcache, regnum + 2, ((char *)buf) + 8);
354      regcache_raw_read (regcache, regnum + 3, ((char *)buf) + 12);
355    }
356  else if (regnum >= SPARC64_Q32_REGNUM && regnum <= SPARC64_Q60_REGNUM)
357    {
358      regnum = SPARC64_F32_REGNUM + 2 * (regnum - SPARC64_Q32_REGNUM);
359      regcache_raw_read (regcache, regnum, buf);
360      regcache_raw_read (regcache, regnum + 1, ((char *)buf) + 8);
361    }
362  else if (regnum == SPARC64_CWP_REGNUM
363	   || regnum == SPARC64_PSTATE_REGNUM
364	   || regnum == SPARC64_ASI_REGNUM
365	   || regnum == SPARC64_CCR_REGNUM)
366    {
367      ULONGEST state;
368
369      regcache_raw_read_unsigned (regcache, SPARC64_STATE_REGNUM, &state);
370      switch (regnum)
371	{
372	case SPARC64_CWP_REGNUM:
373	  state = (state >> 0) & ((1 << 5) - 1);
374	  break;
375	case SPARC64_PSTATE_REGNUM:
376	  state = (state >> 8) & ((1 << 12) - 1);
377	  break;
378	case SPARC64_ASI_REGNUM:
379	  state = (state >> 24) & ((1 << 8) - 1);
380	  break;
381	case SPARC64_CCR_REGNUM:
382	  state = (state >> 32) & ((1 << 8) - 1);
383	  break;
384	}
385      store_unsigned_integer (buf, 8, state);
386    }
387}
388
389static void
390sparc64_pseudo_register_write (struct gdbarch *gdbarch,
391			       struct regcache *regcache,
392			       int regnum, const void *buf)
393{
394  gdb_assert (regnum >= SPARC64_NUM_REGS);
395
396  if (regnum >= SPARC64_D0_REGNUM && regnum <= SPARC64_D30_REGNUM)
397    {
398      regnum = SPARC_F0_REGNUM + 2 * (regnum - SPARC64_D0_REGNUM);
399      regcache_raw_write (regcache, regnum, buf);
400      regcache_raw_write (regcache, regnum + 1, ((const char *)buf) + 4);
401    }
402  else if (regnum >= SPARC64_D32_REGNUM && regnum <= SPARC64_D62_REGNUM)
403    {
404      regnum = SPARC64_F32_REGNUM + (regnum - SPARC64_D32_REGNUM);
405      regcache_raw_write (regcache, regnum, buf);
406    }
407  else if (regnum >= SPARC64_Q0_REGNUM && regnum <= SPARC64_Q28_REGNUM)
408    {
409      regnum = SPARC_F0_REGNUM + 4 * (regnum - SPARC64_Q0_REGNUM);
410      regcache_raw_write (regcache, regnum, buf);
411      regcache_raw_write (regcache, regnum + 1, ((const char *)buf) + 4);
412      regcache_raw_write (regcache, regnum + 2, ((const char *)buf) + 8);
413      regcache_raw_write (regcache, regnum + 3, ((const char *)buf) + 12);
414    }
415  else if (regnum >= SPARC64_Q32_REGNUM && regnum <= SPARC64_Q60_REGNUM)
416    {
417      regnum = SPARC64_F32_REGNUM + 2 * (regnum - SPARC64_Q32_REGNUM);
418      regcache_raw_write (regcache, regnum, buf);
419      regcache_raw_write (regcache, regnum + 1, ((const char *)buf) + 8);
420    }
421  else if (regnum == SPARC64_CWP_REGNUM
422	   || regnum == SPARC64_PSTATE_REGNUM
423	   || regnum == SPARC64_ASI_REGNUM
424	   || regnum == SPARC64_CCR_REGNUM)
425    {
426      ULONGEST state, bits;
427
428      regcache_raw_read_unsigned (regcache, SPARC64_STATE_REGNUM, &state);
429      bits = extract_unsigned_integer (buf, 8);
430      switch (regnum)
431	{
432	case SPARC64_CWP_REGNUM:
433	  state |= ((bits & ((1 << 5) - 1)) << 0);
434	  break;
435	case SPARC64_PSTATE_REGNUM:
436	  state |= ((bits & ((1 << 12) - 1)) << 8);
437	  break;
438	case SPARC64_ASI_REGNUM:
439	  state |= ((bits & ((1 << 8) - 1)) << 24);
440	  break;
441	case SPARC64_CCR_REGNUM:
442	  state |= ((bits & ((1 << 8) - 1)) << 32);
443	  break;
444	}
445      regcache_raw_write_unsigned (regcache, SPARC64_STATE_REGNUM, state);
446    }
447}
448
449
450/* Return PC of first real instruction of the function starting at
451   START_PC.  */
452
453static CORE_ADDR
454sparc64_skip_prologue (CORE_ADDR start_pc)
455{
456  struct symtab_and_line sal;
457  CORE_ADDR func_start, func_end;
458  struct sparc_frame_cache cache;
459
460  /* This is the preferred method, find the end of the prologue by
461     using the debugging information.  */
462  if (find_pc_partial_function (start_pc, NULL, &func_start, &func_end))
463    {
464      sal = find_pc_line (func_start, 0);
465
466      if (sal.end < func_end
467	  && start_pc <= sal.end)
468	return sal.end;
469    }
470
471  return sparc_analyze_prologue (start_pc, 0xffffffffffffffffULL, &cache);
472}
473
474/* Normal frames.  */
475
476static struct sparc_frame_cache *
477sparc64_frame_cache (struct frame_info *next_frame, void **this_cache)
478{
479  return sparc_frame_cache (next_frame, this_cache);
480}
481
482static void
483sparc64_frame_this_id (struct frame_info *next_frame, void **this_cache,
484		       struct frame_id *this_id)
485{
486  struct sparc_frame_cache *cache =
487    sparc64_frame_cache (next_frame, this_cache);
488
489  /* This marks the outermost frame.  */
490  if (cache->base == 0)
491    return;
492
493  (*this_id) = frame_id_build (cache->base, cache->pc);
494}
495
496static void
497sparc64_frame_prev_register (struct frame_info *next_frame, void **this_cache,
498			     int regnum, int *optimizedp,
499			     enum lval_type *lvalp, CORE_ADDR *addrp,
500			     int *realnump, void *valuep)
501{
502  struct sparc_frame_cache *cache =
503    sparc64_frame_cache (next_frame, this_cache);
504
505  if (regnum == SPARC64_PC_REGNUM || regnum == SPARC64_NPC_REGNUM)
506    {
507      *optimizedp = 0;
508      *lvalp = not_lval;
509      *addrp = 0;
510      *realnump = -1;
511      if (valuep)
512	{
513	  CORE_ADDR pc = (regnum == SPARC64_NPC_REGNUM) ? 4 : 0;
514
515	  regnum = cache->frameless_p ? SPARC_O7_REGNUM : SPARC_I7_REGNUM;
516	  pc += frame_unwind_register_unsigned (next_frame, regnum) + 8;
517	  store_unsigned_integer (valuep, 8, pc);
518	}
519      return;
520    }
521
522  /* The previous frame's `local' and `in' registers have been saved
523     in the register save area.  */
524  if (!cache->frameless_p
525      && regnum >= SPARC_L0_REGNUM && regnum <= SPARC_I7_REGNUM)
526    {
527      *optimizedp = 0;
528      *lvalp = lval_memory;
529      *addrp = cache->base + BIAS + (regnum - SPARC_L0_REGNUM) * 8;
530      *realnump = -1;
531      if (valuep)
532	{
533	  struct gdbarch *gdbarch = get_frame_arch (next_frame);
534
535	  /* Read the value in from memory.  */
536	  read_memory (*addrp, valuep, register_size (gdbarch, regnum));
537	}
538      return;
539    }
540
541  /* The previous frame's `out' registers are accessable as the
542     current frame's `in' registers.  */
543  if (!cache->frameless_p
544      && regnum >= SPARC_O0_REGNUM && regnum <= SPARC_O7_REGNUM)
545    regnum += (SPARC_I0_REGNUM - SPARC_O0_REGNUM);
546
547  frame_register_unwind (next_frame, regnum,
548			 optimizedp, lvalp, addrp, realnump, valuep);
549}
550
551static const struct frame_unwind sparc64_frame_unwind =
552{
553  NORMAL_FRAME,
554  sparc64_frame_this_id,
555  sparc64_frame_prev_register
556};
557
558static const struct frame_unwind *
559sparc64_frame_sniffer (struct frame_info *next_frame)
560{
561  return &sparc64_frame_unwind;
562}
563
564
565static CORE_ADDR
566sparc64_frame_base_address (struct frame_info *next_frame, void **this_cache)
567{
568  struct sparc_frame_cache *cache =
569    sparc64_frame_cache (next_frame, this_cache);
570
571  /* ??? Should we take BIAS into account here?  */
572  return cache->base;
573}
574
575static const struct frame_base sparc64_frame_base =
576{
577  &sparc64_frame_unwind,
578  sparc64_frame_base_address,
579  sparc64_frame_base_address,
580  sparc64_frame_base_address
581};
582
583/* Check whether TYPE must be 16-byte aligned.  */
584
585static int
586sparc64_16_byte_align_p (struct type *type)
587{
588  if (sparc64_floating_p (type) && TYPE_LENGTH (type) == 16)
589    return 1;
590
591  if (sparc64_structure_or_union_p (type))
592    {
593      int i;
594
595      for (i = 0; i < TYPE_NFIELDS (type); i++)
596	{
597	  struct type *subtype = check_typedef (TYPE_FIELD_TYPE (type, i));
598
599	  if (sparc64_16_byte_align_p (subtype))
600	    return 1;
601	}
602    }
603
604  return 0;
605}
606
607/* Store floating fields of element ELEMENT of an "parameter array"
608   that has type TYPE and is stored at BITPOS in VALBUF in the
609   apropriate registers of REGCACHE.  This function can be called
610   recursively and therefore handles floating types in addition to
611   structures.  */
612
613static void
614sparc64_store_floating_fields (struct regcache *regcache, struct type *type,
615			       char *valbuf, int element, int bitpos)
616{
617  gdb_assert (element < 16);
618
619  if (sparc64_floating_p (type))
620    {
621      int len = TYPE_LENGTH (type);
622      int regnum;
623
624      if (len == 16)
625	{
626	  gdb_assert (bitpos == 0);
627	  gdb_assert ((element % 2) == 0);
628
629	  regnum = SPARC64_Q0_REGNUM + element / 2;
630	  regcache_cooked_write (regcache, regnum, valbuf);
631	}
632      else if (len == 8)
633	{
634	  gdb_assert (bitpos == 0 || bitpos == 64);
635
636	  regnum = SPARC64_D0_REGNUM + element + bitpos / 64;
637	  regcache_cooked_write (regcache, regnum, valbuf + (bitpos / 8));
638	}
639      else
640	{
641	  gdb_assert (len == 4);
642	  gdb_assert (bitpos % 32 == 0 && bitpos >= 0 && bitpos < 128);
643
644	  regnum = SPARC_F0_REGNUM + element * 2 + bitpos / 32;
645	  regcache_cooked_write (regcache, regnum, valbuf + (bitpos / 8));
646	}
647    }
648  else if (sparc64_structure_or_union_p (type))
649    {
650      int i;
651
652      for (i = 0; i < TYPE_NFIELDS (type); i++)
653	{
654	  struct type *subtype = check_typedef (TYPE_FIELD_TYPE (type, i));
655	  int subpos = bitpos + TYPE_FIELD_BITPOS (type, i);
656
657	  sparc64_store_floating_fields (regcache, subtype, valbuf,
658					 element, subpos);
659	}
660
661      /* GCC has an interesting bug.  If TYPE is a structure that has
662         a single `float' member, GCC doesn't treat it as a structure
663         at all, but rather as an ordinary `float' argument.  This
664         argument will be stored in %f1, as required by the psABI.
665         However, as a member of a structure the psABI requires it to
666         be stored in %f0.  This bug is present in GCC 3.3.2, but
667         probably in older releases to.  To appease GCC, if a
668         structure has only a single `float' member, we store its
669         value in %f1 too (we already have stored in %f0).  */
670      if (TYPE_NFIELDS (type) == 1)
671	{
672	  struct type *subtype = check_typedef (TYPE_FIELD_TYPE (type, 0));
673
674	  if (sparc64_floating_p (subtype) && TYPE_LENGTH (subtype) == 4)
675	    regcache_cooked_write (regcache, SPARC_F1_REGNUM, valbuf);
676	}
677    }
678}
679
680/* Fetch floating fields from a variable of type TYPE from the
681   appropriate registers for BITPOS in REGCACHE and store it at BITPOS
682   in VALBUF.  This function can be called recursively and therefore
683   handles floating types in addition to structures.  */
684
685static void
686sparc64_extract_floating_fields (struct regcache *regcache, struct type *type,
687				 char *valbuf, int bitpos)
688{
689  if (sparc64_floating_p (type))
690    {
691      int len = TYPE_LENGTH (type);
692      int regnum;
693
694      if (len == 16)
695	{
696	  gdb_assert (bitpos == 0 || bitpos == 128);
697
698	  regnum = SPARC64_Q0_REGNUM + bitpos / 128;
699	  regcache_cooked_read (regcache, regnum, valbuf + (bitpos / 8));
700	}
701      else if (len == 8)
702	{
703	  gdb_assert (bitpos % 64 == 0 && bitpos >= 0 && bitpos < 256);
704
705	  regnum = SPARC64_D0_REGNUM + bitpos / 64;
706	  regcache_cooked_read (regcache, regnum, valbuf + (bitpos / 8));
707	}
708      else
709	{
710	  gdb_assert (len == 4);
711	  gdb_assert (bitpos % 32 == 0 && bitpos >= 0 && bitpos < 256);
712
713	  regnum = SPARC_F0_REGNUM + bitpos / 32;
714	  regcache_cooked_read (regcache, regnum, valbuf + (bitpos / 8));
715	}
716    }
717  else if (sparc64_structure_or_union_p (type))
718    {
719      int i;
720
721      for (i = 0; i < TYPE_NFIELDS (type); i++)
722	{
723	  struct type *subtype = check_typedef (TYPE_FIELD_TYPE (type, i));
724	  int subpos = bitpos + TYPE_FIELD_BITPOS (type, i);
725
726	  sparc64_extract_floating_fields (regcache, subtype, valbuf, subpos);
727	}
728    }
729}
730
731/* Store the NARGS arguments ARGS and STRUCT_ADDR (if STRUCT_RETURN is
732   non-zero) in REGCACHE and on the stack (starting from address SP).  */
733
734static CORE_ADDR
735sparc64_store_arguments (struct regcache *regcache, int nargs,
736			 struct value **args, CORE_ADDR sp,
737			 int struct_return, CORE_ADDR struct_addr)
738{
739  /* Number of extended words in the "parameter array".  */
740  int num_elements = 0;
741  int element = 0;
742  int i;
743
744  /* Take BIAS into account.  */
745  sp += BIAS;
746
747  /* First we calculate the number of extended words in the "parameter
748     array".  While doing so we also convert some of the arguments.  */
749
750  if (struct_return)
751    num_elements++;
752
753  for (i = 0; i < nargs; i++)
754    {
755      struct type *type = VALUE_TYPE (args[i]);
756      int len = TYPE_LENGTH (type);
757
758      if (sparc64_structure_or_union_p (type))
759	{
760	  /* Structure or Union arguments.  */
761	  if (len <= 16)
762	    {
763	      if (num_elements % 2 && sparc64_16_byte_align_p (type))
764		num_elements++;
765	      num_elements += ((len + 7) / 8);
766	    }
767	  else
768	    {
769	      /* The psABI says that "Structures or unions larger than
770		 sixteen bytes are copied by the caller and passed
771		 indirectly; the caller will pass the address of a
772		 correctly aligned structure value.  This sixty-four
773		 bit address will occupy one word in the parameter
774		 array, and may be promoted to an %o register like any
775		 other pointer value."  Allocate memory for these
776		 values on the stack.  */
777	      sp -= len;
778
779	      /* Use 16-byte alignment for these values.  That's
780                 always correct, and wasting a few bytes shouldn't be
781                 a problem.  */
782	      sp &= ~0xf;
783
784	      write_memory (sp, VALUE_CONTENTS (args[i]), len);
785	      args[i] = value_from_pointer (lookup_pointer_type (type), sp);
786	      num_elements++;
787	    }
788	}
789      else if (sparc64_floating_p (type))
790	{
791	  /* Floating arguments.  */
792
793	  if (len == 16)
794	    {
795	      /* The psABI says that "Each quad-precision parameter
796                 value will be assigned to two extended words in the
797                 parameter array.  */
798	      num_elements += 2;
799
800	      /* The psABI says that "Long doubles must be
801                 quad-aligned, and thus a hole might be introduced
802                 into the parameter array to force alignment."  Skip
803                 an element if necessary.  */
804	      if (num_elements % 2)
805		num_elements++;
806	    }
807	  else
808	    num_elements++;
809	}
810      else
811	{
812	  /* Integral and pointer arguments.  */
813	  gdb_assert (sparc64_integral_or_pointer_p (type));
814
815	  /* The psABI says that "Each argument value of integral type
816	     smaller than an extended word will be widened by the
817	     caller to an extended word according to the signed-ness
818	     of the argument type."  */
819	  if (len < 8)
820	    args[i] = value_cast (builtin_type_int64, args[i]);
821	  num_elements++;
822	}
823    }
824
825  /* Allocate the "parameter array".  */
826  sp -= num_elements * 8;
827
828  /* The psABI says that "Every stack frame must be 16-byte aligned."  */
829  sp &= ~0xf;
830
831  /* Now we store the arguments in to the "paramater array".  Some
832     Integer or Pointer arguments and Structure or Union arguments
833     will be passed in %o registers.  Some Floating arguments and
834     floating members of structures are passed in floating-point
835     registers.  However, for functions with variable arguments,
836     floating arguments are stored in an %0 register, and for
837     functions without a prototype floating arguments are stored in
838     both a floating-point and an %o registers, or a floating-point
839     register and memory.  To simplify the logic here we always pass
840     arguments in memory, an %o register, and a floating-point
841     register if appropriate.  This should be no problem since the
842     contents of any unused memory or registers in the "parameter
843     array" are undefined.  */
844
845  if (struct_return)
846    {
847      regcache_cooked_write_unsigned (regcache, SPARC_O0_REGNUM, struct_addr);
848      element++;
849    }
850
851  for (i = 0; i < nargs; i++)
852    {
853      char *valbuf = VALUE_CONTENTS (args[i]);
854      struct type *type = VALUE_TYPE (args[i]);
855      int len = TYPE_LENGTH (type);
856      int regnum = -1;
857      char buf[16];
858
859      if (sparc64_structure_or_union_p (type))
860	{
861	  /* Structure or Union arguments.  */
862	  gdb_assert (len <= 16);
863	  memset (buf, 0, sizeof (buf));
864	  valbuf = memcpy (buf, valbuf, len);
865
866	  if (element % 2 && sparc64_16_byte_align_p (type))
867	    element++;
868
869	  if (element < 6)
870	    {
871	      regnum = SPARC_O0_REGNUM + element;
872	      if (len > 8 && element < 5)
873		regcache_cooked_write (regcache, regnum + 1, valbuf + 8);
874	    }
875
876	  if (element < 16)
877	    sparc64_store_floating_fields (regcache, type, valbuf, element, 0);
878	}
879      else if (sparc64_floating_p (type))
880	{
881	  /* Floating arguments.  */
882	  if (len == 16)
883	    {
884	      if (element % 2)
885		element++;
886	      if (element < 16)
887		regnum = SPARC64_Q0_REGNUM + element / 2;
888	    }
889	  else if (len == 8)
890	    {
891	      if (element < 16)
892		regnum = SPARC64_D0_REGNUM + element;
893	    }
894	  else
895	    {
896	      /* The psABI says "Each single-precision parameter value
897                 will be assigned to one extended word in the
898                 parameter array, and right-justified within that
899                 word; the left half (even floatregister) is
900                 undefined."  Even though the psABI says that "the
901                 left half is undefined", set it to zero here.  */
902	      memset (buf, 0, 4);
903	      memcpy (buf + 4, valbuf, 4);
904	      valbuf = buf;
905	      len = 8;
906	      if (element < 16)
907		regnum = SPARC64_D0_REGNUM + element;
908	    }
909	}
910      else
911	{
912	  /* Integral and pointer arguments.  */
913	  gdb_assert (len == 8);
914	  if (element < 6)
915	    regnum = SPARC_O0_REGNUM + element;
916	}
917
918      if (regnum != -1)
919	{
920	  regcache_cooked_write (regcache, regnum, valbuf);
921
922	  /* If we're storing the value in a floating-point register,
923             also store it in the corresponding %0 register(s).  */
924	  if (regnum >= SPARC64_D0_REGNUM && regnum <= SPARC64_D10_REGNUM)
925	    {
926	      gdb_assert (element < 6);
927	      regnum = SPARC_O0_REGNUM + element;
928	      regcache_cooked_write (regcache, regnum, valbuf);
929	    }
930	  else if (regnum >= SPARC64_Q0_REGNUM && regnum <= SPARC64_Q8_REGNUM)
931	    {
932	      gdb_assert (element < 6);
933	      regnum = SPARC_O0_REGNUM + element;
934	      regcache_cooked_write (regcache, regnum, valbuf);
935	      regcache_cooked_write (regcache, regnum + 1, valbuf);
936	    }
937	}
938
939      /* Always store the argument in memeory.  */
940      write_memory (sp + element * 8, valbuf, len);
941      element += ((len + 7) / 8);
942    }
943
944  gdb_assert (element == num_elements);
945
946  /* Take BIAS into account.  */
947  sp -= BIAS;
948  return sp;
949}
950
951static CORE_ADDR
952sparc64_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
953			 struct regcache *regcache, CORE_ADDR bp_addr,
954			 int nargs, struct value **args, CORE_ADDR sp,
955			 int struct_return, CORE_ADDR struct_addr)
956{
957  /* Set return address.  */
958  regcache_cooked_write_unsigned (regcache, SPARC_O7_REGNUM, bp_addr - 8);
959
960  /* Set up function arguments.  */
961  sp = sparc64_store_arguments (regcache, nargs, args, sp,
962				struct_return, struct_addr);
963
964  /* Allocate the register save area.  */
965  sp -= 16 * 8;
966
967  /* Stack should be 16-byte aligned at this point.  */
968  gdb_assert ((sp + BIAS) % 16 == 0);
969
970  /* Finally, update the stack pointer.  */
971  regcache_cooked_write_unsigned (regcache, SPARC_SP_REGNUM, sp);
972
973  return sp;
974}
975
976
977/* Extract from an array REGBUF containing the (raw) register state, a
978   function return value of TYPE, and copy that into VALBUF.  */
979
980static void
981sparc64_extract_return_value (struct type *type, struct regcache *regcache,
982			      void *valbuf)
983{
984  int len = TYPE_LENGTH (type);
985  char buf[32];
986  int i;
987
988  if (sparc64_structure_or_union_p (type))
989    {
990      /* Structure or Union return values.  */
991      gdb_assert (len <= 32);
992
993      for (i = 0; i < ((len + 7) / 8); i++)
994	regcache_cooked_read (regcache, SPARC_O0_REGNUM + i, buf + i * 8);
995      if (TYPE_CODE (type) != TYPE_CODE_UNION)
996	sparc64_extract_floating_fields (regcache, type, buf, 0);
997      memcpy (valbuf, buf, len);
998    }
999  else if (sparc64_floating_p (type))
1000    {
1001      /* Floating return values.  */
1002      for (i = 0; i < len / 4; i++)
1003	regcache_cooked_read (regcache, SPARC_F0_REGNUM + i, buf + i * 4);
1004      memcpy (valbuf, buf, len);
1005    }
1006  else
1007    {
1008      /* Integral and pointer return values.  */
1009      gdb_assert (sparc64_integral_or_pointer_p (type));
1010
1011      /* Just stripping off any unused bytes should preserve the
1012         signed-ness just fine.  */
1013      regcache_cooked_read (regcache, SPARC_O0_REGNUM, buf);
1014      memcpy (valbuf, buf + 8 - len, len);
1015    }
1016}
1017
1018/* Write into the appropriate registers a function return value stored
1019   in VALBUF of type TYPE.  */
1020
1021static void
1022sparc64_store_return_value (struct type *type, struct regcache *regcache,
1023			    const void *valbuf)
1024{
1025  int len = TYPE_LENGTH (type);
1026  char buf[16];
1027  int i;
1028
1029  if (sparc64_structure_or_union_p (type))
1030    {
1031      /* Structure or Union return values.  */
1032      gdb_assert (len <= 32);
1033
1034      /* Simplify matters by storing the complete value (including
1035         floating members) into %o0 and %o1.  Floating members are
1036         also store in the appropriate floating-point registers.  */
1037      memset (buf, 0, sizeof (buf));
1038      memcpy (buf, valbuf, len);
1039      for (i = 0; i < ((len + 7) / 8); i++)
1040	regcache_cooked_write (regcache, SPARC_O0_REGNUM + i, buf + i * 8);
1041      if (TYPE_CODE (type) != TYPE_CODE_UNION)
1042	sparc64_store_floating_fields (regcache, type, buf, 0, 0);
1043    }
1044  else if (sparc64_floating_p (type))
1045    {
1046      /* Floating return values.  */
1047      memcpy (buf, valbuf, len);
1048      for (i = 0; i < len / 4; i++)
1049	regcache_cooked_write (regcache, SPARC_F0_REGNUM + i, buf + i * 4);
1050    }
1051  else
1052    {
1053      /* Integral and pointer return values.  */
1054      gdb_assert (sparc64_integral_or_pointer_p (type));
1055
1056      /* ??? Do we need to do any sign-extension here?  */
1057      memset (buf, 0, 8);
1058      memcpy (buf + 8 - len, valbuf, len);
1059      regcache_cooked_write (regcache, SPARC_O0_REGNUM, buf);
1060    }
1061}
1062
1063static enum return_value_convention
1064sparc64_return_value (struct gdbarch *gdbarch, struct type *type,
1065		      struct regcache *regcache, void *readbuf,
1066		      const void *writebuf)
1067{
1068  if (TYPE_LENGTH (type) > 32)
1069    return RETURN_VALUE_STRUCT_CONVENTION;
1070
1071  if (readbuf)
1072    sparc64_extract_return_value (type, regcache, readbuf);
1073  if (writebuf)
1074    sparc64_store_return_value (type, regcache, writebuf);
1075
1076  return RETURN_VALUE_REGISTER_CONVENTION;
1077}
1078
1079
1080void
1081sparc64_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
1082{
1083  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1084
1085  tdep->pc_regnum = SPARC64_PC_REGNUM;
1086  tdep->npc_regnum = SPARC64_NPC_REGNUM;
1087
1088  /* This is what all the fuss is about.  */
1089  set_gdbarch_long_bit (gdbarch, 64);
1090  set_gdbarch_long_long_bit (gdbarch, 64);
1091  set_gdbarch_ptr_bit (gdbarch, 64);
1092
1093  set_gdbarch_num_regs (gdbarch, SPARC64_NUM_REGS);
1094  set_gdbarch_register_name (gdbarch, sparc64_register_name);
1095  set_gdbarch_register_type (gdbarch, sparc64_register_type);
1096  set_gdbarch_num_pseudo_regs (gdbarch, SPARC64_NUM_PSEUDO_REGS);
1097  set_gdbarch_pseudo_register_read (gdbarch, sparc64_pseudo_register_read);
1098  set_gdbarch_pseudo_register_write (gdbarch, sparc64_pseudo_register_write);
1099
1100  /* Register numbers of various important registers.  */
1101  set_gdbarch_pc_regnum (gdbarch, SPARC64_PC_REGNUM); /* %pc */
1102
1103  /* Call dummy code.  */
1104  set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT);
1105  set_gdbarch_push_dummy_code (gdbarch, NULL);
1106  set_gdbarch_push_dummy_call (gdbarch, sparc64_push_dummy_call);
1107
1108  set_gdbarch_return_value (gdbarch, sparc64_return_value);
1109  set_gdbarch_stabs_argument_has_addr
1110    (gdbarch, default_stabs_argument_has_addr);
1111
1112  set_gdbarch_skip_prologue (gdbarch, sparc64_skip_prologue);
1113
1114  frame_unwind_append_sniffer (gdbarch, sparc64_frame_sniffer);
1115  frame_base_set_default (gdbarch, &sparc64_frame_base);
1116}
1117
1118
1119/* Helper functions for dealing with register sets.  */
1120
1121#define TSTATE_CWP	0x000000000000001fULL
1122#define TSTATE_ICC	0x0000000f00000000ULL
1123#define TSTATE_XCC	0x000000f000000000ULL
1124
1125#define PSR_S		0x00000080
1126#define PSR_ICC		0x00f00000
1127#define PSR_VERS	0x0f000000
1128#define PSR_IMPL	0xf0000000
1129#define PSR_V8PLUS	0xff000000
1130#define PSR_XCC		0x000f0000
1131
1132void
1133sparc64_supply_gregset (const struct sparc_gregset *gregset,
1134			struct regcache *regcache,
1135			int regnum, const void *gregs)
1136{
1137  int sparc32 = (gdbarch_ptr_bit (current_gdbarch) == 32);
1138  const char *regs = gregs;
1139  int i;
1140
1141  if (sparc32)
1142    {
1143      if (regnum == SPARC32_PSR_REGNUM || regnum == -1)
1144	{
1145	  int offset = gregset->r_tstate_offset;
1146	  ULONGEST tstate, psr;
1147	  char buf[4];
1148
1149	  tstate = extract_unsigned_integer (regs + offset, 8);
1150	  psr = ((tstate & TSTATE_CWP) | PSR_S | ((tstate & TSTATE_ICC) >> 12)
1151		 | ((tstate & TSTATE_XCC) >> 20) | PSR_V8PLUS);
1152	  store_unsigned_integer (buf, 4, psr);
1153	  regcache_raw_supply (regcache, SPARC32_PSR_REGNUM, buf);
1154	}
1155
1156      if (regnum == SPARC32_PC_REGNUM || regnum == -1)
1157	regcache_raw_supply (regcache, SPARC32_PC_REGNUM,
1158			     regs + gregset->r_pc_offset + 4);
1159
1160      if (regnum == SPARC32_NPC_REGNUM || regnum == -1)
1161	regcache_raw_supply (regcache, SPARC32_NPC_REGNUM,
1162			     regs + gregset->r_npc_offset + 4);
1163
1164      if (regnum == SPARC32_Y_REGNUM || regnum == -1)
1165	{
1166	  int offset = gregset->r_y_offset + 8 - gregset->r_y_size;
1167	  regcache_raw_supply (regcache, SPARC32_Y_REGNUM, regs + offset);
1168	}
1169    }
1170  else
1171    {
1172      if (regnum == SPARC64_STATE_REGNUM || regnum == -1)
1173	regcache_raw_supply (regcache, SPARC64_STATE_REGNUM,
1174			     regs + gregset->r_tstate_offset);
1175
1176      if (regnum == SPARC64_PC_REGNUM || regnum == -1)
1177	regcache_raw_supply (regcache, SPARC64_PC_REGNUM,
1178			     regs + gregset->r_pc_offset);
1179
1180      if (regnum == SPARC64_NPC_REGNUM || regnum == -1)
1181	regcache_raw_supply (regcache, SPARC64_NPC_REGNUM,
1182			     regs + gregset->r_npc_offset);
1183
1184      if (regnum == SPARC64_Y_REGNUM || regnum == -1)
1185	{
1186	  char buf[8];
1187
1188	  memset (buf, 0, 8);
1189	  memcpy (buf + 8 - gregset->r_y_size,
1190		  regs + gregset->r_y_offset, gregset->r_y_size);
1191	  regcache_raw_supply (regcache, SPARC64_Y_REGNUM, buf);
1192	}
1193
1194      if ((regnum == SPARC64_FPRS_REGNUM || regnum == -1)
1195	  && gregset->r_fprs_offset != -1)
1196	regcache_raw_supply (regcache, SPARC64_FPRS_REGNUM,
1197			     regs + gregset->r_fprs_offset);
1198    }
1199
1200  if (regnum == SPARC_G0_REGNUM || regnum == -1)
1201    regcache_raw_supply (regcache, SPARC_G0_REGNUM, NULL);
1202
1203  if ((regnum >= SPARC_G1_REGNUM && regnum <= SPARC_O7_REGNUM) || regnum == -1)
1204    {
1205      int offset = gregset->r_g1_offset;
1206
1207      if (sparc32)
1208	offset += 4;
1209
1210      for (i = SPARC_G1_REGNUM; i <= SPARC_O7_REGNUM; i++)
1211	{
1212	  if (regnum == i || regnum == -1)
1213	    regcache_raw_supply (regcache, i, regs + offset);
1214	  offset += 8;
1215	}
1216    }
1217
1218  if ((regnum >= SPARC_L0_REGNUM && regnum <= SPARC_I7_REGNUM) || regnum == -1)
1219    {
1220      /* Not all of the register set variants include Locals and
1221         Inputs.  For those that don't, we read them off the stack.  */
1222      if (gregset->r_l0_offset == -1)
1223	{
1224	  ULONGEST sp;
1225
1226	  regcache_cooked_read_unsigned (regcache, SPARC_SP_REGNUM, &sp);
1227	  sparc_supply_rwindow (regcache, sp, regnum);
1228	}
1229      else
1230	{
1231	  int offset = gregset->r_l0_offset;
1232
1233	  if (sparc32)
1234	    offset += 4;
1235
1236	  for (i = SPARC_L0_REGNUM; i <= SPARC_I7_REGNUM; i++)
1237	    {
1238	      if (regnum == i || regnum == -1)
1239		regcache_raw_supply (regcache, i, regs + offset);
1240	      offset += 8;
1241	    }
1242	}
1243    }
1244}
1245
1246void
1247sparc64_collect_gregset (const struct sparc_gregset *gregset,
1248			 const struct regcache *regcache,
1249			 int regnum, void *gregs)
1250{
1251  int sparc32 = (gdbarch_ptr_bit (current_gdbarch) == 32);
1252  char *regs = gregs;
1253  int i;
1254
1255  if (sparc32)
1256    {
1257      if (regnum == SPARC32_PSR_REGNUM || regnum == -1)
1258	{
1259	  int offset = gregset->r_tstate_offset;
1260	  ULONGEST tstate, psr;
1261	  char buf[8];
1262
1263	  tstate = extract_unsigned_integer (regs + offset, 8);
1264	  regcache_raw_collect (regcache, SPARC32_PSR_REGNUM, buf);
1265	  psr = extract_unsigned_integer (buf, 4);
1266	  tstate |= (psr & PSR_ICC) << 12;
1267	  if ((psr & (PSR_VERS | PSR_IMPL)) == PSR_V8PLUS)
1268	    tstate |= (psr & PSR_XCC) << 20;
1269	  store_unsigned_integer (buf, 8, tstate);
1270	  memcpy (regs + offset, buf, 8);
1271	}
1272
1273      if (regnum == SPARC32_PC_REGNUM || regnum == -1)
1274	regcache_raw_collect (regcache, SPARC32_PC_REGNUM,
1275			      regs + gregset->r_pc_offset + 4);
1276
1277      if (regnum == SPARC32_NPC_REGNUM || regnum == -1)
1278	regcache_raw_collect (regcache, SPARC32_NPC_REGNUM,
1279			      regs + gregset->r_npc_offset + 4);
1280
1281      if (regnum == SPARC32_Y_REGNUM || regnum == -1)
1282	{
1283	  int offset = gregset->r_y_offset + 8 - gregset->r_y_size;
1284	  regcache_raw_collect (regcache, SPARC32_Y_REGNUM, regs + offset);
1285	}
1286    }
1287  else
1288    {
1289      if (regnum == SPARC64_STATE_REGNUM || regnum == -1)
1290	regcache_raw_collect (regcache, SPARC64_STATE_REGNUM,
1291			      regs + gregset->r_tstate_offset);
1292
1293      if (regnum == SPARC64_PC_REGNUM || regnum == -1)
1294	regcache_raw_collect (regcache, SPARC64_PC_REGNUM,
1295			      regs + gregset->r_pc_offset);
1296
1297      if (regnum == SPARC64_NPC_REGNUM || regnum == -1)
1298	regcache_raw_collect (regcache, SPARC64_NPC_REGNUM,
1299			      regs + gregset->r_npc_offset);
1300
1301      if (regnum == SPARC64_Y_REGNUM || regnum == -1)
1302	{
1303	  char buf[8];
1304
1305	  regcache_raw_collect (regcache, SPARC64_Y_REGNUM, buf);
1306	  memcpy (regs + gregset->r_y_offset,
1307		  buf + 8 - gregset->r_y_size, gregset->r_y_size);
1308	}
1309
1310      if ((regnum == SPARC64_FPRS_REGNUM || regnum == -1)
1311	  && gregset->r_fprs_offset != -1)
1312	regcache_raw_collect (regcache, SPARC64_FPRS_REGNUM,
1313			      regs + gregset->r_fprs_offset);
1314
1315    }
1316
1317  if ((regnum >= SPARC_G1_REGNUM && regnum <= SPARC_O7_REGNUM) || regnum == -1)
1318    {
1319      int offset = gregset->r_g1_offset;
1320
1321      if (sparc32)
1322	offset += 4;
1323
1324      /* %g0 is always zero.  */
1325      for (i = SPARC_G1_REGNUM; i <= SPARC_O7_REGNUM; i++)
1326	{
1327	  if (regnum == i || regnum == -1)
1328	    regcache_raw_collect (regcache, i, regs + offset);
1329	  offset += 8;
1330	}
1331    }
1332
1333  if ((regnum >= SPARC_L0_REGNUM && regnum <= SPARC_I7_REGNUM) || regnum == -1)
1334    {
1335      /* Not all of the register set variants include Locals and
1336         Inputs.  For those that don't, we read them off the stack.  */
1337      if (gregset->r_l0_offset != -1)
1338	{
1339	  int offset = gregset->r_l0_offset;
1340
1341	  if (sparc32)
1342	    offset += 4;
1343
1344	  for (i = SPARC_L0_REGNUM; i <= SPARC_I7_REGNUM; i++)
1345	    {
1346	      if (regnum == i || regnum == -1)
1347		regcache_raw_collect (regcache, i, regs + offset);
1348	      offset += 8;
1349	    }
1350	}
1351    }
1352}
1353
1354void
1355sparc64_supply_fpregset (struct regcache *regcache,
1356			 int regnum, const void *fpregs)
1357{
1358  int sparc32 = (gdbarch_ptr_bit (current_gdbarch) == 32);
1359  const char *regs = fpregs;
1360  int i;
1361
1362  for (i = 0; i < 32; i++)
1363    {
1364      if (regnum == (SPARC_F0_REGNUM + i) || regnum == -1)
1365	regcache_raw_supply (regcache, SPARC_F0_REGNUM + i, regs + (i * 4));
1366    }
1367
1368  if (sparc32)
1369    {
1370      if (regnum == SPARC32_FSR_REGNUM || regnum == -1)
1371	regcache_raw_supply (regcache, SPARC32_FSR_REGNUM,
1372			     regs + (32 * 4) + (16 * 8) + 4);
1373    }
1374  else
1375    {
1376      for (i = 0; i < 16; i++)
1377	{
1378	  if (regnum == (SPARC64_F32_REGNUM + i) || regnum == -1)
1379	    regcache_raw_supply (regcache, SPARC64_F32_REGNUM + i,
1380				 regs + (32 * 4) + (i * 8));
1381	}
1382
1383      if (regnum == SPARC64_FSR_REGNUM || regnum == -1)
1384	regcache_raw_supply (regcache, SPARC64_FSR_REGNUM,
1385			     regs + (32 * 4) + (16 * 8));
1386    }
1387}
1388
1389void
1390sparc64_collect_fpregset (const struct regcache *regcache,
1391			  int regnum, void *fpregs)
1392{
1393  int sparc32 = (gdbarch_ptr_bit (current_gdbarch) == 32);
1394  char *regs = fpregs;
1395  int i;
1396
1397  for (i = 0; i < 32; i++)
1398    {
1399      if (regnum == (SPARC_F0_REGNUM + i) || regnum == -1)
1400	regcache_raw_collect (regcache, SPARC_F0_REGNUM + i, regs + (i * 4));
1401    }
1402
1403  if (sparc32)
1404    {
1405      if (regnum == SPARC32_FSR_REGNUM || regnum == -1)
1406	regcache_raw_collect (regcache, SPARC32_FSR_REGNUM,
1407			      regs + (32 * 4) + (16 * 8) + 4);
1408    }
1409  else
1410    {
1411      for (i = 0; i < 16; i++)
1412	{
1413	  if (regnum == (SPARC64_F32_REGNUM + i) || regnum == -1)
1414	    regcache_raw_collect (regcache, SPARC64_F32_REGNUM + i,
1415				  regs + (32 * 4) + (i * 8));
1416	}
1417
1418      if (regnum == SPARC64_FSR_REGNUM || regnum == -1)
1419	regcache_raw_collect (regcache, SPARC64_FSR_REGNUM,
1420			      regs + (32 * 4) + (16 * 8));
1421    }
1422}
1423