hppa-tdep.c revision 1.3
1/* Target-dependent code for PA-RISC.
2
3   Copyright 2003, 2004 Free Software Foundation, Inc.
4
5   This file is part of GDB.
6
7   This program is free software; you can redistribute it and/or modify
8   it under the terms of the GNU General Public License as published by
9   the Free Software Foundation; either version 2 of the License, or
10   (at your option) any later version.
11
12   This program is distributed in the hope that it will be useful,
13   but WITHOUT ANY WARRANTY; without even the implied warranty of
14   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15   GNU General Public License for more details.
16
17   You should have received a copy of the GNU General Public License
18   along with this program; if not, write to the Free Software
19   Foundation, Inc., 59 Temple Place - Suite 330,
20   Boston, MA 02111-1307, USA.  */
21
22#include "defs.h"
23#include "arch-utils.h"
24#include "dis-asm.h"
25#include "floatformat.h"
26#include "frame.h"
27#include "frame-base.h"
28#include "frame-unwind.h"
29#include "gdbtypes.h"
30#include "symtab.h"
31#include "objfiles.h"
32#include "osabi.h"
33#include "regcache.h"
34#include "target.h"
35#include "trad-frame.h"
36
37#include "gdb_assert.h"
38
39#include "hppa-tdep.h"
40
41/* This file implements a PA-RISC 32-bit ABI.  */
42
43/* Please use the hppa32_-prefix for 32-bit specific code, the
44   hppa64_-prefix for 64-bit specific code and the sparc_-prefix for
45   sparc64-tdep.c.  The 64-bit specific code lives in hppa64-tdep.c;
46   don't add any here.  */
47
48/* The PA-RISCC Floating-Point Quad-Precision format is similar to
49   big-endian IA-64 Quad-recision format.  */
50#define floatformat_hppa_quad floatformat_ia64_quad_big
51
52/* Macros to extract fields from PA-RISC instructions.  */
53#define X_OP(i) (((i) >> 26) & 0x3f)
54#define X_B(i) (((i) >> 21) & 0x1f)
55#define X_R(i) (((i) >> 16) & 0x1f)
56#define X_T(i) (((i) >> 16) & 0x1f)
57#define X_IM14(i) ((i) & 0x3fff)
58/* Sign extension macros.  */
59#define X_DISP14(i) (low_sign_extend (X_IM14 (i), 14))
60
61/* Fetch the instruction at PC.  Instructions may be fetched
62   big-endian or little-endian dependent on the (optional) E-bit in
63   the PSW.  Traditionally, the PA-RISC architecture is big-endian
64   though.  */
65
66unsigned long
67hppa_fetch_instruction (CORE_ADDR pc)
68{
69  unsigned char buf[4];
70
71  /* If we can't read the instruction at PC, return zero.  */
72  if (target_read_memory (pc, buf, sizeof (buf)))
73    return 0;
74
75  return extract_unsigned_integer (buf, 4);
76}
77
78static CORE_ADDR
79hppa_addr_bits_remove (CORE_ADDR addr)
80{
81  return addr & ~0x3;
82}
83
84static LONGEST
85low_sign_extend (ULONGEST val, ULONGEST bits)
86{
87  return (LONGEST) ((val & 0x1 ? (-1 << (bits - 1)) : 0) | val >> 1);
88}
89
90static const char *hppa32_register_names[] =
91{
92  "r0", "r1", "rp", "r3", "r4", "r5", "r6", "r7",
93  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
94  "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
95  "r24", "r25", "r26", "r27", "r28", "r29", "sp", "r31",
96  "sar", "pcoqh", "pcoqt"
97};
98
99/* Total number of registers.  */
100#define HPPA32_NUM_REGS ARRAY_SIZE (hppa32_register_names)
101
102/* Return the name of register REGNUM.  */
103
104static const char *
105hppa32_register_name (int regnum)
106{
107  if (regnum >= 0 && regnum < HPPA32_NUM_REGS)
108    return hppa32_register_names[regnum];
109
110  return NULL;
111}
112
113/* Return the GDB type object for the "standard" data type of data in
114   register REGNUM. */
115
116static struct type *
117hppa32_register_type (struct gdbarch *gdbarch, int regnum)
118{
119  if (regnum == HPPA_SP_REGNUM)
120    return builtin_type_void_data_ptr;
121
122  if (regnum == HPPA_RP_REGNUM
123      || regnum == HPPA_PCOQ_HEAD_REGNUM
124      || regnum == HPPA_PCOQ_TAIL_REGNUM)
125    return builtin_type_void_func_ptr;
126
127  return builtin_type_int32;
128}
129
130
131/* Use the program counter to determine the contents and size of a
132   breakpoint instruction.  Return a pointer to a string of bytes that
133   encode a breakpoint instruction, store the length of the string in
134   *LEN and optionally adjust *PC to point to the correct memory
135   location for inserting the breakpoint.  */
136
137static const unsigned char *
138hppa_breakpoint_from_pc (CORE_ADDR *pc, int *len)
139{
140  static unsigned char break_insn[] = { 0x00, 0x01, 0x00, 0x04 };
141
142  *len = sizeof (break_insn);
143  return break_insn;
144}
145
146
147CORE_ADDR
148hppa32_analyze_prologue (CORE_ADDR start_pc, CORE_ADDR current_pc,
149			 struct hppa_frame_cache *cache)
150{
151  unsigned long insn;
152  CORE_ADDR pc;
153
154  /* When compiling without optimization, GCC uses %r3 as a frame
155     pointer and emits the following prologue to set up the stack
156     frame:
157
158        stw %rp,-20(%sp)
159        copy %r3,%r1
160	copy %r30,%r3
161	stwm %r1,d(%sp)
162
163     This instruction sequence is followed by instructions that save
164     the callee-saved registers.  BSD system call stubs use a somewhat
165     different calling convention where the return pointer (%rp) is
166     saved in the "External/Stub RP" slot instead of the "Current RP"
167     slot.  In that case the first instruction is "stw %rp,-24(%sp)".  */
168
169  /* We'll increase START_PC as we encounter instructions that we
170     recognize as part of the prologue.  */
171
172  /* If CURRENT_PC isn't set, provide a reasonable default that's
173     guaranteed to cover the entire prologue.  */
174  if (current_pc == (CORE_ADDR) -1)
175    current_pc = start_pc + 64;
176
177  /* Short-circuit if CURRENT_PC point at the start of this function.  */
178  else if (current_pc <= start_pc)
179    return start_pc;
180
181  /* Provide a dummy cache if necessary.  */
182  if (cache == NULL)
183    {
184      size_t sizeof_saved_regs =
185	HPPA32_NUM_REGS * sizeof (struct trad_frame_saved_reg);
186
187      cache = alloca (sizeof (struct hppa_frame_cache));
188      cache->saved_regs = alloca (sizeof_saved_regs);
189
190      /* We only initialize the members we care about.  */
191      cache->frame_size = 0;
192      cache->saved_regs[HPPA_R3_REGNUM].realreg = -1;
193    }
194
195  for (pc = start_pc; pc < current_pc; pc += 4)
196    {
197      /* Fetch the next instruction.  */
198      insn = hppa_fetch_instruction (pc);
199
200      /* stw %rp,-20(%sp) or stw %rp,-24(%sp) */
201      if (insn == 0x6bc23fd9 || insn == 0x6bc23fd1)
202	{
203	  /* This instruction saves the return pointer (%rp) into the
204	     "Current RP" slot (or the "External/Stub RP" slot for BSD
205	     system call stubs) in the in the frame marker.  */
206	  cache->saved_regs[HPPA_RP_REGNUM].addr = X_DISP14 (insn);
207	  start_pc = pc + 4;
208	}
209
210      /* copy %r3,%r1 */
211      else if (insn == 0x08030241)
212	{
213	  /* We've found the instruction that saves the frame pointer
214	     (%r3) into %r1.  */
215	  cache->saved_regs[HPPA_R3_REGNUM].realreg = HPPA_R1_REGNUM;
216	  start_pc = pc + 4;
217	}
218
219      /* copy %sp,%r3 */
220      else if (insn == 0x081e0243)
221	{
222	  /* We've found the instruction that sets up the new frame
223             pointer.  */
224	  cache->saved_regs[HPPA_SP_REGNUM].realreg = HPPA_R3_REGNUM;
225	  start_pc = pc + 4;
226	}
227
228      else if (X_OP (insn) == 0x1b && X_B (insn) == HPPA_SP_REGNUM
229	       && X_R (insn) == HPPA_R1_REGNUM && X_DISP14 (insn) > 0)
230	{
231	  /* We've found the instruction that saves the old frame
232	     pointer (living in %r1) onto the stack.  */
233	  cache->saved_regs[HPPA_R3_REGNUM].addr = 0;
234	  start_pc = pc + 4;
235
236	  /* Only set the frame size of we don't have a frame pointer.  */
237	  if (cache->saved_regs[HPPA_SP_REGNUM].realreg != HPPA_R3_REGNUM)
238	    cache->frame_size = X_DISP14 (insn);
239
240	  /* The frame is fully set up now.  */
241	  return pc + 4;
242	}
243
244      /* stwm r,d(%sp) */
245      else if (X_OP (insn) == 0x1b && X_B (insn) == HPPA_SP_REGNUM
246	       && X_R (insn) >= HPPA_R3_REGNUM
247	       && X_R (insn) <= HPPA_R18_REGNUM
248	       && X_DISP14 (insn) > 0)
249	{
250	  /* stwm %r1,d(%sp) */
251	  if (X_R (insn) == HPPA_R1_REGNUM
252	      && cache->saved_regs[HPPA_R3_REGNUM].realreg == HPPA_R1_REGNUM)
253	    cache->saved_regs[HPPA_R3_REGNUM].addr = 0;
254	  else
255	    cache->saved_regs[X_R (insn)].addr = 0;
256
257	  /* Only set the frame size of we don't have a frame pointer.  */
258	  if (cache->saved_regs[HPPA_SP_REGNUM].realreg != HPPA_R3_REGNUM)
259	    cache->frame_size = X_DISP14 (insn);
260
261	  /* The frame is fully set up now.  */
262	  return pc + 4;
263	}
264
265      /* ldo d(%sp),%sp */
266      else if (X_OP (insn) == 0x0d && X_B (insn) == HPPA_SP_REGNUM
267	       && X_T (insn) == HPPA_SP_REGNUM && X_DISP14 (insn) > 0)
268	{
269	  cache->frame_size = X_DISP14 (insn);
270
271	  /* Only set the frame size of we don't have a frame pointer.  */
272	  if (cache->saved_regs[HPPA_SP_REGNUM].realreg != HPPA_R3_REGNUM)
273	    cache->frame_size = X_DISP14 (insn);
274
275	  /* The frame is fully set up now.  */
276	  return pc + 4;
277	}
278    }
279
280  return start_pc;
281}
282
283static CORE_ADDR
284hppa32_skip_prologue (CORE_ADDR start_pc)
285{
286  struct symtab_and_line sal;
287  CORE_ADDR func_start, func_end;
288
289  /* This is the preferred method, find the end of the prologue by
290     using the debugging information.  */
291  if (find_pc_partial_function (start_pc, NULL, &func_start, &func_end))
292    {
293      sal = find_pc_line (func_start, 0);
294
295      if (sal.end < func_end
296	  && start_pc <= sal.end)
297	return sal.end;
298    }
299
300  /* Analyze the prologue.  */
301  return hppa32_analyze_prologue (start_pc, (CORE_ADDR) -1, NULL);
302}
303
304static struct hppa_frame_cache *
305hppa32_frame_cache (struct frame_info *next_frame, void **this_cache)
306{
307  struct hppa_frame_cache *cache;
308  int regnum;
309
310  if (*this_cache)
311    return *this_cache;
312
313  /* Allocate a new cache.  */
314  cache = FRAME_OBSTACK_ZALLOC (struct hppa_frame_cache);
315  cache->saved_regs = trad_frame_alloc_saved_regs (next_frame);
316  cache->frame_size = 0;
317
318  cache->pc = frame_func_unwind (next_frame);
319  if (cache->pc != 0)
320    {
321      CORE_ADDR addr_in_block = frame_unwind_address_in_block (next_frame);
322      hppa32_analyze_prologue (cache->pc, addr_in_block, cache);
323    }
324
325  /* Calculate this frame's base.  */
326  gdb_assert (trad_frame_realreg_p (cache->saved_regs, HPPA_SP_REGNUM));
327  regnum = cache->saved_regs[HPPA_SP_REGNUM].realreg;
328  cache->base = frame_unwind_register_unsigned (next_frame, regnum);
329  if (cache->frame_size > 0)
330    {
331      cache->base -= cache->frame_size;
332      trad_frame_set_value (cache->saved_regs, HPPA_SP_REGNUM, cache->base);
333    }
334
335  for (regnum = HPPA_R1_REGNUM;  regnum < HPPA32_NUM_REGS; regnum++)
336    {
337      if (trad_frame_addr_p (cache->saved_regs, regnum))
338	cache->saved_regs[regnum].addr += cache->base;
339    }
340
341  /* Identify the head of the program counter offset queue (%pcoqh)
342     with the return pointer (%rp).  */
343  cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] = cache->saved_regs[HPPA_RP_REGNUM];
344
345  *this_cache = cache;
346  return cache;
347}
348
349static void
350hppa32_frame_this_id (struct frame_info *next_frame, void **this_cache,
351		      struct frame_id *this_id)
352{
353  struct hppa_frame_cache *cache =
354    hppa32_frame_cache (next_frame, this_cache);
355
356  /* This marks the outermost frame.  */
357  if (cache->base == 0)
358    return;
359
360  (*this_id) = frame_id_build (cache->base, cache->pc);
361}
362
363static void
364hppa32_frame_prev_register (struct frame_info *next_frame, void **this_cache,
365			    int regnum, int *optimizedp,
366			    enum lval_type *lvalp, CORE_ADDR *addrp,
367			    int *realnump, void *valuep)
368{
369  struct hppa_frame_cache *cache =
370    hppa32_frame_cache (next_frame, this_cache);
371
372  if (regnum == HPPA_PCOQ_TAIL_REGNUM)
373    {
374      if (valuep)
375	{
376	  CORE_ADDR pc;
377
378	  /* Fetch the head of the program counter offset queue
379             (%pcoqh).  */
380	  trad_frame_prev_register (next_frame, cache->saved_regs,
381				    HPPA_PCOQ_HEAD_REGNUM, optimizedp,
382				    lvalp, addrp, realnump, valuep);
383
384	  /* Now compute its tail (%pcoqt) by adding four bytes such
385             that it points at the next instruction.  */
386	  pc = extract_unsigned_integer (valuep, 4);
387	  store_unsigned_integer (valuep, 4, pc + 4);
388	}
389
390      /* It's a computed value.  */
391      *optimizedp = 0;
392      *lvalp = not_lval;
393      *addrp = 0;
394      *realnump = -1;
395      return;
396    }
397
398  trad_frame_prev_register (next_frame, cache->saved_regs, regnum,
399			    optimizedp, lvalp, addrp, realnump, valuep);
400}
401
402static const struct frame_unwind hppa32_frame_unwind =
403{
404  NORMAL_FRAME,
405  hppa32_frame_this_id,
406  hppa32_frame_prev_register
407};
408
409static const struct frame_unwind *
410hppa32_frame_sniffer (struct frame_info *next_frame)
411{
412  return &hppa32_frame_unwind;
413}
414
415
416static CORE_ADDR
417hppa32_frame_base_address (struct frame_info *next_frame, void **this_cache)
418{
419  struct hppa_frame_cache *cache =
420    hppa32_frame_cache (next_frame, this_cache);
421
422  return cache->base;
423}
424
425static const struct frame_base hppa32_frame_base =
426{
427  &hppa32_frame_unwind,
428  hppa32_frame_base_address,
429  hppa32_frame_base_address,
430  hppa32_frame_base_address
431};
432
433
434static void
435hppa_write_pc (CORE_ADDR pc, ptid_t ptid)
436{
437  write_register_pid (HPPA_PCOQ_HEAD_REGNUM, pc, ptid);
438  write_register_pid (HPPA_PCOQ_TAIL_REGNUM, pc + 4, ptid);
439}
440
441
442static CORE_ADDR
443hppa_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
444{
445  CORE_ADDR pc;
446
447  pc = frame_unwind_register_unsigned (next_frame, HPPA_PCOQ_HEAD_REGNUM);
448  return hppa_addr_bits_remove (pc);
449}
450
451
452static struct gdbarch *
453hppa32_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
454{
455  struct gdbarch_tdep *tdep;
456  struct gdbarch *gdbarch;
457
458  /* If there is already a candidate, use it.  */
459  arches = gdbarch_list_lookup_by_info (arches, &info);
460  if (arches != NULL)
461    return arches->gdbarch;
462
463  /* Allocate space for the new architecture.  */
464  tdep = XMALLOC (struct gdbarch_tdep);
465  gdbarch = gdbarch_alloc (&info, tdep);
466
467  set_gdbarch_long_double_bit (gdbarch, 128);
468  set_gdbarch_long_double_format (gdbarch, &floatformat_hppa_quad);
469
470  set_gdbarch_num_regs (gdbarch, HPPA32_NUM_REGS);
471  set_gdbarch_register_name (gdbarch, hppa32_register_name);
472  set_gdbarch_register_type (gdbarch, hppa32_register_type);
473
474  /* Register numbers of various important registers.  */
475  set_gdbarch_sp_regnum (gdbarch, HPPA_SP_REGNUM); /* %sp */
476  set_gdbarch_pc_regnum (gdbarch, HPPA_PCOQ_HEAD_REGNUM); /* %pc */
477
478  set_gdbarch_addr_bits_remove (gdbarch, hppa_addr_bits_remove);
479
480  set_gdbarch_skip_prologue (gdbarch, hppa32_skip_prologue);
481
482  /* Stack grows upward.  */
483  set_gdbarch_inner_than (gdbarch, core_addr_greaterthan);
484
485  set_gdbarch_breakpoint_from_pc (gdbarch, hppa_breakpoint_from_pc);
486
487  set_gdbarch_print_insn (gdbarch, print_insn_hppa);
488
489  set_gdbarch_unwind_pc (gdbarch, hppa_unwind_pc);
490  set_gdbarch_write_pc (gdbarch, hppa_write_pc);
491
492  frame_base_set_default (gdbarch, &hppa32_frame_base);
493
494  /* Hook in ABI-specific overrides, if they have been registered.  */
495  gdbarch_init_osabi (info, gdbarch);
496
497  frame_unwind_append_sniffer (gdbarch, hppa32_frame_sniffer);
498
499  return gdbarch;
500}
501
502
503/* Provide a prototype to silence -Wmissing-prototypes.  */
504void _initialize_hppa_tdep (void);
505
506void
507_initialize_hppa_tdep (void)
508{
509  register_gdbarch_init (bfd_arch_hppa, hppa32_gdbarch_init);
510}
511