1/* tc-sh.c -- Assemble code for the Renesas / SuperH SH 2 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 3 2003, 2004, 2005 Free Software Foundation, Inc. 4 5 This file is part of GAS, the GNU Assembler. 6 7 GAS is free software; you can redistribute it and/or modify 8 it under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 2, or (at your option) 10 any later version. 11 12 GAS is distributed in the hope that it will be useful, 13 but WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 GNU General Public License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with GAS; see the file COPYING. If not, write to 19 the Free Software Foundation, 51 Franklin Street - Fifth Floor, 20 Boston, MA 02110-1301, USA. */ 21 22/* Written By Steve Chamberlain <sac@cygnus.com> */ 23 24#include <stdio.h> 25#include "as.h" 26#include "bfd.h" 27#include "subsegs.h" 28#define DEFINE_TABLE 29#include "opcodes/sh-opc.h" 30#include "safe-ctype.h" 31#include "struc-symbol.h" 32 33#ifdef OBJ_ELF 34#include "elf/sh.h" 35#endif 36 37#include "dwarf2dbg.h" 38#include "dw2gencfi.h" 39 40typedef struct 41 { 42 sh_arg_type type; 43 int reg; 44 expressionS immediate; 45 } 46sh_operand_info; 47 48const char comment_chars[] = "!"; 49const char line_separator_chars[] = ";"; 50const char line_comment_chars[] = "!#"; 51 52static void s_uses (int); 53static void s_uacons (int); 54 55#ifdef OBJ_ELF 56static void sh_elf_cons (int); 57 58symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */ 59#endif 60 61static void 62big (int ignore ATTRIBUTE_UNUSED) 63{ 64 if (! target_big_endian) 65 as_bad (_("directive .big encountered when option -big required")); 66 67 /* Stop further messages. */ 68 target_big_endian = 1; 69} 70 71static void 72little (int ignore ATTRIBUTE_UNUSED) 73{ 74 if (target_big_endian) 75 as_bad (_("directive .little encountered when option -little required")); 76 77 /* Stop further messages. */ 78 target_big_endian = 0; 79} 80 81/* This table describes all the machine specific pseudo-ops the assembler 82 has to support. The fields are: 83 pseudo-op name without dot 84 function to call to execute this pseudo-op 85 Integer arg to pass to the function. */ 86 87const pseudo_typeS md_pseudo_table[] = 88{ 89#ifdef OBJ_ELF 90 {"long", sh_elf_cons, 4}, 91 {"int", sh_elf_cons, 4}, 92 {"word", sh_elf_cons, 2}, 93 {"short", sh_elf_cons, 2}, 94#else 95 {"int", cons, 4}, 96 {"word", cons, 2}, 97#endif /* OBJ_ELF */ 98 {"big", big, 0}, 99 {"form", listing_psize, 0}, 100 {"little", little, 0}, 101 {"heading", listing_title, 0}, 102 {"import", s_ignore, 0}, 103 {"page", listing_eject, 0}, 104 {"program", s_ignore, 0}, 105 {"uses", s_uses, 0}, 106 {"uaword", s_uacons, 2}, 107 {"ualong", s_uacons, 4}, 108 {"uaquad", s_uacons, 8}, 109 {"2byte", s_uacons, 2}, 110 {"4byte", s_uacons, 4}, 111 {"8byte", s_uacons, 8}, 112#ifdef HAVE_SH64 113 {"mode", s_sh64_mode, 0 }, 114 115 /* Have the old name too. */ 116 {"isa", s_sh64_mode, 0 }, 117 118 /* Assert that the right ABI is used. */ 119 {"abi", s_sh64_abi, 0 }, 120 121 { "vtable_inherit", sh64_vtable_inherit, 0 }, 122 { "vtable_entry", sh64_vtable_entry, 0 }, 123#endif /* HAVE_SH64 */ 124 {0, 0, 0} 125}; 126 127int sh_relax; /* set if -relax seen */ 128 129/* Whether -small was seen. */ 130 131int sh_small; 132 133/* Flag to generate relocations against symbol values for local symbols. */ 134 135static int dont_adjust_reloc_32; 136 137/* Flag to indicate that '$' is allowed as a register prefix. */ 138 139static int allow_dollar_register_prefix; 140 141/* Preset architecture set, if given; zero otherwise. */ 142 143static unsigned int preset_target_arch; 144 145/* The bit mask of architectures that could 146 accommodate the insns seen so far. */ 147static unsigned int valid_arch; 148 149const char EXP_CHARS[] = "eE"; 150 151/* Chars that mean this number is a floating point constant. */ 152/* As in 0f12.456 */ 153/* or 0d1.2345e12 */ 154const char FLT_CHARS[] = "rRsSfFdDxXpP"; 155 156#define C(a,b) ENCODE_RELAX(a,b) 157 158#define ENCODE_RELAX(what,length) (((what) << 4) + (length)) 159#define GET_WHAT(x) ((x>>4)) 160 161/* These are the three types of relaxable instruction. */ 162/* These are the types of relaxable instructions; except for END which is 163 a marker. */ 164#define COND_JUMP 1 165#define COND_JUMP_DELAY 2 166#define UNCOND_JUMP 3 167 168#ifdef HAVE_SH64 169 170/* A 16-bit (times four) pc-relative operand, at most expanded to 32 bits. */ 171#define SH64PCREL16_32 4 172/* A 16-bit (times four) pc-relative operand, at most expanded to 64 bits. */ 173#define SH64PCREL16_64 5 174 175/* Variants of the above for adjusting the insn to PTA or PTB according to 176 the label. */ 177#define SH64PCREL16PT_32 6 178#define SH64PCREL16PT_64 7 179 180/* A MOVI expansion, expanding to at most 32 or 64 bits. */ 181#define MOVI_IMM_32 8 182#define MOVI_IMM_32_PCREL 9 183#define MOVI_IMM_64 10 184#define MOVI_IMM_64_PCREL 11 185#define END 12 186 187#else /* HAVE_SH64 */ 188 189#define END 4 190 191#endif /* HAVE_SH64 */ 192 193#define UNDEF_DISP 0 194#define COND8 1 195#define COND12 2 196#define COND32 3 197#define UNDEF_WORD_DISP 4 198 199#define UNCOND12 1 200#define UNCOND32 2 201 202#ifdef HAVE_SH64 203#define UNDEF_SH64PCREL 0 204#define SH64PCREL16 1 205#define SH64PCREL32 2 206#define SH64PCREL48 3 207#define SH64PCREL64 4 208#define SH64PCRELPLT 5 209 210#define UNDEF_MOVI 0 211#define MOVI_16 1 212#define MOVI_32 2 213#define MOVI_48 3 214#define MOVI_64 4 215#define MOVI_PLT 5 216#define MOVI_GOTOFF 6 217#define MOVI_GOTPC 7 218#endif /* HAVE_SH64 */ 219 220/* Branch displacements are from the address of the branch plus 221 four, thus all minimum and maximum values have 4 added to them. */ 222#define COND8_F 258 223#define COND8_M -252 224#define COND8_LENGTH 2 225 226/* There is one extra instruction before the branch, so we must add 227 two more bytes to account for it. */ 228#define COND12_F 4100 229#define COND12_M -4090 230#define COND12_LENGTH 6 231 232#define COND12_DELAY_LENGTH 4 233 234/* ??? The minimum and maximum values are wrong, but this does not matter 235 since this relocation type is not supported yet. */ 236#define COND32_F (1<<30) 237#define COND32_M -(1<<30) 238#define COND32_LENGTH 14 239 240#define UNCOND12_F 4098 241#define UNCOND12_M -4092 242#define UNCOND12_LENGTH 2 243 244/* ??? The minimum and maximum values are wrong, but this does not matter 245 since this relocation type is not supported yet. */ 246#define UNCOND32_F (1<<30) 247#define UNCOND32_M -(1<<30) 248#define UNCOND32_LENGTH 14 249 250#ifdef HAVE_SH64 251/* The trivial expansion of a SH64PCREL16 relaxation is just a "PT label, 252 TRd" as is the current insn, so no extra length. Note that the "reach" 253 is calculated from the address *after* that insn, but the offset in the 254 insn is calculated from the beginning of the insn. We also need to 255 take into account the implicit 1 coded as the "A" in PTA when counting 256 forward. If PTB reaches an odd address, we trap that as an error 257 elsewhere, so we don't have to have different relaxation entries. We 258 don't add a one to the negative range, since PTB would then have the 259 farthest backward-reaching value skipped, not generated at relaxation. */ 260#define SH64PCREL16_F (32767 * 4 - 4 + 1) 261#define SH64PCREL16_M (-32768 * 4 - 4) 262#define SH64PCREL16_LENGTH 0 263 264/* The next step is to change that PT insn into 265 MOVI ((label - datalabel Ln) >> 16) & 65535, R25 266 SHORI (label - datalabel Ln) & 65535, R25 267 Ln: 268 PTREL R25,TRd 269 which means two extra insns, 8 extra bytes. This is the limit for the 270 32-bit ABI. 271 272 The expressions look a bit bad since we have to adjust this to avoid overflow on a 273 32-bit host. */ 274#define SH64PCREL32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4) 275#define SH64PCREL32_LENGTH (2 * 4) 276 277/* Similarly, we just change the MOVI and add a SHORI for the 48-bit 278 expansion. */ 279#if BFD_HOST_64BIT_LONG 280/* The "reach" type is long, so we can only do this for a 64-bit-long 281 host. */ 282#define SH64PCREL32_M (((long) -1 << 30) * 2 - 4) 283#define SH64PCREL48_F ((((long) 1 << 47) - 1) - 4) 284#define SH64PCREL48_M (((long) -1 << 47) - 4) 285#define SH64PCREL48_LENGTH (3 * 4) 286#else 287/* If the host does not have 64-bit longs, just make this state identical 288 in reach to the 32-bit state. Note that we have a slightly incorrect 289 reach, but the correct one above will overflow a 32-bit number. */ 290#define SH64PCREL32_M (((long) -1 << 30) * 2) 291#define SH64PCREL48_F SH64PCREL32_F 292#define SH64PCREL48_M SH64PCREL32_M 293#define SH64PCREL48_LENGTH (3 * 4) 294#endif /* BFD_HOST_64BIT_LONG */ 295 296/* And similarly for the 64-bit expansion; a MOVI + SHORI + SHORI + SHORI 297 + PTREL sequence. */ 298#define SH64PCREL64_LENGTH (4 * 4) 299 300/* For MOVI, we make the MOVI + SHORI... expansion you can see in the 301 SH64PCREL expansions. The PCREL one is similar, but the other has no 302 pc-relative reach; it must be fully expanded in 303 shmedia_md_estimate_size_before_relax. */ 304#define MOVI_16_LENGTH 0 305#define MOVI_16_F (32767 - 4) 306#define MOVI_16_M (-32768 - 4) 307#define MOVI_32_LENGTH 4 308#define MOVI_32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4) 309#define MOVI_48_LENGTH 8 310 311#if BFD_HOST_64BIT_LONG 312/* The "reach" type is long, so we can only do this for a 64-bit-long 313 host. */ 314#define MOVI_32_M (((long) -1 << 30) * 2 - 4) 315#define MOVI_48_F ((((long) 1 << 47) - 1) - 4) 316#define MOVI_48_M (((long) -1 << 47) - 4) 317#else 318/* If the host does not have 64-bit longs, just make this state identical 319 in reach to the 32-bit state. Note that we have a slightly incorrect 320 reach, but the correct one above will overflow a 32-bit number. */ 321#define MOVI_32_M (((long) -1 << 30) * 2) 322#define MOVI_48_F MOVI_32_F 323#define MOVI_48_M MOVI_32_M 324#endif /* BFD_HOST_64BIT_LONG */ 325 326#define MOVI_64_LENGTH 12 327#endif /* HAVE_SH64 */ 328 329#define EMPTY { 0, 0, 0, 0 } 330 331const relax_typeS md_relax_table[C (END, 0)] = { 332 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 333 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 334 335 EMPTY, 336 /* C (COND_JUMP, COND8) */ 337 { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP, COND12) }, 338 /* C (COND_JUMP, COND12) */ 339 { COND12_F, COND12_M, COND12_LENGTH, C (COND_JUMP, COND32), }, 340 /* C (COND_JUMP, COND32) */ 341 { COND32_F, COND32_M, COND32_LENGTH, 0, }, 342 /* C (COND_JUMP, UNDEF_WORD_DISP) */ 343 { 0, 0, COND32_LENGTH, 0, }, 344 EMPTY, EMPTY, EMPTY, 345 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 346 347 EMPTY, 348 /* C (COND_JUMP_DELAY, COND8) */ 349 { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP_DELAY, COND12) }, 350 /* C (COND_JUMP_DELAY, COND12) */ 351 { COND12_F, COND12_M, COND12_DELAY_LENGTH, C (COND_JUMP_DELAY, COND32), }, 352 /* C (COND_JUMP_DELAY, COND32) */ 353 { COND32_F, COND32_M, COND32_LENGTH, 0, }, 354 /* C (COND_JUMP_DELAY, UNDEF_WORD_DISP) */ 355 { 0, 0, COND32_LENGTH, 0, }, 356 EMPTY, EMPTY, EMPTY, 357 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 358 359 EMPTY, 360 /* C (UNCOND_JUMP, UNCOND12) */ 361 { UNCOND12_F, UNCOND12_M, UNCOND12_LENGTH, C (UNCOND_JUMP, UNCOND32), }, 362 /* C (UNCOND_JUMP, UNCOND32) */ 363 { UNCOND32_F, UNCOND32_M, UNCOND32_LENGTH, 0, }, 364 EMPTY, 365 /* C (UNCOND_JUMP, UNDEF_WORD_DISP) */ 366 { 0, 0, UNCOND32_LENGTH, 0, }, 367 EMPTY, EMPTY, EMPTY, 368 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 369 370#ifdef HAVE_SH64 371 /* C (SH64PCREL16_32, SH64PCREL16) */ 372 EMPTY, 373 { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16_32, SH64PCREL32) }, 374 /* C (SH64PCREL16_32, SH64PCREL32) */ 375 { 0, 0, SH64PCREL32_LENGTH, 0 }, 376 EMPTY, EMPTY, 377 /* C (SH64PCREL16_32, SH64PCRELPLT) */ 378 { 0, 0, SH64PCREL32_LENGTH, 0 }, 379 EMPTY, EMPTY, 380 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 381 382 /* C (SH64PCREL16_64, SH64PCREL16) */ 383 EMPTY, 384 { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16_64, SH64PCREL32) }, 385 /* C (SH64PCREL16_64, SH64PCREL32) */ 386 { SH64PCREL32_F, SH64PCREL32_M, SH64PCREL32_LENGTH, C (SH64PCREL16_64, SH64PCREL48) }, 387 /* C (SH64PCREL16_64, SH64PCREL48) */ 388 { SH64PCREL48_F, SH64PCREL48_M, SH64PCREL48_LENGTH, C (SH64PCREL16_64, SH64PCREL64) }, 389 /* C (SH64PCREL16_64, SH64PCREL64) */ 390 { 0, 0, SH64PCREL64_LENGTH, 0 }, 391 /* C (SH64PCREL16_64, SH64PCRELPLT) */ 392 { 0, 0, SH64PCREL64_LENGTH, 0 }, 393 EMPTY, EMPTY, 394 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 395 396 /* C (SH64PCREL16PT_32, SH64PCREL16) */ 397 EMPTY, 398 { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16PT_32, SH64PCREL32) }, 399 /* C (SH64PCREL16PT_32, SH64PCREL32) */ 400 { 0, 0, SH64PCREL32_LENGTH, 0 }, 401 EMPTY, EMPTY, 402 /* C (SH64PCREL16PT_32, SH64PCRELPLT) */ 403 { 0, 0, SH64PCREL32_LENGTH, 0 }, 404 EMPTY, EMPTY, 405 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 406 407 /* C (SH64PCREL16PT_64, SH64PCREL16) */ 408 EMPTY, 409 { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16PT_64, SH64PCREL32) }, 410 /* C (SH64PCREL16PT_64, SH64PCREL32) */ 411 { SH64PCREL32_F, 412 SH64PCREL32_M, 413 SH64PCREL32_LENGTH, 414 C (SH64PCREL16PT_64, SH64PCREL48) }, 415 /* C (SH64PCREL16PT_64, SH64PCREL48) */ 416 { SH64PCREL48_F, SH64PCREL48_M, SH64PCREL48_LENGTH, C (SH64PCREL16PT_64, SH64PCREL64) }, 417 /* C (SH64PCREL16PT_64, SH64PCREL64) */ 418 { 0, 0, SH64PCREL64_LENGTH, 0 }, 419 /* C (SH64PCREL16PT_64, SH64PCRELPLT) */ 420 { 0, 0, SH64PCREL64_LENGTH, 0}, 421 EMPTY, EMPTY, 422 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 423 424 /* C (MOVI_IMM_32, UNDEF_MOVI) */ 425 { 0, 0, MOVI_32_LENGTH, 0 }, 426 /* C (MOVI_IMM_32, MOVI_16) */ 427 { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_32, MOVI_32) }, 428 /* C (MOVI_IMM_32, MOVI_32) */ 429 { MOVI_32_F, MOVI_32_M, MOVI_32_LENGTH, 0 }, 430 EMPTY, EMPTY, EMPTY, 431 /* C (MOVI_IMM_32, MOVI_GOTOFF) */ 432 { 0, 0, MOVI_32_LENGTH, 0 }, 433 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 434 435 /* C (MOVI_IMM_32_PCREL, MOVI_16) */ 436 EMPTY, 437 { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_32_PCREL, MOVI_32) }, 438 /* C (MOVI_IMM_32_PCREL, MOVI_32) */ 439 { 0, 0, MOVI_32_LENGTH, 0 }, 440 EMPTY, EMPTY, 441 /* C (MOVI_IMM_32_PCREL, MOVI_PLT) */ 442 { 0, 0, MOVI_32_LENGTH, 0 }, 443 EMPTY, 444 /* C (MOVI_IMM_32_PCREL, MOVI_GOTPC) */ 445 { 0, 0, MOVI_32_LENGTH, 0 }, 446 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 447 448 /* C (MOVI_IMM_64, UNDEF_MOVI) */ 449 { 0, 0, MOVI_64_LENGTH, 0 }, 450 /* C (MOVI_IMM_64, MOVI_16) */ 451 { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_64, MOVI_32) }, 452 /* C (MOVI_IMM_64, MOVI_32) */ 453 { MOVI_32_F, MOVI_32_M, MOVI_32_LENGTH, C (MOVI_IMM_64, MOVI_48) }, 454 /* C (MOVI_IMM_64, MOVI_48) */ 455 { MOVI_48_F, MOVI_48_M, MOVI_48_LENGTH, C (MOVI_IMM_64, MOVI_64) }, 456 /* C (MOVI_IMM_64, MOVI_64) */ 457 { 0, 0, MOVI_64_LENGTH, 0 }, 458 EMPTY, 459 /* C (MOVI_IMM_64, MOVI_GOTOFF) */ 460 { 0, 0, MOVI_64_LENGTH, 0 }, 461 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 462 463 /* C (MOVI_IMM_64_PCREL, MOVI_16) */ 464 EMPTY, 465 { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_64_PCREL, MOVI_32) }, 466 /* C (MOVI_IMM_64_PCREL, MOVI_32) */ 467 { MOVI_32_F, MOVI_32_M, MOVI_32_LENGTH, C (MOVI_IMM_64_PCREL, MOVI_48) }, 468 /* C (MOVI_IMM_64_PCREL, MOVI_48) */ 469 { MOVI_48_F, MOVI_48_M, MOVI_48_LENGTH, C (MOVI_IMM_64_PCREL, MOVI_64) }, 470 /* C (MOVI_IMM_64_PCREL, MOVI_64) */ 471 { 0, 0, MOVI_64_LENGTH, 0 }, 472 /* C (MOVI_IMM_64_PCREL, MOVI_PLT) */ 473 { 0, 0, MOVI_64_LENGTH, 0 }, 474 EMPTY, 475 /* C (MOVI_IMM_64_PCREL, MOVI_GOTPC) */ 476 { 0, 0, MOVI_64_LENGTH, 0 }, 477 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 478 479#endif /* HAVE_SH64 */ 480 481}; 482 483#undef EMPTY 484 485static struct hash_control *opcode_hash_control; /* Opcode mnemonics */ 486 487 488#ifdef OBJ_ELF 489/* Determinet whether the symbol needs any kind of PIC relocation. */ 490 491inline static int 492sh_PIC_related_p (symbolS *sym) 493{ 494 expressionS *exp; 495 496 if (! sym) 497 return 0; 498 499 if (sym == GOT_symbol) 500 return 1; 501 502#ifdef HAVE_SH64 503 if (sh_PIC_related_p (*symbol_get_tc (sym))) 504 return 1; 505#endif 506 507 exp = symbol_get_value_expression (sym); 508 509 return (exp->X_op == O_PIC_reloc 510 || sh_PIC_related_p (exp->X_add_symbol) 511 || sh_PIC_related_p (exp->X_op_symbol)); 512} 513 514/* Determine the relocation type to be used to represent the 515 expression, that may be rearranged. */ 516 517static int 518sh_check_fixup (expressionS *main_exp, bfd_reloc_code_real_type *r_type_p) 519{ 520 expressionS *exp = main_exp; 521 522 /* This is here for backward-compatibility only. GCC used to generated: 523 524 f@PLT + . - (.LPCS# + 2) 525 526 but we'd rather be able to handle this as a PIC-related reference 527 plus/minus a symbol. However, gas' parser gives us: 528 529 O_subtract (O_add (f@PLT, .), .LPCS#+2) 530 531 so we attempt to transform this into: 532 533 O_subtract (f@PLT, O_subtract (.LPCS#+2, .)) 534 535 which we can handle simply below. */ 536 if (exp->X_op == O_subtract) 537 { 538 if (sh_PIC_related_p (exp->X_op_symbol)) 539 return 1; 540 541 exp = symbol_get_value_expression (exp->X_add_symbol); 542 543 if (exp && sh_PIC_related_p (exp->X_op_symbol)) 544 return 1; 545 546 if (exp && exp->X_op == O_add 547 && sh_PIC_related_p (exp->X_add_symbol)) 548 { 549 symbolS *sym = exp->X_add_symbol; 550 551 exp->X_op = O_subtract; 552 exp->X_add_symbol = main_exp->X_op_symbol; 553 554 main_exp->X_op_symbol = main_exp->X_add_symbol; 555 main_exp->X_add_symbol = sym; 556 557 main_exp->X_add_number += exp->X_add_number; 558 exp->X_add_number = 0; 559 } 560 561 exp = main_exp; 562 } 563 else if (exp->X_op == O_add && sh_PIC_related_p (exp->X_op_symbol)) 564 return 1; 565 566 if (exp->X_op == O_symbol || exp->X_op == O_add || exp->X_op == O_subtract) 567 { 568#ifdef HAVE_SH64 569 if (exp->X_add_symbol 570 && (exp->X_add_symbol == GOT_symbol 571 || (GOT_symbol 572 && *symbol_get_tc (exp->X_add_symbol) == GOT_symbol))) 573 { 574 switch (*r_type_p) 575 { 576 case BFD_RELOC_SH_IMM_LOW16: 577 *r_type_p = BFD_RELOC_SH_GOTPC_LOW16; 578 break; 579 580 case BFD_RELOC_SH_IMM_MEDLOW16: 581 *r_type_p = BFD_RELOC_SH_GOTPC_MEDLOW16; 582 break; 583 584 case BFD_RELOC_SH_IMM_MEDHI16: 585 *r_type_p = BFD_RELOC_SH_GOTPC_MEDHI16; 586 break; 587 588 case BFD_RELOC_SH_IMM_HI16: 589 *r_type_p = BFD_RELOC_SH_GOTPC_HI16; 590 break; 591 592 case BFD_RELOC_NONE: 593 case BFD_RELOC_UNUSED: 594 *r_type_p = BFD_RELOC_SH_GOTPC; 595 break; 596 597 default: 598 abort (); 599 } 600 return 0; 601 } 602#else 603 if (exp->X_add_symbol && exp->X_add_symbol == GOT_symbol) 604 { 605 *r_type_p = BFD_RELOC_SH_GOTPC; 606 return 0; 607 } 608#endif 609 exp = symbol_get_value_expression (exp->X_add_symbol); 610 if (! exp) 611 return 0; 612 } 613 614 if (exp->X_op == O_PIC_reloc) 615 { 616#ifdef HAVE_SH64 617 switch (*r_type_p) 618 { 619 case BFD_RELOC_NONE: 620 case BFD_RELOC_UNUSED: 621 *r_type_p = exp->X_md; 622 break; 623 624 case BFD_RELOC_SH_IMM_LOW16: 625 switch (exp->X_md) 626 { 627 case BFD_RELOC_32_GOTOFF: 628 *r_type_p = BFD_RELOC_SH_GOTOFF_LOW16; 629 break; 630 631 case BFD_RELOC_SH_GOTPLT32: 632 *r_type_p = BFD_RELOC_SH_GOTPLT_LOW16; 633 break; 634 635 case BFD_RELOC_32_GOT_PCREL: 636 *r_type_p = BFD_RELOC_SH_GOT_LOW16; 637 break; 638 639 case BFD_RELOC_32_PLT_PCREL: 640 *r_type_p = BFD_RELOC_SH_PLT_LOW16; 641 break; 642 643 default: 644 abort (); 645 } 646 break; 647 648 case BFD_RELOC_SH_IMM_MEDLOW16: 649 switch (exp->X_md) 650 { 651 case BFD_RELOC_32_GOTOFF: 652 *r_type_p = BFD_RELOC_SH_GOTOFF_MEDLOW16; 653 break; 654 655 case BFD_RELOC_SH_GOTPLT32: 656 *r_type_p = BFD_RELOC_SH_GOTPLT_MEDLOW16; 657 break; 658 659 case BFD_RELOC_32_GOT_PCREL: 660 *r_type_p = BFD_RELOC_SH_GOT_MEDLOW16; 661 break; 662 663 case BFD_RELOC_32_PLT_PCREL: 664 *r_type_p = BFD_RELOC_SH_PLT_MEDLOW16; 665 break; 666 667 default: 668 abort (); 669 } 670 break; 671 672 case BFD_RELOC_SH_IMM_MEDHI16: 673 switch (exp->X_md) 674 { 675 case BFD_RELOC_32_GOTOFF: 676 *r_type_p = BFD_RELOC_SH_GOTOFF_MEDHI16; 677 break; 678 679 case BFD_RELOC_SH_GOTPLT32: 680 *r_type_p = BFD_RELOC_SH_GOTPLT_MEDHI16; 681 break; 682 683 case BFD_RELOC_32_GOT_PCREL: 684 *r_type_p = BFD_RELOC_SH_GOT_MEDHI16; 685 break; 686 687 case BFD_RELOC_32_PLT_PCREL: 688 *r_type_p = BFD_RELOC_SH_PLT_MEDHI16; 689 break; 690 691 default: 692 abort (); 693 } 694 break; 695 696 case BFD_RELOC_SH_IMM_HI16: 697 switch (exp->X_md) 698 { 699 case BFD_RELOC_32_GOTOFF: 700 *r_type_p = BFD_RELOC_SH_GOTOFF_HI16; 701 break; 702 703 case BFD_RELOC_SH_GOTPLT32: 704 *r_type_p = BFD_RELOC_SH_GOTPLT_HI16; 705 break; 706 707 case BFD_RELOC_32_GOT_PCREL: 708 *r_type_p = BFD_RELOC_SH_GOT_HI16; 709 break; 710 711 case BFD_RELOC_32_PLT_PCREL: 712 *r_type_p = BFD_RELOC_SH_PLT_HI16; 713 break; 714 715 default: 716 abort (); 717 } 718 break; 719 720 default: 721 abort (); 722 } 723#else 724 *r_type_p = exp->X_md; 725#endif 726 if (exp == main_exp) 727 exp->X_op = O_symbol; 728 else 729 { 730 main_exp->X_add_symbol = exp->X_add_symbol; 731 main_exp->X_add_number += exp->X_add_number; 732 } 733 } 734 else 735 return (sh_PIC_related_p (exp->X_add_symbol) 736 || sh_PIC_related_p (exp->X_op_symbol)); 737 738 return 0; 739} 740 741/* Add expression EXP of SIZE bytes to offset OFF of fragment FRAG. */ 742 743void 744sh_cons_fix_new (fragS *frag, int off, int size, expressionS *exp) 745{ 746 bfd_reloc_code_real_type r_type = BFD_RELOC_UNUSED; 747 748 if (sh_check_fixup (exp, &r_type)) 749 as_bad (_("Invalid PIC expression.")); 750 751 if (r_type == BFD_RELOC_UNUSED) 752 switch (size) 753 { 754 case 1: 755 r_type = BFD_RELOC_8; 756 break; 757 758 case 2: 759 r_type = BFD_RELOC_16; 760 break; 761 762 case 4: 763 r_type = BFD_RELOC_32; 764 break; 765 766#ifdef HAVE_SH64 767 case 8: 768 r_type = BFD_RELOC_64; 769 break; 770#endif 771 772 default: 773 goto error; 774 } 775 else if (size != 4) 776 { 777 error: 778 as_bad (_("unsupported BFD relocation size %u"), size); 779 r_type = BFD_RELOC_UNUSED; 780 } 781 782 fix_new_exp (frag, off, size, exp, 0, r_type); 783} 784 785/* The regular cons() function, that reads constants, doesn't support 786 suffixes such as @GOT, @GOTOFF and @PLT, that generate 787 machine-specific relocation types. So we must define it here. */ 788/* Clobbers input_line_pointer, checks end-of-line. */ 789/* NBYTES 1=.byte, 2=.word, 4=.long */ 790static void 791sh_elf_cons (register int nbytes) 792{ 793 expressionS exp; 794 795#ifdef HAVE_SH64 796 797 /* Update existing range to include a previous insn, if there was one. */ 798 sh64_update_contents_mark (TRUE); 799 800 /* We need to make sure the contents type is set to data. */ 801 sh64_flag_output (); 802 803#endif /* HAVE_SH64 */ 804 805 if (is_it_end_of_statement ()) 806 { 807 demand_empty_rest_of_line (); 808 return; 809 } 810 811#ifdef md_cons_align 812 md_cons_align (nbytes); 813#endif 814 815 do 816 { 817 expression (&exp); 818 emit_expr (&exp, (unsigned int) nbytes); 819 } 820 while (*input_line_pointer++ == ','); 821 822 input_line_pointer--; /* Put terminator back into stream. */ 823 if (*input_line_pointer == '#' || *input_line_pointer == '!') 824 { 825 while (! is_end_of_line[(unsigned char) *input_line_pointer++]); 826 } 827 else 828 demand_empty_rest_of_line (); 829} 830#endif /* OBJ_ELF */ 831 832 833/* This function is called once, at assembler startup time. This should 834 set up all the tables, etc that the MD part of the assembler needs. */ 835 836void 837md_begin (void) 838{ 839 const sh_opcode_info *opcode; 840 char *prev_name = ""; 841 unsigned int target_arch; 842 843 target_arch 844 = preset_target_arch ? preset_target_arch : arch_sh_up & ~arch_sh_has_dsp; 845 valid_arch = target_arch; 846 847#ifdef HAVE_SH64 848 shmedia_md_begin (); 849#endif 850 851 opcode_hash_control = hash_new (); 852 853 /* Insert unique names into hash table. */ 854 for (opcode = sh_table; opcode->name; opcode++) 855 { 856 if (strcmp (prev_name, opcode->name) != 0) 857 { 858 if (!SH_MERGE_ARCH_SET_VALID (opcode->arch, target_arch)) 859 continue; 860 prev_name = opcode->name; 861 hash_insert (opcode_hash_control, opcode->name, (char *) opcode); 862 } 863 } 864} 865 866static int reg_m; 867static int reg_n; 868static int reg_x, reg_y; 869static int reg_efg; 870static int reg_b; 871 872#define IDENT_CHAR(c) (ISALNUM (c) || (c) == '_') 873 874/* Try to parse a reg name. Return the number of chars consumed. */ 875 876static unsigned int 877parse_reg_without_prefix (char *src, int *mode, int *reg) 878{ 879 char l0 = TOLOWER (src[0]); 880 char l1 = l0 ? TOLOWER (src[1]) : 0; 881 882 /* We use ! IDENT_CHAR for the next character after the register name, to 883 make sure that we won't accidentally recognize a symbol name such as 884 'sram' or sr_ram as being a reference to the register 'sr'. */ 885 886 if (l0 == 'r') 887 { 888 if (l1 == '1') 889 { 890 if (src[2] >= '0' && src[2] <= '5' 891 && ! IDENT_CHAR ((unsigned char) src[3])) 892 { 893 *mode = A_REG_N; 894 *reg = 10 + src[2] - '0'; 895 return 3; 896 } 897 } 898 if (l1 >= '0' && l1 <= '9' 899 && ! IDENT_CHAR ((unsigned char) src[2])) 900 { 901 *mode = A_REG_N; 902 *reg = (l1 - '0'); 903 return 2; 904 } 905 if (l1 >= '0' && l1 <= '7' && strncasecmp (&src[2], "_bank", 5) == 0 906 && ! IDENT_CHAR ((unsigned char) src[7])) 907 { 908 *mode = A_REG_B; 909 *reg = (l1 - '0'); 910 return 7; 911 } 912 913 if (l1 == 'e' && ! IDENT_CHAR ((unsigned char) src[2])) 914 { 915 *mode = A_RE; 916 return 2; 917 } 918 if (l1 == 's' && ! IDENT_CHAR ((unsigned char) src[2])) 919 { 920 *mode = A_RS; 921 return 2; 922 } 923 } 924 925 if (l0 == 'a') 926 { 927 if (l1 == '0') 928 { 929 if (! IDENT_CHAR ((unsigned char) src[2])) 930 { 931 *mode = DSP_REG_N; 932 *reg = A_A0_NUM; 933 return 2; 934 } 935 if (TOLOWER (src[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src[3])) 936 { 937 *mode = DSP_REG_N; 938 *reg = A_A0G_NUM; 939 return 3; 940 } 941 } 942 if (l1 == '1') 943 { 944 if (! IDENT_CHAR ((unsigned char) src[2])) 945 { 946 *mode = DSP_REG_N; 947 *reg = A_A1_NUM; 948 return 2; 949 } 950 if (TOLOWER (src[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src[3])) 951 { 952 *mode = DSP_REG_N; 953 *reg = A_A1G_NUM; 954 return 3; 955 } 956 } 957 958 if (l1 == 'x' && src[2] >= '0' && src[2] <= '1' 959 && ! IDENT_CHAR ((unsigned char) src[3])) 960 { 961 *mode = A_REG_N; 962 *reg = 4 + (l1 - '0'); 963 return 3; 964 } 965 if (l1 == 'y' && src[2] >= '0' && src[2] <= '1' 966 && ! IDENT_CHAR ((unsigned char) src[3])) 967 { 968 *mode = A_REG_N; 969 *reg = 6 + (l1 - '0'); 970 return 3; 971 } 972 if (l1 == 's' && src[2] >= '0' && src[2] <= '3' 973 && ! IDENT_CHAR ((unsigned char) src[3])) 974 { 975 int n = l1 - '0'; 976 977 *mode = A_REG_N; 978 *reg = n | ((~n & 2) << 1); 979 return 3; 980 } 981 } 982 983 if (l0 == 'i' && l1 && ! IDENT_CHAR ((unsigned char) src[2])) 984 { 985 if (l1 == 's') 986 { 987 *mode = A_REG_N; 988 *reg = 8; 989 return 2; 990 } 991 if (l1 == 'x') 992 { 993 *mode = A_REG_N; 994 *reg = 8; 995 return 2; 996 } 997 if (l1 == 'y') 998 { 999 *mode = A_REG_N; 1000 *reg = 9; 1001 return 2; 1002 } 1003 } 1004 1005 if (l0 == 'x' && l1 >= '0' && l1 <= '1' 1006 && ! IDENT_CHAR ((unsigned char) src[2])) 1007 { 1008 *mode = DSP_REG_N; 1009 *reg = A_X0_NUM + l1 - '0'; 1010 return 2; 1011 } 1012 1013 if (l0 == 'y' && l1 >= '0' && l1 <= '1' 1014 && ! IDENT_CHAR ((unsigned char) src[2])) 1015 { 1016 *mode = DSP_REG_N; 1017 *reg = A_Y0_NUM + l1 - '0'; 1018 return 2; 1019 } 1020 1021 if (l0 == 'm' && l1 >= '0' && l1 <= '1' 1022 && ! IDENT_CHAR ((unsigned char) src[2])) 1023 { 1024 *mode = DSP_REG_N; 1025 *reg = l1 == '0' ? A_M0_NUM : A_M1_NUM; 1026 return 2; 1027 } 1028 1029 if (l0 == 's' 1030 && l1 == 's' 1031 && TOLOWER (src[2]) == 'r' && ! IDENT_CHAR ((unsigned char) src[3])) 1032 { 1033 *mode = A_SSR; 1034 return 3; 1035 } 1036 1037 if (l0 == 's' && l1 == 'p' && TOLOWER (src[2]) == 'c' 1038 && ! IDENT_CHAR ((unsigned char) src[3])) 1039 { 1040 *mode = A_SPC; 1041 return 3; 1042 } 1043 1044 if (l0 == 's' && l1 == 'g' && TOLOWER (src[2]) == 'r' 1045 && ! IDENT_CHAR ((unsigned char) src[3])) 1046 { 1047 *mode = A_SGR; 1048 return 3; 1049 } 1050 1051 if (l0 == 'd' && l1 == 's' && TOLOWER (src[2]) == 'r' 1052 && ! IDENT_CHAR ((unsigned char) src[3])) 1053 { 1054 *mode = A_DSR; 1055 return 3; 1056 } 1057 1058 if (l0 == 'd' && l1 == 'b' && TOLOWER (src[2]) == 'r' 1059 && ! IDENT_CHAR ((unsigned char) src[3])) 1060 { 1061 *mode = A_DBR; 1062 return 3; 1063 } 1064 1065 if (l0 == 's' && l1 == 'r' && ! IDENT_CHAR ((unsigned char) src[2])) 1066 { 1067 *mode = A_SR; 1068 return 2; 1069 } 1070 1071 if (l0 == 's' && l1 == 'p' && ! IDENT_CHAR ((unsigned char) src[2])) 1072 { 1073 *mode = A_REG_N; 1074 *reg = 15; 1075 return 2; 1076 } 1077 1078 if (l0 == 'p' && l1 == 'r' && ! IDENT_CHAR ((unsigned char) src[2])) 1079 { 1080 *mode = A_PR; 1081 return 2; 1082 } 1083 if (l0 == 'p' && l1 == 'c' && ! IDENT_CHAR ((unsigned char) src[2])) 1084 { 1085 /* Don't use A_DISP_PC here - that would accept stuff like 'mova pc,r0' 1086 and use an uninitialized immediate. */ 1087 *mode = A_PC; 1088 return 2; 1089 } 1090 if (l0 == 'g' && l1 == 'b' && TOLOWER (src[2]) == 'r' 1091 && ! IDENT_CHAR ((unsigned char) src[3])) 1092 { 1093 *mode = A_GBR; 1094 return 3; 1095 } 1096 if (l0 == 'v' && l1 == 'b' && TOLOWER (src[2]) == 'r' 1097 && ! IDENT_CHAR ((unsigned char) src[3])) 1098 { 1099 *mode = A_VBR; 1100 return 3; 1101 } 1102 1103 if (l0 == 't' && l1 == 'b' && TOLOWER (src[2]) == 'r' 1104 && ! IDENT_CHAR ((unsigned char) src[3])) 1105 { 1106 *mode = A_TBR; 1107 return 3; 1108 } 1109 if (l0 == 'm' && l1 == 'a' && TOLOWER (src[2]) == 'c' 1110 && ! IDENT_CHAR ((unsigned char) src[4])) 1111 { 1112 if (TOLOWER (src[3]) == 'l') 1113 { 1114 *mode = A_MACL; 1115 return 4; 1116 } 1117 if (TOLOWER (src[3]) == 'h') 1118 { 1119 *mode = A_MACH; 1120 return 4; 1121 } 1122 } 1123 if (l0 == 'm' && l1 == 'o' && TOLOWER (src[2]) == 'd' 1124 && ! IDENT_CHAR ((unsigned char) src[3])) 1125 { 1126 *mode = A_MOD; 1127 return 3; 1128 } 1129 if (l0 == 'f' && l1 == 'r') 1130 { 1131 if (src[2] == '1') 1132 { 1133 if (src[3] >= '0' && src[3] <= '5' 1134 && ! IDENT_CHAR ((unsigned char) src[4])) 1135 { 1136 *mode = F_REG_N; 1137 *reg = 10 + src[3] - '0'; 1138 return 4; 1139 } 1140 } 1141 if (src[2] >= '0' && src[2] <= '9' 1142 && ! IDENT_CHAR ((unsigned char) src[3])) 1143 { 1144 *mode = F_REG_N; 1145 *reg = (src[2] - '0'); 1146 return 3; 1147 } 1148 } 1149 if (l0 == 'd' && l1 == 'r') 1150 { 1151 if (src[2] == '1') 1152 { 1153 if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1) 1154 && ! IDENT_CHAR ((unsigned char) src[4])) 1155 { 1156 *mode = D_REG_N; 1157 *reg = 10 + src[3] - '0'; 1158 return 4; 1159 } 1160 } 1161 if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1) 1162 && ! IDENT_CHAR ((unsigned char) src[3])) 1163 { 1164 *mode = D_REG_N; 1165 *reg = (src[2] - '0'); 1166 return 3; 1167 } 1168 } 1169 if (l0 == 'x' && l1 == 'd') 1170 { 1171 if (src[2] == '1') 1172 { 1173 if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1) 1174 && ! IDENT_CHAR ((unsigned char) src[4])) 1175 { 1176 *mode = X_REG_N; 1177 *reg = 11 + src[3] - '0'; 1178 return 4; 1179 } 1180 } 1181 if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1) 1182 && ! IDENT_CHAR ((unsigned char) src[3])) 1183 { 1184 *mode = X_REG_N; 1185 *reg = (src[2] - '0') + 1; 1186 return 3; 1187 } 1188 } 1189 if (l0 == 'f' && l1 == 'v') 1190 { 1191 if (src[2] == '1'&& src[3] == '2' && ! IDENT_CHAR ((unsigned char) src[4])) 1192 { 1193 *mode = V_REG_N; 1194 *reg = 12; 1195 return 4; 1196 } 1197 if ((src[2] == '0' || src[2] == '4' || src[2] == '8') 1198 && ! IDENT_CHAR ((unsigned char) src[3])) 1199 { 1200 *mode = V_REG_N; 1201 *reg = (src[2] - '0'); 1202 return 3; 1203 } 1204 } 1205 if (l0 == 'f' && l1 == 'p' && TOLOWER (src[2]) == 'u' 1206 && TOLOWER (src[3]) == 'l' 1207 && ! IDENT_CHAR ((unsigned char) src[4])) 1208 { 1209 *mode = FPUL_N; 1210 return 4; 1211 } 1212 1213 if (l0 == 'f' && l1 == 'p' && TOLOWER (src[2]) == 's' 1214 && TOLOWER (src[3]) == 'c' 1215 && TOLOWER (src[4]) == 'r' && ! IDENT_CHAR ((unsigned char) src[5])) 1216 { 1217 *mode = FPSCR_N; 1218 return 5; 1219 } 1220 1221 if (l0 == 'x' && l1 == 'm' && TOLOWER (src[2]) == 't' 1222 && TOLOWER (src[3]) == 'r' 1223 && TOLOWER (src[4]) == 'x' && ! IDENT_CHAR ((unsigned char) src[5])) 1224 { 1225 *mode = XMTRX_M4; 1226 return 5; 1227 } 1228 1229 return 0; 1230} 1231 1232/* Like parse_reg_without_prefix, but this version supports 1233 $-prefixed register names if enabled by the user. */ 1234 1235static unsigned int 1236parse_reg (char *src, int *mode, int *reg) 1237{ 1238 unsigned int prefix; 1239 unsigned int consumed; 1240 1241 if (src[0] == '$') 1242 { 1243 if (allow_dollar_register_prefix) 1244 { 1245 src ++; 1246 prefix = 1; 1247 } 1248 else 1249 return 0; 1250 } 1251 else 1252 prefix = 0; 1253 1254 consumed = parse_reg_without_prefix (src, mode, reg); 1255 1256 if (consumed == 0) 1257 return 0; 1258 1259 return consumed + prefix; 1260} 1261 1262static char * 1263parse_exp (char *s, sh_operand_info *op) 1264{ 1265 char *save; 1266 char *new; 1267 1268 save = input_line_pointer; 1269 input_line_pointer = s; 1270 expression (&op->immediate); 1271 if (op->immediate.X_op == O_absent) 1272 as_bad (_("missing operand")); 1273#ifdef OBJ_ELF 1274 else if (op->immediate.X_op == O_PIC_reloc 1275 || sh_PIC_related_p (op->immediate.X_add_symbol) 1276 || sh_PIC_related_p (op->immediate.X_op_symbol)) 1277 as_bad (_("misplaced PIC operand")); 1278#endif 1279 new = input_line_pointer; 1280 input_line_pointer = save; 1281 return new; 1282} 1283 1284/* The many forms of operand: 1285 1286 Rn Register direct 1287 @Rn Register indirect 1288 @Rn+ Autoincrement 1289 @-Rn Autodecrement 1290 @(disp:4,Rn) 1291 @(disp:8,GBR) 1292 @(disp:8,PC) 1293 1294 @(R0,Rn) 1295 @(R0,GBR) 1296 1297 disp:8 1298 disp:12 1299 #imm8 1300 pr, gbr, vbr, macl, mach 1301 */ 1302 1303static char * 1304parse_at (char *src, sh_operand_info *op) 1305{ 1306 int len; 1307 int mode; 1308 src++; 1309 if (src[0] == '@') 1310 { 1311 src = parse_at (src, op); 1312 if (op->type == A_DISP_TBR) 1313 op->type = A_DISP2_TBR; 1314 else 1315 as_bad (_("illegal double indirection")); 1316 } 1317 else if (src[0] == '-') 1318 { 1319 /* Must be predecrement. */ 1320 src++; 1321 1322 len = parse_reg (src, &mode, &(op->reg)); 1323 if (mode != A_REG_N) 1324 as_bad (_("illegal register after @-")); 1325 1326 op->type = A_DEC_N; 1327 src += len; 1328 } 1329 else if (src[0] == '(') 1330 { 1331 /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or 1332 @(r0, rn). */ 1333 src++; 1334 len = parse_reg (src, &mode, &(op->reg)); 1335 if (len && mode == A_REG_N) 1336 { 1337 src += len; 1338 if (op->reg != 0) 1339 { 1340 as_bad (_("must be @(r0,...)")); 1341 } 1342 if (src[0] == ',') 1343 { 1344 src++; 1345 /* Now can be rn or gbr. */ 1346 len = parse_reg (src, &mode, &(op->reg)); 1347 } 1348 else 1349 { 1350 len = 0; 1351 } 1352 if (len) 1353 { 1354 if (mode == A_GBR) 1355 { 1356 op->type = A_R0_GBR; 1357 } 1358 else if (mode == A_REG_N) 1359 { 1360 op->type = A_IND_R0_REG_N; 1361 } 1362 else 1363 { 1364 as_bad (_("syntax error in @(r0,...)")); 1365 } 1366 } 1367 else 1368 { 1369 as_bad (_("syntax error in @(r0...)")); 1370 } 1371 } 1372 else 1373 { 1374 /* Must be an @(disp,.. thing). */ 1375 src = parse_exp (src, op); 1376 if (src[0] == ',') 1377 src++; 1378 /* Now can be rn, gbr or pc. */ 1379 len = parse_reg (src, &mode, &op->reg); 1380 if (len) 1381 { 1382 if (mode == A_REG_N) 1383 { 1384 op->type = A_DISP_REG_N; 1385 } 1386 else if (mode == A_GBR) 1387 { 1388 op->type = A_DISP_GBR; 1389 } 1390 else if (mode == A_TBR) 1391 { 1392 op->type = A_DISP_TBR; 1393 } 1394 else if (mode == A_PC) 1395 { 1396 /* We want @(expr, pc) to uniformly address . + expr, 1397 no matter if expr is a constant, or a more complex 1398 expression, e.g. sym-. or sym1-sym2. 1399 However, we also used to accept @(sym,pc) 1400 as addressing sym, i.e. meaning the same as plain sym. 1401 Some existing code does use the @(sym,pc) syntax, so 1402 we give it the old semantics for now, but warn about 1403 its use, so that users have some time to fix their code. 1404 1405 Note that due to this backward compatibility hack, 1406 we'll get unexpected results when @(offset, pc) is used, 1407 and offset is a symbol that is set later to an an address 1408 difference, or an external symbol that is set to an 1409 address difference in another source file, so we want to 1410 eventually remove it. */ 1411 if (op->immediate.X_op == O_symbol) 1412 { 1413 op->type = A_DISP_PC; 1414 as_warn (_("Deprecated syntax.")); 1415 } 1416 else 1417 { 1418 op->type = A_DISP_PC_ABS; 1419 /* Such operands don't get corrected for PC==.+4, so 1420 make the correction here. */ 1421 op->immediate.X_add_number -= 4; 1422 } 1423 } 1424 else 1425 { 1426 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])")); 1427 } 1428 } 1429 else 1430 { 1431 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])")); 1432 } 1433 } 1434 src += len; 1435 if (src[0] != ')') 1436 as_bad (_("expecting )")); 1437 else 1438 src++; 1439 } 1440 else 1441 { 1442 src += parse_reg (src, &mode, &(op->reg)); 1443 if (mode != A_REG_N) 1444 as_bad (_("illegal register after @")); 1445 1446 if (src[0] == '+') 1447 { 1448 char l0, l1; 1449 1450 src++; 1451 l0 = TOLOWER (src[0]); 1452 l1 = TOLOWER (src[1]); 1453 1454 if ((l0 == 'r' && l1 == '8') 1455 || (l0 == 'i' && (l1 == 'x' || l1 == 's'))) 1456 { 1457 src += 2; 1458 op->type = AX_PMOD_N; 1459 } 1460 else if ( (l0 == 'r' && l1 == '9') 1461 || (l0 == 'i' && l1 == 'y')) 1462 { 1463 src += 2; 1464 op->type = AY_PMOD_N; 1465 } 1466 else 1467 op->type = A_INC_N; 1468 } 1469 else 1470 op->type = A_IND_N; 1471 } 1472 return src; 1473} 1474 1475static void 1476get_operand (char **ptr, sh_operand_info *op) 1477{ 1478 char *src = *ptr; 1479 int mode = -1; 1480 unsigned int len; 1481 1482 if (src[0] == '#') 1483 { 1484 src++; 1485 *ptr = parse_exp (src, op); 1486 op->type = A_IMM; 1487 return; 1488 } 1489 1490 else if (src[0] == '@') 1491 { 1492 *ptr = parse_at (src, op); 1493 return; 1494 } 1495 len = parse_reg (src, &mode, &(op->reg)); 1496 if (len) 1497 { 1498 *ptr = src + len; 1499 op->type = mode; 1500 return; 1501 } 1502 else 1503 { 1504 /* Not a reg, the only thing left is a displacement. */ 1505 *ptr = parse_exp (src, op); 1506 op->type = A_DISP_PC; 1507 return; 1508 } 1509} 1510 1511static char * 1512get_operands (sh_opcode_info *info, char *args, sh_operand_info *operand) 1513{ 1514 char *ptr = args; 1515 if (info->arg[0]) 1516 { 1517 /* The pre-processor will eliminate whitespace in front of '@' 1518 after the first argument; we may be called multiple times 1519 from assemble_ppi, so don't insist on finding whitespace here. */ 1520 if (*ptr == ' ') 1521 ptr++; 1522 1523 get_operand (&ptr, operand + 0); 1524 if (info->arg[1]) 1525 { 1526 if (*ptr == ',') 1527 { 1528 ptr++; 1529 } 1530 get_operand (&ptr, operand + 1); 1531 /* ??? Hack: psha/pshl have a varying operand number depending on 1532 the type of the first operand. We handle this by having the 1533 three-operand version first and reducing the number of operands 1534 parsed to two if we see that the first operand is an immediate. 1535 This works because no insn with three operands has an immediate 1536 as first operand. */ 1537 if (info->arg[2] && operand[0].type != A_IMM) 1538 { 1539 if (*ptr == ',') 1540 { 1541 ptr++; 1542 } 1543 get_operand (&ptr, operand + 2); 1544 } 1545 else 1546 { 1547 operand[2].type = 0; 1548 } 1549 } 1550 else 1551 { 1552 operand[1].type = 0; 1553 operand[2].type = 0; 1554 } 1555 } 1556 else 1557 { 1558 operand[0].type = 0; 1559 operand[1].type = 0; 1560 operand[2].type = 0; 1561 } 1562 return ptr; 1563} 1564 1565/* Passed a pointer to a list of opcodes which use different 1566 addressing modes, return the opcode which matches the opcodes 1567 provided. */ 1568 1569static sh_opcode_info * 1570get_specific (sh_opcode_info *opcode, sh_operand_info *operands) 1571{ 1572 sh_opcode_info *this_try = opcode; 1573 char *name = opcode->name; 1574 int n = 0; 1575 1576 while (opcode->name) 1577 { 1578 this_try = opcode++; 1579 if ((this_try->name != name) && (strcmp (this_try->name, name) != 0)) 1580 { 1581 /* We've looked so far down the table that we've run out of 1582 opcodes with the same name. */ 1583 return 0; 1584 } 1585 1586 /* Look at both operands needed by the opcodes and provided by 1587 the user - since an arg test will often fail on the same arg 1588 again and again, we'll try and test the last failing arg the 1589 first on each opcode try. */ 1590 for (n = 0; this_try->arg[n]; n++) 1591 { 1592 sh_operand_info *user = operands + n; 1593 sh_arg_type arg = this_try->arg[n]; 1594 1595 if (SH_MERGE_ARCH_SET_VALID (valid_arch, arch_sh2a_nofpu_up) 1596 && ( arg == A_DISP_REG_M 1597 || arg == A_DISP_REG_N)) 1598 { 1599 /* Check a few key IMM* fields for overflow. */ 1600 int opf; 1601 long val = user->immediate.X_add_number; 1602 1603 for (opf = 0; opf < 4; opf ++) 1604 switch (this_try->nibbles[opf]) 1605 { 1606 case IMM0_4: 1607 case IMM1_4: 1608 if (val < 0 || val > 15) 1609 goto fail; 1610 break; 1611 case IMM0_4BY2: 1612 case IMM1_4BY2: 1613 if (val < 0 || val > 15 * 2) 1614 goto fail; 1615 break; 1616 case IMM0_4BY4: 1617 case IMM1_4BY4: 1618 if (val < 0 || val > 15 * 4) 1619 goto fail; 1620 break; 1621 default: 1622 break; 1623 } 1624 } 1625 switch (arg) 1626 { 1627 case A_DISP_PC: 1628 if (user->type == A_DISP_PC_ABS) 1629 break; 1630 /* Fall through. */ 1631 case A_IMM: 1632 case A_BDISP12: 1633 case A_BDISP8: 1634 case A_DISP_GBR: 1635 case A_DISP2_TBR: 1636 case A_MACH: 1637 case A_PR: 1638 case A_MACL: 1639 if (user->type != arg) 1640 goto fail; 1641 break; 1642 case A_R0: 1643 /* opcode needs r0 */ 1644 if (user->type != A_REG_N || user->reg != 0) 1645 goto fail; 1646 break; 1647 case A_R0_GBR: 1648 if (user->type != A_R0_GBR || user->reg != 0) 1649 goto fail; 1650 break; 1651 case F_FR0: 1652 if (user->type != F_REG_N || user->reg != 0) 1653 goto fail; 1654 break; 1655 1656 case A_REG_N: 1657 case A_INC_N: 1658 case A_DEC_N: 1659 case A_IND_N: 1660 case A_IND_R0_REG_N: 1661 case A_DISP_REG_N: 1662 case F_REG_N: 1663 case D_REG_N: 1664 case X_REG_N: 1665 case V_REG_N: 1666 case FPUL_N: 1667 case FPSCR_N: 1668 case DSP_REG_N: 1669 /* Opcode needs rn */ 1670 if (user->type != arg) 1671 goto fail; 1672 reg_n = user->reg; 1673 break; 1674 case DX_REG_N: 1675 if (user->type != D_REG_N && user->type != X_REG_N) 1676 goto fail; 1677 reg_n = user->reg; 1678 break; 1679 case A_GBR: 1680 case A_TBR: 1681 case A_SR: 1682 case A_VBR: 1683 case A_DSR: 1684 case A_MOD: 1685 case A_RE: 1686 case A_RS: 1687 case A_SSR: 1688 case A_SPC: 1689 case A_SGR: 1690 case A_DBR: 1691 if (user->type != arg) 1692 goto fail; 1693 break; 1694 1695 case A_REG_B: 1696 if (user->type != arg) 1697 goto fail; 1698 reg_b = user->reg; 1699 break; 1700 1701 case A_INC_R15: 1702 if (user->type != A_INC_N) 1703 goto fail; 1704 if (user->reg != 15) 1705 goto fail; 1706 reg_n = user->reg; 1707 break; 1708 1709 case A_DEC_R15: 1710 if (user->type != A_DEC_N) 1711 goto fail; 1712 if (user->reg != 15) 1713 goto fail; 1714 reg_n = user->reg; 1715 break; 1716 1717 case A_REG_M: 1718 case A_INC_M: 1719 case A_DEC_M: 1720 case A_IND_M: 1721 case A_IND_R0_REG_M: 1722 case A_DISP_REG_M: 1723 case DSP_REG_M: 1724 /* Opcode needs rn */ 1725 if (user->type != arg - A_REG_M + A_REG_N) 1726 goto fail; 1727 reg_m = user->reg; 1728 break; 1729 1730 case AS_DEC_N: 1731 if (user->type != A_DEC_N) 1732 goto fail; 1733 if (user->reg < 2 || user->reg > 5) 1734 goto fail; 1735 reg_n = user->reg; 1736 break; 1737 1738 case AS_INC_N: 1739 if (user->type != A_INC_N) 1740 goto fail; 1741 if (user->reg < 2 || user->reg > 5) 1742 goto fail; 1743 reg_n = user->reg; 1744 break; 1745 1746 case AS_IND_N: 1747 if (user->type != A_IND_N) 1748 goto fail; 1749 if (user->reg < 2 || user->reg > 5) 1750 goto fail; 1751 reg_n = user->reg; 1752 break; 1753 1754 case AS_PMOD_N: 1755 if (user->type != AX_PMOD_N) 1756 goto fail; 1757 if (user->reg < 2 || user->reg > 5) 1758 goto fail; 1759 reg_n = user->reg; 1760 break; 1761 1762 case AX_INC_N: 1763 if (user->type != A_INC_N) 1764 goto fail; 1765 if (user->reg < 4 || user->reg > 5) 1766 goto fail; 1767 reg_n = user->reg; 1768 break; 1769 1770 case AX_IND_N: 1771 if (user->type != A_IND_N) 1772 goto fail; 1773 if (user->reg < 4 || user->reg > 5) 1774 goto fail; 1775 reg_n = user->reg; 1776 break; 1777 1778 case AX_PMOD_N: 1779 if (user->type != AX_PMOD_N) 1780 goto fail; 1781 if (user->reg < 4 || user->reg > 5) 1782 goto fail; 1783 reg_n = user->reg; 1784 break; 1785 1786 case AXY_INC_N: 1787 if (user->type != A_INC_N) 1788 goto fail; 1789 if ((user->reg < 4 || user->reg > 5) 1790 && (user->reg < 0 || user->reg > 1)) 1791 goto fail; 1792 reg_n = user->reg; 1793 break; 1794 1795 case AXY_IND_N: 1796 if (user->type != A_IND_N) 1797 goto fail; 1798 if ((user->reg < 4 || user->reg > 5) 1799 && (user->reg < 0 || user->reg > 1)) 1800 goto fail; 1801 reg_n = user->reg; 1802 break; 1803 1804 case AXY_PMOD_N: 1805 if (user->type != AX_PMOD_N) 1806 goto fail; 1807 if ((user->reg < 4 || user->reg > 5) 1808 && (user->reg < 0 || user->reg > 1)) 1809 goto fail; 1810 reg_n = user->reg; 1811 break; 1812 1813 case AY_INC_N: 1814 if (user->type != A_INC_N) 1815 goto fail; 1816 if (user->reg < 6 || user->reg > 7) 1817 goto fail; 1818 reg_n = user->reg; 1819 break; 1820 1821 case AY_IND_N: 1822 if (user->type != A_IND_N) 1823 goto fail; 1824 if (user->reg < 6 || user->reg > 7) 1825 goto fail; 1826 reg_n = user->reg; 1827 break; 1828 1829 case AY_PMOD_N: 1830 if (user->type != AY_PMOD_N) 1831 goto fail; 1832 if (user->reg < 6 || user->reg > 7) 1833 goto fail; 1834 reg_n = user->reg; 1835 break; 1836 1837 case AYX_INC_N: 1838 if (user->type != A_INC_N) 1839 goto fail; 1840 if ((user->reg < 6 || user->reg > 7) 1841 && (user->reg < 2 || user->reg > 3)) 1842 goto fail; 1843 reg_n = user->reg; 1844 break; 1845 1846 case AYX_IND_N: 1847 if (user->type != A_IND_N) 1848 goto fail; 1849 if ((user->reg < 6 || user->reg > 7) 1850 && (user->reg < 2 || user->reg > 3)) 1851 goto fail; 1852 reg_n = user->reg; 1853 break; 1854 1855 case AYX_PMOD_N: 1856 if (user->type != AY_PMOD_N) 1857 goto fail; 1858 if ((user->reg < 6 || user->reg > 7) 1859 && (user->reg < 2 || user->reg > 3)) 1860 goto fail; 1861 reg_n = user->reg; 1862 break; 1863 1864 case DSP_REG_A_M: 1865 if (user->type != DSP_REG_N) 1866 goto fail; 1867 if (user->reg != A_A0_NUM 1868 && user->reg != A_A1_NUM) 1869 goto fail; 1870 reg_m = user->reg; 1871 break; 1872 1873 case DSP_REG_AX: 1874 if (user->type != DSP_REG_N) 1875 goto fail; 1876 switch (user->reg) 1877 { 1878 case A_A0_NUM: 1879 reg_x = 0; 1880 break; 1881 case A_A1_NUM: 1882 reg_x = 2; 1883 break; 1884 case A_X0_NUM: 1885 reg_x = 1; 1886 break; 1887 case A_X1_NUM: 1888 reg_x = 3; 1889 break; 1890 default: 1891 goto fail; 1892 } 1893 break; 1894 1895 case DSP_REG_XY: 1896 if (user->type != DSP_REG_N) 1897 goto fail; 1898 switch (user->reg) 1899 { 1900 case A_X0_NUM: 1901 reg_x = 0; 1902 break; 1903 case A_X1_NUM: 1904 reg_x = 2; 1905 break; 1906 case A_Y0_NUM: 1907 reg_x = 1; 1908 break; 1909 case A_Y1_NUM: 1910 reg_x = 3; 1911 break; 1912 default: 1913 goto fail; 1914 } 1915 break; 1916 1917 case DSP_REG_AY: 1918 if (user->type != DSP_REG_N) 1919 goto fail; 1920 switch (user->reg) 1921 { 1922 case A_A0_NUM: 1923 reg_y = 0; 1924 break; 1925 case A_A1_NUM: 1926 reg_y = 1; 1927 break; 1928 case A_Y0_NUM: 1929 reg_y = 2; 1930 break; 1931 case A_Y1_NUM: 1932 reg_y = 3; 1933 break; 1934 default: 1935 goto fail; 1936 } 1937 break; 1938 1939 case DSP_REG_YX: 1940 if (user->type != DSP_REG_N) 1941 goto fail; 1942 switch (user->reg) 1943 { 1944 case A_Y0_NUM: 1945 reg_y = 0; 1946 break; 1947 case A_Y1_NUM: 1948 reg_y = 1; 1949 break; 1950 case A_X0_NUM: 1951 reg_y = 2; 1952 break; 1953 case A_X1_NUM: 1954 reg_y = 3; 1955 break; 1956 default: 1957 goto fail; 1958 } 1959 break; 1960 1961 case DSP_REG_X: 1962 if (user->type != DSP_REG_N) 1963 goto fail; 1964 switch (user->reg) 1965 { 1966 case A_X0_NUM: 1967 reg_x = 0; 1968 break; 1969 case A_X1_NUM: 1970 reg_x = 1; 1971 break; 1972 case A_A0_NUM: 1973 reg_x = 2; 1974 break; 1975 case A_A1_NUM: 1976 reg_x = 3; 1977 break; 1978 default: 1979 goto fail; 1980 } 1981 break; 1982 1983 case DSP_REG_Y: 1984 if (user->type != DSP_REG_N) 1985 goto fail; 1986 switch (user->reg) 1987 { 1988 case A_Y0_NUM: 1989 reg_y = 0; 1990 break; 1991 case A_Y1_NUM: 1992 reg_y = 1; 1993 break; 1994 case A_M0_NUM: 1995 reg_y = 2; 1996 break; 1997 case A_M1_NUM: 1998 reg_y = 3; 1999 break; 2000 default: 2001 goto fail; 2002 } 2003 break; 2004 2005 case DSP_REG_E: 2006 if (user->type != DSP_REG_N) 2007 goto fail; 2008 switch (user->reg) 2009 { 2010 case A_X0_NUM: 2011 reg_efg = 0 << 10; 2012 break; 2013 case A_X1_NUM: 2014 reg_efg = 1 << 10; 2015 break; 2016 case A_Y0_NUM: 2017 reg_efg = 2 << 10; 2018 break; 2019 case A_A1_NUM: 2020 reg_efg = 3 << 10; 2021 break; 2022 default: 2023 goto fail; 2024 } 2025 break; 2026 2027 case DSP_REG_F: 2028 if (user->type != DSP_REG_N) 2029 goto fail; 2030 switch (user->reg) 2031 { 2032 case A_Y0_NUM: 2033 reg_efg |= 0 << 8; 2034 break; 2035 case A_Y1_NUM: 2036 reg_efg |= 1 << 8; 2037 break; 2038 case A_X0_NUM: 2039 reg_efg |= 2 << 8; 2040 break; 2041 case A_A1_NUM: 2042 reg_efg |= 3 << 8; 2043 break; 2044 default: 2045 goto fail; 2046 } 2047 break; 2048 2049 case DSP_REG_G: 2050 if (user->type != DSP_REG_N) 2051 goto fail; 2052 switch (user->reg) 2053 { 2054 case A_M0_NUM: 2055 reg_efg |= 0 << 2; 2056 break; 2057 case A_M1_NUM: 2058 reg_efg |= 1 << 2; 2059 break; 2060 case A_A0_NUM: 2061 reg_efg |= 2 << 2; 2062 break; 2063 case A_A1_NUM: 2064 reg_efg |= 3 << 2; 2065 break; 2066 default: 2067 goto fail; 2068 } 2069 break; 2070 2071 case A_A0: 2072 if (user->type != DSP_REG_N || user->reg != A_A0_NUM) 2073 goto fail; 2074 break; 2075 case A_X0: 2076 if (user->type != DSP_REG_N || user->reg != A_X0_NUM) 2077 goto fail; 2078 break; 2079 case A_X1: 2080 if (user->type != DSP_REG_N || user->reg != A_X1_NUM) 2081 goto fail; 2082 break; 2083 case A_Y0: 2084 if (user->type != DSP_REG_N || user->reg != A_Y0_NUM) 2085 goto fail; 2086 break; 2087 case A_Y1: 2088 if (user->type != DSP_REG_N || user->reg != A_Y1_NUM) 2089 goto fail; 2090 break; 2091 2092 case F_REG_M: 2093 case D_REG_M: 2094 case X_REG_M: 2095 case V_REG_M: 2096 case FPUL_M: 2097 case FPSCR_M: 2098 /* Opcode needs rn */ 2099 if (user->type != arg - F_REG_M + F_REG_N) 2100 goto fail; 2101 reg_m = user->reg; 2102 break; 2103 case DX_REG_M: 2104 if (user->type != D_REG_N && user->type != X_REG_N) 2105 goto fail; 2106 reg_m = user->reg; 2107 break; 2108 case XMTRX_M4: 2109 if (user->type != XMTRX_M4) 2110 goto fail; 2111 reg_m = 4; 2112 break; 2113 2114 default: 2115 printf (_("unhandled %d\n"), arg); 2116 goto fail; 2117 } 2118 } 2119 if ( !SH_MERGE_ARCH_SET_VALID (valid_arch, this_try->arch)) 2120 goto fail; 2121 valid_arch = SH_MERGE_ARCH_SET (valid_arch, this_try->arch); 2122 return this_try; 2123 fail: 2124 ; 2125 } 2126 2127 return 0; 2128} 2129 2130static void 2131insert (char *where, int how, int pcrel, sh_operand_info *op) 2132{ 2133 fix_new_exp (frag_now, 2134 where - frag_now->fr_literal, 2135 2, 2136 &op->immediate, 2137 pcrel, 2138 how); 2139} 2140 2141static void 2142insert4 (char * where, int how, int pcrel, sh_operand_info * op) 2143{ 2144 fix_new_exp (frag_now, 2145 where - frag_now->fr_literal, 2146 4, 2147 & op->immediate, 2148 pcrel, 2149 how); 2150} 2151static void 2152build_relax (sh_opcode_info *opcode, sh_operand_info *op) 2153{ 2154 int high_byte = target_big_endian ? 0 : 1; 2155 char *p; 2156 2157 if (opcode->arg[0] == A_BDISP8) 2158 { 2159 int what = (opcode->nibbles[1] & 4) ? COND_JUMP_DELAY : COND_JUMP; 2160 p = frag_var (rs_machine_dependent, 2161 md_relax_table[C (what, COND32)].rlx_length, 2162 md_relax_table[C (what, COND8)].rlx_length, 2163 C (what, 0), 2164 op->immediate.X_add_symbol, 2165 op->immediate.X_add_number, 2166 0); 2167 p[high_byte] = (opcode->nibbles[0] << 4) | (opcode->nibbles[1]); 2168 } 2169 else if (opcode->arg[0] == A_BDISP12) 2170 { 2171 p = frag_var (rs_machine_dependent, 2172 md_relax_table[C (UNCOND_JUMP, UNCOND32)].rlx_length, 2173 md_relax_table[C (UNCOND_JUMP, UNCOND12)].rlx_length, 2174 C (UNCOND_JUMP, 0), 2175 op->immediate.X_add_symbol, 2176 op->immediate.X_add_number, 2177 0); 2178 p[high_byte] = (opcode->nibbles[0] << 4); 2179 } 2180 2181} 2182 2183/* Insert ldrs & ldre with fancy relocations that relaxation can recognize. */ 2184 2185static char * 2186insert_loop_bounds (char *output, sh_operand_info *operand) 2187{ 2188 char *name; 2189 symbolS *end_sym; 2190 2191 /* Since the low byte of the opcode will be overwritten by the reloc, we 2192 can just stash the high byte into both bytes and ignore endianness. */ 2193 output[0] = 0x8c; 2194 output[1] = 0x8c; 2195 insert (output, BFD_RELOC_SH_LOOP_START, 1, operand); 2196 insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1); 2197 2198 if (sh_relax) 2199 { 2200 static int count = 0; 2201 2202 /* If the last loop insn is a two-byte-insn, it is in danger of being 2203 swapped with the insn after it. To prevent this, create a new 2204 symbol - complete with SH_LABEL reloc - after the last loop insn. 2205 If the last loop insn is four bytes long, the symbol will be 2206 right in the middle, but four byte insns are not swapped anyways. */ 2207 /* A REPEAT takes 6 bytes. The SH has a 32 bit address space. 2208 Hence a 9 digit number should be enough to count all REPEATs. */ 2209 name = alloca (11); 2210 sprintf (name, "_R%x", count++ & 0x3fffffff); 2211 end_sym = symbol_new (name, undefined_section, 0, &zero_address_frag); 2212 /* Make this a local symbol. */ 2213#ifdef OBJ_COFF 2214 SF_SET_LOCAL (end_sym); 2215#endif /* OBJ_COFF */ 2216 symbol_table_insert (end_sym); 2217 end_sym->sy_value = operand[1].immediate; 2218 end_sym->sy_value.X_add_number += 2; 2219 fix_new (frag_now, frag_now_fix (), 2, end_sym, 0, 1, BFD_RELOC_SH_LABEL); 2220 } 2221 2222 output = frag_more (2); 2223 output[0] = 0x8e; 2224 output[1] = 0x8e; 2225 insert (output, BFD_RELOC_SH_LOOP_START, 1, operand); 2226 insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1); 2227 2228 return frag_more (2); 2229} 2230 2231/* Now we know what sort of opcodes it is, let's build the bytes. */ 2232 2233static unsigned int 2234build_Mytes (sh_opcode_info *opcode, sh_operand_info *operand) 2235{ 2236 int index; 2237 char nbuf[8]; 2238 char *output; 2239 unsigned int size = 2; 2240 int low_byte = target_big_endian ? 1 : 0; 2241 int max_index = 4; 2242 2243 nbuf[0] = 0; 2244 nbuf[1] = 0; 2245 nbuf[2] = 0; 2246 nbuf[3] = 0; 2247 nbuf[4] = 0; 2248 nbuf[5] = 0; 2249 nbuf[6] = 0; 2250 nbuf[7] = 0; 2251 2252 if (SH_MERGE_ARCH_SET (opcode->arch, arch_op32)) 2253 { 2254 output = frag_more (4); 2255 size = 4; 2256 max_index = 8; 2257 } 2258 else 2259 output = frag_more (2); 2260 2261 for (index = 0; index < max_index; index++) 2262 { 2263 sh_nibble_type i = opcode->nibbles[index]; 2264 if (i < 16) 2265 { 2266 nbuf[index] = i; 2267 } 2268 else 2269 { 2270 switch (i) 2271 { 2272 case REG_N: 2273 case REG_N_D: 2274 nbuf[index] = reg_n; 2275 break; 2276 case REG_M: 2277 nbuf[index] = reg_m; 2278 break; 2279 case SDT_REG_N: 2280 if (reg_n < 2 || reg_n > 5) 2281 as_bad (_("Invalid register: 'r%d'"), reg_n); 2282 nbuf[index] = (reg_n & 3) | 4; 2283 break; 2284 case REG_NM: 2285 nbuf[index] = reg_n | (reg_m >> 2); 2286 break; 2287 case REG_B: 2288 nbuf[index] = reg_b | 0x08; 2289 break; 2290 case REG_N_B01: 2291 nbuf[index] = reg_n | 0x01; 2292 break; 2293 case IMM0_3s: 2294 nbuf[index] |= 0x08; 2295 case IMM0_3c: 2296 insert (output + low_byte, BFD_RELOC_SH_IMM3, 0, operand); 2297 break; 2298 case IMM0_3Us: 2299 nbuf[index] |= 0x80; 2300 case IMM0_3Uc: 2301 insert (output + low_byte, BFD_RELOC_SH_IMM3U, 0, operand); 2302 break; 2303 case DISP0_12: 2304 insert (output + 2, BFD_RELOC_SH_DISP12, 0, operand); 2305 break; 2306 case DISP0_12BY2: 2307 insert (output + 2, BFD_RELOC_SH_DISP12BY2, 0, operand); 2308 break; 2309 case DISP0_12BY4: 2310 insert (output + 2, BFD_RELOC_SH_DISP12BY4, 0, operand); 2311 break; 2312 case DISP0_12BY8: 2313 insert (output + 2, BFD_RELOC_SH_DISP12BY8, 0, operand); 2314 break; 2315 case DISP1_12: 2316 insert (output + 2, BFD_RELOC_SH_DISP12, 0, operand+1); 2317 break; 2318 case DISP1_12BY2: 2319 insert (output + 2, BFD_RELOC_SH_DISP12BY2, 0, operand+1); 2320 break; 2321 case DISP1_12BY4: 2322 insert (output + 2, BFD_RELOC_SH_DISP12BY4, 0, operand+1); 2323 break; 2324 case DISP1_12BY8: 2325 insert (output + 2, BFD_RELOC_SH_DISP12BY8, 0, operand+1); 2326 break; 2327 case IMM0_20_4: 2328 break; 2329 case IMM0_20: 2330 insert4 (output, BFD_RELOC_SH_DISP20, 0, operand); 2331 break; 2332 case IMM0_20BY8: 2333 insert4 (output, BFD_RELOC_SH_DISP20BY8, 0, operand); 2334 break; 2335 case IMM0_4BY4: 2336 insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand); 2337 break; 2338 case IMM0_4BY2: 2339 insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand); 2340 break; 2341 case IMM0_4: 2342 insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand); 2343 break; 2344 case IMM1_4BY4: 2345 insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand + 1); 2346 break; 2347 case IMM1_4BY2: 2348 insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand + 1); 2349 break; 2350 case IMM1_4: 2351 insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand + 1); 2352 break; 2353 case IMM0_8BY4: 2354 insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand); 2355 break; 2356 case IMM0_8BY2: 2357 insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand); 2358 break; 2359 case IMM0_8: 2360 insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand); 2361 break; 2362 case IMM1_8BY4: 2363 insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand + 1); 2364 break; 2365 case IMM1_8BY2: 2366 insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand + 1); 2367 break; 2368 case IMM1_8: 2369 insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand + 1); 2370 break; 2371 case PCRELIMM_8BY4: 2372 insert (output, BFD_RELOC_SH_PCRELIMM8BY4, 2373 operand->type != A_DISP_PC_ABS, operand); 2374 break; 2375 case PCRELIMM_8BY2: 2376 insert (output, BFD_RELOC_SH_PCRELIMM8BY2, 2377 operand->type != A_DISP_PC_ABS, operand); 2378 break; 2379 case REPEAT: 2380 output = insert_loop_bounds (output, operand); 2381 nbuf[index] = opcode->nibbles[3]; 2382 operand += 2; 2383 break; 2384 default: 2385 printf (_("failed for %d\n"), i); 2386 } 2387 } 2388 } 2389 if (!target_big_endian) 2390 { 2391 output[1] = (nbuf[0] << 4) | (nbuf[1]); 2392 output[0] = (nbuf[2] << 4) | (nbuf[3]); 2393 } 2394 else 2395 { 2396 output[0] = (nbuf[0] << 4) | (nbuf[1]); 2397 output[1] = (nbuf[2] << 4) | (nbuf[3]); 2398 } 2399 if (SH_MERGE_ARCH_SET (opcode->arch, arch_op32)) 2400 { 2401 if (!target_big_endian) 2402 { 2403 output[3] = (nbuf[4] << 4) | (nbuf[5]); 2404 output[2] = (nbuf[6] << 4) | (nbuf[7]); 2405 } 2406 else 2407 { 2408 output[2] = (nbuf[4] << 4) | (nbuf[5]); 2409 output[3] = (nbuf[6] << 4) | (nbuf[7]); 2410 } 2411 } 2412 return size; 2413} 2414 2415/* Find an opcode at the start of *STR_P in the hash table, and set 2416 *STR_P to the first character after the last one read. */ 2417 2418static sh_opcode_info * 2419find_cooked_opcode (char **str_p) 2420{ 2421 char *str = *str_p; 2422 unsigned char *op_start; 2423 unsigned char *op_end; 2424 char name[20]; 2425 int nlen = 0; 2426 2427 /* Drop leading whitespace. */ 2428 while (*str == ' ') 2429 str++; 2430 2431 /* Find the op code end. 2432 The pre-processor will eliminate whitespace in front of 2433 any '@' after the first argument; we may be called from 2434 assemble_ppi, so the opcode might be terminated by an '@'. */ 2435 for (op_start = op_end = (unsigned char *) str; 2436 *op_end 2437 && nlen < 20 2438 && !is_end_of_line[*op_end] && *op_end != ' ' && *op_end != '@'; 2439 op_end++) 2440 { 2441 unsigned char c = op_start[nlen]; 2442 2443 /* The machine independent code will convert CMP/EQ into cmp/EQ 2444 because it thinks the '/' is the end of the symbol. Moreover, 2445 all but the first sub-insn is a parallel processing insn won't 2446 be capitalized. Instead of hacking up the machine independent 2447 code, we just deal with it here. */ 2448 c = TOLOWER (c); 2449 name[nlen] = c; 2450 nlen++; 2451 } 2452 2453 name[nlen] = 0; 2454 *str_p = (char *) op_end; 2455 2456 if (nlen == 0) 2457 as_bad (_("can't find opcode ")); 2458 2459 return (sh_opcode_info *) hash_find (opcode_hash_control, name); 2460} 2461 2462/* Assemble a parallel processing insn. */ 2463#define DDT_BASE 0xf000 /* Base value for double data transfer insns */ 2464 2465static unsigned int 2466assemble_ppi (char *op_end, sh_opcode_info *opcode) 2467{ 2468 int movx = 0; 2469 int movy = 0; 2470 int cond = 0; 2471 int field_b = 0; 2472 char *output; 2473 int move_code; 2474 unsigned int size; 2475 2476 for (;;) 2477 { 2478 sh_operand_info operand[3]; 2479 2480 /* Some insn ignore one or more register fields, e.g. psts machl,a0. 2481 Make sure we encode a defined insn pattern. */ 2482 reg_x = 0; 2483 reg_y = 0; 2484 reg_n = 0; 2485 2486 if (opcode->arg[0] != A_END) 2487 op_end = get_operands (opcode, op_end, operand); 2488 try_another_opcode: 2489 opcode = get_specific (opcode, operand); 2490 if (opcode == 0) 2491 { 2492 /* Couldn't find an opcode which matched the operands. */ 2493 char *where = frag_more (2); 2494 size = 2; 2495 2496 where[0] = 0x0; 2497 where[1] = 0x0; 2498 as_bad (_("invalid operands for opcode")); 2499 return size; 2500 } 2501 2502 if (opcode->nibbles[0] != PPI) 2503 as_bad (_("insn can't be combined with parallel processing insn")); 2504 2505 switch (opcode->nibbles[1]) 2506 { 2507 2508 case NOPX: 2509 if (movx) 2510 as_bad (_("multiple movx specifications")); 2511 movx = DDT_BASE; 2512 break; 2513 case NOPY: 2514 if (movy) 2515 as_bad (_("multiple movy specifications")); 2516 movy = DDT_BASE; 2517 break; 2518 2519 case MOVX_NOPY: 2520 if (movx) 2521 as_bad (_("multiple movx specifications")); 2522 if ((reg_n < 4 || reg_n > 5) 2523 && (reg_n < 0 || reg_n > 1)) 2524 as_bad (_("invalid movx address register")); 2525 if (movy && movy != DDT_BASE) 2526 as_bad (_("insn cannot be combined with non-nopy")); 2527 movx = ((((reg_n & 1) != 0) << 9) 2528 + (((reg_n & 4) == 0) << 8) 2529 + (reg_x << 6) 2530 + (opcode->nibbles[2] << 4) 2531 + opcode->nibbles[3] 2532 + DDT_BASE); 2533 break; 2534 2535 case MOVY_NOPX: 2536 if (movy) 2537 as_bad (_("multiple movy specifications")); 2538 if ((reg_n < 6 || reg_n > 7) 2539 && (reg_n < 2 || reg_n > 3)) 2540 as_bad (_("invalid movy address register")); 2541 if (movx && movx != DDT_BASE) 2542 as_bad (_("insn cannot be combined with non-nopx")); 2543 movy = ((((reg_n & 1) != 0) << 8) 2544 + (((reg_n & 4) == 0) << 9) 2545 + (reg_y << 6) 2546 + (opcode->nibbles[2] << 4) 2547 + opcode->nibbles[3] 2548 + DDT_BASE); 2549 break; 2550 2551 case MOVX: 2552 if (movx) 2553 as_bad (_("multiple movx specifications")); 2554 if (movy & 0x2ac) 2555 as_bad (_("previous movy requires nopx")); 2556 if (reg_n < 4 || reg_n > 5) 2557 as_bad (_("invalid movx address register")); 2558 if (opcode->nibbles[2] & 8) 2559 { 2560 if (reg_m == A_A1_NUM) 2561 movx = 1 << 7; 2562 else if (reg_m != A_A0_NUM) 2563 as_bad (_("invalid movx dsp register")); 2564 } 2565 else 2566 { 2567 if (reg_x > 1) 2568 as_bad (_("invalid movx dsp register")); 2569 movx = reg_x << 7; 2570 } 2571 movx += ((reg_n - 4) << 9) + (opcode->nibbles[2] << 2) + DDT_BASE; 2572 break; 2573 2574 case MOVY: 2575 if (movy) 2576 as_bad (_("multiple movy specifications")); 2577 if (movx & 0x153) 2578 as_bad (_("previous movx requires nopy")); 2579 if (opcode->nibbles[2] & 8) 2580 { 2581 /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode, 2582 so add 8 more. */ 2583 movy = 8; 2584 if (reg_m == A_A1_NUM) 2585 movy += 1 << 6; 2586 else if (reg_m != A_A0_NUM) 2587 as_bad (_("invalid movy dsp register")); 2588 } 2589 else 2590 { 2591 if (reg_y > 1) 2592 as_bad (_("invalid movy dsp register")); 2593 movy = reg_y << 6; 2594 } 2595 if (reg_n < 6 || reg_n > 7) 2596 as_bad (_("invalid movy address register")); 2597 movy += ((reg_n - 6) << 8) + opcode->nibbles[2] + DDT_BASE; 2598 break; 2599 2600 case PSH: 2601 if (operand[0].immediate.X_op != O_constant) 2602 as_bad (_("dsp immediate shift value not constant")); 2603 field_b = ((opcode->nibbles[2] << 12) 2604 | (operand[0].immediate.X_add_number & 127) << 4 2605 | reg_n); 2606 break; 2607 case PPI3NC: 2608 if (cond) 2609 { 2610 opcode++; 2611 goto try_another_opcode; 2612 } 2613 /* Fall through. */ 2614 case PPI3: 2615 if (field_b) 2616 as_bad (_("multiple parallel processing specifications")); 2617 field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8) 2618 + (reg_x << 6) + (reg_y << 4) + reg_n); 2619 switch (opcode->nibbles[4]) 2620 { 2621 case HEX_0: 2622 case HEX_XX00: 2623 case HEX_00YY: 2624 break; 2625 case HEX_1: 2626 case HEX_4: 2627 field_b += opcode->nibbles[4] << 4; 2628 break; 2629 default: 2630 abort (); 2631 } 2632 break; 2633 case PDC: 2634 if (cond) 2635 as_bad (_("multiple condition specifications")); 2636 cond = opcode->nibbles[2] << 8; 2637 if (*op_end) 2638 goto skip_cond_check; 2639 break; 2640 case PPIC: 2641 if (field_b) 2642 as_bad (_("multiple parallel processing specifications")); 2643 field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8) 2644 + cond + (reg_x << 6) + (reg_y << 4) + reg_n); 2645 cond = 0; 2646 switch (opcode->nibbles[4]) 2647 { 2648 case HEX_0: 2649 case HEX_XX00: 2650 case HEX_00YY: 2651 break; 2652 case HEX_1: 2653 case HEX_4: 2654 field_b += opcode->nibbles[4] << 4; 2655 break; 2656 default: 2657 abort (); 2658 } 2659 break; 2660 case PMUL: 2661 if (field_b) 2662 { 2663 if ((field_b & 0xef00) == 0xa100) 2664 field_b -= 0x8100; 2665 /* pclr Dz pmuls Se,Sf,Dg */ 2666 else if ((field_b & 0xff00) == 0x8d00 2667 && (SH_MERGE_ARCH_SET_VALID (valid_arch, arch_sh4al_dsp_up))) 2668 { 2669 valid_arch = SH_MERGE_ARCH_SET (valid_arch, arch_sh4al_dsp_up); 2670 field_b -= 0x8cf0; 2671 } 2672 else 2673 as_bad (_("insn cannot be combined with pmuls")); 2674 switch (field_b & 0xf) 2675 { 2676 case A_X0_NUM: 2677 field_b += 0 - A_X0_NUM; 2678 break; 2679 case A_Y0_NUM: 2680 field_b += 1 - A_Y0_NUM; 2681 break; 2682 case A_A0_NUM: 2683 field_b += 2 - A_A0_NUM; 2684 break; 2685 case A_A1_NUM: 2686 field_b += 3 - A_A1_NUM; 2687 break; 2688 default: 2689 as_bad (_("bad combined pmuls output operand")); 2690 } 2691 /* Generate warning if the destination register for padd / psub 2692 and pmuls is the same ( only for A0 or A1 ). 2693 If the last nibble is 1010 then A0 is used in both 2694 padd / psub and pmuls. If it is 1111 then A1 is used 2695 as destination register in both padd / psub and pmuls. */ 2696 2697 if ((((field_b | reg_efg) & 0x000F) == 0x000A) 2698 || (((field_b | reg_efg) & 0x000F) == 0x000F)) 2699 as_warn (_("destination register is same for parallel insns")); 2700 } 2701 field_b += 0x4000 + reg_efg; 2702 break; 2703 default: 2704 abort (); 2705 } 2706 if (cond) 2707 { 2708 as_bad (_("condition not followed by conditionalizable insn")); 2709 cond = 0; 2710 } 2711 if (! *op_end) 2712 break; 2713 skip_cond_check: 2714 opcode = find_cooked_opcode (&op_end); 2715 if (opcode == NULL) 2716 { 2717 (as_bad 2718 (_("unrecognized characters at end of parallel processing insn"))); 2719 break; 2720 } 2721 } 2722 2723 move_code = movx | movy; 2724 if (field_b) 2725 { 2726 /* Parallel processing insn. */ 2727 unsigned long ppi_code = (movx | movy | 0xf800) << 16 | field_b; 2728 2729 output = frag_more (4); 2730 size = 4; 2731 if (! target_big_endian) 2732 { 2733 output[3] = ppi_code >> 8; 2734 output[2] = ppi_code; 2735 } 2736 else 2737 { 2738 output[2] = ppi_code >> 8; 2739 output[3] = ppi_code; 2740 } 2741 move_code |= 0xf800; 2742 } 2743 else 2744 { 2745 /* Just a double data transfer. */ 2746 output = frag_more (2); 2747 size = 2; 2748 } 2749 if (! target_big_endian) 2750 { 2751 output[1] = move_code >> 8; 2752 output[0] = move_code; 2753 } 2754 else 2755 { 2756 output[0] = move_code >> 8; 2757 output[1] = move_code; 2758 } 2759 return size; 2760} 2761 2762/* This is the guts of the machine-dependent assembler. STR points to a 2763 machine dependent instruction. This function is supposed to emit 2764 the frags/bytes it assembles to. */ 2765 2766void 2767md_assemble (char *str) 2768{ 2769 char *op_end; 2770 sh_operand_info operand[3]; 2771 sh_opcode_info *opcode; 2772 unsigned int size = 0; 2773 char *initial_str = str; 2774 2775#ifdef HAVE_SH64 2776 if (sh64_isa_mode == sh64_isa_shmedia) 2777 { 2778 shmedia_md_assemble (str); 2779 return; 2780 } 2781 else 2782 { 2783 /* If we've seen pseudo-directives, make sure any emitted data or 2784 frags are marked as data. */ 2785 if (!seen_insn) 2786 { 2787 sh64_update_contents_mark (TRUE); 2788 sh64_set_contents_type (CRT_SH5_ISA16); 2789 } 2790 2791 seen_insn = TRUE; 2792 } 2793#endif /* HAVE_SH64 */ 2794 2795 opcode = find_cooked_opcode (&str); 2796 op_end = str; 2797 2798 if (opcode == NULL) 2799 { 2800 /* The opcode is not in the hash table. 2801 This means we definately have an assembly failure, 2802 but the instruction may be valid in another CPU variant. 2803 In this case emit something better than 'unknown opcode'. 2804 Search the full table in sh-opc.h to check. */ 2805 2806 char *name = initial_str; 2807 int name_length = 0; 2808 const sh_opcode_info *op; 2809 int found = 0; 2810 2811 /* identify opcode in string */ 2812 while (ISSPACE (*name)) 2813 { 2814 name++; 2815 } 2816 while (!ISSPACE (name[name_length])) 2817 { 2818 name_length++; 2819 } 2820 2821 /* search for opcode in full list */ 2822 for (op = sh_table; op->name; op++) 2823 { 2824 if (strncasecmp (op->name, name, name_length) == 0 2825 && op->name[name_length] == '\0') 2826 { 2827 found = 1; 2828 break; 2829 } 2830 } 2831 2832 if ( found ) 2833 { 2834 as_bad (_("opcode not valid for this cpu variant")); 2835 } 2836 else 2837 { 2838 as_bad (_("unknown opcode")); 2839 } 2840 return; 2841 } 2842 2843 if (sh_relax 2844 && ! seg_info (now_seg)->tc_segment_info_data.in_code) 2845 { 2846 /* Output a CODE reloc to tell the linker that the following 2847 bytes are instructions, not data. */ 2848 fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0, 2849 BFD_RELOC_SH_CODE); 2850 seg_info (now_seg)->tc_segment_info_data.in_code = 1; 2851 } 2852 2853 if (opcode->nibbles[0] == PPI) 2854 { 2855 size = assemble_ppi (op_end, opcode); 2856 } 2857 else 2858 { 2859 if (opcode->arg[0] == A_BDISP12 2860 || opcode->arg[0] == A_BDISP8) 2861 { 2862 /* Since we skip get_specific here, we have to check & update 2863 valid_arch now. */ 2864 if (SH_MERGE_ARCH_SET_VALID (valid_arch, opcode->arch)) 2865 valid_arch = SH_MERGE_ARCH_SET (valid_arch, opcode->arch); 2866 else 2867 as_bad (_("Delayed branches not available on SH1")); 2868 parse_exp (op_end + 1, &operand[0]); 2869 build_relax (opcode, &operand[0]); 2870 } 2871 else 2872 { 2873 if (opcode->arg[0] == A_END) 2874 { 2875 /* Ignore trailing whitespace. If there is any, it has already 2876 been compressed to a single space. */ 2877 if (*op_end == ' ') 2878 op_end++; 2879 } 2880 else 2881 { 2882 op_end = get_operands (opcode, op_end, operand); 2883 } 2884 opcode = get_specific (opcode, operand); 2885 2886 if (opcode == 0) 2887 { 2888 /* Couldn't find an opcode which matched the operands. */ 2889 char *where = frag_more (2); 2890 size = 2; 2891 2892 where[0] = 0x0; 2893 where[1] = 0x0; 2894 as_bad (_("invalid operands for opcode")); 2895 } 2896 else 2897 { 2898 if (*op_end) 2899 as_bad (_("excess operands: '%s'"), op_end); 2900 2901 size = build_Mytes (opcode, operand); 2902 } 2903 } 2904 } 2905 2906 dwarf2_emit_insn (size); 2907} 2908 2909/* This routine is called each time a label definition is seen. It 2910 emits a BFD_RELOC_SH_LABEL reloc if necessary. */ 2911 2912void 2913sh_frob_label (symbolS *sym) 2914{ 2915 static fragS *last_label_frag; 2916 static int last_label_offset; 2917 2918 if (sh_relax 2919 && seg_info (now_seg)->tc_segment_info_data.in_code) 2920 { 2921 int offset; 2922 2923 offset = frag_now_fix (); 2924 if (frag_now != last_label_frag 2925 || offset != last_label_offset) 2926 { 2927 fix_new (frag_now, offset, 2, &abs_symbol, 0, 0, BFD_RELOC_SH_LABEL); 2928 last_label_frag = frag_now; 2929 last_label_offset = offset; 2930 } 2931 } 2932 2933 dwarf2_emit_label (sym); 2934} 2935 2936/* This routine is called when the assembler is about to output some 2937 data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */ 2938 2939void 2940sh_flush_pending_output (void) 2941{ 2942 if (sh_relax 2943 && seg_info (now_seg)->tc_segment_info_data.in_code) 2944 { 2945 fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0, 2946 BFD_RELOC_SH_DATA); 2947 seg_info (now_seg)->tc_segment_info_data.in_code = 0; 2948 } 2949} 2950 2951symbolS * 2952md_undefined_symbol (char *name ATTRIBUTE_UNUSED) 2953{ 2954 return 0; 2955} 2956 2957/* Various routines to kill one day. */ 2958/* Equal to MAX_PRECISION in atof-ieee.c. */ 2959#define MAX_LITTLENUMS 6 2960 2961/* Turn a string in input_line_pointer into a floating point constant 2962 of type TYPE, and store the appropriate bytes in *LITP. The number 2963 of LITTLENUMS emitted is stored in *SIZEP . An error message is 2964 returned, or NULL on OK. */ 2965 2966char * 2967md_atof (int type, char *litP, int *sizeP) 2968{ 2969 int prec; 2970 LITTLENUM_TYPE words[4]; 2971 char *t; 2972 int i; 2973 2974 switch (type) 2975 { 2976 case 'f': 2977 prec = 2; 2978 break; 2979 2980 case 'd': 2981 prec = 4; 2982 break; 2983 2984 default: 2985 *sizeP = 0; 2986 return _("bad call to md_atof"); 2987 } 2988 2989 t = atof_ieee (input_line_pointer, type, words); 2990 if (t) 2991 input_line_pointer = t; 2992 2993 *sizeP = prec * 2; 2994 2995 if (! target_big_endian) 2996 { 2997 for (i = prec - 1; i >= 0; i--) 2998 { 2999 md_number_to_chars (litP, (valueT) words[i], 2); 3000 litP += 2; 3001 } 3002 } 3003 else 3004 { 3005 for (i = 0; i < prec; i++) 3006 { 3007 md_number_to_chars (litP, (valueT) words[i], 2); 3008 litP += 2; 3009 } 3010 } 3011 3012 return NULL; 3013} 3014 3015/* Handle the .uses pseudo-op. This pseudo-op is used just before a 3016 call instruction. It refers to a label of the instruction which 3017 loads the register which the call uses. We use it to generate a 3018 special reloc for the linker. */ 3019 3020static void 3021s_uses (int ignore ATTRIBUTE_UNUSED) 3022{ 3023 expressionS ex; 3024 3025 if (! sh_relax) 3026 as_warn (_(".uses pseudo-op seen when not relaxing")); 3027 3028 expression (&ex); 3029 3030 if (ex.X_op != O_symbol || ex.X_add_number != 0) 3031 { 3032 as_bad (_("bad .uses format")); 3033 ignore_rest_of_line (); 3034 return; 3035 } 3036 3037 fix_new_exp (frag_now, frag_now_fix (), 2, &ex, 1, BFD_RELOC_SH_USES); 3038 3039 demand_empty_rest_of_line (); 3040} 3041 3042enum options 3043{ 3044 OPTION_RELAX = OPTION_MD_BASE, 3045 OPTION_BIG, 3046 OPTION_LITTLE, 3047 OPTION_SMALL, 3048 OPTION_DSP, 3049 OPTION_ISA, 3050 OPTION_RENESAS, 3051 OPTION_ALLOW_REG_PREFIX, 3052#ifdef HAVE_SH64 3053 OPTION_ABI, 3054 OPTION_NO_MIX, 3055 OPTION_SHCOMPACT_CONST_CRANGE, 3056 OPTION_NO_EXPAND, 3057 OPTION_PT32, 3058#endif 3059 OPTION_DUMMY /* Not used. This is just here to make it easy to add and subtract options from this enum. */ 3060}; 3061 3062const char *md_shortopts = ""; 3063struct option md_longopts[] = 3064{ 3065 {"relax", no_argument, NULL, OPTION_RELAX}, 3066 {"big", no_argument, NULL, OPTION_BIG}, 3067 {"little", no_argument, NULL, OPTION_LITTLE}, 3068 {"small", no_argument, NULL, OPTION_SMALL}, 3069 {"dsp", no_argument, NULL, OPTION_DSP}, 3070 {"isa", required_argument, NULL, OPTION_ISA}, 3071 {"renesas", no_argument, NULL, OPTION_RENESAS}, 3072 {"allow-reg-prefix", no_argument, NULL, OPTION_ALLOW_REG_PREFIX}, 3073 3074#ifdef HAVE_SH64 3075 {"abi", required_argument, NULL, OPTION_ABI}, 3076 {"no-mix", no_argument, NULL, OPTION_NO_MIX}, 3077 {"shcompact-const-crange", no_argument, NULL, OPTION_SHCOMPACT_CONST_CRANGE}, 3078 {"no-expand", no_argument, NULL, OPTION_NO_EXPAND}, 3079 {"expand-pt32", no_argument, NULL, OPTION_PT32}, 3080#endif /* HAVE_SH64 */ 3081 3082 {NULL, no_argument, NULL, 0} 3083}; 3084size_t md_longopts_size = sizeof (md_longopts); 3085 3086int 3087md_parse_option (int c, char *arg ATTRIBUTE_UNUSED) 3088{ 3089 switch (c) 3090 { 3091 case OPTION_RELAX: 3092 sh_relax = 1; 3093 break; 3094 3095 case OPTION_BIG: 3096 target_big_endian = 1; 3097 break; 3098 3099 case OPTION_LITTLE: 3100 target_big_endian = 0; 3101 break; 3102 3103 case OPTION_SMALL: 3104 sh_small = 1; 3105 break; 3106 3107 case OPTION_DSP: 3108 preset_target_arch = arch_sh_up & ~(arch_sh_sp_fpu|arch_sh_dp_fpu); 3109 break; 3110 3111 case OPTION_RENESAS: 3112 dont_adjust_reloc_32 = 1; 3113 break; 3114 3115 case OPTION_ALLOW_REG_PREFIX: 3116 allow_dollar_register_prefix = 1; 3117 break; 3118 3119 case OPTION_ISA: 3120 if (strcasecmp (arg, "dsp") == 0) 3121 preset_target_arch = arch_sh_up & ~(arch_sh_sp_fpu|arch_sh_dp_fpu); 3122 else if (strcasecmp (arg, "fp") == 0) 3123 preset_target_arch = arch_sh_up & ~arch_sh_has_dsp; 3124 else if (strcasecmp (arg, "any") == 0) 3125 preset_target_arch = arch_sh_up; 3126#ifdef HAVE_SH64 3127 else if (strcasecmp (arg, "shmedia") == 0) 3128 { 3129 if (sh64_isa_mode == sh64_isa_shcompact) 3130 as_bad (_("Invalid combination: --isa=SHcompact with --isa=SHmedia")); 3131 sh64_isa_mode = sh64_isa_shmedia; 3132 } 3133 else if (strcasecmp (arg, "shcompact") == 0) 3134 { 3135 if (sh64_isa_mode == sh64_isa_shmedia) 3136 as_bad (_("Invalid combination: --isa=SHmedia with --isa=SHcompact")); 3137 if (sh64_abi == sh64_abi_64) 3138 as_bad (_("Invalid combination: --abi=64 with --isa=SHcompact")); 3139 sh64_isa_mode = sh64_isa_shcompact; 3140 } 3141#endif /* HAVE_SH64 */ 3142 else 3143 { 3144 extern const bfd_arch_info_type bfd_sh_arch; 3145 bfd_arch_info_type const *bfd_arch = &bfd_sh_arch; 3146 3147 preset_target_arch = 0; 3148 for (; bfd_arch; bfd_arch=bfd_arch->next) 3149 { 3150 int len = strlen(bfd_arch->printable_name); 3151 3152 if (bfd_arch->mach == bfd_mach_sh5) 3153 continue; 3154 3155 if (strncasecmp (bfd_arch->printable_name, arg, len) != 0) 3156 continue; 3157 3158 if (arg[len] == '\0') 3159 preset_target_arch = 3160 sh_get_arch_from_bfd_mach (bfd_arch->mach); 3161 else if (strcasecmp(&arg[len], "-up") == 0) 3162 preset_target_arch = 3163 sh_get_arch_up_from_bfd_mach (bfd_arch->mach); 3164 else 3165 continue; 3166 break; 3167 } 3168 3169 if (!preset_target_arch) 3170 as_bad ("Invalid argument to --isa option: %s", arg); 3171 } 3172 break; 3173 3174#ifdef HAVE_SH64 3175 case OPTION_ABI: 3176 if (strcmp (arg, "32") == 0) 3177 { 3178 if (sh64_abi == sh64_abi_64) 3179 as_bad (_("Invalid combination: --abi=32 with --abi=64")); 3180 sh64_abi = sh64_abi_32; 3181 } 3182 else if (strcmp (arg, "64") == 0) 3183 { 3184 if (sh64_abi == sh64_abi_32) 3185 as_bad (_("Invalid combination: --abi=64 with --abi=32")); 3186 if (sh64_isa_mode == sh64_isa_shcompact) 3187 as_bad (_("Invalid combination: --isa=SHcompact with --abi=64")); 3188 sh64_abi = sh64_abi_64; 3189 } 3190 else 3191 as_bad ("Invalid argument to --abi option: %s", arg); 3192 break; 3193 3194 case OPTION_NO_MIX: 3195 sh64_mix = FALSE; 3196 break; 3197 3198 case OPTION_SHCOMPACT_CONST_CRANGE: 3199 sh64_shcompact_const_crange = TRUE; 3200 break; 3201 3202 case OPTION_NO_EXPAND: 3203 sh64_expand = FALSE; 3204 break; 3205 3206 case OPTION_PT32: 3207 sh64_pt32 = TRUE; 3208 break; 3209#endif /* HAVE_SH64 */ 3210 3211 default: 3212 return 0; 3213 } 3214 3215 return 1; 3216} 3217 3218void 3219md_show_usage (FILE *stream) 3220{ 3221 fprintf (stream, _("\ 3222SH options:\n\ 3223--little generate little endian code\n\ 3224--big generate big endian code\n\ 3225--relax alter jump instructions for long displacements\n\ 3226--renesas disable optimization with section symbol for\n\ 3227 compatibility with Renesas assembler.\n\ 3228--small align sections to 4 byte boundaries, not 16\n\ 3229--dsp enable sh-dsp insns, and disable floating-point ISAs.\n\ 3230--allow-reg-prefix allow '$' as a register name prefix.\n\ 3231--isa=[any use most appropriate isa\n\ 3232 | dsp same as '-dsp'\n\ 3233 | fp")); 3234 { 3235 extern const bfd_arch_info_type bfd_sh_arch; 3236 bfd_arch_info_type const *bfd_arch = &bfd_sh_arch; 3237 3238 for (; bfd_arch; bfd_arch=bfd_arch->next) 3239 if (bfd_arch->mach != bfd_mach_sh5) 3240 { 3241 fprintf (stream, "\n | %s", bfd_arch->printable_name); 3242 fprintf (stream, "\n | %s-up", bfd_arch->printable_name); 3243 } 3244 } 3245 fprintf (stream, "]\n"); 3246#ifdef HAVE_SH64 3247 fprintf (stream, _("\ 3248--isa=[shmedia set as the default instruction set for SH64\n\ 3249 | SHmedia\n\ 3250 | shcompact\n\ 3251 | SHcompact]\n")); 3252 fprintf (stream, _("\ 3253--abi=[32|64] set size of expanded SHmedia operands and object\n\ 3254 file type\n\ 3255--shcompact-const-crange emit code-range descriptors for constants in\n\ 3256 SHcompact code sections\n\ 3257--no-mix disallow SHmedia code in the same section as\n\ 3258 constants and SHcompact code\n\ 3259--no-expand do not expand MOVI, PT, PTA or PTB instructions\n\ 3260--expand-pt32 with -abi=64, expand PT, PTA and PTB instructions\n\ 3261 to 32 bits only\n")); 3262#endif /* HAVE_SH64 */ 3263} 3264 3265/* This struct is used to pass arguments to sh_count_relocs through 3266 bfd_map_over_sections. */ 3267 3268struct sh_count_relocs 3269{ 3270 /* Symbol we are looking for. */ 3271 symbolS *sym; 3272 /* Count of relocs found. */ 3273 int count; 3274}; 3275 3276/* Count the number of fixups in a section which refer to a particular 3277 symbol. This is called via bfd_map_over_sections. */ 3278 3279static void 3280sh_count_relocs (bfd *abfd ATTRIBUTE_UNUSED, segT sec, void *data) 3281{ 3282 struct sh_count_relocs *info = (struct sh_count_relocs *) data; 3283 segment_info_type *seginfo; 3284 symbolS *sym; 3285 fixS *fix; 3286 3287 seginfo = seg_info (sec); 3288 if (seginfo == NULL) 3289 return; 3290 3291 sym = info->sym; 3292 for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next) 3293 { 3294 if (fix->fx_addsy == sym) 3295 { 3296 ++info->count; 3297 fix->fx_tcbit = 1; 3298 } 3299 } 3300} 3301 3302/* Handle the count relocs for a particular section. 3303 This is called via bfd_map_over_sections. */ 3304 3305static void 3306sh_frob_section (bfd *abfd ATTRIBUTE_UNUSED, segT sec, 3307 void *ignore ATTRIBUTE_UNUSED) 3308{ 3309 segment_info_type *seginfo; 3310 fixS *fix; 3311 3312 seginfo = seg_info (sec); 3313 if (seginfo == NULL) 3314 return; 3315 3316 for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next) 3317 { 3318 symbolS *sym; 3319 bfd_vma val; 3320 fixS *fscan; 3321 struct sh_count_relocs info; 3322 3323 if (fix->fx_r_type != BFD_RELOC_SH_USES) 3324 continue; 3325 3326 /* The BFD_RELOC_SH_USES reloc should refer to a defined local 3327 symbol in the same section. */ 3328 sym = fix->fx_addsy; 3329 if (sym == NULL 3330 || fix->fx_subsy != NULL 3331 || fix->fx_addnumber != 0 3332 || S_GET_SEGMENT (sym) != sec 3333 || S_IS_EXTERNAL (sym)) 3334 { 3335 as_warn_where (fix->fx_file, fix->fx_line, 3336 _(".uses does not refer to a local symbol in the same section")); 3337 continue; 3338 } 3339 3340 /* Look through the fixups again, this time looking for one 3341 at the same location as sym. */ 3342 val = S_GET_VALUE (sym); 3343 for (fscan = seginfo->fix_root; 3344 fscan != NULL; 3345 fscan = fscan->fx_next) 3346 if (val == fscan->fx_frag->fr_address + fscan->fx_where 3347 && fscan->fx_r_type != BFD_RELOC_SH_ALIGN 3348 && fscan->fx_r_type != BFD_RELOC_SH_CODE 3349 && fscan->fx_r_type != BFD_RELOC_SH_DATA 3350 && fscan->fx_r_type != BFD_RELOC_SH_LABEL) 3351 break; 3352 if (fscan == NULL) 3353 { 3354 as_warn_where (fix->fx_file, fix->fx_line, 3355 _("can't find fixup pointed to by .uses")); 3356 continue; 3357 } 3358 3359 if (fscan->fx_tcbit) 3360 { 3361 /* We've already done this one. */ 3362 continue; 3363 } 3364 3365 /* The variable fscan should also be a fixup to a local symbol 3366 in the same section. */ 3367 sym = fscan->fx_addsy; 3368 if (sym == NULL 3369 || fscan->fx_subsy != NULL 3370 || fscan->fx_addnumber != 0 3371 || S_GET_SEGMENT (sym) != sec 3372 || S_IS_EXTERNAL (sym)) 3373 { 3374 as_warn_where (fix->fx_file, fix->fx_line, 3375 _(".uses target does not refer to a local symbol in the same section")); 3376 continue; 3377 } 3378 3379 /* Now we look through all the fixups of all the sections, 3380 counting the number of times we find a reference to sym. */ 3381 info.sym = sym; 3382 info.count = 0; 3383 bfd_map_over_sections (stdoutput, sh_count_relocs, &info); 3384 3385 if (info.count < 1) 3386 abort (); 3387 3388 /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym. 3389 We have already adjusted the value of sym to include the 3390 fragment address, so we undo that adjustment here. */ 3391 subseg_change (sec, 0); 3392 fix_new (fscan->fx_frag, 3393 S_GET_VALUE (sym) - fscan->fx_frag->fr_address, 3394 4, &abs_symbol, info.count, 0, BFD_RELOC_SH_COUNT); 3395 } 3396} 3397 3398/* This function is called after the symbol table has been completed, 3399 but before the relocs or section contents have been written out. 3400 If we have seen any .uses pseudo-ops, they point to an instruction 3401 which loads a register with the address of a function. We look 3402 through the fixups to find where the function address is being 3403 loaded from. We then generate a COUNT reloc giving the number of 3404 times that function address is referred to. The linker uses this 3405 information when doing relaxing, to decide when it can eliminate 3406 the stored function address entirely. */ 3407 3408void 3409sh_frob_file (void) 3410{ 3411#ifdef HAVE_SH64 3412 shmedia_frob_file_before_adjust (); 3413#endif 3414 3415 if (! sh_relax) 3416 return; 3417 3418 bfd_map_over_sections (stdoutput, sh_frob_section, NULL); 3419} 3420 3421/* Called after relaxing. Set the correct sizes of the fragments, and 3422 create relocs so that md_apply_fix will fill in the correct values. */ 3423 3424void 3425md_convert_frag (bfd *headers ATTRIBUTE_UNUSED, segT seg, fragS *fragP) 3426{ 3427 int donerelax = 0; 3428 3429 switch (fragP->fr_subtype) 3430 { 3431 case C (COND_JUMP, COND8): 3432 case C (COND_JUMP_DELAY, COND8): 3433 subseg_change (seg, 0); 3434 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset, 3435 1, BFD_RELOC_SH_PCDISP8BY2); 3436 fragP->fr_fix += 2; 3437 fragP->fr_var = 0; 3438 break; 3439 3440 case C (UNCOND_JUMP, UNCOND12): 3441 subseg_change (seg, 0); 3442 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset, 3443 1, BFD_RELOC_SH_PCDISP12BY2); 3444 fragP->fr_fix += 2; 3445 fragP->fr_var = 0; 3446 break; 3447 3448 case C (UNCOND_JUMP, UNCOND32): 3449 case C (UNCOND_JUMP, UNDEF_WORD_DISP): 3450 if (fragP->fr_symbol == NULL) 3451 as_bad_where (fragP->fr_file, fragP->fr_line, 3452 _("displacement overflows 12-bit field")); 3453 else if (S_IS_DEFINED (fragP->fr_symbol)) 3454 as_bad_where (fragP->fr_file, fragP->fr_line, 3455 _("displacement to defined symbol %s overflows 12-bit field"), 3456 S_GET_NAME (fragP->fr_symbol)); 3457 else 3458 as_bad_where (fragP->fr_file, fragP->fr_line, 3459 _("displacement to undefined symbol %s overflows 12-bit field"), 3460 S_GET_NAME (fragP->fr_symbol)); 3461 /* Stabilize this frag, so we don't trip an assert. */ 3462 fragP->fr_fix += fragP->fr_var; 3463 fragP->fr_var = 0; 3464 break; 3465 3466 case C (COND_JUMP, COND12): 3467 case C (COND_JUMP_DELAY, COND12): 3468 /* A bcond won't fit, so turn it into a b!cond; bra disp; nop. */ 3469 /* I found that a relax failure for gcc.c-torture/execute/930628-1.c 3470 was due to gas incorrectly relaxing an out-of-range conditional 3471 branch with delay slot. It turned: 3472 bf.s L6 (slot mov.l r12,@(44,r0)) 3473 into: 3474 34752c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6) 347630: 00 09 nop 347732: 10 cb mov.l r12,@(44,r0) 3478 Therefore, branches with delay slots have to be handled 3479 differently from ones without delay slots. */ 3480 { 3481 unsigned char *buffer = 3482 (unsigned char *) (fragP->fr_fix + fragP->fr_literal); 3483 int highbyte = target_big_endian ? 0 : 1; 3484 int lowbyte = target_big_endian ? 1 : 0; 3485 int delay = fragP->fr_subtype == C (COND_JUMP_DELAY, COND12); 3486 3487 /* Toggle the true/false bit of the bcond. */ 3488 buffer[highbyte] ^= 0x2; 3489 3490 /* If this is a delayed branch, we may not put the bra in the 3491 slot. So we change it to a non-delayed branch, like that: 3492 b! cond slot_label; bra disp; slot_label: slot_insn 3493 ??? We should try if swapping the conditional branch and 3494 its delay-slot insn already makes the branch reach. */ 3495 3496 /* Build a relocation to six / four bytes farther on. */ 3497 subseg_change (seg, 0); 3498 fix_new (fragP, fragP->fr_fix, 2, section_symbol (seg), 3499 fragP->fr_address + fragP->fr_fix + (delay ? 4 : 6), 3500 1, BFD_RELOC_SH_PCDISP8BY2); 3501 3502 /* Set up a jump instruction. */ 3503 buffer[highbyte + 2] = 0xa0; 3504 buffer[lowbyte + 2] = 0; 3505 fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol, 3506 fragP->fr_offset, 1, BFD_RELOC_SH_PCDISP12BY2); 3507 3508 if (delay) 3509 { 3510 buffer[highbyte] &= ~0x4; /* Removes delay slot from branch. */ 3511 fragP->fr_fix += 4; 3512 } 3513 else 3514 { 3515 /* Fill in a NOP instruction. */ 3516 buffer[highbyte + 4] = 0x0; 3517 buffer[lowbyte + 4] = 0x9; 3518 3519 fragP->fr_fix += 6; 3520 } 3521 fragP->fr_var = 0; 3522 donerelax = 1; 3523 } 3524 break; 3525 3526 case C (COND_JUMP, COND32): 3527 case C (COND_JUMP_DELAY, COND32): 3528 case C (COND_JUMP, UNDEF_WORD_DISP): 3529 case C (COND_JUMP_DELAY, UNDEF_WORD_DISP): 3530 if (fragP->fr_symbol == NULL) 3531 as_bad_where (fragP->fr_file, fragP->fr_line, 3532 _("displacement overflows 8-bit field")); 3533 else if (S_IS_DEFINED (fragP->fr_symbol)) 3534 as_bad_where (fragP->fr_file, fragP->fr_line, 3535 _("displacement to defined symbol %s overflows 8-bit field"), 3536 S_GET_NAME (fragP->fr_symbol)); 3537 else 3538 as_bad_where (fragP->fr_file, fragP->fr_line, 3539 _("displacement to undefined symbol %s overflows 8-bit field "), 3540 S_GET_NAME (fragP->fr_symbol)); 3541 /* Stabilize this frag, so we don't trip an assert. */ 3542 fragP->fr_fix += fragP->fr_var; 3543 fragP->fr_var = 0; 3544 break; 3545 3546 default: 3547#ifdef HAVE_SH64 3548 shmedia_md_convert_frag (headers, seg, fragP, TRUE); 3549#else 3550 abort (); 3551#endif 3552 } 3553 3554 if (donerelax && !sh_relax) 3555 as_warn_where (fragP->fr_file, fragP->fr_line, 3556 _("overflow in branch to %s; converted into longer instruction sequence"), 3557 (fragP->fr_symbol != NULL 3558 ? S_GET_NAME (fragP->fr_symbol) 3559 : "")); 3560} 3561 3562valueT 3563md_section_align (segT seg ATTRIBUTE_UNUSED, valueT size) 3564{ 3565#ifdef OBJ_ELF 3566 return size; 3567#else /* ! OBJ_ELF */ 3568 return ((size + (1 << bfd_get_section_alignment (stdoutput, seg)) - 1) 3569 & (-1 << bfd_get_section_alignment (stdoutput, seg))); 3570#endif /* ! OBJ_ELF */ 3571} 3572 3573/* This static variable is set by s_uacons to tell sh_cons_align that 3574 the expression does not need to be aligned. */ 3575 3576static int sh_no_align_cons = 0; 3577 3578/* This handles the unaligned space allocation pseudo-ops, such as 3579 .uaword. .uaword is just like .word, but the value does not need 3580 to be aligned. */ 3581 3582static void 3583s_uacons (int bytes) 3584{ 3585 /* Tell sh_cons_align not to align this value. */ 3586 sh_no_align_cons = 1; 3587 cons (bytes); 3588} 3589 3590/* If a .word, et. al., pseud-op is seen, warn if the value is not 3591 aligned correctly. Note that this can cause warnings to be issued 3592 when assembling initialized structured which were declared with the 3593 packed attribute. FIXME: Perhaps we should require an option to 3594 enable this warning? */ 3595 3596void 3597sh_cons_align (int nbytes) 3598{ 3599 int nalign; 3600 char *p; 3601 3602 if (sh_no_align_cons) 3603 { 3604 /* This is an unaligned pseudo-op. */ 3605 sh_no_align_cons = 0; 3606 return; 3607 } 3608 3609 nalign = 0; 3610 while ((nbytes & 1) == 0) 3611 { 3612 ++nalign; 3613 nbytes >>= 1; 3614 } 3615 3616 if (nalign == 0) 3617 return; 3618 3619 if (now_seg == absolute_section) 3620 { 3621 if ((abs_section_offset & ((1 << nalign) - 1)) != 0) 3622 as_warn (_("misaligned data")); 3623 return; 3624 } 3625 3626 p = frag_var (rs_align_test, 1, 1, (relax_substateT) 0, 3627 (symbolS *) NULL, (offsetT) nalign, (char *) NULL); 3628 3629 record_alignment (now_seg, nalign); 3630} 3631 3632/* When relaxing, we need to output a reloc for any .align directive 3633 that requests alignment to a four byte boundary or larger. This is 3634 also where we check for misaligned data. */ 3635 3636void 3637sh_handle_align (fragS *frag) 3638{ 3639 int bytes = frag->fr_next->fr_address - frag->fr_address - frag->fr_fix; 3640 3641 if (frag->fr_type == rs_align_code) 3642 { 3643 static const unsigned char big_nop_pattern[] = { 0x00, 0x09 }; 3644 static const unsigned char little_nop_pattern[] = { 0x09, 0x00 }; 3645 3646 char *p = frag->fr_literal + frag->fr_fix; 3647 3648 if (bytes & 1) 3649 { 3650 *p++ = 0; 3651 bytes--; 3652 frag->fr_fix += 1; 3653 } 3654 3655 if (target_big_endian) 3656 { 3657 memcpy (p, big_nop_pattern, sizeof big_nop_pattern); 3658 frag->fr_var = sizeof big_nop_pattern; 3659 } 3660 else 3661 { 3662 memcpy (p, little_nop_pattern, sizeof little_nop_pattern); 3663 frag->fr_var = sizeof little_nop_pattern; 3664 } 3665 } 3666 else if (frag->fr_type == rs_align_test) 3667 { 3668 if (bytes != 0) 3669 as_warn_where (frag->fr_file, frag->fr_line, _("misaligned data")); 3670 } 3671 3672 if (sh_relax 3673 && (frag->fr_type == rs_align 3674 || frag->fr_type == rs_align_code) 3675 && frag->fr_address + frag->fr_fix > 0 3676 && frag->fr_offset > 1 3677 && now_seg != bss_section) 3678 fix_new (frag, frag->fr_fix, 2, &abs_symbol, frag->fr_offset, 0, 3679 BFD_RELOC_SH_ALIGN); 3680} 3681 3682/* See whether the relocation should be resolved locally. */ 3683 3684static bfd_boolean 3685sh_local_pcrel (fixS *fix) 3686{ 3687 return (! sh_relax 3688 && (fix->fx_r_type == BFD_RELOC_SH_PCDISP8BY2 3689 || fix->fx_r_type == BFD_RELOC_SH_PCDISP12BY2 3690 || fix->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY2 3691 || fix->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY4 3692 || fix->fx_r_type == BFD_RELOC_8_PCREL 3693 || fix->fx_r_type == BFD_RELOC_SH_SWITCH16 3694 || fix->fx_r_type == BFD_RELOC_SH_SWITCH32)); 3695} 3696 3697/* See whether we need to force a relocation into the output file. 3698 This is used to force out switch and PC relative relocations when 3699 relaxing. */ 3700 3701int 3702sh_force_relocation (fixS *fix) 3703{ 3704 /* These relocations can't make it into a DSO, so no use forcing 3705 them for global symbols. */ 3706 if (sh_local_pcrel (fix)) 3707 return 0; 3708 3709 /* Make sure some relocations get emitted. */ 3710 if (fix->fx_r_type == BFD_RELOC_SH_LOOP_START 3711 || fix->fx_r_type == BFD_RELOC_SH_LOOP_END 3712 || fix->fx_r_type == BFD_RELOC_SH_TLS_GD_32 3713 || fix->fx_r_type == BFD_RELOC_SH_TLS_LD_32 3714 || fix->fx_r_type == BFD_RELOC_SH_TLS_IE_32 3715 || fix->fx_r_type == BFD_RELOC_SH_TLS_LDO_32 3716 || fix->fx_r_type == BFD_RELOC_SH_TLS_LE_32 3717 || generic_force_reloc (fix)) 3718 return 1; 3719 3720 if (! sh_relax) 3721 return 0; 3722 3723 return (fix->fx_pcrel 3724 || SWITCH_TABLE (fix) 3725 || fix->fx_r_type == BFD_RELOC_SH_COUNT 3726 || fix->fx_r_type == BFD_RELOC_SH_ALIGN 3727 || fix->fx_r_type == BFD_RELOC_SH_CODE 3728 || fix->fx_r_type == BFD_RELOC_SH_DATA 3729#ifdef HAVE_SH64 3730 || fix->fx_r_type == BFD_RELOC_SH_SHMEDIA_CODE 3731#endif 3732 || fix->fx_r_type == BFD_RELOC_SH_LABEL); 3733} 3734 3735#ifdef OBJ_ELF 3736bfd_boolean 3737sh_fix_adjustable (fixS *fixP) 3738{ 3739 if (fixP->fx_r_type == BFD_RELOC_32_PLT_PCREL 3740 || fixP->fx_r_type == BFD_RELOC_32_GOT_PCREL 3741 || fixP->fx_r_type == BFD_RELOC_SH_GOTPC 3742 || ((fixP->fx_r_type == BFD_RELOC_32) && dont_adjust_reloc_32) 3743 || fixP->fx_r_type == BFD_RELOC_RVA) 3744 return 0; 3745 3746 /* We need the symbol name for the VTABLE entries */ 3747 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT 3748 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY) 3749 return 0; 3750 3751 return 1; 3752} 3753 3754void 3755sh_elf_final_processing (void) 3756{ 3757 int val; 3758 3759 /* Set file-specific flags to indicate if this code needs 3760 a processor with the sh-dsp / sh2e ISA to execute. */ 3761#ifdef HAVE_SH64 3762 /* SH5 and above don't know about the valid_arch arch_sh* bits defined 3763 in sh-opc.h, so check SH64 mode before checking valid_arch. */ 3764 if (sh64_isa_mode != sh64_isa_unspecified) 3765 val = EF_SH5; 3766 else 3767#elif defined TARGET_SYMBIAN 3768 if (1) 3769 { 3770 extern int sh_symbian_find_elf_flags (unsigned int); 3771 3772 val = sh_symbian_find_elf_flags (valid_arch); 3773 } 3774 else 3775#endif /* HAVE_SH64 */ 3776 val = sh_find_elf_flags (valid_arch); 3777 3778 elf_elfheader (stdoutput)->e_flags &= ~EF_SH_MACH_MASK; 3779 elf_elfheader (stdoutput)->e_flags |= val; 3780} 3781#endif 3782 3783/* Apply a fixup to the object file. */ 3784 3785void 3786md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED) 3787{ 3788 char *buf = fixP->fx_where + fixP->fx_frag->fr_literal; 3789 int lowbyte = target_big_endian ? 1 : 0; 3790 int highbyte = target_big_endian ? 0 : 1; 3791 long val = (long) *valP; 3792 long max, min; 3793 int shift; 3794 3795 /* A difference between two symbols, the second of which is in the 3796 current section, is transformed in a PC-relative relocation to 3797 the other symbol. We have to adjust the relocation type here. */ 3798 if (fixP->fx_pcrel) 3799 { 3800 switch (fixP->fx_r_type) 3801 { 3802 default: 3803 break; 3804 3805 case BFD_RELOC_32: 3806 fixP->fx_r_type = BFD_RELOC_32_PCREL; 3807 break; 3808 3809 /* Currently, we only support 32-bit PCREL relocations. 3810 We'd need a new reloc type to handle 16_PCREL, and 3811 8_PCREL is already taken for R_SH_SWITCH8, which 3812 apparently does something completely different than what 3813 we need. FIXME. */ 3814 case BFD_RELOC_16: 3815 bfd_set_error (bfd_error_bad_value); 3816 return; 3817 3818 case BFD_RELOC_8: 3819 bfd_set_error (bfd_error_bad_value); 3820 return; 3821 } 3822 } 3823 3824 /* The function adjust_reloc_syms won't convert a reloc against a weak 3825 symbol into a reloc against a section, but bfd_install_relocation 3826 will screw up if the symbol is defined, so we have to adjust val here 3827 to avoid the screw up later. 3828 3829 For ordinary relocs, this does not happen for ELF, since for ELF, 3830 bfd_install_relocation uses the "special function" field of the 3831 howto, and does not execute the code that needs to be undone, as long 3832 as the special function does not return bfd_reloc_continue. 3833 It can happen for GOT- and PLT-type relocs the way they are 3834 described in elf32-sh.c as they use bfd_elf_generic_reloc, but it 3835 doesn't matter here since those relocs don't use VAL; see below. */ 3836 if (OUTPUT_FLAVOR != bfd_target_elf_flavour 3837 && fixP->fx_addsy != NULL 3838 && S_IS_WEAK (fixP->fx_addsy)) 3839 val -= S_GET_VALUE (fixP->fx_addsy); 3840 3841 if (SWITCH_TABLE (fixP)) 3842 val -= S_GET_VALUE (fixP->fx_subsy); 3843 3844 max = min = 0; 3845 shift = 0; 3846 switch (fixP->fx_r_type) 3847 { 3848 case BFD_RELOC_SH_IMM3: 3849 max = 0x7; 3850 * buf = (* buf & 0xf8) | (val & 0x7); 3851 break; 3852 case BFD_RELOC_SH_IMM3U: 3853 max = 0x7; 3854 * buf = (* buf & 0x8f) | ((val & 0x7) << 4); 3855 break; 3856 case BFD_RELOC_SH_DISP12: 3857 max = 0xfff; 3858 buf[lowbyte] = val & 0xff; 3859 buf[highbyte] |= (val >> 8) & 0x0f; 3860 break; 3861 case BFD_RELOC_SH_DISP12BY2: 3862 max = 0xfff; 3863 shift = 1; 3864 buf[lowbyte] = (val >> 1) & 0xff; 3865 buf[highbyte] |= (val >> 9) & 0x0f; 3866 break; 3867 case BFD_RELOC_SH_DISP12BY4: 3868 max = 0xfff; 3869 shift = 2; 3870 buf[lowbyte] = (val >> 2) & 0xff; 3871 buf[highbyte] |= (val >> 10) & 0x0f; 3872 break; 3873 case BFD_RELOC_SH_DISP12BY8: 3874 max = 0xfff; 3875 shift = 3; 3876 buf[lowbyte] = (val >> 3) & 0xff; 3877 buf[highbyte] |= (val >> 11) & 0x0f; 3878 break; 3879 case BFD_RELOC_SH_DISP20: 3880 if (! target_big_endian) 3881 abort(); 3882 max = 0x7ffff; 3883 min = -0x80000; 3884 buf[1] = (buf[1] & 0x0f) | ((val >> 12) & 0xf0); 3885 buf[2] = (val >> 8) & 0xff; 3886 buf[3] = val & 0xff; 3887 break; 3888 case BFD_RELOC_SH_DISP20BY8: 3889 if (!target_big_endian) 3890 abort(); 3891 max = 0x7ffff; 3892 min = -0x80000; 3893 shift = 8; 3894 buf[1] = (buf[1] & 0x0f) | ((val >> 20) & 0xf0); 3895 buf[2] = (val >> 16) & 0xff; 3896 buf[3] = (val >> 8) & 0xff; 3897 break; 3898 3899 case BFD_RELOC_SH_IMM4: 3900 max = 0xf; 3901 *buf = (*buf & 0xf0) | (val & 0xf); 3902 break; 3903 3904 case BFD_RELOC_SH_IMM4BY2: 3905 max = 0xf; 3906 shift = 1; 3907 *buf = (*buf & 0xf0) | ((val >> 1) & 0xf); 3908 break; 3909 3910 case BFD_RELOC_SH_IMM4BY4: 3911 max = 0xf; 3912 shift = 2; 3913 *buf = (*buf & 0xf0) | ((val >> 2) & 0xf); 3914 break; 3915 3916 case BFD_RELOC_SH_IMM8BY2: 3917 max = 0xff; 3918 shift = 1; 3919 *buf = val >> 1; 3920 break; 3921 3922 case BFD_RELOC_SH_IMM8BY4: 3923 max = 0xff; 3924 shift = 2; 3925 *buf = val >> 2; 3926 break; 3927 3928 case BFD_RELOC_8: 3929 case BFD_RELOC_SH_IMM8: 3930 /* Sometimes the 8 bit value is sign extended (e.g., add) and 3931 sometimes it is not (e.g., and). We permit any 8 bit value. 3932 Note that adding further restrictions may invalidate 3933 reasonable looking assembly code, such as ``and -0x1,r0''. */ 3934 max = 0xff; 3935 min = -0xff; 3936 *buf++ = val; 3937 break; 3938 3939 case BFD_RELOC_SH_PCRELIMM8BY4: 3940 /* The lower two bits of the PC are cleared before the 3941 displacement is added in. We can assume that the destination 3942 is on a 4 byte boundary. If this instruction is also on a 4 3943 byte boundary, then we want 3944 (target - here) / 4 3945 and target - here is a multiple of 4. 3946 Otherwise, we are on a 2 byte boundary, and we want 3947 (target - (here - 2)) / 4 3948 and target - here is not a multiple of 4. Computing 3949 (target - (here - 2)) / 4 == (target - here + 2) / 4 3950 works for both cases, since in the first case the addition of 3951 2 will be removed by the division. target - here is in the 3952 variable val. */ 3953 val = (val + 2) / 4; 3954 if (val & ~0xff) 3955 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); 3956 buf[lowbyte] = val; 3957 break; 3958 3959 case BFD_RELOC_SH_PCRELIMM8BY2: 3960 val /= 2; 3961 if (val & ~0xff) 3962 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); 3963 buf[lowbyte] = val; 3964 break; 3965 3966 case BFD_RELOC_SH_PCDISP8BY2: 3967 val /= 2; 3968 if (val < -0x80 || val > 0x7f) 3969 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); 3970 buf[lowbyte] = val; 3971 break; 3972 3973 case BFD_RELOC_SH_PCDISP12BY2: 3974 val /= 2; 3975 if (val < -0x800 || val > 0x7ff) 3976 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); 3977 buf[lowbyte] = val & 0xff; 3978 buf[highbyte] |= (val >> 8) & 0xf; 3979 break; 3980 3981 case BFD_RELOC_32: 3982 case BFD_RELOC_32_PCREL: 3983 md_number_to_chars (buf, val, 4); 3984 break; 3985 3986 case BFD_RELOC_16: 3987 md_number_to_chars (buf, val, 2); 3988 break; 3989 3990 case BFD_RELOC_SH_USES: 3991 /* Pass the value into sh_reloc(). */ 3992 fixP->fx_addnumber = val; 3993 break; 3994 3995 case BFD_RELOC_SH_COUNT: 3996 case BFD_RELOC_SH_ALIGN: 3997 case BFD_RELOC_SH_CODE: 3998 case BFD_RELOC_SH_DATA: 3999 case BFD_RELOC_SH_LABEL: 4000 /* Nothing to do here. */ 4001 break; 4002 4003 case BFD_RELOC_SH_LOOP_START: 4004 case BFD_RELOC_SH_LOOP_END: 4005 4006 case BFD_RELOC_VTABLE_INHERIT: 4007 case BFD_RELOC_VTABLE_ENTRY: 4008 fixP->fx_done = 0; 4009 return; 4010 4011#ifdef OBJ_ELF 4012 case BFD_RELOC_32_PLT_PCREL: 4013 /* Make the jump instruction point to the address of the operand. At 4014 runtime we merely add the offset to the actual PLT entry. */ 4015 * valP = 0xfffffffc; 4016 val = fixP->fx_offset; 4017 if (fixP->fx_subsy) 4018 val -= S_GET_VALUE (fixP->fx_subsy); 4019 fixP->fx_addnumber = val; 4020 md_number_to_chars (buf, val, 4); 4021 break; 4022 4023 case BFD_RELOC_SH_GOTPC: 4024 /* This is tough to explain. We end up with this one if we have 4025 operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]". 4026 The goal here is to obtain the absolute address of the GOT, 4027 and it is strongly preferable from a performance point of 4028 view to avoid using a runtime relocation for this. There are 4029 cases where you have something like: 4030 4031 .long _GLOBAL_OFFSET_TABLE_+[.-.L66] 4032 4033 and here no correction would be required. Internally in the 4034 assembler we treat operands of this form as not being pcrel 4035 since the '.' is explicitly mentioned, and I wonder whether 4036 it would simplify matters to do it this way. Who knows. In 4037 earlier versions of the PIC patches, the pcrel_adjust field 4038 was used to store the correction, but since the expression is 4039 not pcrel, I felt it would be confusing to do it this way. */ 4040 * valP -= 1; 4041 md_number_to_chars (buf, val, 4); 4042 break; 4043 4044 case BFD_RELOC_SH_TLS_GD_32: 4045 case BFD_RELOC_SH_TLS_LD_32: 4046 case BFD_RELOC_SH_TLS_IE_32: 4047 S_SET_THREAD_LOCAL (fixP->fx_addsy); 4048 /* Fallthrough */ 4049 case BFD_RELOC_32_GOT_PCREL: 4050 case BFD_RELOC_SH_GOTPLT32: 4051 * valP = 0; /* Fully resolved at runtime. No addend. */ 4052 md_number_to_chars (buf, 0, 4); 4053 break; 4054 4055 case BFD_RELOC_SH_TLS_LDO_32: 4056 case BFD_RELOC_SH_TLS_LE_32: 4057 S_SET_THREAD_LOCAL (fixP->fx_addsy); 4058 /* Fallthrough */ 4059 case BFD_RELOC_32_GOTOFF: 4060 md_number_to_chars (buf, val, 4); 4061 break; 4062#endif 4063 4064 default: 4065#ifdef HAVE_SH64 4066 shmedia_md_apply_fix (fixP, valP); 4067 return; 4068#else 4069 abort (); 4070#endif 4071 } 4072 4073 if (shift != 0) 4074 { 4075 if ((val & ((1 << shift) - 1)) != 0) 4076 as_bad_where (fixP->fx_file, fixP->fx_line, _("misaligned offset")); 4077 if (val >= 0) 4078 val >>= shift; 4079 else 4080 val = ((val >> shift) 4081 | ((long) -1 & ~ ((long) -1 >> shift))); 4082 } 4083 if (max != 0 && (val < min || val > max)) 4084 as_bad_where (fixP->fx_file, fixP->fx_line, _("offset out of range")); 4085 4086 if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0) 4087 fixP->fx_done = 1; 4088} 4089 4090/* Called just before address relaxation. Return the length 4091 by which a fragment must grow to reach it's destination. */ 4092 4093int 4094md_estimate_size_before_relax (fragS *fragP, segT segment_type) 4095{ 4096 int what; 4097 4098 switch (fragP->fr_subtype) 4099 { 4100 default: 4101#ifdef HAVE_SH64 4102 return shmedia_md_estimate_size_before_relax (fragP, segment_type); 4103#else 4104 abort (); 4105#endif 4106 4107 4108 case C (UNCOND_JUMP, UNDEF_DISP): 4109 /* Used to be a branch to somewhere which was unknown. */ 4110 if (!fragP->fr_symbol) 4111 { 4112 fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12); 4113 } 4114 else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type) 4115 { 4116 fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12); 4117 } 4118 else 4119 { 4120 fragP->fr_subtype = C (UNCOND_JUMP, UNDEF_WORD_DISP); 4121 } 4122 break; 4123 4124 case C (COND_JUMP, UNDEF_DISP): 4125 case C (COND_JUMP_DELAY, UNDEF_DISP): 4126 what = GET_WHAT (fragP->fr_subtype); 4127 /* Used to be a branch to somewhere which was unknown. */ 4128 if (fragP->fr_symbol 4129 && S_GET_SEGMENT (fragP->fr_symbol) == segment_type) 4130 { 4131 /* Got a symbol and it's defined in this segment, become byte 4132 sized - maybe it will fix up. */ 4133 fragP->fr_subtype = C (what, COND8); 4134 } 4135 else if (fragP->fr_symbol) 4136 { 4137 /* Its got a segment, but its not ours, so it will always be long. */ 4138 fragP->fr_subtype = C (what, UNDEF_WORD_DISP); 4139 } 4140 else 4141 { 4142 /* We know the abs value. */ 4143 fragP->fr_subtype = C (what, COND8); 4144 } 4145 break; 4146 4147 case C (UNCOND_JUMP, UNCOND12): 4148 case C (UNCOND_JUMP, UNCOND32): 4149 case C (UNCOND_JUMP, UNDEF_WORD_DISP): 4150 case C (COND_JUMP, COND8): 4151 case C (COND_JUMP, COND12): 4152 case C (COND_JUMP, COND32): 4153 case C (COND_JUMP, UNDEF_WORD_DISP): 4154 case C (COND_JUMP_DELAY, COND8): 4155 case C (COND_JUMP_DELAY, COND12): 4156 case C (COND_JUMP_DELAY, COND32): 4157 case C (COND_JUMP_DELAY, UNDEF_WORD_DISP): 4158 /* When relaxing a section for the second time, we don't need to 4159 do anything besides return the current size. */ 4160 break; 4161 } 4162 4163 fragP->fr_var = md_relax_table[fragP->fr_subtype].rlx_length; 4164 return fragP->fr_var; 4165} 4166 4167/* Put number into target byte order. */ 4168 4169void 4170md_number_to_chars (char *ptr, valueT use, int nbytes) 4171{ 4172#ifdef HAVE_SH64 4173 /* We might need to set the contents type to data. */ 4174 sh64_flag_output (); 4175#endif 4176 4177 if (! target_big_endian) 4178 number_to_chars_littleendian (ptr, use, nbytes); 4179 else 4180 number_to_chars_bigendian (ptr, use, nbytes); 4181} 4182 4183/* This version is used in obj-coff.c eg. for the sh-hms target. */ 4184 4185long 4186md_pcrel_from (fixS *fixP) 4187{ 4188 return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address + 2; 4189} 4190 4191long 4192md_pcrel_from_section (fixS *fixP, segT sec) 4193{ 4194 if (! sh_local_pcrel (fixP) 4195 && fixP->fx_addsy != (symbolS *) NULL 4196 && (generic_force_reloc (fixP) 4197 || S_GET_SEGMENT (fixP->fx_addsy) != sec)) 4198 { 4199 /* The symbol is undefined (or is defined but not in this section, 4200 or we're not sure about it being the final definition). Let the 4201 linker figure it out. We need to adjust the subtraction of a 4202 symbol to the position of the relocated data, though. */ 4203 return fixP->fx_subsy ? fixP->fx_where + fixP->fx_frag->fr_address : 0; 4204 } 4205 4206 return md_pcrel_from (fixP); 4207} 4208 4209/* Create a reloc. */ 4210 4211arelent * 4212tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp) 4213{ 4214 arelent *rel; 4215 bfd_reloc_code_real_type r_type; 4216 4217 rel = (arelent *) xmalloc (sizeof (arelent)); 4218 rel->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); 4219 *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); 4220 rel->address = fixp->fx_frag->fr_address + fixp->fx_where; 4221 4222 r_type = fixp->fx_r_type; 4223 4224 if (SWITCH_TABLE (fixp)) 4225 { 4226 *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_subsy); 4227 rel->addend = 0; 4228 if (r_type == BFD_RELOC_16) 4229 r_type = BFD_RELOC_SH_SWITCH16; 4230 else if (r_type == BFD_RELOC_8) 4231 r_type = BFD_RELOC_8_PCREL; 4232 else if (r_type == BFD_RELOC_32) 4233 r_type = BFD_RELOC_SH_SWITCH32; 4234 else 4235 abort (); 4236 } 4237 else if (r_type == BFD_RELOC_SH_USES) 4238 rel->addend = fixp->fx_addnumber; 4239 else if (r_type == BFD_RELOC_SH_COUNT) 4240 rel->addend = fixp->fx_offset; 4241 else if (r_type == BFD_RELOC_SH_ALIGN) 4242 rel->addend = fixp->fx_offset; 4243 else if (r_type == BFD_RELOC_VTABLE_INHERIT 4244 || r_type == BFD_RELOC_VTABLE_ENTRY) 4245 rel->addend = fixp->fx_offset; 4246 else if (r_type == BFD_RELOC_SH_LOOP_START 4247 || r_type == BFD_RELOC_SH_LOOP_END) 4248 rel->addend = fixp->fx_offset; 4249 else if (r_type == BFD_RELOC_SH_LABEL && fixp->fx_pcrel) 4250 { 4251 rel->addend = 0; 4252 rel->address = rel->addend = fixp->fx_offset; 4253 } 4254#ifdef HAVE_SH64 4255 else if (shmedia_init_reloc (rel, fixp)) 4256 ; 4257#endif 4258 else if (fixp->fx_pcrel) 4259 rel->addend = fixp->fx_addnumber; 4260 else if (r_type == BFD_RELOC_32 || r_type == BFD_RELOC_32_GOTOFF) 4261 rel->addend = fixp->fx_addnumber; 4262 else 4263 rel->addend = 0; 4264 4265 rel->howto = bfd_reloc_type_lookup (stdoutput, r_type); 4266 4267 if (rel->howto == NULL) 4268 { 4269 as_bad_where (fixp->fx_file, fixp->fx_line, 4270 _("Cannot represent relocation type %s"), 4271 bfd_get_reloc_code_name (r_type)); 4272 /* Set howto to a garbage value so that we can keep going. */ 4273 rel->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32); 4274 assert (rel->howto != NULL); 4275 } 4276#ifdef OBJ_ELF 4277 else if (rel->howto->type == R_SH_IND12W) 4278 rel->addend += fixp->fx_offset - 4; 4279#endif 4280 4281 return rel; 4282} 4283 4284#ifdef OBJ_ELF 4285inline static char * 4286sh_end_of_match (char *cont, char *what) 4287{ 4288 int len = strlen (what); 4289 4290 if (strncasecmp (cont, what, strlen (what)) == 0 4291 && ! is_part_of_name (cont[len])) 4292 return cont + len; 4293 4294 return NULL; 4295} 4296 4297int 4298sh_parse_name (char const *name, 4299 expressionS *exprP, 4300 enum expr_mode mode, 4301 char *nextcharP) 4302{ 4303 char *next = input_line_pointer; 4304 char *next_end; 4305 int reloc_type; 4306 segT segment; 4307 4308 exprP->X_op_symbol = NULL; 4309 4310 if (strcmp (name, GLOBAL_OFFSET_TABLE_NAME) == 0) 4311 { 4312 if (! GOT_symbol) 4313 GOT_symbol = symbol_find_or_make (name); 4314 4315 exprP->X_add_symbol = GOT_symbol; 4316 no_suffix: 4317 /* If we have an absolute symbol or a reg, then we know its 4318 value now. */ 4319 segment = S_GET_SEGMENT (exprP->X_add_symbol); 4320 if (mode != expr_defer && segment == absolute_section) 4321 { 4322 exprP->X_op = O_constant; 4323 exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol); 4324 exprP->X_add_symbol = NULL; 4325 } 4326 else if (mode != expr_defer && segment == reg_section) 4327 { 4328 exprP->X_op = O_register; 4329 exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol); 4330 exprP->X_add_symbol = NULL; 4331 } 4332 else 4333 { 4334 exprP->X_op = O_symbol; 4335 exprP->X_add_number = 0; 4336 } 4337 4338 return 1; 4339 } 4340 4341 exprP->X_add_symbol = symbol_find_or_make (name); 4342 4343 if (*nextcharP != '@') 4344 goto no_suffix; 4345 else if ((next_end = sh_end_of_match (next + 1, "GOTOFF"))) 4346 reloc_type = BFD_RELOC_32_GOTOFF; 4347 else if ((next_end = sh_end_of_match (next + 1, "GOTPLT"))) 4348 reloc_type = BFD_RELOC_SH_GOTPLT32; 4349 else if ((next_end = sh_end_of_match (next + 1, "GOT"))) 4350 reloc_type = BFD_RELOC_32_GOT_PCREL; 4351 else if ((next_end = sh_end_of_match (next + 1, "PLT"))) 4352 reloc_type = BFD_RELOC_32_PLT_PCREL; 4353 else if ((next_end = sh_end_of_match (next + 1, "TLSGD"))) 4354 reloc_type = BFD_RELOC_SH_TLS_GD_32; 4355 else if ((next_end = sh_end_of_match (next + 1, "TLSLDM"))) 4356 reloc_type = BFD_RELOC_SH_TLS_LD_32; 4357 else if ((next_end = sh_end_of_match (next + 1, "GOTTPOFF"))) 4358 reloc_type = BFD_RELOC_SH_TLS_IE_32; 4359 else if ((next_end = sh_end_of_match (next + 1, "TPOFF"))) 4360 reloc_type = BFD_RELOC_SH_TLS_LE_32; 4361 else if ((next_end = sh_end_of_match (next + 1, "DTPOFF"))) 4362 reloc_type = BFD_RELOC_SH_TLS_LDO_32; 4363 else 4364 goto no_suffix; 4365 4366 *input_line_pointer = *nextcharP; 4367 input_line_pointer = next_end; 4368 *nextcharP = *input_line_pointer; 4369 *input_line_pointer = '\0'; 4370 4371 exprP->X_op = O_PIC_reloc; 4372 exprP->X_add_number = 0; 4373 exprP->X_md = reloc_type; 4374 4375 return 1; 4376} 4377 4378void 4379sh_cfi_frame_initial_instructions (void) 4380{ 4381 cfi_add_CFA_def_cfa (15, 0); 4382} 4383 4384int 4385sh_regname_to_dw2regnum (const char *regname) 4386{ 4387 unsigned int regnum = -1; 4388 unsigned int i; 4389 const char *p; 4390 char *q; 4391 static struct { char *name; int dw2regnum; } regnames[] = 4392 { 4393 { "pr", 17 }, { "t", 18 }, { "gbr", 19 }, { "mach", 20 }, 4394 { "macl", 21 }, { "fpul", 23 } 4395 }; 4396 4397 for (i = 0; i < ARRAY_SIZE (regnames); ++i) 4398 if (strcmp (regnames[i].name, regname) == 0) 4399 return regnames[i].dw2regnum; 4400 4401 if (regname[0] == 'r') 4402 { 4403 p = regname + 1; 4404 regnum = strtoul (p, &q, 10); 4405 if (p == q || *q || regnum >= 16) 4406 return -1; 4407 } 4408 else if (regname[0] == 'f' && regname[1] == 'r') 4409 { 4410 p = regname + 2; 4411 regnum = strtoul (p, &q, 10); 4412 if (p == q || *q || regnum >= 16) 4413 return -1; 4414 regnum += 25; 4415 } 4416 else if (regname[0] == 'x' && regname[1] == 'd') 4417 { 4418 p = regname + 2; 4419 regnum = strtoul (p, &q, 10); 4420 if (p == q || *q || regnum >= 8) 4421 return -1; 4422 regnum += 87; 4423 } 4424 return regnum; 4425} 4426#endif /* OBJ_ELF */ 4427