1133808Spjd//===-- X86Schedule.td - X86 Scheduling Definitions --------*- tablegen -*-===// 2156878Spjd// 3133808Spjd// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4133808Spjd// See https://llvm.org/LICENSE.txt for license information. 5133808Spjd// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6133808Spjd// 7133808Spjd//===----------------------------------------------------------------------===// 8133808Spjd 9133808Spjd//===----------------------------------------------------------------------===// 10133808Spjd// InstrSchedModel annotations for out-of-order CPUs. 11133808Spjd 12133808Spjd// Instructions with folded loads need to read the memory operand immediately, 13155174Spjd// but other register operands don't have to be read until the load is ready. 14133808Spjd// These operands are marked with ReadAfterLd. 15133808Spjddef ReadAfterLd : SchedRead; 16133808Spjddef ReadAfterVecLd : SchedRead; 17133808Spjddef ReadAfterVecXLd : SchedRead; 18133808Spjddef ReadAfterVecYLd : SchedRead; 19133808Spjd 20133808Spjd// Instructions that move data between general purpose registers and vector 21133808Spjd// registers may be subject to extra latency due to data bypass delays. 22133808Spjd// This SchedRead describes a bypass delay caused by data being moved from the 23133808Spjd// integer unit to the floating point unit. 24133808Spjddef ReadInt2Fpu : SchedRead; 25133808Spjd 26133808Spjd// Instructions with both a load and a store folded are modeled as a folded 27133808Spjd// load + WriteRMW. 28133808Spjddef WriteRMW : SchedWrite; 29133808Spjd 30133808Spjd// Helper to set SchedWrite ExePorts/Latency/ResourceCycles/NumMicroOps. 31133808Spjdmulticlass X86WriteRes<SchedWrite SchedRW, 32133808Spjd list<ProcResourceKind> ExePorts, 33133808Spjd int Lat, list<int> Res, int UOps> { 34133808Spjd def : WriteRes<SchedRW, ExePorts> { 35133808Spjd let Latency = Lat; 36133808Spjd let ResourceCycles = Res; 37133808Spjd let NumMicroOps = UOps; 38133808Spjd } 39133808Spjd} 40133808Spjd 41133808Spjd// Most instructions can fold loads, so almost every SchedWrite comes in two 42133808Spjd// variants: With and without a folded load. 43133808Spjd// An X86FoldableSchedWrite holds a reference to the corresponding SchedWrite 44133808Spjd// with a folded load. 45133808Spjdclass X86FoldableSchedWrite : SchedWrite { 46133808Spjd // The SchedWrite to use when a load is folded into the instruction. 47133808Spjd SchedWrite Folded; 48133808Spjd // The SchedRead to tag register operands than don't need to be ready 49133808Spjd // until the folded load has completed. 50133808Spjd SchedRead ReadAfterFold; 51133808Spjd} 52133808Spjd 53133808Spjd// Multiclass that produces a linked pair of SchedWrites. 54156612Spjdmulticlass X86SchedWritePair<SchedRead ReadAfter = ReadAfterLd> { 55133808Spjd // Register-Memory operation. 56133808Spjd def Ld : SchedWrite; 57133808Spjd // Register-Register operation. 58133808Spjd def NAME : X86FoldableSchedWrite { 59133808Spjd let Folded = !cast<SchedWrite>(NAME#"Ld"); 60133808Spjd let ReadAfterFold = ReadAfter; 61133808Spjd } 62133808Spjd} 63156612Spjd 64156612Spjd// Helpers to mark SchedWrites as unsupported. 65133808Spjdmulticlass X86WriteResUnsupported<SchedWrite SchedRW> { 66133808Spjd let Unsupported = 1 in { 67133808Spjd def : WriteRes<SchedRW, []>; 68156612Spjd } 69133808Spjd} 70133808Spjdmulticlass X86WriteResPairUnsupported<X86FoldableSchedWrite SchedRW> { 71133808Spjd let Unsupported = 1 in { 72133808Spjd def : WriteRes<SchedRW, []>; 73133808Spjd def : WriteRes<SchedRW.Folded, []>; 74133808Spjd } 75133808Spjd} 76133808Spjd 77133808Spjd// Multiclass that wraps X86FoldableSchedWrite for each vector width. 78156612Spjdclass X86SchedWriteWidths<X86FoldableSchedWrite sScl, 79160330Spjd X86FoldableSchedWrite s128, 80160330Spjd X86FoldableSchedWrite s256, 81133808Spjd X86FoldableSchedWrite s512> { 82133808Spjd X86FoldableSchedWrite Scl = sScl; // Scalar float/double operations. 83133808Spjd X86FoldableSchedWrite MMX = sScl; // MMX operations. 84133808Spjd X86FoldableSchedWrite XMM = s128; // XMM operations. 85133808Spjd X86FoldableSchedWrite YMM = s256; // YMM operations. 86133808Spjd X86FoldableSchedWrite ZMM = s512; // ZMM operations. 87133808Spjd} 88133808Spjd 89133808Spjd// Multiclass that wraps X86SchedWriteWidths for each fp vector type. 90133808Spjdclass X86SchedWriteSizes<X86SchedWriteWidths sPH, 91133808Spjd X86SchedWriteWidths sPS, 92133808Spjd X86SchedWriteWidths sPD> { 93133808Spjd X86SchedWriteWidths PH = sPH; 94133808Spjd X86SchedWriteWidths PS = sPS; 95133808Spjd X86SchedWriteWidths PD = sPD; 96133808Spjd} 97133808Spjd 98133808Spjd// Multiclass that wraps move/load/store triple for a vector width. 99133808Spjdclass X86SchedWriteMoveLS<SchedWrite MoveRR, 100133808Spjd SchedWrite LoadRM, 101163888Spjd SchedWrite StoreMR> { 102134168Spjd SchedWrite RR = MoveRR; 103163888Spjd SchedWrite RM = LoadRM; 104134168Spjd SchedWrite MR = StoreMR; 105134168Spjd} 106133808Spjd 107133808Spjd// Multiclass that wraps masked load/store writes for a vector width. 108133808Spjdclass X86SchedWriteMaskMove<SchedWrite LoadRM, SchedWrite StoreMR> { 109144142Spjd SchedWrite RM = LoadRM; 110144142Spjd SchedWrite MR = StoreMR; 111144142Spjd} 112144142Spjd 113133808Spjd// Multiclass that wraps X86SchedWriteMoveLS for each vector width. 114133808Spjdclass X86SchedWriteMoveLSWidths<X86SchedWriteMoveLS sScl, 115133808Spjd X86SchedWriteMoveLS s128, 116133808Spjd X86SchedWriteMoveLS s256, 117133808Spjd X86SchedWriteMoveLS s512> { 118133808Spjd X86SchedWriteMoveLS Scl = sScl; // Scalar float/double operations. 119133808Spjd X86SchedWriteMoveLS MMX = sScl; // MMX operations. 120133808Spjd X86SchedWriteMoveLS XMM = s128; // XMM operations. 121133808Spjd X86SchedWriteMoveLS YMM = s256; // YMM operations. 122133808Spjd X86SchedWriteMoveLS ZMM = s512; // ZMM operations. 123133808Spjd} 124133808Spjd 125133808Spjd// Loads, stores, and moves, not folded with other operations. 126133808Spjddef WriteLoad : SchedWrite; 127133808Spjddef WriteStore : SchedWrite; 128133808Spjddef WriteStoreNT : SchedWrite; 129133808Spjddef WriteMove : SchedWrite; 130133808Spjddef WriteVecMaskedGatherWriteback : SchedWrite; 131133808Spjddef WriteCopy : WriteSequence<[WriteLoad, WriteStore]>; // mem->mem copy 132163888Spjd 133163888Spjd// Arithmetic. 134163888Spjddefm WriteALU : X86SchedWritePair; // Simple integer ALU op. 135163888Spjddefm WriteADC : X86SchedWritePair; // Integer ALU + flags op. 136163888Spjddef WriteALURMW : WriteSequence<[WriteALULd, WriteRMW]>; 137163888Spjddef WriteADCRMW : WriteSequence<[WriteADCLd, WriteRMW]>; 138163888Spjddef WriteLEA : SchedWrite; // LEA instructions can't fold loads. 139163888Spjd 140163888Spjd// Integer multiplication 141163888Spjddefm WriteIMul8 : X86SchedWritePair; // Integer 8-bit multiplication. 142163888Spjddefm WriteIMul16 : X86SchedWritePair; // Integer 16-bit multiplication. 143163888Spjddefm WriteIMul16Imm : X86SchedWritePair; // Integer 16-bit multiplication by immediate. 144163888Spjddefm WriteIMul16Reg : X86SchedWritePair; // Integer 16-bit multiplication by register. 145163888Spjddefm WriteIMul32 : X86SchedWritePair; // Integer 32-bit multiplication. 146163888Spjddefm WriteIMul32Imm : X86SchedWritePair; // Integer 32-bit multiplication by immediate. 147134124Spjddefm WriteIMul32Reg : X86SchedWritePair; // Integer 32-bit multiplication by register. 148134124Spjddefm WriteIMul64 : X86SchedWritePair; // Integer 64-bit multiplication. 149134124Spjddefm WriteIMul64Imm : X86SchedWritePair; // Integer 64-bit multiplication by immediate. 150134124Spjddefm WriteIMul64Reg : X86SchedWritePair; // Integer 64-bit multiplication by register. 151134124Spjddefm WriteMULX32 : X86SchedWritePair; // Integer 32-bit Multiplication without affecting flags. 152134124Spjddefm WriteMULX64 : X86SchedWritePair; // Integer 64-bit Multiplication without affecting flags. 153134124Spjddef WriteIMulH : SchedWrite; // Integer multiplication, high part (only used by the RR variant of MULX). 154134124Spjddef WriteIMulHLd : SchedWrite; // Integer multiplication, high part (only used by the RM variant of MULX). 155134124Spjd 156134124Spjddef WriteBSWAP32 : SchedWrite; // Byte Order (Endianness) 32-bit Swap. 157134124Spjddef WriteBSWAP64 : SchedWrite; // Byte Order (Endianness) 64-bit Swap. 158134124Spjddefm WriteCMPXCHG : X86SchedWritePair; // Compare and set, compare and swap. 159134124Spjddef WriteCMPXCHGRMW : SchedWrite; // Compare and set, compare and swap. 160134124Spjddef WriteXCHG : SchedWrite; // Compare+Exchange - TODO RMW support. 161134124Spjd 162134124Spjd// Integer division. 163134168Spjddefm WriteDiv8 : X86SchedWritePair; 164134168Spjddefm WriteDiv16 : X86SchedWritePair; 165134168Spjddefm WriteDiv32 : X86SchedWritePair; 166134168Spjddefm WriteDiv64 : X86SchedWritePair; 167134168Spjddefm WriteIDiv8 : X86SchedWritePair; 168134168Spjddefm WriteIDiv16 : X86SchedWritePair; 169134168Spjddefm WriteIDiv32 : X86SchedWritePair; 170134168Spjddefm WriteIDiv64 : X86SchedWritePair; 171134168Spjd 172134168Spjddefm WriteBSF : X86SchedWritePair; // Bit scan forward. 173134168Spjddefm WriteBSR : X86SchedWritePair; // Bit scan reverse. 174134168Spjddefm WritePOPCNT : X86SchedWritePair; // Bit population count. 175134168Spjddefm WriteLZCNT : X86SchedWritePair; // Leading zero count. 176134168Spjddefm WriteTZCNT : X86SchedWritePair; // Trailing zero count. 177134168Spjddefm WriteCMOV : X86SchedWritePair; // Conditional move. 178163888Spjddef WriteFCMOV : SchedWrite; // X87 conditional move. 179163888Spjddef WriteSETCC : SchedWrite; // Set register based on condition code. 180134124Spjddef WriteSETCCStore : SchedWrite; 181134124Spjddef WriteLAHFSAHF : SchedWrite; // Load/Store flags in AH. 182134124Spjd 183156612Spjddef WriteBitTest : SchedWrite; // Bit Test 184156612Spjddef WriteBitTestImmLd : SchedWrite; 185156612Spjddef WriteBitTestRegLd : SchedWrite; 186156612Spjd 187156612Spjddef WriteBitTestSet : SchedWrite; // Bit Test + Set 188156612Spjddef WriteBitTestSetImmLd : SchedWrite; 189156612Spjddef WriteBitTestSetRegLd : SchedWrite; 190156612Spjddef WriteBitTestSetImmRMW : WriteSequence<[WriteBitTestSetImmLd, WriteRMW]>; 191156612Spjddef WriteBitTestSetRegRMW : WriteSequence<[WriteBitTestSetRegLd, WriteRMW]>; 192156612Spjd 193156612Spjd// Integer shifts and rotates. 194156612Spjddefm WriteShift : X86SchedWritePair; 195156612Spjddefm WriteShiftCL : X86SchedWritePair; 196156612Spjddefm WriteRotate : X86SchedWritePair; 197156612Spjddefm WriteRotateCL : X86SchedWritePair; 198133808Spjd 199133808Spjd// Double shift instructions. 200133808Spjddef WriteSHDrri : SchedWrite; 201133808Spjddef WriteSHDrrcl : SchedWrite; 202133808Spjddef WriteSHDmri : SchedWrite; 203133808Spjddef WriteSHDmrcl : SchedWrite; 204133808Spjd 205133808Spjd// BMI1 BEXTR/BLS, BMI2 BZHI 206133808Spjddefm WriteBEXTR : X86SchedWritePair; 207163888Spjddefm WriteBLS : X86SchedWritePair; 208163888Spjddefm WriteBZHI : X86SchedWritePair; 209163888Spjd 210163888Spjd// Idioms that clear a register, like xorps %xmm0, %xmm0. 211163888Spjd// These can often bypass execution ports completely. 212163888Spjddef WriteZero : SchedWrite; 213163888Spjd 214163888Spjd// Branches don't produce values, so they have no latency, but they still 215163888Spjd// consume resources. Indirect branches can fold loads. 216134168Spjddefm WriteJump : X86SchedWritePair; 217134168Spjd 218134168Spjd// Floating point. This covers both scalar and vector operations. 219134168Spjddef WriteFLD0 : SchedWrite; 220134168Spjddef WriteFLD1 : SchedWrite; 221134168Spjddef WriteFLDC : SchedWrite; 222134168Spjddef WriteFLoad : SchedWrite; 223134124Spjddef WriteFLoadX : SchedWrite; 224134124Spjddef WriteFLoadY : SchedWrite; 225134124Spjddef WriteFMaskedLoad : SchedWrite; 226134124Spjddef WriteFMaskedLoadY : SchedWrite; 227134124Spjddef WriteFStore : SchedWrite; 228134124Spjddef WriteFStoreX : SchedWrite; 229134124Spjddef WriteFStoreY : SchedWrite; 230134168Spjddef WriteFStoreNT : SchedWrite; 231134168Spjddef WriteFStoreNTX : SchedWrite; 232134168Spjddef WriteFStoreNTY : SchedWrite; 233134168Spjd 234134168Spjddef WriteFMaskedStore32 : SchedWrite; 235134168Spjddef WriteFMaskedStore64 : SchedWrite; 236134168Spjddef WriteFMaskedStore32Y : SchedWrite; 237133808Spjddef WriteFMaskedStore64Y : SchedWrite; 238133808Spjd 239133808Spjddef WriteFMove : SchedWrite; 240133808Spjddef WriteFMoveX : SchedWrite; 241133808Spjddef WriteFMoveY : SchedWrite; 242133808Spjddef WriteFMoveZ : SchedWrite; 243163888Spjd 244163888Spjddefm WriteFAdd : X86SchedWritePair<ReadAfterVecLd>; // Floating point add/sub. 245133808Spjddefm WriteFAddX : X86SchedWritePair<ReadAfterVecXLd>; // Floating point add/sub (XMM). 246133808Spjddefm WriteFAddY : X86SchedWritePair<ReadAfterVecYLd>; // Floating point add/sub (YMM). 247133808Spjddefm WriteFAddZ : X86SchedWritePair<ReadAfterVecYLd>; // Floating point add/sub (ZMM). 248133808Spjddefm WriteFAdd64 : X86SchedWritePair<ReadAfterVecLd>; // Floating point double add/sub. 249133808Spjddefm WriteFAdd64X : X86SchedWritePair<ReadAfterVecXLd>; // Floating point double add/sub (XMM). 250133808Spjddefm WriteFAdd64Y : X86SchedWritePair<ReadAfterVecYLd>; // Floating point double add/sub (YMM). 251133808Spjddefm WriteFAdd64Z : X86SchedWritePair<ReadAfterVecYLd>; // Floating point double add/sub (ZMM). 252133808Spjddefm WriteFCmp : X86SchedWritePair<ReadAfterVecLd>; // Floating point compare. 253133808Spjddefm WriteFCmpX : X86SchedWritePair<ReadAfterVecXLd>; // Floating point compare (XMM). 254133808Spjddefm WriteFCmpY : X86SchedWritePair<ReadAfterVecYLd>; // Floating point compare (YMM). 255133808Spjddefm WriteFCmpZ : X86SchedWritePair<ReadAfterVecYLd>; // Floating point compare (ZMM). 256133808Spjddefm WriteFCmp64 : X86SchedWritePair<ReadAfterVecLd>; // Floating point double compare. 257133808Spjddefm WriteFCmp64X : X86SchedWritePair<ReadAfterVecXLd>; // Floating point double compare (XMM). 258156612Spjddefm WriteFCmp64Y : X86SchedWritePair<ReadAfterVecYLd>; // Floating point double compare (YMM). 259133808Spjddefm WriteFCmp64Z : X86SchedWritePair<ReadAfterVecYLd>; // Floating point double compare (ZMM). 260133808Spjddefm WriteFCom : X86SchedWritePair<ReadAfterVecLd>; // Floating point compare to flags (X87). 261133808Spjddefm WriteFComX : X86SchedWritePair<ReadAfterVecLd>; // Floating point compare to flags (SSE). 262133808Spjddefm WriteFMul : X86SchedWritePair<ReadAfterVecLd>; // Floating point multiplication. 263133808Spjddefm WriteFMulX : X86SchedWritePair<ReadAfterVecXLd>; // Floating point multiplication (XMM). 264139671Spjddefm WriteFMulY : X86SchedWritePair<ReadAfterVecYLd>; // Floating point multiplication (YMM). 265133808Spjddefm WriteFMulZ : X86SchedWritePair<ReadAfterVecYLd>; // Floating point multiplication (YMM). 266133808Spjddefm WriteFMul64 : X86SchedWritePair<ReadAfterVecLd>; // Floating point double multiplication. 267139671Spjddefm WriteFMul64X : X86SchedWritePair<ReadAfterVecXLd>; // Floating point double multiplication (XMM). 268133808Spjddefm WriteFMul64Y : X86SchedWritePair<ReadAfterVecYLd>; // Floating point double multiplication (YMM). 269139671Spjddefm WriteFMul64Z : X86SchedWritePair<ReadAfterVecYLd>; // Floating point double multiplication (ZMM). 270133808Spjddefm WriteFDiv : X86SchedWritePair<ReadAfterVecLd>; // Floating point division. 271133808Spjddefm WriteFDivX : X86SchedWritePair<ReadAfterVecXLd>; // Floating point division (XMM). 272133808Spjddefm WriteFDivY : X86SchedWritePair<ReadAfterVecYLd>; // Floating point division (YMM). 273133808Spjddefm WriteFDivZ : X86SchedWritePair<ReadAfterVecYLd>; // Floating point division (ZMM). 274133808Spjddefm WriteFDiv64 : X86SchedWritePair<ReadAfterVecLd>; // Floating point double division. 275133808Spjddefm WriteFDiv64X : X86SchedWritePair<ReadAfterVecXLd>; // Floating point double division (XMM). 276133808Spjddefm WriteFDiv64Y : X86SchedWritePair<ReadAfterVecYLd>; // Floating point double division (YMM). 277133808Spjddefm WriteFDiv64Z : X86SchedWritePair<ReadAfterVecYLd>; // Floating point double division (ZMM). 278133808Spjddefm WriteFSqrt : X86SchedWritePair<ReadAfterVecLd>; // Floating point square root. 279133808Spjddefm WriteFSqrtX : X86SchedWritePair<ReadAfterVecXLd>; // Floating point square root (XMM). 280133808Spjddefm WriteFSqrtY : X86SchedWritePair<ReadAfterVecYLd>; // Floating point square root (YMM). 281133808Spjddefm WriteFSqrtZ : X86SchedWritePair<ReadAfterVecYLd>; // Floating point square root (ZMM). 282133808Spjddefm WriteFSqrt64 : X86SchedWritePair<ReadAfterVecLd>; // Floating point double square root. 283133808Spjddefm WriteFSqrt64X : X86SchedWritePair<ReadAfterVecXLd>; // Floating point double square root (XMM). 284133808Spjddefm WriteFSqrt64Y : X86SchedWritePair<ReadAfterVecYLd>; // Floating point double square root (YMM). 285133808Spjddefm WriteFSqrt64Z : X86SchedWritePair<ReadAfterVecYLd>; // Floating point double square root (ZMM). 286133808Spjddefm WriteFSqrt80 : X86SchedWritePair<ReadAfterVecLd>; // Floating point long double square root. 287133808Spjddefm WriteFRcp : X86SchedWritePair<ReadAfterVecLd>; // Floating point reciprocal estimate. 288133808Spjddefm WriteFRcpX : X86SchedWritePair<ReadAfterVecXLd>; // Floating point reciprocal estimate (XMM). 289133808Spjddefm WriteFRcpY : X86SchedWritePair<ReadAfterVecYLd>; // Floating point reciprocal estimate (YMM). 290133808Spjddefm WriteFRcpZ : X86SchedWritePair<ReadAfterVecYLd>; // Floating point reciprocal estimate (ZMM). 291133808Spjddefm WriteFRsqrt : X86SchedWritePair<ReadAfterVecLd>; // Floating point reciprocal square root estimate. 292133808Spjddefm WriteFRsqrtX: X86SchedWritePair<ReadAfterVecXLd>; // Floating point reciprocal square root estimate (XMM). 293156612Spjddefm WriteFRsqrtY: X86SchedWritePair<ReadAfterVecYLd>; // Floating point reciprocal square root estimate (YMM). 294133808Spjddefm WriteFRsqrtZ: X86SchedWritePair<ReadAfterVecYLd>; // Floating point reciprocal square root estimate (ZMM). 295133808Spjddefm WriteFMA : X86SchedWritePair<ReadAfterVecLd>; // Fused Multiply Add. 296133808Spjddefm WriteFMAX : X86SchedWritePair<ReadAfterVecXLd>; // Fused Multiply Add (XMM). 297133808Spjddefm WriteFMAY : X86SchedWritePair<ReadAfterVecYLd>; // Fused Multiply Add (YMM). 298133808Spjddefm WriteFMAZ : X86SchedWritePair<ReadAfterVecYLd>; // Fused Multiply Add (ZMM). 299156612Spjddefm WriteDPPD : X86SchedWritePair<ReadAfterVecXLd>; // Floating point double dot product. 300133808Spjddefm WriteDPPS : X86SchedWritePair<ReadAfterVecXLd>; // Floating point single dot product. 301133808Spjddefm WriteDPPSY : X86SchedWritePair<ReadAfterVecYLd>; // Floating point single dot product (YMM). 302133808Spjddefm WriteFSign : X86SchedWritePair<ReadAfterVecLd>; // Floating point fabs/fchs. 303133808Spjddefm WriteFRnd : X86SchedWritePair<ReadAfterVecXLd>; // Floating point rounding. 304162350Spjddefm WriteFRndY : X86SchedWritePair<ReadAfterVecYLd>; // Floating point rounding (YMM). 305156612Spjddefm WriteFRndZ : X86SchedWritePair<ReadAfterVecYLd>; // Floating point rounding (ZMM). 306133808Spjddefm WriteFLogic : X86SchedWritePair<ReadAfterVecXLd>; // Floating point and/or/xor logicals. 307133808Spjddefm WriteFLogicY : X86SchedWritePair<ReadAfterVecYLd>; // Floating point and/or/xor logicals (YMM). 308133808Spjddefm WriteFLogicZ : X86SchedWritePair<ReadAfterVecYLd>; // Floating point and/or/xor logicals (ZMM). 309133808Spjddefm WriteFTest : X86SchedWritePair<ReadAfterVecXLd>; // Floating point TEST instructions. 310133808Spjddefm WriteFTestY : X86SchedWritePair<ReadAfterVecYLd>; // Floating point TEST instructions (YMM). 311133808Spjddefm WriteFTestZ : X86SchedWritePair<ReadAfterVecYLd>; // Floating point TEST instructions (ZMM). 312133808Spjddefm WriteFShuffle : X86SchedWritePair<ReadAfterVecXLd>; // Floating point vector shuffles. 313133808Spjddefm WriteFShuffleY : X86SchedWritePair<ReadAfterVecYLd>; // Floating point vector shuffles (YMM). 314133808Spjddefm WriteFShuffleZ : X86SchedWritePair<ReadAfterVecYLd>; // Floating point vector shuffles (ZMM). 315133808Spjddefm WriteFVarShuffle : X86SchedWritePair<ReadAfterVecXLd>; // Floating point vector variable shuffles. 316139671Spjddefm WriteFVarShuffleY : X86SchedWritePair<ReadAfterVecYLd>; // Floating point vector variable shuffles (YMM). 317156612Spjddefm WriteFVarShuffleZ : X86SchedWritePair<ReadAfterVecYLd>; // Floating point vector variable shuffles (ZMM). 318139671Spjddefm WriteFBlend : X86SchedWritePair<ReadAfterVecXLd>; // Floating point vector blends. 319156612Spjddefm WriteFBlendY : X86SchedWritePair<ReadAfterVecYLd>; // Floating point vector blends (YMM). 320133808Spjddefm WriteFBlendZ : X86SchedWritePair<ReadAfterVecYLd>; // Floating point vector blends (ZMM). 321133808Spjddefm WriteFVarBlend : X86SchedWritePair<ReadAfterVecXLd>; // Fp vector variable blends. 322139671Spjddefm WriteFVarBlendY : X86SchedWritePair<ReadAfterVecYLd>; // Fp vector variable blends (YMM). 323139671Spjddefm WriteFVarBlendZ : X86SchedWritePair<ReadAfterVecYLd>; // Fp vector variable blends (YMZMM). 324156612Spjd 325139671Spjd// FMA Scheduling helper class. 326139671Spjdclass FMASC { X86FoldableSchedWrite Sched = WriteFAdd; } 327139671Spjd 328156612Spjd// Horizontal Add/Sub (float and integer) 329139671Spjddefm WriteFHAdd : X86SchedWritePair<ReadAfterVecXLd>; 330156612Spjddefm WriteFHAddY : X86SchedWritePair<ReadAfterVecYLd>; 331133808Spjddefm WriteFHAddZ : X86SchedWritePair<ReadAfterVecYLd>; 332133808Spjddefm WritePHAdd : X86SchedWritePair<ReadAfterVecLd>; 333133808Spjddefm WritePHAddX : X86SchedWritePair<ReadAfterVecXLd>; 334133808Spjddefm WritePHAddY : X86SchedWritePair<ReadAfterVecYLd>; 335133808Spjddefm WritePHAddZ : X86SchedWritePair<ReadAfterVecYLd>; 336133808Spjd 337133808Spjd// Vector integer operations. 338133808Spjddef WriteVecLoad : SchedWrite; 339133808Spjddef WriteVecLoadX : SchedWrite; 340133808Spjddef WriteVecLoadY : SchedWrite; 341157630Spjddef WriteVecLoadNT : SchedWrite; 342133808Spjddef WriteVecLoadNTY : SchedWrite; 343133808Spjddef WriteVecMaskedLoad : SchedWrite; 344133808Spjddef WriteVecMaskedLoadY : SchedWrite; 345133808Spjddef WriteVecStore : SchedWrite; 346133808Spjddef WriteVecStoreX : SchedWrite; 347133808Spjddef WriteVecStoreY : SchedWrite; 348133808Spjddef WriteVecStoreNT : SchedWrite; 349133808Spjddef WriteVecStoreNTY : SchedWrite; 350133808Spjddef WriteVecMaskedStore32 : SchedWrite; 351133808Spjddef WriteVecMaskedStore64 : SchedWrite; 352133808Spjddef WriteVecMaskedStore32Y : SchedWrite; 353133808Spjddef WriteVecMaskedStore64Y : SchedWrite; 354133808Spjddef WriteVecMove : SchedWrite; 355133808Spjddef WriteVecMoveX : SchedWrite; 356133808Spjddef WriteVecMoveY : SchedWrite; 357157630Spjddef WriteVecMoveZ : SchedWrite; 358157630Spjddef WriteVecMoveToGpr : SchedWrite; 359157630Spjddef WriteVecMoveFromGpr : SchedWrite; 360157630Spjd 361133808Spjddefm WriteVecALU : X86SchedWritePair<ReadAfterVecLd>; // Vector integer ALU op, no logicals. 362133808Spjddefm WriteVecALUX : X86SchedWritePair<ReadAfterVecXLd>; // Vector integer ALU op, no logicals (XMM). 363133808Spjddefm WriteVecALUY : X86SchedWritePair<ReadAfterVecYLd>; // Vector integer ALU op, no logicals (YMM). 364133808Spjddefm WriteVecALUZ : X86SchedWritePair<ReadAfterVecYLd>; // Vector integer ALU op, no logicals (ZMM). 365133808Spjddefm WriteVecLogic : X86SchedWritePair<ReadAfterVecLd>; // Vector integer and/or/xor logicals. 366133808Spjddefm WriteVecLogicX : X86SchedWritePair<ReadAfterVecXLd>; // Vector integer and/or/xor logicals (XMM). 367133808Spjddefm WriteVecLogicY : X86SchedWritePair<ReadAfterVecYLd>; // Vector integer and/or/xor logicals (YMM). 368133808Spjddefm WriteVecLogicZ : X86SchedWritePair<ReadAfterVecYLd>; // Vector integer and/or/xor logicals (ZMM). 369133808Spjddefm WriteVecTest : X86SchedWritePair<ReadAfterVecXLd>; // Vector integer TEST instructions. 370133808Spjddefm WriteVecTestY : X86SchedWritePair<ReadAfterVecYLd>; // Vector integer TEST instructions (YMM). 371133808Spjddefm WriteVecTestZ : X86SchedWritePair<ReadAfterVecYLd>; // Vector integer TEST instructions (ZMM). 372133808Spjddefm WriteVecShift : X86SchedWritePair<ReadAfterVecLd>; // Vector integer shifts (default). 373133808Spjddefm WriteVecShiftX : X86SchedWritePair<ReadAfterVecXLd>; // Vector integer shifts (XMM). 374157630Spjddefm WriteVecShiftY : X86SchedWritePair<ReadAfterVecYLd>; // Vector integer shifts (YMM). 375157630Spjddefm WriteVecShiftZ : X86SchedWritePair<ReadAfterVecYLd>; // Vector integer shifts (ZMM). 376133808Spjddefm WriteVecShiftImm : X86SchedWritePair<ReadAfterVecLd>; // Vector integer immediate shifts (default). 377133808Spjddefm WriteVecShiftImmX: X86SchedWritePair<ReadAfterVecXLd>; // Vector integer immediate shifts (XMM). 378133808Spjddefm WriteVecShiftImmY: X86SchedWritePair<ReadAfterVecYLd>; // Vector integer immediate shifts (YMM). 379156612Spjddefm WriteVecShiftImmZ: X86SchedWritePair<ReadAfterVecYLd>; // Vector integer immediate shifts (ZMM). 380133808Spjddefm WriteVecIMul : X86SchedWritePair<ReadAfterVecLd>; // Vector integer multiply (default). 381133808Spjddefm WriteVecIMulX : X86SchedWritePair<ReadAfterVecXLd>; // Vector integer multiply (XMM). 382156612Spjddefm WriteVecIMulY : X86SchedWritePair<ReadAfterVecYLd>; // Vector integer multiply (YMM). 383133808Spjddefm WriteVecIMulZ : X86SchedWritePair<ReadAfterVecYLd>; // Vector integer multiply (ZMM). 384133808Spjddefm WritePMULLD : X86SchedWritePair<ReadAfterVecXLd>; // Vector PMULLD. 385133808Spjddefm WritePMULLDY : X86SchedWritePair<ReadAfterVecYLd>; // Vector PMULLD (YMM). 386133808Spjddefm WritePMULLDZ : X86SchedWritePair<ReadAfterVecYLd>; // Vector PMULLD (ZMM). 387133808Spjddefm WriteShuffle : X86SchedWritePair<ReadAfterVecLd>; // Vector shuffles. 388133808Spjddefm WriteShuffleX : X86SchedWritePair<ReadAfterVecXLd>; // Vector shuffles (XMM). 389133808Spjddefm WriteShuffleY : X86SchedWritePair<ReadAfterVecYLd>; // Vector shuffles (YMM). 390133808Spjddefm WriteShuffleZ : X86SchedWritePair<ReadAfterVecYLd>; // Vector shuffles (ZMM). 391133808Spjddefm WriteVarShuffle : X86SchedWritePair<ReadAfterVecLd>; // Vector variable shuffles. 392133808Spjddefm WriteVarShuffleX : X86SchedWritePair<ReadAfterVecXLd>; // Vector variable shuffles (XMM). 393133808Spjddefm WriteVarShuffleY : X86SchedWritePair<ReadAfterVecYLd>; // Vector variable shuffles (YMM). 394133808Spjddefm WriteVarShuffleZ : X86SchedWritePair<ReadAfterVecYLd>; // Vector variable shuffles (ZMM). 395133808Spjddefm WriteBlend : X86SchedWritePair<ReadAfterVecXLd>; // Vector blends. 396133808Spjddefm WriteBlendY : X86SchedWritePair<ReadAfterVecYLd>; // Vector blends (YMM). 397133808Spjddefm WriteBlendZ : X86SchedWritePair<ReadAfterVecYLd>; // Vector blends (ZMM). 398133808Spjddefm WriteVarBlend : X86SchedWritePair<ReadAfterVecXLd>; // Vector variable blends. 399133808Spjddefm WriteVarBlendY : X86SchedWritePair<ReadAfterVecYLd>; // Vector variable blends (YMM). 400133808Spjddefm WriteVarBlendZ : X86SchedWritePair<ReadAfterVecYLd>; // Vector variable blends (ZMM). 401133808Spjddefm WritePSADBW : X86SchedWritePair<ReadAfterVecLd>; // Vector PSADBW. 402133808Spjddefm WritePSADBWX : X86SchedWritePair<ReadAfterVecXLd>; // Vector PSADBW (XMM). 403133808Spjddefm WritePSADBWY : X86SchedWritePair<ReadAfterVecYLd>; // Vector PSADBW (YMM). 404133808Spjddefm WritePSADBWZ : X86SchedWritePair<ReadAfterVecYLd>; // Vector PSADBW (ZMM). 405134420Spjddefm WriteMPSAD : X86SchedWritePair<ReadAfterVecXLd>; // Vector MPSAD. 406133808Spjddefm WriteMPSADY : X86SchedWritePair<ReadAfterVecYLd>; // Vector MPSAD (YMM). 407245456Smavdefm WriteMPSADZ : X86SchedWritePair<ReadAfterVecYLd>; // Vector MPSAD (ZMM). 408133808Spjddefm WritePHMINPOS : X86SchedWritePair<ReadAfterVecXLd>; // Vector PHMINPOS. 409133808Spjd 410133808Spjd// Vector insert/extract operations. 411133808Spjddefm WriteVecInsert : X86SchedWritePair; // Insert gpr to vector element. 412133808Spjddef WriteVecExtract : SchedWrite; // Extract vector element to gpr. 413133808Spjddef WriteVecExtractSt : SchedWrite; // Extract vector element and store. 414133808Spjd 415133808Spjd// MOVMSK operations. 416133808Spjddef WriteFMOVMSK : SchedWrite; 417133808Spjddef WriteVecMOVMSK : SchedWrite; 418156612Spjddef WriteVecMOVMSKY : SchedWrite; 419156612Spjddef WriteMMXMOVMSK : SchedWrite; 420156612Spjd 421133808Spjd// Conversion between integer and float. 422133808Spjddefm WriteCvtSD2I : X86SchedWritePair<ReadAfterVecLd>; // Double -> Integer. 423156612Spjddefm WriteCvtPD2I : X86SchedWritePair<ReadAfterVecXLd>; // Double -> Integer (XMM). 424156612Spjddefm WriteCvtPD2IY : X86SchedWritePair<ReadAfterVecYLd>; // Double -> Integer (YMM). 425156612Spjddefm WriteCvtPD2IZ : X86SchedWritePair<ReadAfterVecYLd>; // Double -> Integer (ZMM). 426133808Spjd 427133808Spjddefm WriteCvtSS2I : X86SchedWritePair<ReadAfterVecLd>; // Float -> Integer. 428245456Smavdefm WriteCvtPS2I : X86SchedWritePair<ReadAfterVecXLd>; // Float -> Integer (XMM). 429245456Smavdefm WriteCvtPS2IY : X86SchedWritePair<ReadAfterVecYLd>; // Float -> Integer (YMM). 430245456Smavdefm WriteCvtPS2IZ : X86SchedWritePair<ReadAfterVecYLd>; // Float -> Integer (ZMM). 431245456Smav 432160330Spjddefm WriteCvtI2SD : X86SchedWritePair<ReadAfterVecLd>; // Integer -> Double. 433160330Spjddefm WriteCvtI2PD : X86SchedWritePair<ReadAfterVecXLd>; // Integer -> Double (XMM). 434156612Spjddefm WriteCvtI2PDY : X86SchedWritePair<ReadAfterVecYLd>; // Integer -> Double (YMM). 435156612Spjddefm WriteCvtI2PDZ : X86SchedWritePair<ReadAfterVecYLd>; // Integer -> Double (ZMM). 436156612Spjd 437156612Spjddefm WriteCvtI2SS : X86SchedWritePair<ReadAfterVecLd>; // Integer -> Float. 438156612Spjddefm WriteCvtI2PS : X86SchedWritePair<ReadAfterVecXLd>; // Integer -> Float (XMM). 439156612Spjddefm WriteCvtI2PSY : X86SchedWritePair<ReadAfterVecYLd>; // Integer -> Float (YMM). 440156612Spjddefm WriteCvtI2PSZ : X86SchedWritePair<ReadAfterVecYLd>; // Integer -> Float (ZMM). 441156612Spjd 442156612Spjddefm WriteCvtSS2SD : X86SchedWritePair<ReadAfterVecLd>; // Float -> Double size conversion. 443156612Spjddefm WriteCvtPS2PD : X86SchedWritePair<ReadAfterVecXLd>; // Float -> Double size conversion (XMM). 444156612Spjddefm WriteCvtPS2PDY : X86SchedWritePair<ReadAfterVecYLd>; // Float -> Double size conversion (YMM). 445156612Spjddefm WriteCvtPS2PDZ : X86SchedWritePair<ReadAfterVecYLd>; // Float -> Double size conversion (ZMM). 446156612Spjd 447156612Spjddefm WriteCvtSD2SS : X86SchedWritePair<ReadAfterVecLd>; // Double -> Float size conversion. 448156612Spjddefm WriteCvtPD2PS : X86SchedWritePair<ReadAfterVecXLd>; // Double -> Float size conversion (XMM). 449156612Spjddefm WriteCvtPD2PSY : X86SchedWritePair<ReadAfterVecYLd>; // Double -> Float size conversion (YMM). 450156612Spjddefm WriteCvtPD2PSZ : X86SchedWritePair<ReadAfterVecYLd>; // Double -> Float size conversion (ZMM). 451156612Spjd 452156612Spjddefm WriteCvtPH2PS : X86SchedWritePair<ReadAfterVecXLd>; // Half -> Float size conversion. 453156612Spjddefm WriteCvtPH2PSY : X86SchedWritePair<ReadAfterVecYLd>; // Half -> Float size conversion (YMM). 454156612Spjddefm WriteCvtPH2PSZ : X86SchedWritePair<ReadAfterVecYLd>; // Half -> Float size conversion (ZMM). 455156612Spjd 456156612Spjddef WriteCvtPS2PH : SchedWrite; // // Float -> Half size conversion. 457156612Spjddef WriteCvtPS2PHY : SchedWrite; // // Float -> Half size conversion (YMM). 458156612Spjddef WriteCvtPS2PHZ : SchedWrite; // // Float -> Half size conversion (ZMM). 459156612Spjddef WriteCvtPS2PHSt : SchedWrite; // // Float -> Half + store size conversion. 460156612Spjddef WriteCvtPS2PHYSt : SchedWrite; // // Float -> Half + store size conversion (YMM). 461156612Spjddef WriteCvtPS2PHZSt : SchedWrite; // // Float -> Half + store size conversion (ZMM). 462156612Spjd 463156612Spjd// CRC32 instruction. 464156612Spjddefm WriteCRC32 : X86SchedWritePair<ReadAfterLd>; 465156612Spjd 466156612Spjd// Strings instructions. 467245456Smav// Packed Compare Implicit Length Strings, Return Mask 468245456Smavdefm WritePCmpIStrM : X86SchedWritePair<ReadAfterVecXLd>; 469245456Smav// Packed Compare Explicit Length Strings, Return Mask 470245456Smavdefm WritePCmpEStrM : X86SchedWritePair<ReadAfterVecXLd>; 471245456Smav// Packed Compare Implicit Length Strings, Return Index 472245456Smavdefm WritePCmpIStrI : X86SchedWritePair<ReadAfterVecXLd>; 473245456Smav// Packed Compare Explicit Length Strings, Return Index 474245456Smavdefm WritePCmpEStrI : X86SchedWritePair<ReadAfterVecXLd>; 475245456Smav 476245456Smav// AES instructions. 477245456Smavdefm WriteAESDecEnc : X86SchedWritePair<ReadAfterVecXLd>; // Decryption, encryption. 478245456Smavdefm WriteAESIMC : X86SchedWritePair<ReadAfterVecXLd>; // InvMixColumn. 479245456Smavdefm WriteAESKeyGen : X86SchedWritePair<ReadAfterVecXLd>; // Key Generation. 480245456Smav 481245456Smav// Carry-less multiplication instructions. 482245456Smavdefm WriteCLMul : X86SchedWritePair<ReadAfterVecXLd>; 483245456Smav 484245456Smav// EMMS/FEMMS 485245456Smavdef WriteEMMS : SchedWrite; 486245456Smav 487245456Smav// Load/store MXCSR 488245456Smavdef WriteLDMXCSR : SchedWrite; 489245456Smavdef WriteSTMXCSR : SchedWrite; 490245456Smav 491133808Spjd// Catch-all for expensive system instructions. 492133808Spjddef WriteSystem : SchedWrite; 493156612Spjd 494133808Spjd// AVX2. 495133808Spjddefm WriteFShuffle256 : X86SchedWritePair<ReadAfterVecYLd>; // Fp 256-bit width vector shuffles. 496133808Spjddefm WriteFVarShuffle256 : X86SchedWritePair<ReadAfterVecYLd>; // Fp 256-bit width variable shuffles. 497156612Spjddefm WriteShuffle256 : X86SchedWritePair<ReadAfterVecYLd>; // 256-bit width vector shuffles. 498133808Spjddefm WriteVPMOV256 : X86SchedWritePair<ReadAfterVecYLd>; // 256-bit width packed vector width-changing move. 499134420Spjddefm WriteVarShuffle256 : X86SchedWritePair<ReadAfterVecYLd>; // 256-bit width vector variable shuffles. 500134420Spjddefm WriteVarVecShift : X86SchedWritePair<ReadAfterVecXLd>; // Variable vector shifts. 501156612Spjddefm WriteVarVecShiftY : X86SchedWritePair<ReadAfterVecYLd>; // Variable vector shifts (YMM). 502134420Spjddefm WriteVarVecShiftZ : X86SchedWritePair<ReadAfterVecYLd>; // Variable vector shifts (ZMM). 503156612Spjd 504134420Spjd// Old microcoded instructions that nobody use. 505134420Spjddef WriteMicrocoded : SchedWrite; 506134420Spjd 507134420Spjd// Fence instructions. 508134420Spjddef WriteFence : SchedWrite; 509134420Spjd 510134420Spjd// Nop, not very useful expect it provides a model for nops! 511133808Spjddef WriteNop : SchedWrite; 512156612Spjd 513133808Spjd// Move/Load/Store wrappers. 514163886Spjddef WriteFMoveLS 515133808Spjd : X86SchedWriteMoveLS<WriteFMove, WriteFLoad, WriteFStore>; 516163886Spjddef WriteFMoveLSX 517163886Spjd : X86SchedWriteMoveLS<WriteFMoveX, WriteFLoadX, WriteFStoreX>; 518163886Spjddef WriteFMoveLSY 519156527Spjd : X86SchedWriteMoveLS<WriteFMoveY, WriteFLoadY, WriteFStoreY>; 520133808Spjddef WriteFMoveLSZ 521133808Spjd : X86SchedWriteMoveLS<WriteFMoveZ, WriteFLoadY, WriteFStoreY>; 522133808Spjddef SchedWriteFMoveLS 523133808Spjd : X86SchedWriteMoveLSWidths<WriteFMoveLS, WriteFMoveLSX, 524133808Spjd WriteFMoveLSY, WriteFMoveLSZ>; 525133808Spjd 526133808Spjddef WriteFMoveLSNT 527133808Spjd : X86SchedWriteMoveLS<WriteFMove, WriteFLoad, WriteFStoreNT>; 528156612Spjddef WriteFMoveLSNTX 529146118Spjd : X86SchedWriteMoveLS<WriteFMove, WriteFLoad, WriteFStoreNTX>; 530146118Spjddef WriteFMoveLSNTY 531146118Spjd : X86SchedWriteMoveLS<WriteFMoveY, WriteFLoadY, WriteFStoreNTY>; 532146118Spjddef SchedWriteFMoveLSNT 533146118Spjd : X86SchedWriteMoveLSWidths<WriteFMoveLSNT, WriteFMoveLSNTX, 534146117Spjd WriteFMoveLSNTY, WriteFMoveLSNTY>; 535156612Spjd 536133808Spjddef WriteVecMoveLS 537133808Spjd : X86SchedWriteMoveLS<WriteVecMove, WriteVecLoad, WriteVecStore>; 538133808Spjddef WriteVecMoveLSX 539133808Spjd : X86SchedWriteMoveLS<WriteVecMoveX, WriteVecLoadX, WriteVecStoreX>; 540133808Spjddef WriteVecMoveLSY 541133808Spjd : X86SchedWriteMoveLS<WriteVecMoveY, WriteVecLoadY, WriteVecStoreY>; 542133808Spjddef WriteVecMoveLSZ 543133808Spjd : X86SchedWriteMoveLS<WriteVecMoveZ, WriteVecLoadY, WriteVecStoreY>; 544133808Spjddef SchedWriteVecMoveLS 545133808Spjd : X86SchedWriteMoveLSWidths<WriteVecMoveLS, WriteVecMoveLSX, 546133808Spjd WriteVecMoveLSY, WriteVecMoveLSZ>; 547133808Spjd 548133808Spjddef WriteVecMoveLSNT 549133808Spjd : X86SchedWriteMoveLS<WriteVecMove, WriteVecLoadNT, WriteVecStoreNT>; 550133808Spjddef WriteVecMoveLSNTX 551133808Spjd : X86SchedWriteMoveLS<WriteVecMoveX, WriteVecLoadNT, WriteVecStoreNT>; 552133808Spjddef WriteVecMoveLSNTY 553133808Spjd : X86SchedWriteMoveLS<WriteVecMoveY, WriteVecLoadNTY, WriteVecStoreNTY>; 554133808Spjddef SchedWriteVecMoveLSNT 555133808Spjd : X86SchedWriteMoveLSWidths<WriteVecMoveLSNT, WriteVecMoveLSNTX, 556156612Spjd WriteVecMoveLSNTY, WriteVecMoveLSNTY>; 557156612Spjd 558156612Spjd// Conditional SIMD Packed Loads and Stores wrappers. 559156612Spjddef WriteFMaskMove32 560156612Spjd : X86SchedWriteMaskMove<WriteFMaskedLoad, WriteFMaskedStore32>; 561133808Spjddef WriteFMaskMove64 562133808Spjd : X86SchedWriteMaskMove<WriteFMaskedLoad, WriteFMaskedStore64>; 563133808Spjddef WriteFMaskMove32Y 564133808Spjd : X86SchedWriteMaskMove<WriteFMaskedLoadY, WriteFMaskedStore32Y>; 565133808Spjddef WriteFMaskMove64Y 566133808Spjd : X86SchedWriteMaskMove<WriteFMaskedLoadY, WriteFMaskedStore64Y>; 567133808Spjddef WriteVecMaskMove32 568133808Spjd : X86SchedWriteMaskMove<WriteVecMaskedLoad, WriteVecMaskedStore32>; 569133808Spjddef WriteVecMaskMove64 570133808Spjd : X86SchedWriteMaskMove<WriteVecMaskedLoad, WriteVecMaskedStore64>; 571133808Spjddef WriteVecMaskMove32Y 572156612Spjd : X86SchedWriteMaskMove<WriteVecMaskedLoadY, WriteVecMaskedStore32Y>; 573133808Spjddef WriteVecMaskMove64Y 574133808Spjd : X86SchedWriteMaskMove<WriteVecMaskedLoadY, WriteVecMaskedStore64Y>; 575133808Spjd 576133808Spjd// Vector width wrappers. 577133808Spjddef SchedWriteFAdd 578133808Spjd : X86SchedWriteWidths<WriteFAdd, WriteFAddX, WriteFAddY, WriteFAddZ>; 579133808Spjddef SchedWriteFAdd64 580133808Spjd : X86SchedWriteWidths<WriteFAdd64, WriteFAdd64X, WriteFAdd64Y, WriteFAdd64Z>; 581133808Spjddef SchedWriteFHAdd 582133808Spjd : X86SchedWriteWidths<WriteFHAdd, WriteFHAdd, WriteFHAddY, WriteFHAddZ>; 583133808Spjddef SchedWriteFCmp 584133808Spjd : X86SchedWriteWidths<WriteFCmp, WriteFCmpX, WriteFCmpY, WriteFCmpZ>; 585162350Spjddef SchedWriteFCmp64 586133808Spjd : X86SchedWriteWidths<WriteFCmp64, WriteFCmp64X, WriteFCmp64Y, WriteFCmp64Z>; 587156612Spjddef SchedWriteFMul 588133808Spjd : X86SchedWriteWidths<WriteFMul, WriteFMulX, WriteFMulY, WriteFMulZ>; 589133808Spjddef SchedWriteFMul64 590133808Spjd : X86SchedWriteWidths<WriteFMul64, WriteFMul64X, WriteFMul64Y, WriteFMul64Z>; 591133808Spjddef SchedWriteFMA 592133808Spjd : X86SchedWriteWidths<WriteFMA, WriteFMAX, WriteFMAY, WriteFMAZ>; 593133808Spjddef SchedWriteDPPD 594133808Spjd : X86SchedWriteWidths<WriteDPPD, WriteDPPD, WriteDPPD, WriteDPPD>; 595139295Spjddef SchedWriteDPPS 596139295Spjd : X86SchedWriteWidths<WriteDPPS, WriteDPPS, WriteDPPSY, WriteDPPSY>; 597139295Spjddef SchedWriteFDiv 598156612Spjd : X86SchedWriteWidths<WriteFDiv, WriteFDivX, WriteFDivY, WriteFDivZ>; 599133808Spjddef SchedWriteFDiv64 600133808Spjd : X86SchedWriteWidths<WriteFDiv64, WriteFDiv64X, WriteFDiv64Y, WriteFDiv64Z>; 601133808Spjddef SchedWriteFSqrt 602133808Spjd : X86SchedWriteWidths<WriteFSqrt, WriteFSqrtX, 603133808Spjd WriteFSqrtY, WriteFSqrtZ>; 604162350Spjddef SchedWriteFSqrt64 605156612Spjd : X86SchedWriteWidths<WriteFSqrt64, WriteFSqrt64X, 606133808Spjd WriteFSqrt64Y, WriteFSqrt64Z>; 607156612Spjddef SchedWriteFRcp 608133808Spjd : X86SchedWriteWidths<WriteFRcp, WriteFRcpX, WriteFRcpY, WriteFRcpZ>; 609133808Spjddef SchedWriteFRsqrt 610133808Spjd : X86SchedWriteWidths<WriteFRsqrt, WriteFRsqrtX, WriteFRsqrtY, WriteFRsqrtZ>; 611133808Spjddef SchedWriteFRnd 612133808Spjd : X86SchedWriteWidths<WriteFRnd, WriteFRnd, WriteFRndY, WriteFRndZ>; 613133808Spjddef SchedWriteFLogic 614133808Spjd : X86SchedWriteWidths<WriteFLogic, WriteFLogic, WriteFLogicY, WriteFLogicZ>; 615133808Spjddef SchedWriteFTest 616133808Spjd : X86SchedWriteWidths<WriteFTest, WriteFTest, WriteFTestY, WriteFTestZ>; 617133808Spjd 618133808Spjddef SchedWriteFShuffle 619133808Spjd : X86SchedWriteWidths<WriteFShuffle, WriteFShuffle, 620133808Spjd WriteFShuffleY, WriteFShuffleZ>; 621133808Spjddef SchedWriteFVarShuffle 622133808Spjd : X86SchedWriteWidths<WriteFVarShuffle, WriteFVarShuffle, 623133808Spjd WriteFVarShuffleY, WriteFVarShuffleZ>; 624133808Spjddef SchedWriteFBlend 625133808Spjd : X86SchedWriteWidths<WriteFBlend, WriteFBlend, WriteFBlendY, WriteFBlendZ>; 626133808Spjddef SchedWriteFVarBlend 627156612Spjd : X86SchedWriteWidths<WriteFVarBlend, WriteFVarBlend, 628133808Spjd WriteFVarBlendY, WriteFVarBlendZ>; 629133808Spjd 630133808Spjddef SchedWriteCvtDQ2PD 631133808Spjd : X86SchedWriteWidths<WriteCvtI2SD, WriteCvtI2PD, 632133808Spjd WriteCvtI2PDY, WriteCvtI2PDZ>; 633133808Spjddef SchedWriteCvtDQ2PS 634133808Spjd : X86SchedWriteWidths<WriteCvtI2SS, WriteCvtI2PS, 635133808Spjd WriteCvtI2PSY, WriteCvtI2PSZ>; 636133808Spjddef SchedWriteCvtPD2DQ 637133808Spjd : X86SchedWriteWidths<WriteCvtSD2I, WriteCvtPD2I, 638133808Spjd WriteCvtPD2IY, WriteCvtPD2IZ>; 639133808Spjddef SchedWriteCvtPS2DQ 640156612Spjd : X86SchedWriteWidths<WriteCvtSS2I, WriteCvtPS2I, 641133808Spjd WriteCvtPS2IY, WriteCvtPS2IZ>; 642def SchedWriteCvtPS2PD 643 : X86SchedWriteWidths<WriteCvtSS2SD, WriteCvtPS2PD, 644 WriteCvtPS2PDY, WriteCvtPS2PDZ>; 645def SchedWriteCvtPD2PS 646 : X86SchedWriteWidths<WriteCvtSD2SS, WriteCvtPD2PS, 647 WriteCvtPD2PSY, WriteCvtPD2PSZ>; 648 649def SchedWriteVecALU 650 : X86SchedWriteWidths<WriteVecALU, WriteVecALUX, WriteVecALUY, WriteVecALUZ>; 651def SchedWritePHAdd 652 : X86SchedWriteWidths<WritePHAdd, WritePHAddX, WritePHAddY, WritePHAddZ>; 653def SchedWriteVecLogic 654 : X86SchedWriteWidths<WriteVecLogic, WriteVecLogicX, 655 WriteVecLogicY, WriteVecLogicZ>; 656def SchedWriteVecTest 657 : X86SchedWriteWidths<WriteVecTest, WriteVecTest, 658 WriteVecTestY, WriteVecTestZ>; 659def SchedWriteVecShift 660 : X86SchedWriteWidths<WriteVecShift, WriteVecShiftX, 661 WriteVecShiftY, WriteVecShiftZ>; 662def SchedWriteVecShiftImm 663 : X86SchedWriteWidths<WriteVecShiftImm, WriteVecShiftImmX, 664 WriteVecShiftImmY, WriteVecShiftImmZ>; 665def SchedWriteVarVecShift 666 : X86SchedWriteWidths<WriteVarVecShift, WriteVarVecShift, 667 WriteVarVecShiftY, WriteVarVecShiftZ>; 668def SchedWriteVecIMul 669 : X86SchedWriteWidths<WriteVecIMul, WriteVecIMulX, 670 WriteVecIMulY, WriteVecIMulZ>; 671def SchedWritePMULLD 672 : X86SchedWriteWidths<WritePMULLD, WritePMULLD, 673 WritePMULLDY, WritePMULLDZ>; 674def SchedWriteMPSAD 675 : X86SchedWriteWidths<WriteMPSAD, WriteMPSAD, 676 WriteMPSADY, WriteMPSADZ>; 677def SchedWritePSADBW 678 : X86SchedWriteWidths<WritePSADBW, WritePSADBWX, 679 WritePSADBWY, WritePSADBWZ>; 680 681def SchedWriteVecExtend 682 : X86SchedWriteWidths<WriteShuffle, WriteShuffleX, 683 WriteVPMOV256, WriteVPMOV256>; 684def SchedWriteVecTruncate 685 : X86SchedWriteWidths<WriteVPMOV256, WriteVPMOV256, 686 WriteVPMOV256, WriteVPMOV256>; 687def SchedWriteShuffle 688 : X86SchedWriteWidths<WriteShuffle, WriteShuffleX, 689 WriteShuffleY, WriteShuffleZ>; 690def SchedWriteVarShuffle 691 : X86SchedWriteWidths<WriteVarShuffle, WriteVarShuffleX, 692 WriteVarShuffleY, WriteVarShuffleZ>; 693def SchedWriteBlend 694 : X86SchedWriteWidths<WriteBlend, WriteBlend, WriteBlendY, WriteBlendZ>; 695def SchedWriteVarBlend 696 : X86SchedWriteWidths<WriteVarBlend, WriteVarBlend, 697 WriteVarBlendY, WriteVarBlendZ>; 698 699// Vector size wrappers. 700// FIXME: Currently PH uses the same schedule method as PS. 701// We may refine them later. 702def SchedWriteFAddSizes 703 : X86SchedWriteSizes<SchedWriteFAdd, SchedWriteFAdd, SchedWriteFAdd64>; 704def SchedWriteFCmpSizes 705 : X86SchedWriteSizes<SchedWriteFCmp, SchedWriteFCmp, SchedWriteFCmp64>; 706def SchedWriteFMulSizes 707 : X86SchedWriteSizes<SchedWriteFMul, SchedWriteFMul, SchedWriteFMul64>; 708def SchedWriteFDivSizes 709 : X86SchedWriteSizes<SchedWriteFDiv, SchedWriteFDiv, SchedWriteFDiv64>; 710def SchedWriteFSqrtSizes 711 : X86SchedWriteSizes<SchedWriteFSqrt, SchedWriteFSqrt, SchedWriteFSqrt64>; 712def SchedWriteFLogicSizes 713 : X86SchedWriteSizes<SchedWriteFLogic, SchedWriteFLogic, SchedWriteFLogic>; 714def SchedWriteFShuffleSizes 715 : X86SchedWriteSizes<SchedWriteFShuffle, SchedWriteFShuffle, SchedWriteFShuffle>; 716 717//===----------------------------------------------------------------------===// 718// Generic Processor Scheduler Models. 719 720// IssueWidth is analogous to the number of decode units. Core and its 721// descendents, including Nehalem and SandyBridge have 4 decoders. 722// Resources beyond the decoder operate on micro-ops and are bufferred 723// so adjacent micro-ops don't directly compete. 724// 725// MicroOpBufferSize > 1 indicates that RAW dependencies can be 726// decoded in the same cycle. The value 32 is a reasonably arbitrary 727// number of in-flight instructions. 728// 729// HighLatency=10 is optimistic. X86InstrInfo::isHighLatencyDef 730// indicates high latency opcodes. Alternatively, InstrItinData 731// entries may be included here to define specific operand 732// latencies. Since these latencies are not used for pipeline hazards, 733// they do not need to be exact. 734// 735// The GenericX86Model contains no instruction schedules 736// and disables PostRAScheduler. 737class GenericX86Model : SchedMachineModel { 738 let IssueWidth = 4; 739 let MicroOpBufferSize = 32; 740 let LoadLatency = 4; 741 let HighLatency = 10; 742 let PostRAScheduler = 0; 743 let CompleteModel = 0; 744} 745 746def GenericModel : GenericX86Model; 747 748// Define a model with the PostRAScheduler enabled. 749def GenericPostRAModel : GenericX86Model { 750 let PostRAScheduler = 1; 751} 752