1//===- AVR.cpp ------------------------------------------------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// AVR is a Harvard-architecture 8-bit microcontroller designed for small
10// baremetal programs. All AVR-family processors have 32 8-bit registers.
11// The tiniest AVR has 32 byte RAM and 1 KiB program memory, and the largest
12// one supports up to 2^24 data address space and 2^22 code address space.
13//
14// Since it is a baremetal programming, there's usually no loader to load
15// ELF files on AVRs. You are expected to link your program against address
16// 0 and pull out a .text section from the result using objcopy, so that you
17// can write the linked code to on-chip flush memory. You can do that with
18// the following commands:
19//
20//   ld.lld -Ttext=0 -o foo foo.o
21//   objcopy -O binary --only-section=.text foo output.bin
22//
23// Note that the current AVR support is very preliminary so you can't
24// link any useful program yet, though.
25//
26//===----------------------------------------------------------------------===//
27
28#include "InputFiles.h"
29#include "Symbols.h"
30#include "Target.h"
31#include "lld/Common/ErrorHandler.h"
32#include "llvm/BinaryFormat/ELF.h"
33#include "llvm/Support/Endian.h"
34
35using namespace llvm;
36using namespace llvm::object;
37using namespace llvm::support::endian;
38using namespace llvm::ELF;
39using namespace lld;
40using namespace lld::elf;
41
42namespace {
43class AVR final : public TargetInfo {
44public:
45  uint32_t calcEFlags() const override;
46  RelExpr getRelExpr(RelType type, const Symbol &s,
47                     const uint8_t *loc) const override;
48  void relocate(uint8_t *loc, const Relocation &rel,
49                uint64_t val) const override;
50};
51} // namespace
52
53RelExpr AVR::getRelExpr(RelType type, const Symbol &s,
54                        const uint8_t *loc) const {
55  switch (type) {
56  case R_AVR_6:
57  case R_AVR_6_ADIW:
58  case R_AVR_8:
59  case R_AVR_16:
60  case R_AVR_16_PM:
61  case R_AVR_32:
62  case R_AVR_LDI:
63  case R_AVR_LO8_LDI:
64  case R_AVR_LO8_LDI_NEG:
65  case R_AVR_HI8_LDI:
66  case R_AVR_HI8_LDI_NEG:
67  case R_AVR_HH8_LDI_NEG:
68  case R_AVR_HH8_LDI:
69  case R_AVR_MS8_LDI_NEG:
70  case R_AVR_MS8_LDI:
71  case R_AVR_LO8_LDI_PM:
72  case R_AVR_LO8_LDI_PM_NEG:
73  case R_AVR_HI8_LDI_PM:
74  case R_AVR_HI8_LDI_PM_NEG:
75  case R_AVR_HH8_LDI_PM:
76  case R_AVR_HH8_LDI_PM_NEG:
77  case R_AVR_LDS_STS_16:
78  case R_AVR_PORT5:
79  case R_AVR_PORT6:
80  case R_AVR_CALL:
81    return R_ABS;
82  case R_AVR_7_PCREL:
83  case R_AVR_13_PCREL:
84    return R_PC;
85  default:
86    error(getErrorLocation(loc) + "unknown relocation (" + Twine(type) +
87          ") against symbol " + toString(s));
88    return R_NONE;
89  }
90}
91
92static void writeLDI(uint8_t *loc, uint64_t val) {
93  write16le(loc, (read16le(loc) & 0xf0f0) | (val & 0xf0) << 4 | (val & 0x0f));
94}
95
96void AVR::relocate(uint8_t *loc, const Relocation &rel, uint64_t val) const {
97  switch (rel.type) {
98  case R_AVR_8:
99    checkUInt(loc, val, 8, rel);
100    *loc = val;
101    break;
102  case R_AVR_16:
103    // Note: this relocation is often used between code and data space, which
104    // are 0x800000 apart in the output ELF file. The bitmask cuts off the high
105    // bit.
106    write16le(loc, val & 0xffff);
107    break;
108  case R_AVR_16_PM:
109    checkAlignment(loc, val, 2, rel);
110    checkUInt(loc, val >> 1, 16, rel);
111    write16le(loc, val >> 1);
112    break;
113  case R_AVR_32:
114    checkUInt(loc, val, 32, rel);
115    write32le(loc, val);
116    break;
117
118  case R_AVR_LDI:
119    checkUInt(loc, val, 8, rel);
120    writeLDI(loc, val & 0xff);
121    break;
122
123  case R_AVR_LO8_LDI_NEG:
124    writeLDI(loc, -val & 0xff);
125    break;
126  case R_AVR_LO8_LDI:
127    writeLDI(loc, val & 0xff);
128    break;
129  case R_AVR_HI8_LDI_NEG:
130    writeLDI(loc, (-val >> 8) & 0xff);
131    break;
132  case R_AVR_HI8_LDI:
133    writeLDI(loc, (val >> 8) & 0xff);
134    break;
135  case R_AVR_HH8_LDI_NEG:
136    writeLDI(loc, (-val >> 16) & 0xff);
137    break;
138  case R_AVR_HH8_LDI:
139    writeLDI(loc, (val >> 16) & 0xff);
140    break;
141  case R_AVR_MS8_LDI_NEG:
142    writeLDI(loc, (-val >> 24) & 0xff);
143    break;
144  case R_AVR_MS8_LDI:
145    writeLDI(loc, (val >> 24) & 0xff);
146    break;
147
148  case R_AVR_LO8_LDI_PM:
149    checkAlignment(loc, val, 2, rel);
150    writeLDI(loc, (val >> 1) & 0xff);
151    break;
152  case R_AVR_HI8_LDI_PM:
153    checkAlignment(loc, val, 2, rel);
154    writeLDI(loc, (val >> 9) & 0xff);
155    break;
156  case R_AVR_HH8_LDI_PM:
157    checkAlignment(loc, val, 2, rel);
158    writeLDI(loc, (val >> 17) & 0xff);
159    break;
160
161  case R_AVR_LO8_LDI_PM_NEG:
162    checkAlignment(loc, val, 2, rel);
163    writeLDI(loc, (-val >> 1) & 0xff);
164    break;
165  case R_AVR_HI8_LDI_PM_NEG:
166    checkAlignment(loc, val, 2, rel);
167    writeLDI(loc, (-val >> 9) & 0xff);
168    break;
169  case R_AVR_HH8_LDI_PM_NEG:
170    checkAlignment(loc, val, 2, rel);
171    writeLDI(loc, (-val >> 17) & 0xff);
172    break;
173
174  case R_AVR_LDS_STS_16: {
175    checkUInt(loc, val, 7, rel);
176    const uint16_t hi = val >> 4;
177    const uint16_t lo = val & 0xf;
178    write16le(loc, (read16le(loc) & 0xf8f0) | ((hi << 8) | lo));
179    break;
180  }
181
182  case R_AVR_PORT5:
183    checkUInt(loc, val, 5, rel);
184    write16le(loc, (read16le(loc) & 0xff07) | (val << 3));
185    break;
186  case R_AVR_PORT6:
187    checkUInt(loc, val, 6, rel);
188    write16le(loc, (read16le(loc) & 0xf9f0) | (val & 0x30) << 5 | (val & 0x0f));
189    break;
190
191  // Since every jump destination is word aligned we gain an extra bit
192  case R_AVR_7_PCREL: {
193    checkInt(loc, val, 7, rel);
194    checkAlignment(loc, val, 2, rel);
195    const uint16_t target = (val - 2) >> 1;
196    write16le(loc, (read16le(loc) & 0xfc07) | ((target & 0x7f) << 3));
197    break;
198  }
199  case R_AVR_13_PCREL: {
200    checkAlignment(loc, val, 2, rel);
201    const uint16_t target = (val - 2) >> 1;
202    write16le(loc, (read16le(loc) & 0xf000) | (target & 0xfff));
203    break;
204  }
205
206  case R_AVR_6:
207    checkInt(loc, val, 6, rel);
208    write16le(loc, (read16le(loc) & 0xd3f8) | (val & 0x20) << 8 |
209                       (val & 0x18) << 7 | (val & 0x07));
210    break;
211  case R_AVR_6_ADIW:
212    checkInt(loc, val, 6, rel);
213    write16le(loc, (read16le(loc) & 0xff30) | (val & 0x30) << 2 | (val & 0x0F));
214    break;
215
216  case R_AVR_CALL: {
217    uint16_t hi = val >> 17;
218    uint16_t lo = val >> 1;
219    write16le(loc, read16le(loc) | ((hi >> 1) << 4) | (hi & 1));
220    write16le(loc + 2, lo);
221    break;
222  }
223  default:
224    llvm_unreachable("unknown relocation");
225  }
226}
227
228TargetInfo *elf::getAVRTargetInfo() {
229  static AVR target;
230  return &target;
231}
232
233static uint32_t getEFlags(InputFile *file) {
234  return cast<ObjFile<ELF32LE>>(file)->getObj().getHeader().e_flags;
235}
236
237uint32_t AVR::calcEFlags() const {
238  assert(!ctx.objectFiles.empty());
239
240  uint32_t flags = getEFlags(ctx.objectFiles[0]);
241  bool hasLinkRelaxFlag = flags & EF_AVR_LINKRELAX_PREPARED;
242
243  for (InputFile *f : ArrayRef(ctx.objectFiles).slice(1)) {
244    uint32_t objFlags = getEFlags(f);
245    if ((objFlags & EF_AVR_ARCH_MASK) != (flags & EF_AVR_ARCH_MASK))
246      error(toString(f) +
247            ": cannot link object files with incompatible target ISA");
248    if (!(objFlags & EF_AVR_LINKRELAX_PREPARED))
249      hasLinkRelaxFlag = false;
250  }
251
252  if (!hasLinkRelaxFlag)
253    flags &= ~EF_AVR_LINKRELAX_PREPARED;
254
255  return flags;
256}
257