1/* 2 * ALSA driver for RME Digi9652 audio interfaces 3 * 4 * Copyright (c) 1999 IEM - Winfried Ritsch 5 * Copyright (c) 1999-2001 Paul Davis 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 20 * 21 */ 22 23#include <sound/driver.h> 24#include <linux/delay.h> 25#include <linux/init.h> 26#include <linux/interrupt.h> 27#include <linux/pci.h> 28#include <linux/slab.h> 29#include <linux/moduleparam.h> 30 31#include <sound/core.h> 32#include <sound/control.h> 33#include <sound/pcm.h> 34#include <sound/info.h> 35#include <sound/asoundef.h> 36#include <sound/initval.h> 37 38#include <asm/current.h> 39#include <asm/io.h> 40 41static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ 42static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ 43static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */ 44static int precise_ptr[SNDRV_CARDS]; /* Enable precise pointer */ 45 46module_param_array(index, int, NULL, 0444); 47MODULE_PARM_DESC(index, "Index value for RME Digi9652 (Hammerfall) soundcard."); 48module_param_array(id, charp, NULL, 0444); 49MODULE_PARM_DESC(id, "ID string for RME Digi9652 (Hammerfall) soundcard."); 50module_param_array(enable, bool, NULL, 0444); 51MODULE_PARM_DESC(enable, "Enable/disable specific RME96{52,36} soundcards."); 52module_param_array(precise_ptr, bool, NULL, 0444); 53MODULE_PARM_DESC(precise_ptr, "Enable precise pointer (doesn't work reliably)."); 54MODULE_AUTHOR("Paul Davis <pbd@op.net>, Winfried Ritsch"); 55MODULE_DESCRIPTION("RME Digi9652/Digi9636"); 56MODULE_LICENSE("GPL"); 57MODULE_SUPPORTED_DEVICE("{{RME,Hammerfall}," 58 "{RME,Hammerfall-Light}}"); 59 60/* The Hammerfall has two sets of 24 ADAT + 2 S/PDIF channels, one for 61 capture, one for playback. Both the ADAT and S/PDIF channels appear 62 to the host CPU in the same block of memory. There is no functional 63 difference between them in terms of access. 64 65 The Hammerfall Light is identical to the Hammerfall, except that it 66 has 2 sets 18 channels (16 ADAT + 2 S/PDIF) for capture and playback. 67*/ 68 69#define RME9652_NCHANNELS 26 70#define RME9636_NCHANNELS 18 71 72/* Preferred sync source choices - used by "sync_pref" control switch */ 73 74#define RME9652_SYNC_FROM_SPDIF 0 75#define RME9652_SYNC_FROM_ADAT1 1 76#define RME9652_SYNC_FROM_ADAT2 2 77#define RME9652_SYNC_FROM_ADAT3 3 78 79/* Possible sources of S/PDIF input */ 80 81#define RME9652_SPDIFIN_OPTICAL 0 /* optical (ADAT1) */ 82#define RME9652_SPDIFIN_COAXIAL 1 /* coaxial (RCA) */ 83#define RME9652_SPDIFIN_INTERN 2 /* internal (CDROM) */ 84 85/* ------------- Status-Register bits --------------------- */ 86 87#define RME9652_IRQ (1<<0) /* IRQ is High if not reset by irq_clear */ 88#define RME9652_lock_2 (1<<1) /* ADAT 3-PLL: 1=locked, 0=unlocked */ 89#define RME9652_lock_1 (1<<2) /* ADAT 2-PLL: 1=locked, 0=unlocked */ 90#define RME9652_lock_0 (1<<3) /* ADAT 1-PLL: 1=locked, 0=unlocked */ 91#define RME9652_fs48 (1<<4) /* sample rate is 0=44.1/88.2,1=48/96 Khz */ 92#define RME9652_wsel_rd (1<<5) /* if Word-Clock is used and valid then 1 */ 93 /* bits 6-15 encode h/w buffer pointer position */ 94#define RME9652_sync_2 (1<<16) /* if ADAT-IN 3 in sync to system clock */ 95#define RME9652_sync_1 (1<<17) /* if ADAT-IN 2 in sync to system clock */ 96#define RME9652_sync_0 (1<<18) /* if ADAT-IN 1 in sync to system clock */ 97#define RME9652_DS_rd (1<<19) /* 1=Double Speed Mode, 0=Normal Speed */ 98#define RME9652_tc_busy (1<<20) /* 1=time-code copy in progress (960ms) */ 99#define RME9652_tc_out (1<<21) /* time-code out bit */ 100#define RME9652_F_0 (1<<22) /* 000=64kHz, 100=88.2kHz, 011=96kHz */ 101#define RME9652_F_1 (1<<23) /* 111=32kHz, 110=44.1kHz, 101=48kHz, */ 102#define RME9652_F_2 (1<<24) /* external Crystal Chip if ERF=1 */ 103#define RME9652_ERF (1<<25) /* Error-Flag of SDPIF Receiver (1=No Lock) */ 104#define RME9652_buffer_id (1<<26) /* toggles by each interrupt on rec/play */ 105#define RME9652_tc_valid (1<<27) /* 1 = a signal is detected on time-code input */ 106#define RME9652_SPDIF_READ (1<<28) /* byte available from Rev 1.5+ S/PDIF interface */ 107 108#define RME9652_sync (RME9652_sync_0|RME9652_sync_1|RME9652_sync_2) 109#define RME9652_lock (RME9652_lock_0|RME9652_lock_1|RME9652_lock_2) 110#define RME9652_F (RME9652_F_0|RME9652_F_1|RME9652_F_2) 111#define rme9652_decode_spdif_rate(x) ((x)>>22) 112 113/* Bit 6..15 : h/w buffer pointer */ 114 115#define RME9652_buf_pos 0x000FFC0 116 117/* Bits 31,30,29 are bits 5,4,3 of h/w pointer position on later 118 Rev G EEPROMS and Rev 1.5 cards or later. 119*/ 120 121#define RME9652_REV15_buf_pos(x) ((((x)&0xE0000000)>>26)|((x)&RME9652_buf_pos)) 122 123/* amount of io space we remap for register access. i'm not sure we 124 even need this much, but 1K is nice round number :) 125*/ 126 127#define RME9652_IO_EXTENT 1024 128 129#define RME9652_init_buffer 0 130#define RME9652_play_buffer 32 /* holds ptr to 26x64kBit host RAM */ 131#define RME9652_rec_buffer 36 /* holds ptr to 26x64kBit host RAM */ 132#define RME9652_control_register 64 133#define RME9652_irq_clear 96 134#define RME9652_time_code 100 /* useful if used with alesis adat */ 135#define RME9652_thru_base 128 /* 132...228 Thru for 26 channels */ 136 137/* Read-only registers */ 138 139/* Writing to any of the register locations writes to the status 140 register. We'll use the first location as our point of access. 141*/ 142 143#define RME9652_status_register 0 144 145/* --------- Control-Register Bits ---------------- */ 146 147 148#define RME9652_start_bit (1<<0) /* start record/play */ 149 /* bits 1-3 encode buffersize/latency */ 150#define RME9652_Master (1<<4) /* Clock Mode Master=1,Slave/Auto=0 */ 151#define RME9652_IE (1<<5) /* Interupt Enable */ 152#define RME9652_freq (1<<6) /* samplerate 0=44.1/88.2, 1=48/96 kHz */ 153#define RME9652_freq1 (1<<7) /* if 0, 32kHz, else always 1 */ 154#define RME9652_DS (1<<8) /* Doule Speed 0=44.1/48, 1=88.2/96 Khz */ 155#define RME9652_PRO (1<<9) /* S/PDIF out: 0=consumer, 1=professional */ 156#define RME9652_EMP (1<<10) /* Emphasis 0=None, 1=ON */ 157#define RME9652_Dolby (1<<11) /* Non-audio bit 1=set, 0=unset */ 158#define RME9652_opt_out (1<<12) /* Use 1st optical OUT as SPDIF: 1=yes,0=no */ 159#define RME9652_wsel (1<<13) /* use Wordclock as sync (overwrites master) */ 160#define RME9652_inp_0 (1<<14) /* SPDIF-IN: 00=optical (ADAT1), */ 161#define RME9652_inp_1 (1<<15) /* 01=koaxial (Cinch), 10=Internal CDROM */ 162#define RME9652_SyncPref_ADAT2 (1<<16) 163#define RME9652_SyncPref_ADAT3 (1<<17) 164#define RME9652_SPDIF_RESET (1<<18) /* Rev 1.5+: h/w S/PDIF receiver */ 165#define RME9652_SPDIF_SELECT (1<<19) 166#define RME9652_SPDIF_CLOCK (1<<20) 167#define RME9652_SPDIF_WRITE (1<<21) 168#define RME9652_ADAT1_INTERNAL (1<<22) /* Rev 1.5+: if set, internal CD connector carries ADAT */ 169 170/* buffersize = 512Bytes * 2^n, where n is made from Bit2 ... Bit0 */ 171 172#define RME9652_latency 0x0e 173#define rme9652_encode_latency(x) (((x)&0x7)<<1) 174#define rme9652_decode_latency(x) (((x)>>1)&0x7) 175#define rme9652_running_double_speed(s) ((s)->control_register & RME9652_DS) 176#define RME9652_inp (RME9652_inp_0|RME9652_inp_1) 177#define rme9652_encode_spdif_in(x) (((x)&0x3)<<14) 178#define rme9652_decode_spdif_in(x) (((x)>>14)&0x3) 179 180#define RME9652_SyncPref_Mask (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3) 181#define RME9652_SyncPref_ADAT1 0 182#define RME9652_SyncPref_SPDIF (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3) 183 184/* the size of a substream (1 mono data stream) */ 185 186#define RME9652_CHANNEL_BUFFER_SAMPLES (16*1024) 187#define RME9652_CHANNEL_BUFFER_BYTES (4*RME9652_CHANNEL_BUFFER_SAMPLES) 188 189/* the size of the area we need to allocate for DMA transfers. the 190 size is the same regardless of the number of channels - the 191 9636 still uses the same memory area. 192 193 Note that we allocate 1 more channel than is apparently needed 194 because the h/w seems to write 1 byte beyond the end of the last 195 page. Sigh. 196*/ 197 198#define RME9652_DMA_AREA_BYTES ((RME9652_NCHANNELS+1) * RME9652_CHANNEL_BUFFER_BYTES) 199#define RME9652_DMA_AREA_KILOBYTES (RME9652_DMA_AREA_BYTES/1024) 200 201struct snd_rme9652 { 202 int dev; 203 204 spinlock_t lock; 205 int irq; 206 unsigned long port; 207 void __iomem *iobase; 208 209 int precise_ptr; 210 211 u32 control_register; /* cached value */ 212 u32 thru_bits; /* thru 1=on, 0=off channel 1=Bit1... channel 26= Bit26 */ 213 214 u32 creg_spdif; 215 u32 creg_spdif_stream; 216 217 char *card_name; /* hammerfall or hammerfall light names */ 218 219 size_t hw_offsetmask; /* &-with status register to get real hw_offset */ 220 size_t prev_hw_offset; /* previous hw offset */ 221 size_t max_jitter; /* maximum jitter in frames for 222 hw pointer */ 223 size_t period_bytes; /* guess what this is */ 224 225 unsigned char ds_channels; 226 unsigned char ss_channels; /* different for hammerfall/hammerfall-light */ 227 228 struct snd_dma_buffer playback_dma_buf; 229 struct snd_dma_buffer capture_dma_buf; 230 231 unsigned char *capture_buffer; /* suitably aligned address */ 232 unsigned char *playback_buffer; /* suitably aligned address */ 233 234 pid_t capture_pid; 235 pid_t playback_pid; 236 237 struct snd_pcm_substream *capture_substream; 238 struct snd_pcm_substream *playback_substream; 239 int running; 240 241 int passthru; /* non-zero if doing pass-thru */ 242 int hw_rev; /* h/w rev * 10 (i.e. 1.5 has hw_rev = 15) */ 243 244 int last_spdif_sample_rate; /* so that we can catch externally ... */ 245 int last_adat_sample_rate; /* ... induced rate changes */ 246 247 char *channel_map; 248 249 struct snd_card *card; 250 struct snd_pcm *pcm; 251 struct pci_dev *pci; 252 struct snd_kcontrol *spdif_ctl; 253 254}; 255 256/* These tables map the ALSA channels 1..N to the channels that we 257 need to use in order to find the relevant channel buffer. RME 258 refer to this kind of mapping as between "the ADAT channel and 259 the DMA channel." We index it using the logical audio channel, 260 and the value is the DMA channel (i.e. channel buffer number) 261 where the data for that channel can be read/written from/to. 262*/ 263 264static char channel_map_9652_ss[26] = { 265 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 266 18, 19, 20, 21, 22, 23, 24, 25 267}; 268 269static char channel_map_9636_ss[26] = { 270 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 271 /* channels 16 and 17 are S/PDIF */ 272 24, 25, 273 /* channels 18-25 don't exist */ 274 -1, -1, -1, -1, -1, -1, -1, -1 275}; 276 277static char channel_map_9652_ds[26] = { 278 /* ADAT channels are remapped */ 279 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 280 /* channels 12 and 13 are S/PDIF */ 281 24, 25, 282 /* others don't exist */ 283 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 284}; 285 286static char channel_map_9636_ds[26] = { 287 /* ADAT channels are remapped */ 288 1, 3, 5, 7, 9, 11, 13, 15, 289 /* channels 8 and 9 are S/PDIF */ 290 24, 25 291 /* others don't exist */ 292 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 293}; 294 295static int snd_hammerfall_get_buffer(struct pci_dev *pci, struct snd_dma_buffer *dmab, size_t size) 296{ 297 dmab->dev.type = SNDRV_DMA_TYPE_DEV; 298 dmab->dev.dev = snd_dma_pci_data(pci); 299 if (snd_dma_get_reserved_buf(dmab, snd_dma_pci_buf_id(pci))) { 300 if (dmab->bytes >= size) 301 return 0; 302 } 303 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci), 304 size, dmab) < 0) 305 return -ENOMEM; 306 return 0; 307} 308 309static void snd_hammerfall_free_buffer(struct snd_dma_buffer *dmab, struct pci_dev *pci) 310{ 311 if (dmab->area) { 312 dmab->dev.dev = NULL; /* make it anonymous */ 313 snd_dma_reserve_buf(dmab, snd_dma_pci_buf_id(pci)); 314 } 315} 316 317 318static struct pci_device_id snd_rme9652_ids[] = { 319 { 320 .vendor = 0x10ee, 321 .device = 0x3fc4, 322 .subvendor = PCI_ANY_ID, 323 .subdevice = PCI_ANY_ID, 324 }, /* RME Digi9652 */ 325 { 0, }, 326}; 327 328MODULE_DEVICE_TABLE(pci, snd_rme9652_ids); 329 330static inline void rme9652_write(struct snd_rme9652 *rme9652, int reg, int val) 331{ 332 writel(val, rme9652->iobase + reg); 333} 334 335static inline unsigned int rme9652_read(struct snd_rme9652 *rme9652, int reg) 336{ 337 return readl(rme9652->iobase + reg); 338} 339 340static inline int snd_rme9652_use_is_exclusive(struct snd_rme9652 *rme9652) 341{ 342 unsigned long flags; 343 int ret = 1; 344 345 spin_lock_irqsave(&rme9652->lock, flags); 346 if ((rme9652->playback_pid != rme9652->capture_pid) && 347 (rme9652->playback_pid >= 0) && (rme9652->capture_pid >= 0)) { 348 ret = 0; 349 } 350 spin_unlock_irqrestore(&rme9652->lock, flags); 351 return ret; 352} 353 354static inline int rme9652_adat_sample_rate(struct snd_rme9652 *rme9652) 355{ 356 if (rme9652_running_double_speed(rme9652)) { 357 return (rme9652_read(rme9652, RME9652_status_register) & 358 RME9652_fs48) ? 96000 : 88200; 359 } else { 360 return (rme9652_read(rme9652, RME9652_status_register) & 361 RME9652_fs48) ? 48000 : 44100; 362 } 363} 364 365static inline void rme9652_compute_period_size(struct snd_rme9652 *rme9652) 366{ 367 unsigned int i; 368 369 i = rme9652->control_register & RME9652_latency; 370 rme9652->period_bytes = 1 << ((rme9652_decode_latency(i) + 8)); 371 rme9652->hw_offsetmask = 372 (rme9652->period_bytes * 2 - 1) & RME9652_buf_pos; 373 rme9652->max_jitter = 80; 374} 375 376static snd_pcm_uframes_t rme9652_hw_pointer(struct snd_rme9652 *rme9652) 377{ 378 int status; 379 unsigned int offset, frag; 380 snd_pcm_uframes_t period_size = rme9652->period_bytes / 4; 381 snd_pcm_sframes_t delta; 382 383 status = rme9652_read(rme9652, RME9652_status_register); 384 if (!rme9652->precise_ptr) 385 return (status & RME9652_buffer_id) ? period_size : 0; 386 offset = status & RME9652_buf_pos; 387 388 /* The hardware may give a backward movement for up to 80 frames 389 Martin Kirst <martin.kirst@freenet.de> knows the details. 390 */ 391 392 delta = rme9652->prev_hw_offset - offset; 393 delta &= 0xffff; 394 if (delta <= (snd_pcm_sframes_t)rme9652->max_jitter * 4) 395 offset = rme9652->prev_hw_offset; 396 else 397 rme9652->prev_hw_offset = offset; 398 offset &= rme9652->hw_offsetmask; 399 offset /= 4; 400 frag = status & RME9652_buffer_id; 401 402 if (offset < period_size) { 403 if (offset > rme9652->max_jitter) { 404 if (frag) 405 printk(KERN_ERR "Unexpected hw_pointer position (bufid == 0): status: %x offset: %d\n", status, offset); 406 } else if (!frag) 407 return 0; 408 offset -= rme9652->max_jitter; 409 if (offset < 0) 410 offset += period_size * 2; 411 } else { 412 if (offset > period_size + rme9652->max_jitter) { 413 if (!frag) 414 printk(KERN_ERR "Unexpected hw_pointer position (bufid == 1): status: %x offset: %d\n", status, offset); 415 } else if (frag) 416 return period_size; 417 offset -= rme9652->max_jitter; 418 } 419 420 return offset; 421} 422 423static inline void rme9652_reset_hw_pointer(struct snd_rme9652 *rme9652) 424{ 425 int i; 426 427 /* reset the FIFO pointer to zero. We do this by writing to 8 428 registers, each of which is a 32bit wide register, and set 429 them all to zero. Note that s->iobase is a pointer to 430 int32, not pointer to char. 431 */ 432 433 for (i = 0; i < 8; i++) { 434 rme9652_write(rme9652, i * 4, 0); 435 udelay(10); 436 } 437 rme9652->prev_hw_offset = 0; 438} 439 440static inline void rme9652_start(struct snd_rme9652 *s) 441{ 442 s->control_register |= (RME9652_IE | RME9652_start_bit); 443 rme9652_write(s, RME9652_control_register, s->control_register); 444} 445 446static inline void rme9652_stop(struct snd_rme9652 *s) 447{ 448 s->control_register &= ~(RME9652_start_bit | RME9652_IE); 449 rme9652_write(s, RME9652_control_register, s->control_register); 450} 451 452static int rme9652_set_interrupt_interval(struct snd_rme9652 *s, 453 unsigned int frames) 454{ 455 int restart = 0; 456 int n; 457 458 spin_lock_irq(&s->lock); 459 460 if ((restart = s->running)) { 461 rme9652_stop(s); 462 } 463 464 frames >>= 7; 465 n = 0; 466 while (frames) { 467 n++; 468 frames >>= 1; 469 } 470 471 s->control_register &= ~RME9652_latency; 472 s->control_register |= rme9652_encode_latency(n); 473 474 rme9652_write(s, RME9652_control_register, s->control_register); 475 476 rme9652_compute_period_size(s); 477 478 if (restart) 479 rme9652_start(s); 480 481 spin_unlock_irq(&s->lock); 482 483 return 0; 484} 485 486static int rme9652_set_rate(struct snd_rme9652 *rme9652, int rate) 487{ 488 int restart; 489 int reject_if_open = 0; 490 int xrate; 491 492 if (!snd_rme9652_use_is_exclusive (rme9652)) { 493 return -EBUSY; 494 } 495 496 /* Changing from a "single speed" to a "double speed" rate is 497 not allowed if any substreams are open. This is because 498 such a change causes a shift in the location of 499 the DMA buffers and a reduction in the number of available 500 buffers. 501 502 Note that a similar but essentially insoluble problem 503 exists for externally-driven rate changes. All we can do 504 is to flag rate changes in the read/write routines. 505 */ 506 507 spin_lock_irq(&rme9652->lock); 508 xrate = rme9652_adat_sample_rate(rme9652); 509 510 switch (rate) { 511 case 44100: 512 if (xrate > 48000) { 513 reject_if_open = 1; 514 } 515 rate = 0; 516 break; 517 case 48000: 518 if (xrate > 48000) { 519 reject_if_open = 1; 520 } 521 rate = RME9652_freq; 522 break; 523 case 88200: 524 if (xrate < 48000) { 525 reject_if_open = 1; 526 } 527 rate = RME9652_DS; 528 break; 529 case 96000: 530 if (xrate < 48000) { 531 reject_if_open = 1; 532 } 533 rate = RME9652_DS | RME9652_freq; 534 break; 535 default: 536 spin_unlock_irq(&rme9652->lock); 537 return -EINVAL; 538 } 539 540 if (reject_if_open && (rme9652->capture_pid >= 0 || rme9652->playback_pid >= 0)) { 541 spin_unlock_irq(&rme9652->lock); 542 return -EBUSY; 543 } 544 545 if ((restart = rme9652->running)) { 546 rme9652_stop(rme9652); 547 } 548 rme9652->control_register &= ~(RME9652_freq | RME9652_DS); 549 rme9652->control_register |= rate; 550 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register); 551 552 if (restart) { 553 rme9652_start(rme9652); 554 } 555 556 if (rate & RME9652_DS) { 557 if (rme9652->ss_channels == RME9652_NCHANNELS) { 558 rme9652->channel_map = channel_map_9652_ds; 559 } else { 560 rme9652->channel_map = channel_map_9636_ds; 561 } 562 } else { 563 if (rme9652->ss_channels == RME9652_NCHANNELS) { 564 rme9652->channel_map = channel_map_9652_ss; 565 } else { 566 rme9652->channel_map = channel_map_9636_ss; 567 } 568 } 569 570 spin_unlock_irq(&rme9652->lock); 571 return 0; 572} 573 574static void rme9652_set_thru(struct snd_rme9652 *rme9652, int channel, int enable) 575{ 576 int i; 577 578 rme9652->passthru = 0; 579 580 if (channel < 0) { 581 582 /* set thru for all channels */ 583 584 if (enable) { 585 for (i = 0; i < RME9652_NCHANNELS; i++) { 586 rme9652->thru_bits |= (1 << i); 587 rme9652_write(rme9652, RME9652_thru_base + i * 4, 1); 588 } 589 } else { 590 for (i = 0; i < RME9652_NCHANNELS; i++) { 591 rme9652->thru_bits &= ~(1 << i); 592 rme9652_write(rme9652, RME9652_thru_base + i * 4, 0); 593 } 594 } 595 596 } else { 597 int mapped_channel; 598 599 snd_assert(channel == RME9652_NCHANNELS, return); 600 601 mapped_channel = rme9652->channel_map[channel]; 602 603 if (enable) { 604 rme9652->thru_bits |= (1 << mapped_channel); 605 } else { 606 rme9652->thru_bits &= ~(1 << mapped_channel); 607 } 608 609 rme9652_write(rme9652, 610 RME9652_thru_base + mapped_channel * 4, 611 enable ? 1 : 0); 612 } 613} 614 615static int rme9652_set_passthru(struct snd_rme9652 *rme9652, int onoff) 616{ 617 if (onoff) { 618 rme9652_set_thru(rme9652, -1, 1); 619 620 /* we don't want interrupts, so do a 621 custom version of rme9652_start(). 622 */ 623 624 rme9652->control_register = 625 RME9652_inp_0 | 626 rme9652_encode_latency(7) | 627 RME9652_start_bit; 628 629 rme9652_reset_hw_pointer(rme9652); 630 631 rme9652_write(rme9652, RME9652_control_register, 632 rme9652->control_register); 633 rme9652->passthru = 1; 634 } else { 635 rme9652_set_thru(rme9652, -1, 0); 636 rme9652_stop(rme9652); 637 rme9652->passthru = 0; 638 } 639 640 return 0; 641} 642 643static void rme9652_spdif_set_bit (struct snd_rme9652 *rme9652, int mask, int onoff) 644{ 645 if (onoff) 646 rme9652->control_register |= mask; 647 else 648 rme9652->control_register &= ~mask; 649 650 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register); 651} 652 653static void rme9652_spdif_write_byte (struct snd_rme9652 *rme9652, const int val) 654{ 655 long mask; 656 long i; 657 658 for (i = 0, mask = 0x80; i < 8; i++, mask >>= 1) { 659 if (val & mask) 660 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_WRITE, 1); 661 else 662 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_WRITE, 0); 663 664 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 1); 665 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 0); 666 } 667} 668 669static int rme9652_spdif_read_byte (struct snd_rme9652 *rme9652) 670{ 671 long mask; 672 long val; 673 long i; 674 675 val = 0; 676 677 for (i = 0, mask = 0x80; i < 8; i++, mask >>= 1) { 678 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 1); 679 if (rme9652_read (rme9652, RME9652_status_register) & RME9652_SPDIF_READ) 680 val |= mask; 681 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 0); 682 } 683 684 return val; 685} 686 687static void rme9652_write_spdif_codec (struct snd_rme9652 *rme9652, const int address, const int data) 688{ 689 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1); 690 rme9652_spdif_write_byte (rme9652, 0x20); 691 rme9652_spdif_write_byte (rme9652, address); 692 rme9652_spdif_write_byte (rme9652, data); 693 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0); 694} 695 696 697static int rme9652_spdif_read_codec (struct snd_rme9652 *rme9652, const int address) 698{ 699 int ret; 700 701 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1); 702 rme9652_spdif_write_byte (rme9652, 0x20); 703 rme9652_spdif_write_byte (rme9652, address); 704 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0); 705 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1); 706 707 rme9652_spdif_write_byte (rme9652, 0x21); 708 ret = rme9652_spdif_read_byte (rme9652); 709 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0); 710 711 return ret; 712} 713 714static void rme9652_initialize_spdif_receiver (struct snd_rme9652 *rme9652) 715{ 716 717 rme9652->control_register |= RME9652_SPDIF_RESET; 718 719 rme9652_write_spdif_codec (rme9652, 4, 0x40); 720 rme9652_write_spdif_codec (rme9652, 17, 0x13); 721 rme9652_write_spdif_codec (rme9652, 6, 0x02); 722} 723 724static inline int rme9652_spdif_sample_rate(struct snd_rme9652 *s) 725{ 726 unsigned int rate_bits; 727 728 if (rme9652_read(s, RME9652_status_register) & RME9652_ERF) { 729 return -1; /* error condition */ 730 } 731 732 if (s->hw_rev == 15) { 733 734 int x, y, ret; 735 736 x = rme9652_spdif_read_codec (s, 30); 737 738 if (x != 0) 739 y = 48000 * 64 / x; 740 else 741 y = 0; 742 743 if (y > 30400 && y < 33600) ret = 32000; 744 else if (y > 41900 && y < 46000) ret = 44100; 745 else if (y > 46000 && y < 50400) ret = 48000; 746 else if (y > 60800 && y < 67200) ret = 64000; 747 else if (y > 83700 && y < 92000) ret = 88200; 748 else if (y > 92000 && y < 100000) ret = 96000; 749 else ret = 0; 750 return ret; 751 } 752 753 rate_bits = rme9652_read(s, RME9652_status_register) & RME9652_F; 754 755 switch (rme9652_decode_spdif_rate(rate_bits)) { 756 case 0x7: 757 return 32000; 758 break; 759 760 case 0x6: 761 return 44100; 762 break; 763 764 case 0x5: 765 return 48000; 766 break; 767 768 case 0x4: 769 return 88200; 770 break; 771 772 case 0x3: 773 return 96000; 774 break; 775 776 case 0x0: 777 return 64000; 778 break; 779 780 default: 781 snd_printk(KERN_ERR "%s: unknown S/PDIF input rate (bits = 0x%x)\n", 782 s->card_name, rate_bits); 783 return 0; 784 break; 785 } 786} 787 788/*----------------------------------------------------------------------------- 789 Control Interface 790 ----------------------------------------------------------------------------*/ 791 792static u32 snd_rme9652_convert_from_aes(struct snd_aes_iec958 *aes) 793{ 794 u32 val = 0; 795 val |= (aes->status[0] & IEC958_AES0_PROFESSIONAL) ? RME9652_PRO : 0; 796 val |= (aes->status[0] & IEC958_AES0_NONAUDIO) ? RME9652_Dolby : 0; 797 if (val & RME9652_PRO) 798 val |= (aes->status[0] & IEC958_AES0_PRO_EMPHASIS_5015) ? RME9652_EMP : 0; 799 else 800 val |= (aes->status[0] & IEC958_AES0_CON_EMPHASIS_5015) ? RME9652_EMP : 0; 801 return val; 802} 803 804static void snd_rme9652_convert_to_aes(struct snd_aes_iec958 *aes, u32 val) 805{ 806 aes->status[0] = ((val & RME9652_PRO) ? IEC958_AES0_PROFESSIONAL : 0) | 807 ((val & RME9652_Dolby) ? IEC958_AES0_NONAUDIO : 0); 808 if (val & RME9652_PRO) 809 aes->status[0] |= (val & RME9652_EMP) ? IEC958_AES0_PRO_EMPHASIS_5015 : 0; 810 else 811 aes->status[0] |= (val & RME9652_EMP) ? IEC958_AES0_CON_EMPHASIS_5015 : 0; 812} 813 814static int snd_rme9652_control_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 815{ 816 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 817 uinfo->count = 1; 818 return 0; 819} 820 821static int snd_rme9652_control_spdif_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 822{ 823 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 824 825 snd_rme9652_convert_to_aes(&ucontrol->value.iec958, rme9652->creg_spdif); 826 return 0; 827} 828 829static int snd_rme9652_control_spdif_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 830{ 831 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 832 int change; 833 u32 val; 834 835 val = snd_rme9652_convert_from_aes(&ucontrol->value.iec958); 836 spin_lock_irq(&rme9652->lock); 837 change = val != rme9652->creg_spdif; 838 rme9652->creg_spdif = val; 839 spin_unlock_irq(&rme9652->lock); 840 return change; 841} 842 843static int snd_rme9652_control_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 844{ 845 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 846 uinfo->count = 1; 847 return 0; 848} 849 850static int snd_rme9652_control_spdif_stream_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 851{ 852 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 853 854 snd_rme9652_convert_to_aes(&ucontrol->value.iec958, rme9652->creg_spdif_stream); 855 return 0; 856} 857 858static int snd_rme9652_control_spdif_stream_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 859{ 860 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 861 int change; 862 u32 val; 863 864 val = snd_rme9652_convert_from_aes(&ucontrol->value.iec958); 865 spin_lock_irq(&rme9652->lock); 866 change = val != rme9652->creg_spdif_stream; 867 rme9652->creg_spdif_stream = val; 868 rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP); 869 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= val); 870 spin_unlock_irq(&rme9652->lock); 871 return change; 872} 873 874static int snd_rme9652_control_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 875{ 876 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 877 uinfo->count = 1; 878 return 0; 879} 880 881static int snd_rme9652_control_spdif_mask_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 882{ 883 ucontrol->value.iec958.status[0] = kcontrol->private_value; 884 return 0; 885} 886 887#define RME9652_ADAT1_IN(xname, xindex) \ 888{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 889 .info = snd_rme9652_info_adat1_in, \ 890 .get = snd_rme9652_get_adat1_in, \ 891 .put = snd_rme9652_put_adat1_in } 892 893static unsigned int rme9652_adat1_in(struct snd_rme9652 *rme9652) 894{ 895 if (rme9652->control_register & RME9652_ADAT1_INTERNAL) 896 return 1; 897 return 0; 898} 899 900static int rme9652_set_adat1_input(struct snd_rme9652 *rme9652, int internal) 901{ 902 int restart = 0; 903 904 if (internal) { 905 rme9652->control_register |= RME9652_ADAT1_INTERNAL; 906 } else { 907 rme9652->control_register &= ~RME9652_ADAT1_INTERNAL; 908 } 909 910 911 if ((restart = rme9652->running)) { 912 rme9652_stop(rme9652); 913 } 914 915 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register); 916 917 if (restart) { 918 rme9652_start(rme9652); 919 } 920 921 return 0; 922} 923 924static int snd_rme9652_info_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 925{ 926 static char *texts[2] = {"ADAT1", "Internal"}; 927 928 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 929 uinfo->count = 1; 930 uinfo->value.enumerated.items = 2; 931 if (uinfo->value.enumerated.item > 1) 932 uinfo->value.enumerated.item = 1; 933 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); 934 return 0; 935} 936 937static int snd_rme9652_get_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 938{ 939 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 940 941 spin_lock_irq(&rme9652->lock); 942 ucontrol->value.enumerated.item[0] = rme9652_adat1_in(rme9652); 943 spin_unlock_irq(&rme9652->lock); 944 return 0; 945} 946 947static int snd_rme9652_put_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 948{ 949 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 950 int change; 951 unsigned int val; 952 953 if (!snd_rme9652_use_is_exclusive(rme9652)) 954 return -EBUSY; 955 val = ucontrol->value.enumerated.item[0] % 2; 956 spin_lock_irq(&rme9652->lock); 957 change = val != rme9652_adat1_in(rme9652); 958 if (change) 959 rme9652_set_adat1_input(rme9652, val); 960 spin_unlock_irq(&rme9652->lock); 961 return change; 962} 963 964#define RME9652_SPDIF_IN(xname, xindex) \ 965{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 966 .info = snd_rme9652_info_spdif_in, \ 967 .get = snd_rme9652_get_spdif_in, .put = snd_rme9652_put_spdif_in } 968 969static unsigned int rme9652_spdif_in(struct snd_rme9652 *rme9652) 970{ 971 return rme9652_decode_spdif_in(rme9652->control_register & 972 RME9652_inp); 973} 974 975static int rme9652_set_spdif_input(struct snd_rme9652 *rme9652, int in) 976{ 977 int restart = 0; 978 979 rme9652->control_register &= ~RME9652_inp; 980 rme9652->control_register |= rme9652_encode_spdif_in(in); 981 982 if ((restart = rme9652->running)) { 983 rme9652_stop(rme9652); 984 } 985 986 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register); 987 988 if (restart) { 989 rme9652_start(rme9652); 990 } 991 992 return 0; 993} 994 995static int snd_rme9652_info_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 996{ 997 static char *texts[3] = {"ADAT1", "Coaxial", "Internal"}; 998 999 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 1000 uinfo->count = 1; 1001 uinfo->value.enumerated.items = 3; 1002 if (uinfo->value.enumerated.item > 2) 1003 uinfo->value.enumerated.item = 2; 1004 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); 1005 return 0; 1006} 1007 1008static int snd_rme9652_get_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1009{ 1010 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1011 1012 spin_lock_irq(&rme9652->lock); 1013 ucontrol->value.enumerated.item[0] = rme9652_spdif_in(rme9652); 1014 spin_unlock_irq(&rme9652->lock); 1015 return 0; 1016} 1017 1018static int snd_rme9652_put_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1019{ 1020 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1021 int change; 1022 unsigned int val; 1023 1024 if (!snd_rme9652_use_is_exclusive(rme9652)) 1025 return -EBUSY; 1026 val = ucontrol->value.enumerated.item[0] % 3; 1027 spin_lock_irq(&rme9652->lock); 1028 change = val != rme9652_spdif_in(rme9652); 1029 if (change) 1030 rme9652_set_spdif_input(rme9652, val); 1031 spin_unlock_irq(&rme9652->lock); 1032 return change; 1033} 1034 1035#define RME9652_SPDIF_OUT(xname, xindex) \ 1036{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 1037 .info = snd_rme9652_info_spdif_out, \ 1038 .get = snd_rme9652_get_spdif_out, .put = snd_rme9652_put_spdif_out } 1039 1040static int rme9652_spdif_out(struct snd_rme9652 *rme9652) 1041{ 1042 return (rme9652->control_register & RME9652_opt_out) ? 1 : 0; 1043} 1044 1045static int rme9652_set_spdif_output(struct snd_rme9652 *rme9652, int out) 1046{ 1047 int restart = 0; 1048 1049 if (out) { 1050 rme9652->control_register |= RME9652_opt_out; 1051 } else { 1052 rme9652->control_register &= ~RME9652_opt_out; 1053 } 1054 1055 if ((restart = rme9652->running)) { 1056 rme9652_stop(rme9652); 1057 } 1058 1059 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register); 1060 1061 if (restart) { 1062 rme9652_start(rme9652); 1063 } 1064 1065 return 0; 1066} 1067 1068static int snd_rme9652_info_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 1069{ 1070 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 1071 uinfo->count = 1; 1072 uinfo->value.integer.min = 0; 1073 uinfo->value.integer.max = 1; 1074 return 0; 1075} 1076 1077static int snd_rme9652_get_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1078{ 1079 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1080 1081 spin_lock_irq(&rme9652->lock); 1082 ucontrol->value.integer.value[0] = rme9652_spdif_out(rme9652); 1083 spin_unlock_irq(&rme9652->lock); 1084 return 0; 1085} 1086 1087static int snd_rme9652_put_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1088{ 1089 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1090 int change; 1091 unsigned int val; 1092 1093 if (!snd_rme9652_use_is_exclusive(rme9652)) 1094 return -EBUSY; 1095 val = ucontrol->value.integer.value[0] & 1; 1096 spin_lock_irq(&rme9652->lock); 1097 change = (int)val != rme9652_spdif_out(rme9652); 1098 rme9652_set_spdif_output(rme9652, val); 1099 spin_unlock_irq(&rme9652->lock); 1100 return change; 1101} 1102 1103#define RME9652_SYNC_MODE(xname, xindex) \ 1104{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 1105 .info = snd_rme9652_info_sync_mode, \ 1106 .get = snd_rme9652_get_sync_mode, .put = snd_rme9652_put_sync_mode } 1107 1108static int rme9652_sync_mode(struct snd_rme9652 *rme9652) 1109{ 1110 if (rme9652->control_register & RME9652_wsel) { 1111 return 2; 1112 } else if (rme9652->control_register & RME9652_Master) { 1113 return 1; 1114 } else { 1115 return 0; 1116 } 1117} 1118 1119static int rme9652_set_sync_mode(struct snd_rme9652 *rme9652, int mode) 1120{ 1121 int restart = 0; 1122 1123 switch (mode) { 1124 case 0: 1125 rme9652->control_register &= 1126 ~(RME9652_Master | RME9652_wsel); 1127 break; 1128 case 1: 1129 rme9652->control_register = 1130 (rme9652->control_register & ~RME9652_wsel) | RME9652_Master; 1131 break; 1132 case 2: 1133 rme9652->control_register |= 1134 (RME9652_Master | RME9652_wsel); 1135 break; 1136 } 1137 1138 if ((restart = rme9652->running)) { 1139 rme9652_stop(rme9652); 1140 } 1141 1142 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register); 1143 1144 if (restart) { 1145 rme9652_start(rme9652); 1146 } 1147 1148 return 0; 1149} 1150 1151static int snd_rme9652_info_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 1152{ 1153 static char *texts[3] = {"AutoSync", "Master", "Word Clock"}; 1154 1155 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 1156 uinfo->count = 1; 1157 uinfo->value.enumerated.items = 3; 1158 if (uinfo->value.enumerated.item > 2) 1159 uinfo->value.enumerated.item = 2; 1160 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); 1161 return 0; 1162} 1163 1164static int snd_rme9652_get_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1165{ 1166 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1167 1168 spin_lock_irq(&rme9652->lock); 1169 ucontrol->value.enumerated.item[0] = rme9652_sync_mode(rme9652); 1170 spin_unlock_irq(&rme9652->lock); 1171 return 0; 1172} 1173 1174static int snd_rme9652_put_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1175{ 1176 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1177 int change; 1178 unsigned int val; 1179 1180 val = ucontrol->value.enumerated.item[0] % 3; 1181 spin_lock_irq(&rme9652->lock); 1182 change = (int)val != rme9652_sync_mode(rme9652); 1183 rme9652_set_sync_mode(rme9652, val); 1184 spin_unlock_irq(&rme9652->lock); 1185 return change; 1186} 1187 1188#define RME9652_SYNC_PREF(xname, xindex) \ 1189{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 1190 .info = snd_rme9652_info_sync_pref, \ 1191 .get = snd_rme9652_get_sync_pref, .put = snd_rme9652_put_sync_pref } 1192 1193static int rme9652_sync_pref(struct snd_rme9652 *rme9652) 1194{ 1195 switch (rme9652->control_register & RME9652_SyncPref_Mask) { 1196 case RME9652_SyncPref_ADAT1: 1197 return RME9652_SYNC_FROM_ADAT1; 1198 case RME9652_SyncPref_ADAT2: 1199 return RME9652_SYNC_FROM_ADAT2; 1200 case RME9652_SyncPref_ADAT3: 1201 return RME9652_SYNC_FROM_ADAT3; 1202 case RME9652_SyncPref_SPDIF: 1203 return RME9652_SYNC_FROM_SPDIF; 1204 } 1205 /* Not reachable */ 1206 return 0; 1207} 1208 1209static int rme9652_set_sync_pref(struct snd_rme9652 *rme9652, int pref) 1210{ 1211 int restart; 1212 1213 rme9652->control_register &= ~RME9652_SyncPref_Mask; 1214 switch (pref) { 1215 case RME9652_SYNC_FROM_ADAT1: 1216 rme9652->control_register |= RME9652_SyncPref_ADAT1; 1217 break; 1218 case RME9652_SYNC_FROM_ADAT2: 1219 rme9652->control_register |= RME9652_SyncPref_ADAT2; 1220 break; 1221 case RME9652_SYNC_FROM_ADAT3: 1222 rme9652->control_register |= RME9652_SyncPref_ADAT3; 1223 break; 1224 case RME9652_SYNC_FROM_SPDIF: 1225 rme9652->control_register |= RME9652_SyncPref_SPDIF; 1226 break; 1227 } 1228 1229 if ((restart = rme9652->running)) { 1230 rme9652_stop(rme9652); 1231 } 1232 1233 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register); 1234 1235 if (restart) { 1236 rme9652_start(rme9652); 1237 } 1238 1239 return 0; 1240} 1241 1242static int snd_rme9652_info_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 1243{ 1244 static char *texts[4] = {"IEC958 In", "ADAT1 In", "ADAT2 In", "ADAT3 In"}; 1245 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1246 1247 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 1248 uinfo->count = 1; 1249 uinfo->value.enumerated.items = rme9652->ss_channels == RME9652_NCHANNELS ? 4 : 3; 1250 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) 1251 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1; 1252 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); 1253 return 0; 1254} 1255 1256static int snd_rme9652_get_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1257{ 1258 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1259 1260 spin_lock_irq(&rme9652->lock); 1261 ucontrol->value.enumerated.item[0] = rme9652_sync_pref(rme9652); 1262 spin_unlock_irq(&rme9652->lock); 1263 return 0; 1264} 1265 1266static int snd_rme9652_put_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1267{ 1268 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1269 int change, max; 1270 unsigned int val; 1271 1272 if (!snd_rme9652_use_is_exclusive(rme9652)) 1273 return -EBUSY; 1274 max = rme9652->ss_channels == RME9652_NCHANNELS ? 4 : 3; 1275 val = ucontrol->value.enumerated.item[0] % max; 1276 spin_lock_irq(&rme9652->lock); 1277 change = (int)val != rme9652_sync_pref(rme9652); 1278 rme9652_set_sync_pref(rme9652, val); 1279 spin_unlock_irq(&rme9652->lock); 1280 return change; 1281} 1282 1283static int snd_rme9652_info_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 1284{ 1285 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1286 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 1287 uinfo->count = rme9652->ss_channels; 1288 uinfo->value.integer.min = 0; 1289 uinfo->value.integer.max = 1; 1290 return 0; 1291} 1292 1293static int snd_rme9652_get_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1294{ 1295 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1296 unsigned int k; 1297 u32 thru_bits = rme9652->thru_bits; 1298 1299 for (k = 0; k < rme9652->ss_channels; ++k) { 1300 ucontrol->value.integer.value[k] = !!(thru_bits & (1 << k)); 1301 } 1302 return 0; 1303} 1304 1305static int snd_rme9652_put_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1306{ 1307 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1308 int change; 1309 unsigned int chn; 1310 u32 thru_bits = 0; 1311 1312 if (!snd_rme9652_use_is_exclusive(rme9652)) 1313 return -EBUSY; 1314 1315 for (chn = 0; chn < rme9652->ss_channels; ++chn) { 1316 if (ucontrol->value.integer.value[chn]) 1317 thru_bits |= 1 << chn; 1318 } 1319 1320 spin_lock_irq(&rme9652->lock); 1321 change = thru_bits ^ rme9652->thru_bits; 1322 if (change) { 1323 for (chn = 0; chn < rme9652->ss_channels; ++chn) { 1324 if (!(change & (1 << chn))) 1325 continue; 1326 rme9652_set_thru(rme9652,chn,thru_bits&(1<<chn)); 1327 } 1328 } 1329 spin_unlock_irq(&rme9652->lock); 1330 return !!change; 1331} 1332 1333#define RME9652_PASSTHRU(xname, xindex) \ 1334{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 1335 .info = snd_rme9652_info_passthru, \ 1336 .put = snd_rme9652_put_passthru, \ 1337 .get = snd_rme9652_get_passthru } 1338 1339static int snd_rme9652_info_passthru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 1340{ 1341 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 1342 uinfo->count = 1; 1343 uinfo->value.integer.min = 0; 1344 uinfo->value.integer.max = 1; 1345 return 0; 1346} 1347 1348static int snd_rme9652_get_passthru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1349{ 1350 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1351 1352 spin_lock_irq(&rme9652->lock); 1353 ucontrol->value.integer.value[0] = rme9652->passthru; 1354 spin_unlock_irq(&rme9652->lock); 1355 return 0; 1356} 1357 1358static int snd_rme9652_put_passthru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1359{ 1360 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1361 int change; 1362 unsigned int val; 1363 int err = 0; 1364 1365 if (!snd_rme9652_use_is_exclusive(rme9652)) 1366 return -EBUSY; 1367 1368 val = ucontrol->value.integer.value[0] & 1; 1369 spin_lock_irq(&rme9652->lock); 1370 change = (ucontrol->value.integer.value[0] != rme9652->passthru); 1371 if (change) 1372 err = rme9652_set_passthru(rme9652, val); 1373 spin_unlock_irq(&rme9652->lock); 1374 return err ? err : change; 1375} 1376 1377/* Read-only switches */ 1378 1379#define RME9652_SPDIF_RATE(xname, xindex) \ 1380{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 1381 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \ 1382 .info = snd_rme9652_info_spdif_rate, \ 1383 .get = snd_rme9652_get_spdif_rate } 1384 1385static int snd_rme9652_info_spdif_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 1386{ 1387 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 1388 uinfo->count = 1; 1389 uinfo->value.integer.min = 0; 1390 uinfo->value.integer.max = 96000; 1391 return 0; 1392} 1393 1394static int snd_rme9652_get_spdif_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1395{ 1396 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1397 1398 spin_lock_irq(&rme9652->lock); 1399 ucontrol->value.integer.value[0] = rme9652_spdif_sample_rate(rme9652); 1400 spin_unlock_irq(&rme9652->lock); 1401 return 0; 1402} 1403 1404#define RME9652_ADAT_SYNC(xname, xindex, xidx) \ 1405{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 1406 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \ 1407 .info = snd_rme9652_info_adat_sync, \ 1408 .get = snd_rme9652_get_adat_sync, .private_value = xidx } 1409 1410static int snd_rme9652_info_adat_sync(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 1411{ 1412 static char *texts[4] = {"No Lock", "Lock", "No Lock Sync", "Lock Sync"}; 1413 1414 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 1415 uinfo->count = 1; 1416 uinfo->value.enumerated.items = 4; 1417 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) 1418 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1; 1419 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); 1420 return 0; 1421} 1422 1423static int snd_rme9652_get_adat_sync(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1424{ 1425 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1426 unsigned int mask1, mask2, val; 1427 1428 switch (kcontrol->private_value) { 1429 case 0: mask1 = RME9652_lock_0; mask2 = RME9652_sync_0; break; 1430 case 1: mask1 = RME9652_lock_1; mask2 = RME9652_sync_1; break; 1431 case 2: mask1 = RME9652_lock_2; mask2 = RME9652_sync_2; break; 1432 default: return -EINVAL; 1433 } 1434 val = rme9652_read(rme9652, RME9652_status_register); 1435 ucontrol->value.enumerated.item[0] = (val & mask1) ? 1 : 0; 1436 ucontrol->value.enumerated.item[0] |= (val & mask2) ? 2 : 0; 1437 return 0; 1438} 1439 1440#define RME9652_TC_VALID(xname, xindex) \ 1441{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 1442 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \ 1443 .info = snd_rme9652_info_tc_valid, \ 1444 .get = snd_rme9652_get_tc_valid } 1445 1446static int snd_rme9652_info_tc_valid(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 1447{ 1448 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 1449 uinfo->count = 1; 1450 uinfo->value.integer.min = 0; 1451 uinfo->value.integer.max = 1; 1452 return 0; 1453} 1454 1455static int snd_rme9652_get_tc_valid(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1456{ 1457 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1458 1459 ucontrol->value.integer.value[0] = 1460 (rme9652_read(rme9652, RME9652_status_register) & RME9652_tc_valid) ? 1 : 0; 1461 return 0; 1462} 1463 1464#ifdef ALSA_HAS_STANDARD_WAY_OF_RETURNING_TIMECODE 1465 1466 1467static int snd_rme9652_get_tc_value(void *private_data, 1468 snd_kswitch_t *kswitch, 1469 snd_switch_t *uswitch) 1470{ 1471 struct snd_rme9652 *s = (struct snd_rme9652 *) private_data; 1472 u32 value; 1473 int i; 1474 1475 uswitch->type = SNDRV_SW_TYPE_DWORD; 1476 1477 if ((rme9652_read(s, RME9652_status_register) & 1478 RME9652_tc_valid) == 0) { 1479 uswitch->value.data32[0] = 0; 1480 return 0; 1481 } 1482 1483 /* timecode request */ 1484 1485 rme9652_write(s, RME9652_time_code, 0); 1486 1487 1488 for (i = 0; i < 50; i++) { 1489 if (!(rme9652_read(s, i * 4) & RME9652_tc_busy)) 1490 break; 1491 } 1492 1493 if (!(rme9652_read(s, i * 4) & RME9652_tc_busy)) { 1494 return -EIO; 1495 } 1496 1497 value = 0; 1498 1499 for (i = 0; i < 32; i++) { 1500 value >>= 1; 1501 1502 if (rme9652_read(s, i * 4) & RME9652_tc_out) 1503 value |= 0x80000000; 1504 } 1505 1506 if (value > 2 * 60 * 48000) { 1507 value -= 2 * 60 * 48000; 1508 } else { 1509 value = 0; 1510 } 1511 1512 uswitch->value.data32[0] = value; 1513 1514 return 0; 1515} 1516 1517#endif /* ALSA_HAS_STANDARD_WAY_OF_RETURNING_TIMECODE */ 1518 1519static struct snd_kcontrol_new snd_rme9652_controls[] = { 1520{ 1521 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1522 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT), 1523 .info = snd_rme9652_control_spdif_info, 1524 .get = snd_rme9652_control_spdif_get, 1525 .put = snd_rme9652_control_spdif_put, 1526}, 1527{ 1528 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE, 1529 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1530 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM), 1531 .info = snd_rme9652_control_spdif_stream_info, 1532 .get = snd_rme9652_control_spdif_stream_get, 1533 .put = snd_rme9652_control_spdif_stream_put, 1534}, 1535{ 1536 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1537 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1538 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK), 1539 .info = snd_rme9652_control_spdif_mask_info, 1540 .get = snd_rme9652_control_spdif_mask_get, 1541 .private_value = IEC958_AES0_NONAUDIO | 1542 IEC958_AES0_PROFESSIONAL | 1543 IEC958_AES0_CON_EMPHASIS, 1544}, 1545{ 1546 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1547 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1548 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK), 1549 .info = snd_rme9652_control_spdif_mask_info, 1550 .get = snd_rme9652_control_spdif_mask_get, 1551 .private_value = IEC958_AES0_NONAUDIO | 1552 IEC958_AES0_PROFESSIONAL | 1553 IEC958_AES0_PRO_EMPHASIS, 1554}, 1555RME9652_SPDIF_IN("IEC958 Input Connector", 0), 1556RME9652_SPDIF_OUT("IEC958 Output also on ADAT1", 0), 1557RME9652_SYNC_MODE("Sync Mode", 0), 1558RME9652_SYNC_PREF("Preferred Sync Source", 0), 1559{ 1560 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1561 .name = "Channels Thru", 1562 .index = 0, 1563 .info = snd_rme9652_info_thru, 1564 .get = snd_rme9652_get_thru, 1565 .put = snd_rme9652_put_thru, 1566}, 1567RME9652_SPDIF_RATE("IEC958 Sample Rate", 0), 1568RME9652_ADAT_SYNC("ADAT1 Sync Check", 0, 0), 1569RME9652_ADAT_SYNC("ADAT2 Sync Check", 0, 1), 1570RME9652_TC_VALID("Timecode Valid", 0), 1571RME9652_PASSTHRU("Passthru", 0) 1572}; 1573 1574static struct snd_kcontrol_new snd_rme9652_adat3_check = 1575RME9652_ADAT_SYNC("ADAT3 Sync Check", 0, 2); 1576 1577static struct snd_kcontrol_new snd_rme9652_adat1_input = 1578RME9652_ADAT1_IN("ADAT1 Input Source", 0); 1579 1580static int snd_rme9652_create_controls(struct snd_card *card, struct snd_rme9652 *rme9652) 1581{ 1582 unsigned int idx; 1583 int err; 1584 struct snd_kcontrol *kctl; 1585 1586 for (idx = 0; idx < ARRAY_SIZE(snd_rme9652_controls); idx++) { 1587 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_controls[idx], rme9652))) < 0) 1588 return err; 1589 if (idx == 1) /* IEC958 (S/PDIF) Stream */ 1590 rme9652->spdif_ctl = kctl; 1591 } 1592 1593 if (rme9652->ss_channels == RME9652_NCHANNELS) 1594 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_adat3_check, rme9652))) < 0) 1595 return err; 1596 1597 if (rme9652->hw_rev >= 15) 1598 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_adat1_input, rme9652))) < 0) 1599 return err; 1600 1601 return 0; 1602} 1603 1604/*------------------------------------------------------------ 1605 /proc interface 1606 ------------------------------------------------------------*/ 1607 1608static void 1609snd_rme9652_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer) 1610{ 1611 struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) entry->private_data; 1612 u32 thru_bits = rme9652->thru_bits; 1613 int show_auto_sync_source = 0; 1614 int i; 1615 unsigned int status; 1616 int x; 1617 1618 status = rme9652_read(rme9652, RME9652_status_register); 1619 1620 snd_iprintf(buffer, "%s (Card #%d)\n", rme9652->card_name, rme9652->card->number + 1); 1621 snd_iprintf(buffer, "Buffers: capture %p playback %p\n", 1622 rme9652->capture_buffer, rme9652->playback_buffer); 1623 snd_iprintf(buffer, "IRQ: %d Registers bus: 0x%lx VM: 0x%lx\n", 1624 rme9652->irq, rme9652->port, (unsigned long)rme9652->iobase); 1625 snd_iprintf(buffer, "Control register: %x\n", rme9652->control_register); 1626 1627 snd_iprintf(buffer, "\n"); 1628 1629 x = 1 << (6 + rme9652_decode_latency(rme9652->control_register & 1630 RME9652_latency)); 1631 1632 snd_iprintf(buffer, "Latency: %d samples (2 periods of %lu bytes)\n", 1633 x, (unsigned long) rme9652->period_bytes); 1634 snd_iprintf(buffer, "Hardware pointer (frames): %ld\n", 1635 rme9652_hw_pointer(rme9652)); 1636 snd_iprintf(buffer, "Passthru: %s\n", 1637 rme9652->passthru ? "yes" : "no"); 1638 1639 if ((rme9652->control_register & (RME9652_Master | RME9652_wsel)) == 0) { 1640 snd_iprintf(buffer, "Clock mode: autosync\n"); 1641 show_auto_sync_source = 1; 1642 } else if (rme9652->control_register & RME9652_wsel) { 1643 if (status & RME9652_wsel_rd) { 1644 snd_iprintf(buffer, "Clock mode: word clock\n"); 1645 } else { 1646 snd_iprintf(buffer, "Clock mode: word clock (no signal)\n"); 1647 } 1648 } else { 1649 snd_iprintf(buffer, "Clock mode: master\n"); 1650 } 1651 1652 if (show_auto_sync_source) { 1653 switch (rme9652->control_register & RME9652_SyncPref_Mask) { 1654 case RME9652_SyncPref_ADAT1: 1655 snd_iprintf(buffer, "Pref. sync source: ADAT1\n"); 1656 break; 1657 case RME9652_SyncPref_ADAT2: 1658 snd_iprintf(buffer, "Pref. sync source: ADAT2\n"); 1659 break; 1660 case RME9652_SyncPref_ADAT3: 1661 snd_iprintf(buffer, "Pref. sync source: ADAT3\n"); 1662 break; 1663 case RME9652_SyncPref_SPDIF: 1664 snd_iprintf(buffer, "Pref. sync source: IEC958\n"); 1665 break; 1666 default: 1667 snd_iprintf(buffer, "Pref. sync source: ???\n"); 1668 } 1669 } 1670 1671 if (rme9652->hw_rev >= 15) 1672 snd_iprintf(buffer, "\nADAT1 Input source: %s\n", 1673 (rme9652->control_register & RME9652_ADAT1_INTERNAL) ? 1674 "Internal" : "ADAT1 optical"); 1675 1676 snd_iprintf(buffer, "\n"); 1677 1678 switch (rme9652_decode_spdif_in(rme9652->control_register & 1679 RME9652_inp)) { 1680 case RME9652_SPDIFIN_OPTICAL: 1681 snd_iprintf(buffer, "IEC958 input: ADAT1\n"); 1682 break; 1683 case RME9652_SPDIFIN_COAXIAL: 1684 snd_iprintf(buffer, "IEC958 input: Coaxial\n"); 1685 break; 1686 case RME9652_SPDIFIN_INTERN: 1687 snd_iprintf(buffer, "IEC958 input: Internal\n"); 1688 break; 1689 default: 1690 snd_iprintf(buffer, "IEC958 input: ???\n"); 1691 break; 1692 } 1693 1694 if (rme9652->control_register & RME9652_opt_out) { 1695 snd_iprintf(buffer, "IEC958 output: Coaxial & ADAT1\n"); 1696 } else { 1697 snd_iprintf(buffer, "IEC958 output: Coaxial only\n"); 1698 } 1699 1700 if (rme9652->control_register & RME9652_PRO) { 1701 snd_iprintf(buffer, "IEC958 quality: Professional\n"); 1702 } else { 1703 snd_iprintf(buffer, "IEC958 quality: Consumer\n"); 1704 } 1705 1706 if (rme9652->control_register & RME9652_EMP) { 1707 snd_iprintf(buffer, "IEC958 emphasis: on\n"); 1708 } else { 1709 snd_iprintf(buffer, "IEC958 emphasis: off\n"); 1710 } 1711 1712 if (rme9652->control_register & RME9652_Dolby) { 1713 snd_iprintf(buffer, "IEC958 Dolby: on\n"); 1714 } else { 1715 snd_iprintf(buffer, "IEC958 Dolby: off\n"); 1716 } 1717 1718 i = rme9652_spdif_sample_rate(rme9652); 1719 1720 if (i < 0) { 1721 snd_iprintf(buffer, 1722 "IEC958 sample rate: error flag set\n"); 1723 } else if (i == 0) { 1724 snd_iprintf(buffer, "IEC958 sample rate: undetermined\n"); 1725 } else { 1726 snd_iprintf(buffer, "IEC958 sample rate: %d\n", i); 1727 } 1728 1729 snd_iprintf(buffer, "\n"); 1730 1731 snd_iprintf(buffer, "ADAT Sample rate: %dHz\n", 1732 rme9652_adat_sample_rate(rme9652)); 1733 1734 /* Sync Check */ 1735 1736 x = status & RME9652_sync_0; 1737 if (status & RME9652_lock_0) { 1738 snd_iprintf(buffer, "ADAT1: %s\n", x ? "Sync" : "Lock"); 1739 } else { 1740 snd_iprintf(buffer, "ADAT1: No Lock\n"); 1741 } 1742 1743 x = status & RME9652_sync_1; 1744 if (status & RME9652_lock_1) { 1745 snd_iprintf(buffer, "ADAT2: %s\n", x ? "Sync" : "Lock"); 1746 } else { 1747 snd_iprintf(buffer, "ADAT2: No Lock\n"); 1748 } 1749 1750 x = status & RME9652_sync_2; 1751 if (status & RME9652_lock_2) { 1752 snd_iprintf(buffer, "ADAT3: %s\n", x ? "Sync" : "Lock"); 1753 } else { 1754 snd_iprintf(buffer, "ADAT3: No Lock\n"); 1755 } 1756 1757 snd_iprintf(buffer, "\n"); 1758 1759 snd_iprintf(buffer, "Timecode signal: %s\n", 1760 (status & RME9652_tc_valid) ? "yes" : "no"); 1761 1762 /* thru modes */ 1763 1764 snd_iprintf(buffer, "Punch Status:\n\n"); 1765 1766 for (i = 0; i < rme9652->ss_channels; i++) { 1767 if (thru_bits & (1 << i)) { 1768 snd_iprintf(buffer, "%2d: on ", i + 1); 1769 } else { 1770 snd_iprintf(buffer, "%2d: off ", i + 1); 1771 } 1772 1773 if (((i + 1) % 8) == 0) { 1774 snd_iprintf(buffer, "\n"); 1775 } 1776 } 1777 1778 snd_iprintf(buffer, "\n"); 1779} 1780 1781static void __devinit snd_rme9652_proc_init(struct snd_rme9652 *rme9652) 1782{ 1783 struct snd_info_entry *entry; 1784 1785 if (! snd_card_proc_new(rme9652->card, "rme9652", &entry)) 1786 snd_info_set_text_ops(entry, rme9652, snd_rme9652_proc_read); 1787} 1788 1789static void snd_rme9652_free_buffers(struct snd_rme9652 *rme9652) 1790{ 1791 snd_hammerfall_free_buffer(&rme9652->capture_dma_buf, rme9652->pci); 1792 snd_hammerfall_free_buffer(&rme9652->playback_dma_buf, rme9652->pci); 1793} 1794 1795static int snd_rme9652_free(struct snd_rme9652 *rme9652) 1796{ 1797 if (rme9652->irq >= 0) 1798 rme9652_stop(rme9652); 1799 snd_rme9652_free_buffers(rme9652); 1800 1801 if (rme9652->irq >= 0) 1802 free_irq(rme9652->irq, (void *)rme9652); 1803 if (rme9652->iobase) 1804 iounmap(rme9652->iobase); 1805 if (rme9652->port) 1806 pci_release_regions(rme9652->pci); 1807 1808 pci_disable_device(rme9652->pci); 1809 return 0; 1810} 1811 1812static int __devinit snd_rme9652_initialize_memory(struct snd_rme9652 *rme9652) 1813{ 1814 unsigned long pb_bus, cb_bus; 1815 1816 if (snd_hammerfall_get_buffer(rme9652->pci, &rme9652->capture_dma_buf, RME9652_DMA_AREA_BYTES) < 0 || 1817 snd_hammerfall_get_buffer(rme9652->pci, &rme9652->playback_dma_buf, RME9652_DMA_AREA_BYTES) < 0) { 1818 if (rme9652->capture_dma_buf.area) 1819 snd_dma_free_pages(&rme9652->capture_dma_buf); 1820 printk(KERN_ERR "%s: no buffers available\n", rme9652->card_name); 1821 return -ENOMEM; 1822 } 1823 1824 /* Align to bus-space 64K boundary */ 1825 1826 cb_bus = ALIGN(rme9652->capture_dma_buf.addr, 0x10000ul); 1827 pb_bus = ALIGN(rme9652->playback_dma_buf.addr, 0x10000ul); 1828 1829 /* Tell the card where it is */ 1830 1831 rme9652_write(rme9652, RME9652_rec_buffer, cb_bus); 1832 rme9652_write(rme9652, RME9652_play_buffer, pb_bus); 1833 1834 rme9652->capture_buffer = rme9652->capture_dma_buf.area + (cb_bus - rme9652->capture_dma_buf.addr); 1835 rme9652->playback_buffer = rme9652->playback_dma_buf.area + (pb_bus - rme9652->playback_dma_buf.addr); 1836 1837 return 0; 1838} 1839 1840static void snd_rme9652_set_defaults(struct snd_rme9652 *rme9652) 1841{ 1842 unsigned int k; 1843 1844 /* ASSUMPTION: rme9652->lock is either held, or 1845 there is no need to hold it (e.g. during module 1846 initalization). 1847 */ 1848 1849 /* set defaults: 1850 1851 SPDIF Input via Coax 1852 autosync clock mode 1853 maximum latency (7 = 8192 samples, 64Kbyte buffer, 1854 which implies 2 4096 sample, 32Kbyte periods). 1855 1856 if rev 1.5, initialize the S/PDIF receiver. 1857 1858 */ 1859 1860 rme9652->control_register = 1861 RME9652_inp_0 | rme9652_encode_latency(7); 1862 1863 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register); 1864 1865 rme9652_reset_hw_pointer(rme9652); 1866 rme9652_compute_period_size(rme9652); 1867 1868 /* default: thru off for all channels */ 1869 1870 for (k = 0; k < RME9652_NCHANNELS; ++k) 1871 rme9652_write(rme9652, RME9652_thru_base + k * 4, 0); 1872 1873 rme9652->thru_bits = 0; 1874 rme9652->passthru = 0; 1875 1876 /* set a default rate so that the channel map is set up */ 1877 1878 rme9652_set_rate(rme9652, 48000); 1879} 1880 1881static irqreturn_t snd_rme9652_interrupt(int irq, void *dev_id) 1882{ 1883 struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) dev_id; 1884 1885 if (!(rme9652_read(rme9652, RME9652_status_register) & RME9652_IRQ)) { 1886 return IRQ_NONE; 1887 } 1888 1889 rme9652_write(rme9652, RME9652_irq_clear, 0); 1890 1891 if (rme9652->capture_substream) { 1892 snd_pcm_period_elapsed(rme9652->pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream); 1893 } 1894 1895 if (rme9652->playback_substream) { 1896 snd_pcm_period_elapsed(rme9652->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream); 1897 } 1898 return IRQ_HANDLED; 1899} 1900 1901static snd_pcm_uframes_t snd_rme9652_hw_pointer(struct snd_pcm_substream *substream) 1902{ 1903 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 1904 return rme9652_hw_pointer(rme9652); 1905} 1906 1907static char *rme9652_channel_buffer_location(struct snd_rme9652 *rme9652, 1908 int stream, 1909 int channel) 1910 1911{ 1912 int mapped_channel; 1913 1914 snd_assert(channel >= 0 || channel < RME9652_NCHANNELS, return NULL); 1915 1916 if ((mapped_channel = rme9652->channel_map[channel]) < 0) { 1917 return NULL; 1918 } 1919 1920 if (stream == SNDRV_PCM_STREAM_CAPTURE) { 1921 return rme9652->capture_buffer + 1922 (mapped_channel * RME9652_CHANNEL_BUFFER_BYTES); 1923 } else { 1924 return rme9652->playback_buffer + 1925 (mapped_channel * RME9652_CHANNEL_BUFFER_BYTES); 1926 } 1927} 1928 1929static int snd_rme9652_playback_copy(struct snd_pcm_substream *substream, int channel, 1930 snd_pcm_uframes_t pos, void __user *src, snd_pcm_uframes_t count) 1931{ 1932 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 1933 char *channel_buf; 1934 1935 snd_assert(pos + count <= RME9652_CHANNEL_BUFFER_BYTES / 4, return -EINVAL); 1936 1937 channel_buf = rme9652_channel_buffer_location (rme9652, 1938 substream->pstr->stream, 1939 channel); 1940 snd_assert(channel_buf != NULL, return -EIO); 1941 if (copy_from_user(channel_buf + pos * 4, src, count * 4)) 1942 return -EFAULT; 1943 return count; 1944} 1945 1946static int snd_rme9652_capture_copy(struct snd_pcm_substream *substream, int channel, 1947 snd_pcm_uframes_t pos, void __user *dst, snd_pcm_uframes_t count) 1948{ 1949 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 1950 char *channel_buf; 1951 1952 snd_assert(pos + count <= RME9652_CHANNEL_BUFFER_BYTES / 4, return -EINVAL); 1953 1954 channel_buf = rme9652_channel_buffer_location (rme9652, 1955 substream->pstr->stream, 1956 channel); 1957 snd_assert(channel_buf != NULL, return -EIO); 1958 if (copy_to_user(dst, channel_buf + pos * 4, count * 4)) 1959 return -EFAULT; 1960 return count; 1961} 1962 1963static int snd_rme9652_hw_silence(struct snd_pcm_substream *substream, int channel, 1964 snd_pcm_uframes_t pos, snd_pcm_uframes_t count) 1965{ 1966 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 1967 char *channel_buf; 1968 1969 channel_buf = rme9652_channel_buffer_location (rme9652, 1970 substream->pstr->stream, 1971 channel); 1972 snd_assert(channel_buf != NULL, return -EIO); 1973 memset(channel_buf + pos * 4, 0, count * 4); 1974 return count; 1975} 1976 1977static int snd_rme9652_reset(struct snd_pcm_substream *substream) 1978{ 1979 struct snd_pcm_runtime *runtime = substream->runtime; 1980 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 1981 struct snd_pcm_substream *other; 1982 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 1983 other = rme9652->capture_substream; 1984 else 1985 other = rme9652->playback_substream; 1986 if (rme9652->running) 1987 runtime->status->hw_ptr = rme9652_hw_pointer(rme9652); 1988 else 1989 runtime->status->hw_ptr = 0; 1990 if (other) { 1991 struct snd_pcm_substream *s; 1992 struct snd_pcm_runtime *oruntime = other->runtime; 1993 snd_pcm_group_for_each_entry(s, substream) { 1994 if (s == other) { 1995 oruntime->status->hw_ptr = runtime->status->hw_ptr; 1996 break; 1997 } 1998 } 1999 } 2000 return 0; 2001} 2002 2003static int snd_rme9652_hw_params(struct snd_pcm_substream *substream, 2004 struct snd_pcm_hw_params *params) 2005{ 2006 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 2007 int err; 2008 pid_t this_pid; 2009 pid_t other_pid; 2010 2011 spin_lock_irq(&rme9652->lock); 2012 2013 if (substream->pstr->stream == SNDRV_PCM_STREAM_PLAYBACK) { 2014 rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP); 2015 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= rme9652->creg_spdif_stream); 2016 this_pid = rme9652->playback_pid; 2017 other_pid = rme9652->capture_pid; 2018 } else { 2019 this_pid = rme9652->capture_pid; 2020 other_pid = rme9652->playback_pid; 2021 } 2022 2023 if ((other_pid > 0) && (this_pid != other_pid)) { 2024 2025 /* The other stream is open, and not by the same 2026 task as this one. Make sure that the parameters 2027 that matter are the same. 2028 */ 2029 2030 if ((int)params_rate(params) != 2031 rme9652_adat_sample_rate(rme9652)) { 2032 spin_unlock_irq(&rme9652->lock); 2033 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE); 2034 return -EBUSY; 2035 } 2036 2037 if (params_period_size(params) != rme9652->period_bytes / 4) { 2038 spin_unlock_irq(&rme9652->lock); 2039 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE); 2040 return -EBUSY; 2041 } 2042 2043 /* We're fine. */ 2044 2045 spin_unlock_irq(&rme9652->lock); 2046 return 0; 2047 2048 } else { 2049 spin_unlock_irq(&rme9652->lock); 2050 } 2051 2052 /* how to make sure that the rate matches an externally-set one ? 2053 */ 2054 2055 if ((err = rme9652_set_rate(rme9652, params_rate(params))) < 0) { 2056 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE); 2057 return err; 2058 } 2059 2060 if ((err = rme9652_set_interrupt_interval(rme9652, params_period_size(params))) < 0) { 2061 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE); 2062 return err; 2063 } 2064 2065 return 0; 2066} 2067 2068static int snd_rme9652_channel_info(struct snd_pcm_substream *substream, 2069 struct snd_pcm_channel_info *info) 2070{ 2071 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 2072 int chn; 2073 2074 snd_assert(info->channel < RME9652_NCHANNELS, return -EINVAL); 2075 2076 if ((chn = rme9652->channel_map[info->channel]) < 0) { 2077 return -EINVAL; 2078 } 2079 2080 info->offset = chn * RME9652_CHANNEL_BUFFER_BYTES; 2081 info->first = 0; 2082 info->step = 32; 2083 return 0; 2084} 2085 2086static int snd_rme9652_ioctl(struct snd_pcm_substream *substream, 2087 unsigned int cmd, void *arg) 2088{ 2089 switch (cmd) { 2090 case SNDRV_PCM_IOCTL1_RESET: 2091 { 2092 return snd_rme9652_reset(substream); 2093 } 2094 case SNDRV_PCM_IOCTL1_CHANNEL_INFO: 2095 { 2096 struct snd_pcm_channel_info *info = arg; 2097 return snd_rme9652_channel_info(substream, info); 2098 } 2099 default: 2100 break; 2101 } 2102 2103 return snd_pcm_lib_ioctl(substream, cmd, arg); 2104} 2105 2106static void rme9652_silence_playback(struct snd_rme9652 *rme9652) 2107{ 2108 memset(rme9652->playback_buffer, 0, RME9652_DMA_AREA_BYTES); 2109} 2110 2111static int snd_rme9652_trigger(struct snd_pcm_substream *substream, 2112 int cmd) 2113{ 2114 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 2115 struct snd_pcm_substream *other; 2116 int running; 2117 spin_lock(&rme9652->lock); 2118 running = rme9652->running; 2119 switch (cmd) { 2120 case SNDRV_PCM_TRIGGER_START: 2121 running |= 1 << substream->stream; 2122 break; 2123 case SNDRV_PCM_TRIGGER_STOP: 2124 running &= ~(1 << substream->stream); 2125 break; 2126 default: 2127 snd_BUG(); 2128 spin_unlock(&rme9652->lock); 2129 return -EINVAL; 2130 } 2131 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 2132 other = rme9652->capture_substream; 2133 else 2134 other = rme9652->playback_substream; 2135 2136 if (other) { 2137 struct snd_pcm_substream *s; 2138 snd_pcm_group_for_each_entry(s, substream) { 2139 if (s == other) { 2140 snd_pcm_trigger_done(s, substream); 2141 if (cmd == SNDRV_PCM_TRIGGER_START) 2142 running |= 1 << s->stream; 2143 else 2144 running &= ~(1 << s->stream); 2145 goto _ok; 2146 } 2147 } 2148 if (cmd == SNDRV_PCM_TRIGGER_START) { 2149 if (!(running & (1 << SNDRV_PCM_STREAM_PLAYBACK)) && 2150 substream->stream == SNDRV_PCM_STREAM_CAPTURE) 2151 rme9652_silence_playback(rme9652); 2152 } else { 2153 if (running && 2154 substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 2155 rme9652_silence_playback(rme9652); 2156 } 2157 } else { 2158 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) 2159 rme9652_silence_playback(rme9652); 2160 } 2161 _ok: 2162 snd_pcm_trigger_done(substream, substream); 2163 if (!rme9652->running && running) 2164 rme9652_start(rme9652); 2165 else if (rme9652->running && !running) 2166 rme9652_stop(rme9652); 2167 rme9652->running = running; 2168 spin_unlock(&rme9652->lock); 2169 2170 return 0; 2171} 2172 2173static int snd_rme9652_prepare(struct snd_pcm_substream *substream) 2174{ 2175 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 2176 unsigned long flags; 2177 int result = 0; 2178 2179 spin_lock_irqsave(&rme9652->lock, flags); 2180 if (!rme9652->running) 2181 rme9652_reset_hw_pointer(rme9652); 2182 spin_unlock_irqrestore(&rme9652->lock, flags); 2183 return result; 2184} 2185 2186static struct snd_pcm_hardware snd_rme9652_playback_subinfo = 2187{ 2188 .info = (SNDRV_PCM_INFO_MMAP | 2189 SNDRV_PCM_INFO_MMAP_VALID | 2190 SNDRV_PCM_INFO_NONINTERLEAVED | 2191 SNDRV_PCM_INFO_SYNC_START | 2192 SNDRV_PCM_INFO_DOUBLE), 2193 .formats = SNDRV_PCM_FMTBIT_S32_LE, 2194 .rates = (SNDRV_PCM_RATE_44100 | 2195 SNDRV_PCM_RATE_48000 | 2196 SNDRV_PCM_RATE_88200 | 2197 SNDRV_PCM_RATE_96000), 2198 .rate_min = 44100, 2199 .rate_max = 96000, 2200 .channels_min = 10, 2201 .channels_max = 26, 2202 .buffer_bytes_max = RME9652_CHANNEL_BUFFER_BYTES * 26, 2203 .period_bytes_min = (64 * 4) * 10, 2204 .period_bytes_max = (8192 * 4) * 26, 2205 .periods_min = 2, 2206 .periods_max = 2, 2207 .fifo_size = 0, 2208}; 2209 2210static struct snd_pcm_hardware snd_rme9652_capture_subinfo = 2211{ 2212 .info = (SNDRV_PCM_INFO_MMAP | 2213 SNDRV_PCM_INFO_MMAP_VALID | 2214 SNDRV_PCM_INFO_NONINTERLEAVED | 2215 SNDRV_PCM_INFO_SYNC_START), 2216 .formats = SNDRV_PCM_FMTBIT_S32_LE, 2217 .rates = (SNDRV_PCM_RATE_44100 | 2218 SNDRV_PCM_RATE_48000 | 2219 SNDRV_PCM_RATE_88200 | 2220 SNDRV_PCM_RATE_96000), 2221 .rate_min = 44100, 2222 .rate_max = 96000, 2223 .channels_min = 10, 2224 .channels_max = 26, 2225 .buffer_bytes_max = RME9652_CHANNEL_BUFFER_BYTES *26, 2226 .period_bytes_min = (64 * 4) * 10, 2227 .period_bytes_max = (8192 * 4) * 26, 2228 .periods_min = 2, 2229 .periods_max = 2, 2230 .fifo_size = 0, 2231}; 2232 2233static unsigned int period_sizes[] = { 64, 128, 256, 512, 1024, 2048, 4096, 8192 }; 2234 2235static struct snd_pcm_hw_constraint_list hw_constraints_period_sizes = { 2236 .count = ARRAY_SIZE(period_sizes), 2237 .list = period_sizes, 2238 .mask = 0 2239}; 2240 2241static int snd_rme9652_hw_rule_channels(struct snd_pcm_hw_params *params, 2242 struct snd_pcm_hw_rule *rule) 2243{ 2244 struct snd_rme9652 *rme9652 = rule->private; 2245 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS); 2246 unsigned int list[2] = { rme9652->ds_channels, rme9652->ss_channels }; 2247 return snd_interval_list(c, 2, list, 0); 2248} 2249 2250static int snd_rme9652_hw_rule_channels_rate(struct snd_pcm_hw_params *params, 2251 struct snd_pcm_hw_rule *rule) 2252{ 2253 struct snd_rme9652 *rme9652 = rule->private; 2254 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS); 2255 struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE); 2256 if (r->min > 48000) { 2257 struct snd_interval t = { 2258 .min = rme9652->ds_channels, 2259 .max = rme9652->ds_channels, 2260 .integer = 1, 2261 }; 2262 return snd_interval_refine(c, &t); 2263 } else if (r->max < 88200) { 2264 struct snd_interval t = { 2265 .min = rme9652->ss_channels, 2266 .max = rme9652->ss_channels, 2267 .integer = 1, 2268 }; 2269 return snd_interval_refine(c, &t); 2270 } 2271 return 0; 2272} 2273 2274static int snd_rme9652_hw_rule_rate_channels(struct snd_pcm_hw_params *params, 2275 struct snd_pcm_hw_rule *rule) 2276{ 2277 struct snd_rme9652 *rme9652 = rule->private; 2278 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS); 2279 struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE); 2280 if (c->min >= rme9652->ss_channels) { 2281 struct snd_interval t = { 2282 .min = 44100, 2283 .max = 48000, 2284 .integer = 1, 2285 }; 2286 return snd_interval_refine(r, &t); 2287 } else if (c->max <= rme9652->ds_channels) { 2288 struct snd_interval t = { 2289 .min = 88200, 2290 .max = 96000, 2291 .integer = 1, 2292 }; 2293 return snd_interval_refine(r, &t); 2294 } 2295 return 0; 2296} 2297 2298static int snd_rme9652_playback_open(struct snd_pcm_substream *substream) 2299{ 2300 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 2301 struct snd_pcm_runtime *runtime = substream->runtime; 2302 2303 spin_lock_irq(&rme9652->lock); 2304 2305 snd_pcm_set_sync(substream); 2306 2307 runtime->hw = snd_rme9652_playback_subinfo; 2308 runtime->dma_area = rme9652->playback_buffer; 2309 runtime->dma_bytes = RME9652_DMA_AREA_BYTES; 2310 2311 if (rme9652->capture_substream == NULL) { 2312 rme9652_stop(rme9652); 2313 rme9652_set_thru(rme9652, -1, 0); 2314 } 2315 2316 rme9652->playback_pid = current->pid; 2317 rme9652->playback_substream = substream; 2318 2319 spin_unlock_irq(&rme9652->lock); 2320 2321 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 2322 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_period_sizes); 2323 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2324 snd_rme9652_hw_rule_channels, rme9652, 2325 SNDRV_PCM_HW_PARAM_CHANNELS, -1); 2326 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2327 snd_rme9652_hw_rule_channels_rate, rme9652, 2328 SNDRV_PCM_HW_PARAM_RATE, -1); 2329 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, 2330 snd_rme9652_hw_rule_rate_channels, rme9652, 2331 SNDRV_PCM_HW_PARAM_CHANNELS, -1); 2332 2333 rme9652->creg_spdif_stream = rme9652->creg_spdif; 2334 rme9652->spdif_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE; 2335 snd_ctl_notify(rme9652->card, SNDRV_CTL_EVENT_MASK_VALUE | 2336 SNDRV_CTL_EVENT_MASK_INFO, &rme9652->spdif_ctl->id); 2337 return 0; 2338} 2339 2340static int snd_rme9652_playback_release(struct snd_pcm_substream *substream) 2341{ 2342 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 2343 2344 spin_lock_irq(&rme9652->lock); 2345 2346 rme9652->playback_pid = -1; 2347 rme9652->playback_substream = NULL; 2348 2349 spin_unlock_irq(&rme9652->lock); 2350 2351 rme9652->spdif_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE; 2352 snd_ctl_notify(rme9652->card, SNDRV_CTL_EVENT_MASK_VALUE | 2353 SNDRV_CTL_EVENT_MASK_INFO, &rme9652->spdif_ctl->id); 2354 return 0; 2355} 2356 2357 2358static int snd_rme9652_capture_open(struct snd_pcm_substream *substream) 2359{ 2360 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 2361 struct snd_pcm_runtime *runtime = substream->runtime; 2362 2363 spin_lock_irq(&rme9652->lock); 2364 2365 snd_pcm_set_sync(substream); 2366 2367 runtime->hw = snd_rme9652_capture_subinfo; 2368 runtime->dma_area = rme9652->capture_buffer; 2369 runtime->dma_bytes = RME9652_DMA_AREA_BYTES; 2370 2371 if (rme9652->playback_substream == NULL) { 2372 rme9652_stop(rme9652); 2373 rme9652_set_thru(rme9652, -1, 0); 2374 } 2375 2376 rme9652->capture_pid = current->pid; 2377 rme9652->capture_substream = substream; 2378 2379 spin_unlock_irq(&rme9652->lock); 2380 2381 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 2382 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_period_sizes); 2383 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2384 snd_rme9652_hw_rule_channels, rme9652, 2385 SNDRV_PCM_HW_PARAM_CHANNELS, -1); 2386 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2387 snd_rme9652_hw_rule_channels_rate, rme9652, 2388 SNDRV_PCM_HW_PARAM_RATE, -1); 2389 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, 2390 snd_rme9652_hw_rule_rate_channels, rme9652, 2391 SNDRV_PCM_HW_PARAM_CHANNELS, -1); 2392 return 0; 2393} 2394 2395static int snd_rme9652_capture_release(struct snd_pcm_substream *substream) 2396{ 2397 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 2398 2399 spin_lock_irq(&rme9652->lock); 2400 2401 rme9652->capture_pid = -1; 2402 rme9652->capture_substream = NULL; 2403 2404 spin_unlock_irq(&rme9652->lock); 2405 return 0; 2406} 2407 2408static struct snd_pcm_ops snd_rme9652_playback_ops = { 2409 .open = snd_rme9652_playback_open, 2410 .close = snd_rme9652_playback_release, 2411 .ioctl = snd_rme9652_ioctl, 2412 .hw_params = snd_rme9652_hw_params, 2413 .prepare = snd_rme9652_prepare, 2414 .trigger = snd_rme9652_trigger, 2415 .pointer = snd_rme9652_hw_pointer, 2416 .copy = snd_rme9652_playback_copy, 2417 .silence = snd_rme9652_hw_silence, 2418}; 2419 2420static struct snd_pcm_ops snd_rme9652_capture_ops = { 2421 .open = snd_rme9652_capture_open, 2422 .close = snd_rme9652_capture_release, 2423 .ioctl = snd_rme9652_ioctl, 2424 .hw_params = snd_rme9652_hw_params, 2425 .prepare = snd_rme9652_prepare, 2426 .trigger = snd_rme9652_trigger, 2427 .pointer = snd_rme9652_hw_pointer, 2428 .copy = snd_rme9652_capture_copy, 2429}; 2430 2431static int __devinit snd_rme9652_create_pcm(struct snd_card *card, 2432 struct snd_rme9652 *rme9652) 2433{ 2434 struct snd_pcm *pcm; 2435 int err; 2436 2437 if ((err = snd_pcm_new(card, 2438 rme9652->card_name, 2439 0, 1, 1, &pcm)) < 0) { 2440 return err; 2441 } 2442 2443 rme9652->pcm = pcm; 2444 pcm->private_data = rme9652; 2445 strcpy(pcm->name, rme9652->card_name); 2446 2447 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_rme9652_playback_ops); 2448 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_rme9652_capture_ops); 2449 2450 pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX; 2451 2452 return 0; 2453} 2454 2455static int __devinit snd_rme9652_create(struct snd_card *card, 2456 struct snd_rme9652 *rme9652, 2457 int precise_ptr) 2458{ 2459 struct pci_dev *pci = rme9652->pci; 2460 int err; 2461 int status; 2462 unsigned short rev; 2463 2464 rme9652->irq = -1; 2465 rme9652->card = card; 2466 2467 pci_read_config_word(rme9652->pci, PCI_CLASS_REVISION, &rev); 2468 2469 switch (rev & 0xff) { 2470 case 3: 2471 case 4: 2472 case 8: 2473 case 9: 2474 break; 2475 2476 default: 2477 /* who knows? */ 2478 return -ENODEV; 2479 } 2480 2481 if ((err = pci_enable_device(pci)) < 0) 2482 return err; 2483 2484 spin_lock_init(&rme9652->lock); 2485 2486 if ((err = pci_request_regions(pci, "rme9652")) < 0) 2487 return err; 2488 rme9652->port = pci_resource_start(pci, 0); 2489 rme9652->iobase = ioremap_nocache(rme9652->port, RME9652_IO_EXTENT); 2490 if (rme9652->iobase == NULL) { 2491 snd_printk(KERN_ERR "unable to remap region 0x%lx-0x%lx\n", rme9652->port, rme9652->port + RME9652_IO_EXTENT - 1); 2492 return -EBUSY; 2493 } 2494 2495 if (request_irq(pci->irq, snd_rme9652_interrupt, IRQF_SHARED, 2496 "rme9652", rme9652)) { 2497 snd_printk(KERN_ERR "unable to request IRQ %d\n", pci->irq); 2498 return -EBUSY; 2499 } 2500 rme9652->irq = pci->irq; 2501 rme9652->precise_ptr = precise_ptr; 2502 2503 /* Determine the h/w rev level of the card. This seems like 2504 a particularly kludgy way to encode it, but its what RME 2505 chose to do, so we follow them ... 2506 */ 2507 2508 status = rme9652_read(rme9652, RME9652_status_register); 2509 if (rme9652_decode_spdif_rate(status&RME9652_F) == 1) { 2510 rme9652->hw_rev = 15; 2511 } else { 2512 rme9652->hw_rev = 11; 2513 } 2514 2515 /* Differentiate between the standard Hammerfall, and the 2516 "Light", which does not have the expansion board. This 2517 method comes from information received from Mathhias 2518 Clausen at RME. Display the EEPROM and h/w revID where 2519 relevant. 2520 */ 2521 2522 switch (rev) { 2523 case 8: /* original eprom */ 2524 strcpy(card->driver, "RME9636"); 2525 if (rme9652->hw_rev == 15) { 2526 rme9652->card_name = "RME Digi9636 (Rev 1.5)"; 2527 } else { 2528 rme9652->card_name = "RME Digi9636"; 2529 } 2530 rme9652->ss_channels = RME9636_NCHANNELS; 2531 break; 2532 case 9: /* W36_G EPROM */ 2533 strcpy(card->driver, "RME9636"); 2534 rme9652->card_name = "RME Digi9636 (Rev G)"; 2535 rme9652->ss_channels = RME9636_NCHANNELS; 2536 break; 2537 case 4: /* W52_G EPROM */ 2538 strcpy(card->driver, "RME9652"); 2539 rme9652->card_name = "RME Digi9652 (Rev G)"; 2540 rme9652->ss_channels = RME9652_NCHANNELS; 2541 break; 2542 case 3: /* original eprom */ 2543 strcpy(card->driver, "RME9652"); 2544 if (rme9652->hw_rev == 15) { 2545 rme9652->card_name = "RME Digi9652 (Rev 1.5)"; 2546 } else { 2547 rme9652->card_name = "RME Digi9652"; 2548 } 2549 rme9652->ss_channels = RME9652_NCHANNELS; 2550 break; 2551 } 2552 2553 rme9652->ds_channels = (rme9652->ss_channels - 2) / 2 + 2; 2554 2555 pci_set_master(rme9652->pci); 2556 2557 if ((err = snd_rme9652_initialize_memory(rme9652)) < 0) { 2558 return err; 2559 } 2560 2561 if ((err = snd_rme9652_create_pcm(card, rme9652)) < 0) { 2562 return err; 2563 } 2564 2565 if ((err = snd_rme9652_create_controls(card, rme9652)) < 0) { 2566 return err; 2567 } 2568 2569 snd_rme9652_proc_init(rme9652); 2570 2571 rme9652->last_spdif_sample_rate = -1; 2572 rme9652->last_adat_sample_rate = -1; 2573 rme9652->playback_pid = -1; 2574 rme9652->capture_pid = -1; 2575 rme9652->capture_substream = NULL; 2576 rme9652->playback_substream = NULL; 2577 2578 snd_rme9652_set_defaults(rme9652); 2579 2580 if (rme9652->hw_rev == 15) { 2581 rme9652_initialize_spdif_receiver (rme9652); 2582 } 2583 2584 return 0; 2585} 2586 2587static void snd_rme9652_card_free(struct snd_card *card) 2588{ 2589 struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) card->private_data; 2590 2591 if (rme9652) 2592 snd_rme9652_free(rme9652); 2593} 2594 2595static int __devinit snd_rme9652_probe(struct pci_dev *pci, 2596 const struct pci_device_id *pci_id) 2597{ 2598 static int dev; 2599 struct snd_rme9652 *rme9652; 2600 struct snd_card *card; 2601 int err; 2602 2603 if (dev >= SNDRV_CARDS) 2604 return -ENODEV; 2605 if (!enable[dev]) { 2606 dev++; 2607 return -ENOENT; 2608 } 2609 2610 card = snd_card_new(index[dev], id[dev], THIS_MODULE, 2611 sizeof(struct snd_rme9652)); 2612 2613 if (!card) 2614 return -ENOMEM; 2615 2616 rme9652 = (struct snd_rme9652 *) card->private_data; 2617 card->private_free = snd_rme9652_card_free; 2618 rme9652->dev = dev; 2619 rme9652->pci = pci; 2620 snd_card_set_dev(card, &pci->dev); 2621 2622 if ((err = snd_rme9652_create(card, rme9652, precise_ptr[dev])) < 0) { 2623 snd_card_free(card); 2624 return err; 2625 } 2626 2627 strcpy(card->shortname, rme9652->card_name); 2628 2629 sprintf(card->longname, "%s at 0x%lx, irq %d", 2630 card->shortname, rme9652->port, rme9652->irq); 2631 2632 2633 if ((err = snd_card_register(card)) < 0) { 2634 snd_card_free(card); 2635 return err; 2636 } 2637 pci_set_drvdata(pci, card); 2638 dev++; 2639 return 0; 2640} 2641 2642static void __devexit snd_rme9652_remove(struct pci_dev *pci) 2643{ 2644 snd_card_free(pci_get_drvdata(pci)); 2645 pci_set_drvdata(pci, NULL); 2646} 2647 2648static struct pci_driver driver = { 2649 .name = "RME Digi9652 (Hammerfall)", 2650 .id_table = snd_rme9652_ids, 2651 .probe = snd_rme9652_probe, 2652 .remove = __devexit_p(snd_rme9652_remove), 2653}; 2654 2655static int __init alsa_card_hammerfall_init(void) 2656{ 2657 return pci_register_driver(&driver); 2658} 2659 2660static void __exit alsa_card_hammerfall_exit(void) 2661{ 2662 pci_unregister_driver(&driver); 2663} 2664 2665module_init(alsa_card_hammerfall_init) 2666module_exit(alsa_card_hammerfall_exit) 2667