1/* 2 * linux/include/video/vga.h -- standard VGA chipset interaction 3 * 4 * Copyright 1999 Jeff Garzik <jgarzik@pobox.com> 5 * 6 * Copyright history from vga16fb.c: 7 * Copyright 1999 Ben Pfaff and Petr Vandrovec 8 * Based on VGA info at http://www.goodnet.com/~tinara/FreeVGA/home.htm 9 * Based on VESA framebuffer (c) 1998 Gerd Knorr 10 * 11 * This file is subject to the terms and conditions of the GNU General 12 * Public License. See the file COPYING in the main directory of this 13 * archive for more details. 14 * 15 */ 16 17#ifndef __linux_video_vga_h__ 18#define __linux_video_vga_h__ 19 20#include <linux/types.h> 21#include <asm/io.h> 22#ifndef CONFIG_AMIGA 23#include <asm/vga.h> 24#else 25#undef inb_p 26#undef inw_p 27#undef outb_p 28#undef outw 29#undef readb 30#undef writeb 31#undef writew 32#define inb_p(port) 0 33#define inw_p(port) 0 34#define outb_p(port, val) do { } while (0) 35#define outw(port, val) do { } while (0) 36#define readb z_readb 37#define writeb z_writeb 38#define writew z_writew 39#endif 40#include <asm/byteorder.h> 41 42 43/* Some of the code below is taken from SVGAlib. The original, 44 unmodified copyright notice for that code is below. */ 45/* VGAlib version 1.2 - (c) 1993 Tommy Frandsen */ 46/* */ 47/* This library is free software; you can redistribute it and/or */ 48/* modify it without any restrictions. This library is distributed */ 49/* in the hope that it will be useful, but without any warranty. */ 50 51/* Multi-chipset support Copyright 1993 Harm Hanemaayer */ 52/* partially copyrighted (C) 1993 by Hartmut Schirmer */ 53 54/* VGA data register ports */ 55#define VGA_CRT_DC 0x3D5 /* CRT Controller Data Register - color emulation */ 56#define VGA_CRT_DM 0x3B5 /* CRT Controller Data Register - mono emulation */ 57#define VGA_ATT_R 0x3C1 /* Attribute Controller Data Read Register */ 58#define VGA_ATT_W 0x3C0 /* Attribute Controller Data Write Register */ 59#define VGA_GFX_D 0x3CF /* Graphics Controller Data Register */ 60#define VGA_SEQ_D 0x3C5 /* Sequencer Data Register */ 61#define VGA_MIS_R 0x3CC /* Misc Output Read Register */ 62#define VGA_MIS_W 0x3C2 /* Misc Output Write Register */ 63#define VGA_FTC_R 0x3CA /* Feature Control Read Register */ 64#define VGA_IS1_RC 0x3DA /* Input Status Register 1 - color emulation */ 65#define VGA_IS1_RM 0x3BA /* Input Status Register 1 - mono emulation */ 66#define VGA_PEL_D 0x3C9 /* PEL Data Register */ 67#define VGA_PEL_MSK 0x3C6 /* PEL mask register */ 68 69/* EGA-specific registers */ 70#define EGA_GFX_E0 0x3CC /* Graphics enable processor 0 */ 71#define EGA_GFX_E1 0x3CA /* Graphics enable processor 1 */ 72 73/* VGA index register ports */ 74#define VGA_CRT_IC 0x3D4 /* CRT Controller Index - color emulation */ 75#define VGA_CRT_IM 0x3B4 /* CRT Controller Index - mono emulation */ 76#define VGA_ATT_IW 0x3C0 /* Attribute Controller Index & Data Write Register */ 77#define VGA_GFX_I 0x3CE /* Graphics Controller Index */ 78#define VGA_SEQ_I 0x3C4 /* Sequencer Index */ 79#define VGA_PEL_IW 0x3C8 /* PEL Write Index */ 80#define VGA_PEL_IR 0x3C7 /* PEL Read Index */ 81 82/* standard VGA indexes max counts */ 83#define VGA_CRT_C 0x19 /* Number of CRT Controller Registers */ 84#define VGA_ATT_C 0x15 /* Number of Attribute Controller Registers */ 85#define VGA_GFX_C 0x09 /* Number of Graphics Controller Registers */ 86#define VGA_SEQ_C 0x05 /* Number of Sequencer Registers */ 87#define VGA_MIS_C 0x01 /* Number of Misc Output Register */ 88 89/* VGA misc register bit masks */ 90#define VGA_MIS_COLOR 0x01 91#define VGA_MIS_ENB_MEM_ACCESS 0x02 92#define VGA_MIS_DCLK_28322_720 0x04 93#define VGA_MIS_ENB_PLL_LOAD (0x04 | 0x08) 94#define VGA_MIS_SEL_HIGH_PAGE 0x20 95 96/* VGA CRT controller register indices */ 97#define VGA_CRTC_H_TOTAL 0 98#define VGA_CRTC_H_DISP 1 99#define VGA_CRTC_H_BLANK_START 2 100#define VGA_CRTC_H_BLANK_END 3 101#define VGA_CRTC_H_SYNC_START 4 102#define VGA_CRTC_H_SYNC_END 5 103#define VGA_CRTC_V_TOTAL 6 104#define VGA_CRTC_OVERFLOW 7 105#define VGA_CRTC_PRESET_ROW 8 106#define VGA_CRTC_MAX_SCAN 9 107#define VGA_CRTC_CURSOR_START 0x0A 108#define VGA_CRTC_CURSOR_END 0x0B 109#define VGA_CRTC_START_HI 0x0C 110#define VGA_CRTC_START_LO 0x0D 111#define VGA_CRTC_CURSOR_HI 0x0E 112#define VGA_CRTC_CURSOR_LO 0x0F 113#define VGA_CRTC_V_SYNC_START 0x10 114#define VGA_CRTC_V_SYNC_END 0x11 115#define VGA_CRTC_V_DISP_END 0x12 116#define VGA_CRTC_OFFSET 0x13 117#define VGA_CRTC_UNDERLINE 0x14 118#define VGA_CRTC_V_BLANK_START 0x15 119#define VGA_CRTC_V_BLANK_END 0x16 120#define VGA_CRTC_MODE 0x17 121#define VGA_CRTC_LINE_COMPARE 0x18 122#define VGA_CRTC_REGS VGA_CRT_C 123 124/* VGA CRT controller bit masks */ 125#define VGA_CR11_LOCK_CR0_CR7 0x80 /* lock writes to CR0 - CR7 */ 126#define VGA_CR17_H_V_SIGNALS_ENABLED 0x80 127 128/* VGA attribute controller register indices */ 129#define VGA_ATC_PALETTE0 0x00 130#define VGA_ATC_PALETTE1 0x01 131#define VGA_ATC_PALETTE2 0x02 132#define VGA_ATC_PALETTE3 0x03 133#define VGA_ATC_PALETTE4 0x04 134#define VGA_ATC_PALETTE5 0x05 135#define VGA_ATC_PALETTE6 0x06 136#define VGA_ATC_PALETTE7 0x07 137#define VGA_ATC_PALETTE8 0x08 138#define VGA_ATC_PALETTE9 0x09 139#define VGA_ATC_PALETTEA 0x0A 140#define VGA_ATC_PALETTEB 0x0B 141#define VGA_ATC_PALETTEC 0x0C 142#define VGA_ATC_PALETTED 0x0D 143#define VGA_ATC_PALETTEE 0x0E 144#define VGA_ATC_PALETTEF 0x0F 145#define VGA_ATC_MODE 0x10 146#define VGA_ATC_OVERSCAN 0x11 147#define VGA_ATC_PLANE_ENABLE 0x12 148#define VGA_ATC_PEL 0x13 149#define VGA_ATC_COLOR_PAGE 0x14 150 151#define VGA_AR_ENABLE_DISPLAY 0x20 152 153/* VGA sequencer register indices */ 154#define VGA_SEQ_RESET 0x00 155#define VGA_SEQ_CLOCK_MODE 0x01 156#define VGA_SEQ_PLANE_WRITE 0x02 157#define VGA_SEQ_CHARACTER_MAP 0x03 158#define VGA_SEQ_MEMORY_MODE 0x04 159 160/* VGA sequencer register bit masks */ 161#define VGA_SR01_CHAR_CLK_8DOTS 0x01 /* bit 0: character clocks 8 dots wide are generated */ 162#define VGA_SR01_SCREEN_OFF 0x20 /* bit 5: Screen is off */ 163#define VGA_SR02_ALL_PLANES 0x0F /* bits 3-0: enable access to all planes */ 164#define VGA_SR04_EXT_MEM 0x02 /* bit 1: allows complete mem access to 256K */ 165#define VGA_SR04_SEQ_MODE 0x04 /* bit 2: directs system to use a sequential addressing mode */ 166#define VGA_SR04_CHN_4M 0x08 /* bit 3: selects modulo 4 addressing for CPU access to display memory */ 167 168/* VGA graphics controller register indices */ 169#define VGA_GFX_SR_VALUE 0x00 170#define VGA_GFX_SR_ENABLE 0x01 171#define VGA_GFX_COMPARE_VALUE 0x02 172#define VGA_GFX_DATA_ROTATE 0x03 173#define VGA_GFX_PLANE_READ 0x04 174#define VGA_GFX_MODE 0x05 175#define VGA_GFX_MISC 0x06 176#define VGA_GFX_COMPARE_MASK 0x07 177#define VGA_GFX_BIT_MASK 0x08 178 179/* VGA graphics controller bit masks */ 180#define VGA_GR06_GRAPHICS_MODE 0x01 181 182/* macro for composing an 8-bit VGA register index and value 183 * into a single 16-bit quantity */ 184#define VGA_OUT16VAL(v, r) (((v) << 8) | (r)) 185 186/* decide whether we should enable the faster 16-bit VGA register writes */ 187#ifdef __LITTLE_ENDIAN 188#define VGA_OUTW_WRITE 189#endif 190 191/* VGA State Save and Restore */ 192#define VGA_SAVE_FONT0 1 /* save/restore plane 2 fonts */ 193#define VGA_SAVE_FONT1 2 /* save/restore plane 3 fonts */ 194#define VGA_SAVE_TEXT 4 /* save/restore plane 0/1 fonts */ 195#define VGA_SAVE_FONTS 7 /* save/restore all fonts */ 196#define VGA_SAVE_MODE 8 /* save/restore video mode */ 197#define VGA_SAVE_CMAP 16 /* save/restore color map/DAC */ 198 199struct vgastate { 200 void __iomem *vgabase; /* mmio base, if supported */ 201 unsigned long membase; /* VGA window base, 0 for default - 0xA000 */ 202 __u32 memsize; /* VGA window size, 0 for default 64K */ 203 __u32 flags; /* what state[s] to save (see VGA_SAVE_*) */ 204 __u32 depth; /* current fb depth, not important */ 205 __u32 num_attr; /* number of att registers, 0 for default */ 206 __u32 num_crtc; /* number of crt registers, 0 for default */ 207 __u32 num_gfx; /* number of gfx registers, 0 for default */ 208 __u32 num_seq; /* number of seq registers, 0 for default */ 209 void *vidstate; 210}; 211 212extern int save_vga(struct vgastate *state); 213extern int restore_vga(struct vgastate *state); 214 215/* 216 * generic VGA port read/write 217 */ 218 219static inline unsigned char vga_io_r (unsigned short port) 220{ 221 return inb_p(port); 222} 223 224static inline void vga_io_w (unsigned short port, unsigned char val) 225{ 226 outb_p(val, port); 227} 228 229static inline void vga_io_w_fast (unsigned short port, unsigned char reg, 230 unsigned char val) 231{ 232 outw(VGA_OUT16VAL (val, reg), port); 233} 234 235static inline unsigned char vga_mm_r (void __iomem *regbase, unsigned short port) 236{ 237 return readb (regbase + port); 238} 239 240static inline void vga_mm_w (void __iomem *regbase, unsigned short port, unsigned char val) 241{ 242 writeb (val, regbase + port); 243} 244 245static inline void vga_mm_w_fast (void __iomem *regbase, unsigned short port, 246 unsigned char reg, unsigned char val) 247{ 248 writew (VGA_OUT16VAL (val, reg), regbase + port); 249} 250 251static inline unsigned char vga_r (void __iomem *regbase, unsigned short port) 252{ 253 if (regbase) 254 return vga_mm_r (regbase, port); 255 else 256 return vga_io_r (port); 257} 258 259static inline void vga_w (void __iomem *regbase, unsigned short port, unsigned char val) 260{ 261 if (regbase) 262 vga_mm_w (regbase, port, val); 263 else 264 vga_io_w (port, val); 265} 266 267 268static inline void vga_w_fast (void __iomem *regbase, unsigned short port, 269 unsigned char reg, unsigned char val) 270{ 271 if (regbase) 272 vga_mm_w_fast (regbase, port, reg, val); 273 else 274 vga_io_w_fast (port, reg, val); 275} 276 277 278/* 279 * VGA CRTC register read/write 280 */ 281 282static inline unsigned char vga_rcrt (void __iomem *regbase, unsigned char reg) 283{ 284 vga_w (regbase, VGA_CRT_IC, reg); 285 return vga_r (regbase, VGA_CRT_DC); 286} 287 288static inline void vga_wcrt (void __iomem *regbase, unsigned char reg, unsigned char val) 289{ 290#ifdef VGA_OUTW_WRITE 291 vga_w_fast (regbase, VGA_CRT_IC, reg, val); 292#else 293 vga_w (regbase, VGA_CRT_IC, reg); 294 vga_w (regbase, VGA_CRT_DC, val); 295#endif /* VGA_OUTW_WRITE */ 296} 297 298static inline unsigned char vga_io_rcrt (unsigned char reg) 299{ 300 vga_io_w (VGA_CRT_IC, reg); 301 return vga_io_r (VGA_CRT_DC); 302} 303 304static inline void vga_io_wcrt (unsigned char reg, unsigned char val) 305{ 306#ifdef VGA_OUTW_WRITE 307 vga_io_w_fast (VGA_CRT_IC, reg, val); 308#else 309 vga_io_w (VGA_CRT_IC, reg); 310 vga_io_w (VGA_CRT_DC, val); 311#endif /* VGA_OUTW_WRITE */ 312} 313 314static inline unsigned char vga_mm_rcrt (void __iomem *regbase, unsigned char reg) 315{ 316 vga_mm_w (regbase, VGA_CRT_IC, reg); 317 return vga_mm_r (regbase, VGA_CRT_DC); 318} 319 320static inline void vga_mm_wcrt (void __iomem *regbase, unsigned char reg, unsigned char val) 321{ 322#ifdef VGA_OUTW_WRITE 323 vga_mm_w_fast (regbase, VGA_CRT_IC, reg, val); 324#else 325 vga_mm_w (regbase, VGA_CRT_IC, reg); 326 vga_mm_w (regbase, VGA_CRT_DC, val); 327#endif /* VGA_OUTW_WRITE */ 328} 329 330 331/* 332 * VGA sequencer register read/write 333 */ 334 335static inline unsigned char vga_rseq (void __iomem *regbase, unsigned char reg) 336{ 337 vga_w (regbase, VGA_SEQ_I, reg); 338 return vga_r (regbase, VGA_SEQ_D); 339} 340 341static inline void vga_wseq (void __iomem *regbase, unsigned char reg, unsigned char val) 342{ 343#ifdef VGA_OUTW_WRITE 344 vga_w_fast (regbase, VGA_SEQ_I, reg, val); 345#else 346 vga_w (regbase, VGA_SEQ_I, reg); 347 vga_w (regbase, VGA_SEQ_D, val); 348#endif /* VGA_OUTW_WRITE */ 349} 350 351static inline unsigned char vga_io_rseq (unsigned char reg) 352{ 353 vga_io_w (VGA_SEQ_I, reg); 354 return vga_io_r (VGA_SEQ_D); 355} 356 357static inline void vga_io_wseq (unsigned char reg, unsigned char val) 358{ 359#ifdef VGA_OUTW_WRITE 360 vga_io_w_fast (VGA_SEQ_I, reg, val); 361#else 362 vga_io_w (VGA_SEQ_I, reg); 363 vga_io_w (VGA_SEQ_D, val); 364#endif /* VGA_OUTW_WRITE */ 365} 366 367static inline unsigned char vga_mm_rseq (void __iomem *regbase, unsigned char reg) 368{ 369 vga_mm_w (regbase, VGA_SEQ_I, reg); 370 return vga_mm_r (regbase, VGA_SEQ_D); 371} 372 373static inline void vga_mm_wseq (void __iomem *regbase, unsigned char reg, unsigned char val) 374{ 375#ifdef VGA_OUTW_WRITE 376 vga_mm_w_fast (regbase, VGA_SEQ_I, reg, val); 377#else 378 vga_mm_w (regbase, VGA_SEQ_I, reg); 379 vga_mm_w (regbase, VGA_SEQ_D, val); 380#endif /* VGA_OUTW_WRITE */ 381} 382 383/* 384 * VGA graphics controller register read/write 385 */ 386 387static inline unsigned char vga_rgfx (void __iomem *regbase, unsigned char reg) 388{ 389 vga_w (regbase, VGA_GFX_I, reg); 390 return vga_r (regbase, VGA_GFX_D); 391} 392 393static inline void vga_wgfx (void __iomem *regbase, unsigned char reg, unsigned char val) 394{ 395#ifdef VGA_OUTW_WRITE 396 vga_w_fast (regbase, VGA_GFX_I, reg, val); 397#else 398 vga_w (regbase, VGA_GFX_I, reg); 399 vga_w (regbase, VGA_GFX_D, val); 400#endif /* VGA_OUTW_WRITE */ 401} 402 403static inline unsigned char vga_io_rgfx (unsigned char reg) 404{ 405 vga_io_w (VGA_GFX_I, reg); 406 return vga_io_r (VGA_GFX_D); 407} 408 409static inline void vga_io_wgfx (unsigned char reg, unsigned char val) 410{ 411#ifdef VGA_OUTW_WRITE 412 vga_io_w_fast (VGA_GFX_I, reg, val); 413#else 414 vga_io_w (VGA_GFX_I, reg); 415 vga_io_w (VGA_GFX_D, val); 416#endif /* VGA_OUTW_WRITE */ 417} 418 419static inline unsigned char vga_mm_rgfx (void __iomem *regbase, unsigned char reg) 420{ 421 vga_mm_w (regbase, VGA_GFX_I, reg); 422 return vga_mm_r (regbase, VGA_GFX_D); 423} 424 425static inline void vga_mm_wgfx (void __iomem *regbase, unsigned char reg, unsigned char val) 426{ 427#ifdef VGA_OUTW_WRITE 428 vga_mm_w_fast (regbase, VGA_GFX_I, reg, val); 429#else 430 vga_mm_w (regbase, VGA_GFX_I, reg); 431 vga_mm_w (regbase, VGA_GFX_D, val); 432#endif /* VGA_OUTW_WRITE */ 433} 434 435 436/* 437 * VGA attribute controller register read/write 438 */ 439 440static inline unsigned char vga_rattr (void __iomem *regbase, unsigned char reg) 441{ 442 vga_w (regbase, VGA_ATT_IW, reg); 443 return vga_r (regbase, VGA_ATT_R); 444} 445 446static inline void vga_wattr (void __iomem *regbase, unsigned char reg, unsigned char val) 447{ 448 vga_w (regbase, VGA_ATT_IW, reg); 449 vga_w (regbase, VGA_ATT_W, val); 450} 451 452static inline unsigned char vga_io_rattr (unsigned char reg) 453{ 454 vga_io_w (VGA_ATT_IW, reg); 455 return vga_io_r (VGA_ATT_R); 456} 457 458static inline void vga_io_wattr (unsigned char reg, unsigned char val) 459{ 460 vga_io_w (VGA_ATT_IW, reg); 461 vga_io_w (VGA_ATT_W, val); 462} 463 464static inline unsigned char vga_mm_rattr (void __iomem *regbase, unsigned char reg) 465{ 466 vga_mm_w (regbase, VGA_ATT_IW, reg); 467 return vga_mm_r (regbase, VGA_ATT_R); 468} 469 470static inline void vga_mm_wattr (void __iomem *regbase, unsigned char reg, unsigned char val) 471{ 472 vga_mm_w (regbase, VGA_ATT_IW, reg); 473 vga_mm_w (regbase, VGA_ATT_W, val); 474} 475 476#endif /* __linux_video_vga_h__ */ 477