1/* linux/include/linux/scx200.h
2
3   Copyright (c) 2001,2002 Christer Weinigel <wingel@nano-system.com>
4
5   Defines for the National Semiconductor SCx200 Processors
6*/
7
8/* Interesting stuff for the National Semiconductor SCx200 CPU */
9
10extern unsigned scx200_cb_base;
11
12#define scx200_cb_present() (scx200_cb_base!=0)
13
14/* F0 PCI Header/Bridge Configuration Registers */
15#define SCx200_DOCCS_BASE 0x78	/* DOCCS Base Address Register */
16#define SCx200_DOCCS_CTRL 0x7c	/* DOCCS Control Register */
17
18/* GPIO Register Block */
19#define SCx200_GPIO_SIZE 0x2c	/* Size of GPIO register block */
20
21/* General Configuration Block */
22#define SCx200_CB_BASE_FIXED 0x9000	/* Base fixed at 0x9000 according to errata? */
23
24/* Watchdog Timer */
25#define SCx200_WDT_OFFSET 0x00	/* offset within configuration block */
26#define SCx200_WDT_SIZE 0x05	/* size */
27
28#define SCx200_WDT_WDTO 0x00	/* Time-Out Register */
29#define SCx200_WDT_WDCNFG 0x02	/* Configuration Register */
30#define SCx200_WDT_WDSTS 0x04	/* Status Register */
31#define SCx200_WDT_WDSTS_WDOVF (1<<0) /* Overflow bit */
32
33/* High Resolution Timer */
34#define SCx200_TIMER_OFFSET 0x08
35#define SCx200_TIMER_SIZE 0x06
36
37/* Clock Generators */
38#define SCx200_CLOCKGEN_OFFSET 0x10
39#define SCx200_CLOCKGEN_SIZE 0x10
40
41/* Pin Multiplexing and Miscellaneous Configuration Registers */
42#define SCx200_MISC_OFFSET 0x30
43#define SCx200_MISC_SIZE 0x10
44
45#define SCx200_PMR 0x30		/* Pin Multiplexing Register */
46#define SCx200_MCR 0x34		/* Miscellaneous Configuration Register */
47#define SCx200_INTSEL 0x38	/* Interrupt Selection Register */
48#define SCx200_IID 0x3c		/* IA On a Chip Identification Number Reg */
49#define SCx200_REV 0x3d		/* Revision Register */
50#define SCx200_CBA 0x3e		/* Configuration Base Address Register */
51#define SCx200_CBA_SCRATCH 0x64	/* Configuration Base Address Scratchpad */
52