1#ifndef __HPET__ 2#define __HPET__ 1 3 4#include <linux/compiler.h> 5 6#ifdef __KERNEL__ 7 8/* 9 * Offsets into HPET Registers 10 */ 11 12struct hpet { 13 u64 hpet_cap; /* capabilities */ 14 u64 res0; /* reserved */ 15 u64 hpet_config; /* configuration */ 16 u64 res1; /* reserved */ 17 u64 hpet_isr; /* interrupt status reg */ 18 u64 res2[25]; /* reserved */ 19 union { /* main counter */ 20 u64 _hpet_mc64; 21 u32 _hpet_mc32; 22 unsigned long _hpet_mc; 23 } _u0; 24 u64 res3; /* reserved */ 25 struct hpet_timer { 26 u64 hpet_config; /* configuration/cap */ 27 union { /* timer compare register */ 28 u64 _hpet_hc64; 29 u32 _hpet_hc32; 30 unsigned long _hpet_compare; 31 } _u1; 32 u64 hpet_fsb[2]; /* FSB route */ 33 } hpet_timers[1]; 34}; 35 36#define hpet_mc _u0._hpet_mc 37#define hpet_compare _u1._hpet_compare 38 39#define HPET_MAX_TIMERS (32) 40 41/* 42 * HPET general capabilities register 43 */ 44 45#define HPET_COUNTER_CLK_PERIOD_MASK (0xffffffff00000000ULL) 46#define HPET_COUNTER_CLK_PERIOD_SHIFT (32UL) 47#define HPET_VENDOR_ID_MASK (0x00000000ffff0000ULL) 48#define HPET_VENDOR_ID_SHIFT (16ULL) 49#define HPET_LEG_RT_CAP_MASK (0x8000) 50#define HPET_COUNTER_SIZE_MASK (0x2000) 51#define HPET_NUM_TIM_CAP_MASK (0x1f00) 52#define HPET_NUM_TIM_CAP_SHIFT (8ULL) 53 54/* 55 * HPET general configuration register 56 */ 57 58#define HPET_LEG_RT_CNF_MASK (2UL) 59#define HPET_ENABLE_CNF_MASK (1UL) 60 61 62/* 63 * Timer configuration register 64 */ 65 66#define Tn_INT_ROUTE_CAP_MASK (0xffffffff00000000ULL) 67#define Tn_INI_ROUTE_CAP_SHIFT (32UL) 68#define Tn_FSB_INT_DELCAP_MASK (0x8000UL) 69#define Tn_FSB_INT_DELCAP_SHIFT (15) 70#define Tn_FSB_EN_CNF_MASK (0x4000UL) 71#define Tn_FSB_EN_CNF_SHIFT (14) 72#define Tn_INT_ROUTE_CNF_MASK (0x3e00UL) 73#define Tn_INT_ROUTE_CNF_SHIFT (9) 74#define Tn_32MODE_CNF_MASK (0x0100UL) 75#define Tn_VAL_SET_CNF_MASK (0x0040UL) 76#define Tn_SIZE_CAP_MASK (0x0020UL) 77#define Tn_PER_INT_CAP_MASK (0x0010UL) 78#define Tn_TYPE_CNF_MASK (0x0008UL) 79#define Tn_INT_ENB_CNF_MASK (0x0004UL) 80#define Tn_INT_TYPE_CNF_MASK (0x0002UL) 81 82/* 83 * Timer FSB Interrupt Route Register 84 */ 85 86#define Tn_FSB_INT_ADDR_MASK (0xffffffff00000000ULL) 87#define Tn_FSB_INT_ADDR_SHIFT (32UL) 88#define Tn_FSB_INT_VAL_MASK (0x00000000ffffffffULL) 89 90/* 91 * exported interfaces 92 */ 93 94struct hpet_task { 95 void (*ht_func) (void *); 96 void *ht_data; 97 void *ht_opaque; 98}; 99 100struct hpet_data { 101 unsigned long hd_phys_address; 102 void __iomem *hd_address; 103 unsigned short hd_nirqs; 104 unsigned short hd_flags; 105 unsigned int hd_state; /* timer allocated */ 106 unsigned int hd_irq[HPET_MAX_TIMERS]; 107}; 108 109#define HPET_DATA_PLATFORM 0x0001 /* platform call to hpet_alloc */ 110 111static inline void hpet_reserve_timer(struct hpet_data *hd, int timer) 112{ 113 hd->hd_state |= (1 << timer); 114 return; 115} 116 117int hpet_alloc(struct hpet_data *); 118int hpet_register(struct hpet_task *, int); 119int hpet_unregister(struct hpet_task *); 120int hpet_control(struct hpet_task *, unsigned int, unsigned long); 121 122#endif /* __KERNEL__ */ 123 124struct hpet_info { 125 unsigned long hi_ireqfreq; /* Hz */ 126 unsigned long hi_flags; /* information */ 127 unsigned short hi_hpet; 128 unsigned short hi_timer; 129}; 130 131#define HPET_INFO_PERIODIC 0x0001 /* timer is periodic */ 132 133#define HPET_IE_ON _IO('h', 0x01) /* interrupt on */ 134#define HPET_IE_OFF _IO('h', 0x02) /* interrupt off */ 135#define HPET_INFO _IOR('h', 0x03, struct hpet_info) 136#define HPET_EPI _IO('h', 0x04) /* enable periodic */ 137#define HPET_DPI _IO('h', 0x05) /* disable periodic */ 138#define HPET_IRQFREQ _IOW('h', 0x6, unsigned long) /* IRQFREQ usec */ 139 140#endif /* !__HPET__ */ 141