1/* 2 * This file is subject to the terms and conditions of the GNU General Public 3 * License. See the file "COPYING" in the main directory of this archive 4 * for more details. 5 */ 6#ifndef _ASM_PCI_H 7#define _ASM_PCI_H 8 9#include <linux/mm.h> 10 11#ifdef __KERNEL__ 12 13/* 14 * This file essentially defines the interface between board 15 * specific PCI code and MIPS common PCI code. Should potentially put 16 * into include/asm/pci.h file. 17 */ 18 19#include <linux/ioport.h> 20 21/* 22 * Each pci channel is a top-level PCI bus seem by CPU. A machine with 23 * multiple PCI channels may have multiple PCI host controllers or a 24 * single controller supporting multiple channels. 25 */ 26struct pci_controller { 27 struct pci_controller *next; 28 struct pci_bus *bus; 29 30 struct pci_ops *pci_ops; 31 struct resource *mem_resource; 32 unsigned long mem_offset; 33 struct resource *io_resource; 34 unsigned long io_offset; 35 unsigned long io_map_base; 36 37 unsigned int index; 38 /* For compatibility with current (as of July 2003) pciutils 39 and XFree86. Eventually will be removed. */ 40 unsigned int need_domain_info; 41 42 int iommu; 43 44 /* Optional access methods for reading/writing the bus number 45 of the PCI controller */ 46 int (*get_busno)(void); 47 void (*set_busno)(int busno); 48}; 49 50/* 51 * Used by boards to register their PCI busses before the actual scanning. 52 */ 53extern struct pci_controller * alloc_pci_controller(void); 54extern void register_pci_controller(struct pci_controller *hose); 55 56/* 57 * board supplied pci irq fixup routine 58 */ 59extern int pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin); 60 61 62/* Can be used to override the logic in pci_scan_bus for skipping 63 already-configured bus numbers - to be used for buggy BIOSes 64 or architectures with incomplete PCI setup by the loader */ 65 66extern unsigned int pcibios_assign_all_busses(void); 67 68#define pcibios_scan_all_fns(a, b) 0 69 70extern unsigned long PCIBIOS_MIN_IO; 71extern unsigned long PCIBIOS_MIN_MEM; 72 73#define PCIBIOS_MIN_CARDBUS_IO 0x4000 74 75extern void pcibios_set_master(struct pci_dev *dev); 76 77static inline void pcibios_penalize_isa_irq(int irq, int active) 78{ 79 /* We don't do dynamic PCI IRQ allocation */ 80} 81 82/* 83 * Dynamic DMA mapping stuff. 84 * MIPS has everything mapped statically. 85 */ 86 87#include <linux/types.h> 88#include <linux/slab.h> 89#include <asm/scatterlist.h> 90#include <linux/string.h> 91#include <asm/io.h> 92 93struct pci_dev; 94 95/* 96 * The PCI address space does equal the physical memory address space. The 97 * networking and block device layers use this boolean for bounce buffer 98 * decisions. This is set if any hose does not have an IOMMU. 99 */ 100extern unsigned int PCI_DMA_BUS_IS_PHYS; 101 102#ifdef CONFIG_DMA_NEED_PCI_MAP_STATE 103 104/* pci_unmap_{single,page} is not a nop, thus... */ 105#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME; 106#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) __u32 LEN_NAME; 107#define pci_unmap_addr(PTR, ADDR_NAME) ((PTR)->ADDR_NAME) 108#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL)) 109#define pci_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME) 110#define pci_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL)) 111 112#else /* CONFIG_DMA_NEED_PCI_MAP_STATE */ 113 114/* pci_unmap_{page,single} is a nop so... */ 115#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) 116#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) 117#define pci_unmap_addr(PTR, ADDR_NAME) (0) 118#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0) 119#define pci_unmap_len(PTR, LEN_NAME) (0) 120#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0) 121 122#endif /* CONFIG_DMA_NEED_PCI_MAP_STATE */ 123 124/* This is always fine. */ 125#define pci_dac_dma_supported(pci_dev, mask) (1) 126 127extern dma64_addr_t pci_dac_page_to_dma(struct pci_dev *pdev, 128 struct page *page, unsigned long offset, int direction); 129extern struct page *pci_dac_dma_to_page(struct pci_dev *pdev, 130 dma64_addr_t dma_addr); 131extern unsigned long pci_dac_dma_to_offset(struct pci_dev *pdev, 132 dma64_addr_t dma_addr); 133extern void pci_dac_dma_sync_single_for_cpu(struct pci_dev *pdev, 134 dma64_addr_t dma_addr, size_t len, int direction); 135extern void pci_dac_dma_sync_single_for_device(struct pci_dev *pdev, 136 dma64_addr_t dma_addr, size_t len, int direction); 137 138#ifdef CONFIG_PCI 139static inline void pci_dma_burst_advice(struct pci_dev *pdev, 140 enum pci_dma_burst_strategy *strat, 141 unsigned long *strategy_parameter) 142{ 143 *strat = PCI_DMA_BURST_INFINITY; 144 *strategy_parameter = ~0UL; 145} 146#endif 147 148extern void pcibios_resource_to_bus(struct pci_dev *dev, 149 struct pci_bus_region *region, struct resource *res); 150 151extern void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res, 152 struct pci_bus_region *region); 153 154static inline struct resource * 155pcibios_select_root(struct pci_dev *pdev, struct resource *res) 156{ 157 struct resource *root = NULL; 158 159 if (res->flags & IORESOURCE_IO) 160 root = &ioport_resource; 161 if (res->flags & IORESOURCE_MEM) 162 root = &iomem_resource; 163 164 return root; 165} 166 167#ifdef CONFIG_PCI_DOMAINS 168 169#define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index 170 171static inline int pci_proc_domain(struct pci_bus *bus) 172{ 173 struct pci_controller *hose = bus->sysdata; 174 return hose->need_domain_info; 175} 176 177#endif /* CONFIG_PCI_DOMAINS */ 178 179#endif /* __KERNEL__ */ 180 181/* implement the pci_ DMA API in terms of the generic device dma_ one */ 182#include <asm-generic/pci-dma-compat.h> 183 184static inline void pcibios_add_platform_entries(struct pci_dev *dev) 185{ 186} 187 188/* Do platform specific device initialization at pci_enable_device() time */ 189extern int pcibios_plat_dev_init(struct pci_dev *dev); 190 191/* Chances are this interrupt is wired PC-style ... */ 192static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel) 193{ 194 return channel ? 15 : 14; 195} 196 197#endif /* _ASM_PCI_H */ 198