1/* 7/18/95 */ 2/*----------------------------------------------------------------------------*/ 3/* Residual Data header definitions and prototypes */ 4/*----------------------------------------------------------------------------*/ 5 6/* Structure map for RESIDUAL on PowerPC Reference Platform */ 7/* residual.h - Residual data structure passed in r3. */ 8/* Load point passed in r4 to boot image. */ 9/* For enum's: if given in hex then they are bit significant, */ 10/* i.e. only one bit is on for each enum */ 11/* Reserved fields must be filled with zeros. */ 12 13#ifdef __KERNEL__ 14#ifndef _RESIDUAL_ 15#define _RESIDUAL_ 16 17#ifndef __ASSEMBLY__ 18 19#define MAX_CPUS 32 /* These should be set to the maximum */ 20#define MAX_MEMS 64 /* number possible for this system. */ 21#define MAX_DEVICES 256 /* Changing these will change the */ 22#define AVE_PNP_SIZE 32 /* structure, hence the version of */ 23#define MAX_MEM_SEGS 64 /* this header file. */ 24 25/*----------------------------------------------------------------------------*/ 26/* Public structures... */ 27/*----------------------------------------------------------------------------*/ 28 29#include <asm/pnp.h> 30 31typedef enum _L1CACHE_TYPE { 32 NoneCAC = 0, 33 SplitCAC = 1, 34 CombinedCAC = 2 35 } L1CACHE_TYPE; 36 37typedef enum _TLB_TYPE { 38 NoneTLB = 0, 39 SplitTLB = 1, 40 CombinedTLB = 2 41 } TLB_TYPE; 42 43typedef enum _FIRMWARE_SUPPORT { 44 Conventional = 0x01, 45 OpenFirmware = 0x02, 46 Diagnostics = 0x04, 47 LowDebug = 0x08, 48 Multiboot = 0x10, 49 LowClient = 0x20, 50 Hex41 = 0x40, 51 FAT = 0x80, 52 ISO9660 = 0x0100, 53 SCSI_InitiatorID_Override = 0x0200, 54 Tape_Boot = 0x0400, 55 FW_Boot_Path = 0x0800 56 } FIRMWARE_SUPPORT; 57 58typedef enum _FIRMWARE_SUPPLIERS { 59 IBMFirmware = 0x00, 60 MotoFirmware = 0x01, /* 7/18/95 */ 61 FirmWorks = 0x02, /* 10/5/95 */ 62 Bull = 0x03, /* 04/03/96 */ 63 } FIRMWARE_SUPPLIERS; 64 65typedef enum _ENDIAN_SWITCH_METHODS { 66 UsePort92 = 0x01, 67 UsePCIConfigA8 = 0x02, 68 UseFF001030 = 0x03, 69 } ENDIAN_SWITCH_METHODS; 70 71typedef enum _SPREAD_IO_METHODS { 72 UsePort850 = 0x00, 73/*UsePCIConfigA8 = 0x02,*/ 74 } SPREAD_IO_METHODS; 75 76typedef struct _VPD { 77 78 /* Box dependent stuff */ 79 unsigned char PrintableModel[32]; /* Null terminated string. 80 Must be of the form: 81 vvv,<20h>,<model designation>,<0x0> 82 where vvv is the vendor ID 83 e.g. IBM PPS MODEL 6015<0x0> */ 84 unsigned char Serial[16]; /* 12/94: 85 Serial Number; must be of the form: 86 vvv<serial number> where vvv is the 87 vendor ID. 88 e.g. IBM60151234567<20h><20h> */ 89 unsigned char Reserved[48]; 90 unsigned long FirmwareSupplier; /* See FirmwareSuppliers enum */ 91 unsigned long FirmwareSupports; /* See FirmwareSupport enum */ 92 unsigned long NvramSize; /* Size of nvram in bytes */ 93 unsigned long NumSIMMSlots; 94 unsigned short EndianSwitchMethod; /* See EndianSwitchMethods enum */ 95 unsigned short SpreadIOMethod; /* See SpreadIOMethods enum */ 96 unsigned long SmpIar; 97 unsigned long RAMErrLogOffset; /* Heap offset to error log */ 98 unsigned long Reserved5; 99 unsigned long Reserved6; 100 unsigned long ProcessorHz; /* Processor clock frequency in Hertz */ 101 unsigned long ProcessorBusHz; /* Processor bus clock frequency */ 102 unsigned long Reserved7; 103 unsigned long TimeBaseDivisor; /* (Bus clocks per timebase tic)*1000 */ 104 unsigned long WordWidth; /* Word width in bits */ 105 unsigned long PageSize; /* Page size in bytes */ 106 unsigned long CoherenceBlockSize; /* Unit of transfer in/out of cache 107 for which coherency is maintained; 108 normally <= CacheLineSize. */ 109 unsigned long GranuleSize; /* Unit of lock allocation to avoid */ 110 /* false sharing of locks. */ 111 112 /* L1 Cache variables */ 113 unsigned long CacheSize; /* L1 Cache size in KB. This is the */ 114 /* total size of the L1, whether */ 115 /* combined or split */ 116 unsigned long CacheAttrib; /* L1CACHE_TYPE */ 117 unsigned long CacheAssoc; /* L1 Cache associativity. Use this 118 for combined cache. If split, put 119 zeros here. */ 120 unsigned long CacheLineSize; /* L1 Cache line size in bytes. Use 121 for combined cache. If split, put 122 zeros here. */ 123 /* For split L1 Cache: (= combined if combined cache) */ 124 unsigned long I_CacheSize; 125 unsigned long I_CacheAssoc; 126 unsigned long I_CacheLineSize; 127 unsigned long D_CacheSize; 128 unsigned long D_CacheAssoc; 129 unsigned long D_CacheLineSize; 130 131 /* Translation Lookaside Buffer variables */ 132 unsigned long TLBSize; /* Total number of TLBs on the system */ 133 unsigned long TLBAttrib; /* Combined I+D or split TLB */ 134 unsigned long TLBAssoc; /* TLB Associativity. Use this for 135 combined TLB. If split, put zeros 136 here. */ 137 /* For split TLB: (= combined if combined TLB) */ 138 unsigned long I_TLBSize; 139 unsigned long I_TLBAssoc; 140 unsigned long D_TLBSize; 141 unsigned long D_TLBAssoc; 142 143 unsigned long ExtendedVPD; /* Offset to extended VPD area; 144 null if unused */ 145 } VPD; 146 147typedef enum _DEVICE_FLAGS { 148 Enabled = 0x4000, /* 1 - PCI device is enabled */ 149 Integrated = 0x2000, 150 Failed = 0x1000, /* 1 - device failed POST code tests */ 151 Static = 0x0800, /* 0 - dynamically configurable 152 1 - static */ 153 Dock = 0x0400, /* 0 - not a docking station device 154 1 - is a docking station device */ 155 Boot = 0x0200, /* 0 - device cannot be used for BOOT 156 1 - can be a BOOT device */ 157 Configurable = 0x0100, /* 1 - device is configurable */ 158 Disableable = 0x80, /* 1 - device can be disabled */ 159 PowerManaged = 0x40, /* 0 - not managed; 1 - managed */ 160 ReadOnly = 0x20, /* 1 - device is read only */ 161 Removable = 0x10, /* 1 - device is removable */ 162 ConsoleIn = 0x08, 163 ConsoleOut = 0x04, 164 Input = 0x02, 165 Output = 0x01 166 } DEVICE_FLAGS; 167 168typedef enum _BUS_ID { 169 ISADEVICE = 0x01, 170 EISADEVICE = 0x02, 171 PCIDEVICE = 0x04, 172 PCMCIADEVICE = 0x08, 173 PNPISADEVICE = 0x10, 174 MCADEVICE = 0x20, 175 MXDEVICE = 0x40, /* Devices on mezzanine bus */ 176 PROCESSORDEVICE = 0x80, /* Devices on processor bus */ 177 VMEDEVICE = 0x100, 178 } BUS_ID; 179 180typedef struct _DEVICE_ID { 181 unsigned long BusId; /* See BUS_ID enum above */ 182 unsigned long DevId; /* Big Endian format */ 183 unsigned long SerialNum; /* For multiple usage of a single 184 DevId */ 185 unsigned long Flags; /* See DEVICE_FLAGS enum above */ 186 unsigned char BaseType; /* See pnp.h for bit definitions */ 187 unsigned char SubType; /* See pnp.h for bit definitions */ 188 unsigned char Interface; /* See pnp.h for bit definitions */ 189 unsigned char Spare; 190 } DEVICE_ID; 191 192typedef union _BUS_ACCESS { 193 struct _PnPAccess{ 194 unsigned char CSN; 195 unsigned char LogicalDevNumber; 196 unsigned short ReadDataPort; 197 } PnPAccess; 198 struct _ISAAccess{ 199 unsigned char SlotNumber; /* ISA Slot Number generally not 200 available; 0 if unknown */ 201 unsigned char LogicalDevNumber; 202 unsigned short ISAReserved; 203 } ISAAccess; 204 struct _MCAAccess{ 205 unsigned char SlotNumber; 206 unsigned char LogicalDevNumber; 207 unsigned short MCAReserved; 208 } MCAAccess; 209 struct _PCMCIAAccess{ 210 unsigned char SlotNumber; 211 unsigned char LogicalDevNumber; 212 unsigned short PCMCIAReserved; 213 } PCMCIAAccess; 214 struct _EISAAccess{ 215 unsigned char SlotNumber; 216 unsigned char FunctionNumber; 217 unsigned short EISAReserved; 218 } EISAAccess; 219 struct _PCIAccess{ 220 unsigned char BusNumber; 221 unsigned char DevFuncNumber; 222 unsigned short PCIReserved; 223 } PCIAccess; 224 struct _ProcBusAccess{ 225 unsigned char BusNumber; 226 unsigned char BUID; 227 unsigned short ProcBusReserved; 228 } ProcBusAccess; 229 } BUS_ACCESS; 230 231/* Per logical device information */ 232typedef struct _PPC_DEVICE { 233 DEVICE_ID DeviceId; 234 BUS_ACCESS BusAccess; 235 236 /* The following three are offsets into the DevicePnPHeap */ 237 /* All are in PnP compressed format */ 238 unsigned long AllocatedOffset; /* Allocated resource description */ 239 unsigned long PossibleOffset; /* Possible resource description */ 240 unsigned long CompatibleOffset; /* Compatible device identifiers */ 241 } PPC_DEVICE; 242 243typedef enum _CPU_STATE { 244 CPU_GOOD = 0, /* CPU is present, and active */ 245 CPU_GOOD_FW = 1, /* CPU is present, and in firmware */ 246 CPU_OFF = 2, /* CPU is present, but inactive */ 247 CPU_FAILED = 3, /* CPU is present, but failed POST */ 248 CPU_NOT_PRESENT = 255 /* CPU not present */ 249 } CPU_STATE; 250 251typedef struct _PPC_CPU { 252 unsigned long CpuType; /* Result of mfspr from Processor 253 Version Register (PVR). 254 PVR(0-15) = Version (e.g. 601) 255 PVR(16-31 = EC Level */ 256 unsigned char CpuNumber; /* CPU Number for this processor */ 257 unsigned char CpuState; /* CPU State, see CPU_STATE enum */ 258 unsigned short Reserved; 259 } PPC_CPU; 260 261typedef struct _PPC_MEM { 262 unsigned long SIMMSize; /* 0 - absent or bad 263 8M, 32M (in MB) */ 264 } PPC_MEM; 265 266typedef enum _MEM_USAGE { 267 Other = 0x8000, 268 ResumeBlock = 0x4000, /* for use by power management */ 269 SystemROM = 0x2000, /* Flash memory (populated) */ 270 UnPopSystemROM = 0x1000, /* Unpopulated part of SystemROM area */ 271 IOMemory = 0x0800, 272 SystemIO = 0x0400, 273 SystemRegs = 0x0200, 274 PCIAddr = 0x0100, 275 PCIConfig = 0x80, 276 ISAAddr = 0x40, 277 Unpopulated = 0x20, /* Unpopulated part of System Memory */ 278 Free = 0x10, /* Free part of System Memory */ 279 BootImage = 0x08, /* BootImage part of System Memory */ 280 FirmwareCode = 0x04, /* FirmwareCode part of System Memory */ 281 FirmwareHeap = 0x02, /* FirmwareHeap part of System Memory */ 282 FirmwareStack = 0x01 /* FirmwareStack part of System Memory*/ 283 } MEM_USAGE; 284 285typedef struct _MEM_MAP { 286 unsigned long Usage; /* See MEM_USAGE above */ 287 unsigned long BasePage; /* Page number measured in 4KB pages */ 288 unsigned long PageCount; /* Page count measured in 4KB pages */ 289 } MEM_MAP; 290 291typedef struct _RESIDUAL { 292 unsigned long ResidualLength; /* Length of Residual */ 293 unsigned char Version; /* of this data structure */ 294 unsigned char Revision; /* of this data structure */ 295 unsigned short EC; /* of this data structure */ 296 /* VPD */ 297 VPD VitalProductData; 298 /* CPU */ 299 unsigned short MaxNumCpus; /* Max CPUs in this system */ 300 unsigned short ActualNumCpus; /* ActualNumCpus < MaxNumCpus means */ 301 /* that there are unpopulated or */ 302 /* otherwise unusable cpu locations */ 303 PPC_CPU Cpus[MAX_CPUS]; 304 /* Memory */ 305 unsigned long TotalMemory; /* Total amount of memory installed */ 306 unsigned long GoodMemory; /* Total amount of good memory */ 307 unsigned long ActualNumMemSegs; 308 MEM_MAP Segs[MAX_MEM_SEGS]; 309 unsigned long ActualNumMemories; 310 PPC_MEM Memories[MAX_MEMS]; 311 /* Devices */ 312 unsigned long ActualNumDevices; 313 PPC_DEVICE Devices[MAX_DEVICES]; 314 unsigned char DevicePnPHeap[2*MAX_DEVICES*AVE_PNP_SIZE]; 315 } RESIDUAL; 316 317 318/* 319 * Forward declaration - we can't include <linux/pci.h> because it 320 * breaks the boot loader 321 */ 322struct pci_dev; 323 324extern RESIDUAL *res; 325extern void print_residual_device_info(void); 326extern PPC_DEVICE *residual_find_device(unsigned long BusMask, 327 unsigned char * DevID, int BaseType, 328 int SubType, int Interface, int n); 329extern int residual_pcidev_irq(struct pci_dev *dev); 330extern void residual_irq_mask(char *irq_edge_mask_lo, char *irq_edge_mask_hi); 331extern unsigned int residual_isapic_addr(void); 332extern PnP_TAG_PACKET *PnP_find_packet(unsigned char *p, unsigned packet_tag, 333 int n); 334extern PnP_TAG_PACKET *PnP_find_small_vendor_packet(unsigned char *p, 335 unsigned packet_type, 336 int n); 337extern PnP_TAG_PACKET *PnP_find_large_vendor_packet(unsigned char *p, 338 unsigned packet_type, 339 int n); 340 341#ifdef CONFIG_PREP_RESIDUAL 342#define have_residual_data (res && res->ResidualLength) 343#else 344#define have_residual_data 0 345#endif 346 347#endif /* __ASSEMBLY__ */ 348#endif /* ndef _RESIDUAL_ */ 349 350#endif /* __KERNEL__ */ 351