1#ifndef __PPC_PCI_H
2#define __PPC_PCI_H
3#ifdef __KERNEL__
4
5#include <linux/types.h>
6#include <linux/slab.h>
7#include <linux/string.h>
8#include <linux/mm.h>
9#include <asm/scatterlist.h>
10#include <asm/io.h>
11#include <asm/pci-bridge.h>
12#include <asm-generic/pci-dma-compat.h>
13
14struct pci_dev;
15
16/* Values for the `which' argument to sys_pciconfig_iobase syscall.  */
17#define IOBASE_BRIDGE_NUMBER	0
18#define IOBASE_MEMORY		1
19#define IOBASE_IO		2
20#define IOBASE_ISA_IO		3
21#define IOBASE_ISA_MEM		4
22
23/*
24 * Set this to 1 if you want the kernel to re-assign all PCI
25 * bus numbers
26 */
27extern int pci_assign_all_buses;
28
29#define pcibios_assign_all_busses()	(pci_assign_all_buses)
30#define pcibios_scan_all_fns(a, b)	0
31
32#define PCIBIOS_MIN_IO		0x1000
33#define PCIBIOS_MIN_MEM		0x10000000
34
35extern inline void pcibios_set_master(struct pci_dev *dev)
36{
37	/* No special bus mastering setup handling */
38}
39
40extern inline void pcibios_penalize_isa_irq(int irq, int active)
41{
42	/* We don't do dynamic PCI IRQ allocation */
43}
44
45extern unsigned long pci_resource_to_bus(struct pci_dev *pdev, struct resource *res);
46
47/*
48 * The PCI bus bridge can translate addresses issued by the processor(s)
49 * into a different address on the PCI bus.  On 32-bit cpus, we assume
50 * this mapping is 1-1, but on 64-bit systems it often isn't.
51 *
52 * Obsolete ! Drivers should now use pci_resource_to_bus
53 */
54extern unsigned long phys_to_bus(unsigned long pa);
55extern unsigned long pci_phys_to_bus(unsigned long pa, int busnr);
56extern unsigned long pci_bus_to_phys(unsigned int ba, int busnr);
57
58/* The PCI address space does equal the physical memory
59 * address space.  The networking and block device layers use
60 * this boolean for bounce buffer decisions.
61 */
62#define PCI_DMA_BUS_IS_PHYS     (1)
63
64#ifdef CONFIG_NOT_COHERENT_CACHE
65/*
66 * pci_unmap_{page,single} are NOPs but pci_dma_sync_single_for_cpu()
67 * and so on are not, so...
68 */
69
70#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)	\
71	dma_addr_t ADDR_NAME;
72#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)		\
73	__u32 LEN_NAME;
74#define pci_unmap_addr(PTR, ADDR_NAME)			\
75	((PTR)->ADDR_NAME)
76#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL)		\
77	(((PTR)->ADDR_NAME) = (VAL))
78#define pci_unmap_len(PTR, LEN_NAME)			\
79	((PTR)->LEN_NAME)
80#define pci_unmap_len_set(PTR, LEN_NAME, VAL)		\
81	(((PTR)->LEN_NAME) = (VAL))
82
83#else /* coherent */
84
85/* pci_unmap_{page,single} is a nop so... */
86#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
87#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
88#define pci_unmap_addr(PTR, ADDR_NAME)		(0)
89#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL)	do { } while (0)
90#define pci_unmap_len(PTR, LEN_NAME)		(0)
91#define pci_unmap_len_set(PTR, LEN_NAME, VAL)	do { } while (0)
92
93#endif /* CONFIG_NOT_COHERENT_CACHE */
94
95#ifdef CONFIG_PCI
96static inline void pci_dma_burst_advice(struct pci_dev *pdev,
97					enum pci_dma_burst_strategy *strat,
98					unsigned long *strategy_parameter)
99{
100	*strat = PCI_DMA_BURST_INFINITY;
101	*strategy_parameter = ~0UL;
102}
103#endif
104
105/*
106 * At present there are very few 32-bit PPC machines that can have
107 * memory above the 4GB point, and we don't support that.
108 */
109#define pci_dac_dma_supported(pci_dev, mask)	(0)
110
111/* Return the index of the PCI controller for device PDEV. */
112#define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index
113
114/* Set the name of the bus as it appears in /proc/bus/pci */
115static inline int pci_proc_domain(struct pci_bus *bus)
116{
117	return 0;
118}
119
120/* Map a range of PCI memory or I/O space for a device into user space */
121int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma,
122			enum pci_mmap_state mmap_state, int write_combine);
123
124/* Tell drivers/pci/proc.c that we have pci_mmap_page_range() */
125#define HAVE_PCI_MMAP	1
126
127extern void
128pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
129			struct resource *res);
130
131extern void
132pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
133			struct pci_bus_region *region);
134
135static inline struct resource *
136pcibios_select_root(struct pci_dev *pdev, struct resource *res)
137{
138	struct resource *root = NULL;
139
140	if (res->flags & IORESOURCE_IO)
141		root = &ioport_resource;
142	if (res->flags & IORESOURCE_MEM)
143		root = &iomem_resource;
144
145	return root;
146}
147
148extern void pcibios_add_platform_entries(struct pci_dev *dev);
149
150struct file;
151extern pgprot_t	pci_phys_mem_access_prot(struct file *file,
152					 unsigned long pfn,
153					 unsigned long size,
154					 pgprot_t prot);
155
156#define HAVE_ARCH_PCI_RESOURCE_TO_USER
157extern void pci_resource_to_user(const struct pci_dev *dev, int bar,
158				 const struct resource *rsrc,
159				 resource_size_t *start, resource_size_t *end);
160
161
162#endif	/* __KERNEL__ */
163
164#endif /* __PPC_PCI_H */
165