1/* 2 * This file is subject to the terms and conditions of the GNU General Public 3 * License. See the file "COPYING" in the main directory of this archive 4 * for more details. 5 * 6 * Copyright (C) 1999 by Ralf Baechle 7 * Copyright (C) 1999, 2000 Silicon Graphics, Inc. 8 */ 9#ifndef _ASM_SERIAL_H 10#define _ASM_SERIAL_H 11 12 13/* 14 * This assumes you have a 1.8432 MHz clock for your UART. 15 * 16 * It'd be nice if someone built a serial card with a 24.576 MHz 17 * clock, since the 16550A is capable of handling a top speed of 1.5 18 * megabits/second; but this requires the faster clock. 19 */ 20#define BASE_BAUD (1843200 / 16) 21 22/* Standard COM flags (except for COM4, because of the 8514 problem) */ 23#ifdef CONFIG_SERIAL_DETECT_IRQ 24#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST | ASYNC_AUTO_IRQ) 25#define STD_COM4_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_AUTO_IRQ) 26#else 27#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST) 28#define STD_COM4_FLAGS ASYNC_BOOT_AUTOCONF 29#endif 30 31#ifdef CONFIG_MACH_JAZZ 32#include <asm/jazz.h> 33 34#ifndef CONFIG_OLIVETTI_M700 35#define JAZZ_BASE_BAUD ( 8000000 / 16 ) /* ( 3072000 / 16) */ 36#else 37/* but the M700 isn't such a strange beast */ 38#define JAZZ_BASE_BAUD BASE_BAUD 39#endif 40 41#define _JAZZ_SERIAL_INIT(int, base) \ 42 { .baud_base = JAZZ_BASE_BAUD, .irq = int, .flags = STD_COM_FLAGS, \ 43 .iomem_base = (u8 *) base, .iomem_reg_shift = 0, \ 44 .io_type = SERIAL_IO_MEM } 45#define JAZZ_SERIAL_PORT_DEFNS \ 46 _JAZZ_SERIAL_INIT(JAZZ_SERIAL1_IRQ, JAZZ_SERIAL1_BASE), \ 47 _JAZZ_SERIAL_INIT(JAZZ_SERIAL2_IRQ, JAZZ_SERIAL2_BASE), 48#else 49#define JAZZ_SERIAL_PORT_DEFNS 50#endif 51 52/* 53 * Galileo EV64120 evaluation board 54 */ 55#ifdef CONFIG_MIPS_EV64120 56#include <mach-gt64120.h> 57#define EV64120_SERIAL_PORT_DEFNS \ 58 { .baud_base = EV64120_BASE_BAUD, .irq = EV64120_UART_IRQ, \ 59 .flags = STD_COM_FLAGS, \ 60 .iomem_base = EV64120_UART0_REGS_BASE, .iomem_reg_shift = 2, \ 61 .io_type = SERIAL_IO_MEM }, \ 62 { .baud_base = EV64120_BASE_BAUD, .irq = EV64120_UART_IRQ, \ 63 .flags = STD_COM_FLAGS, \ 64 .iomem_base = EV64120_UART1_REGS_BASE, .iomem_reg_shift = 2, \ 65 .io_type = SERIAL_IO_MEM }, 66#else 67#define EV64120_SERIAL_PORT_DEFNS 68#endif 69 70#ifdef CONFIG_HAVE_STD_PC_SERIAL_PORT 71#define STD_SERIAL_PORT_DEFNS \ 72 /* UART CLK PORT IRQ FLAGS */ \ 73 { 0, BASE_BAUD, 0x3F8, 4, STD_COM_FLAGS }, /* ttyS0 */ \ 74 { 0, BASE_BAUD, 0x2F8, 3, STD_COM_FLAGS }, /* ttyS1 */ \ 75 { 0, BASE_BAUD, 0x3E8, 4, STD_COM_FLAGS }, /* ttyS2 */ \ 76 { 0, BASE_BAUD, 0x2E8, 3, STD_COM4_FLAGS }, /* ttyS3 */ 77 78#else /* CONFIG_HAVE_STD_PC_SERIAL_PORTS */ 79#define STD_SERIAL_PORT_DEFNS 80#endif /* CONFIG_HAVE_STD_PC_SERIAL_PORTS */ 81 82#ifdef CONFIG_MOMENCO_OCELOT_3 83#define OCELOT_3_BASE_BAUD ( 20000000 / 16 ) 84#define OCELOT_3_SERIAL_IRQ 6 85#define OCELOT_3_SERIAL_BASE (signed)0xfd000020 86 87#define _OCELOT_3_SERIAL_INIT(int, base) \ 88 { .baud_base = OCELOT_3_BASE_BAUD, irq: int, \ 89 .flags = STD_COM_FLAGS, \ 90 .iomem_base = (u8 *) base, iomem_reg_shift: 2, \ 91 io_type: SERIAL_IO_MEM } 92 93#define MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS \ 94 _OCELOT_3_SERIAL_INIT(OCELOT_3_SERIAL_IRQ, OCELOT_3_SERIAL_BASE) 95#else 96#define MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS 97#endif 98 99#ifdef CONFIG_MOMENCO_OCELOT 100/* Ordinary NS16552 duart with a 20MHz crystal. */ 101#define OCELOT_BASE_BAUD ( 20000000 / 16 ) 102 103#define OCELOT_SERIAL1_IRQ 4 104#define OCELOT_SERIAL1_BASE 0xe0001020 105 106#define _OCELOT_SERIAL_INIT(int, base) \ 107 { .baud_base = OCELOT_BASE_BAUD, .irq = int, .flags = STD_COM_FLAGS, \ 108 .iomem_base = (u8 *) base, .iomem_reg_shift = 2, \ 109 .io_type = SERIAL_IO_MEM } 110#define MOMENCO_OCELOT_SERIAL_PORT_DEFNS \ 111 _OCELOT_SERIAL_INIT(OCELOT_SERIAL1_IRQ, OCELOT_SERIAL1_BASE) 112#else 113#define MOMENCO_OCELOT_SERIAL_PORT_DEFNS 114#endif 115 116#ifdef CONFIG_MOMENCO_OCELOT_C 117/* Ordinary NS16552 duart with a 20MHz crystal. */ 118#define OCELOT_C_BASE_BAUD ( 20000000 / 16 ) 119 120#define OCELOT_C_SERIAL1_IRQ 80 121#define OCELOT_C_SERIAL1_BASE 0xfd000020 122 123#define OCELOT_C_SERIAL2_IRQ 81 124#define OCELOT_C_SERIAL2_BASE 0xfd000000 125 126#define _OCELOT_C_SERIAL_INIT(int, base) \ 127 { .baud_base = OCELOT_C_BASE_BAUD, \ 128 .irq = (int), \ 129 .flags = STD_COM_FLAGS, \ 130 .iomem_base = (u8 *) base, \ 131 .iomem_reg_shift = 2, \ 132 .io_type = SERIAL_IO_MEM \ 133 } 134#define MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS \ 135 _OCELOT_C_SERIAL_INIT(OCELOT_C_SERIAL1_IRQ, OCELOT_C_SERIAL1_BASE), \ 136 _OCELOT_C_SERIAL_INIT(OCELOT_C_SERIAL2_IRQ, OCELOT_C_SERIAL2_BASE) 137#else 138#define MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS 139#endif 140 141#ifdef CONFIG_DDB5477 142#include <asm/ddb5xxx/ddb5477.h> 143#define DDB5477_SERIAL_PORT_DEFNS \ 144 { .baud_base = BASE_BAUD, .irq = VRC5477_IRQ_UART0, \ 145 .flags = STD_COM_FLAGS, .iomem_base = (u8*)0xbfa04200, \ 146 .iomem_reg_shift = 3, .io_type = SERIAL_IO_MEM}, \ 147 { .baud_base = BASE_BAUD, .irq = VRC5477_IRQ_UART1, \ 148 .flags = STD_COM_FLAGS, .iomem_base = (u8*)0xbfa04240, \ 149 .iomem_reg_shift = 3, .io_type = SERIAL_IO_MEM}, 150#else 151#define DDB5477_SERIAL_PORT_DEFNS 152#endif 153 154#ifdef CONFIG_SGI_IP32 155/* 156 * The IP32 (SGI O2) has standard serial ports (UART 16550A) mapped in memory 157 * They are initialized in ip32_setup 158 */ 159#define IP32_SERIAL_PORT_DEFNS \ 160 {},{}, 161#else 162#define IP32_SERIAL_PORT_DEFNS 163#endif /* CONFIG_SGI_IP32 */ 164 165#define SERIAL_PORT_DFNS \ 166 DDB5477_SERIAL_PORT_DEFNS \ 167 EV64120_SERIAL_PORT_DEFNS \ 168 IP32_SERIAL_PORT_DEFNS \ 169 JAZZ_SERIAL_PORT_DEFNS \ 170 STD_SERIAL_PORT_DEFNS \ 171 MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS \ 172 MOMENCO_OCELOT_SERIAL_PORT_DEFNS \ 173 MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS 174 175#endif /* _ASM_SERIAL_H */ 176