1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License.  See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1994 Waldorf GMBH
7 * Copyright (C) 1995, 1996, 1997, 1998, 1999, 2001, 2002, 2003 Ralf Baechle
8 * Copyright (C) 1996 Paul M. Antoine
9 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
10 */
11#ifndef _ASM_PROCESSOR_H
12#define _ASM_PROCESSOR_H
13
14#include <linux/cpumask.h>
15#include <linux/threads.h>
16
17#include <asm/cachectl.h>
18#include <asm/cpu.h>
19#include <asm/cpu-info.h>
20#include <asm/mipsregs.h>
21#include <asm/prefetch.h>
22#include <asm/system.h>
23
24/*
25 * Return current * instruction pointer ("program counter").
26 */
27#define current_text_addr() ({ __label__ _l; _l: &&_l;})
28
29/*
30 * System setup and hardware flags..
31 */
32extern void (*cpu_wait)(void);
33
34extern unsigned int vced_count, vcei_count;
35
36#ifdef CONFIG_32BIT
37/*
38 * User space process size: 2GB. This is hardcoded into a few places,
39 * so don't change it unless you know what you are doing.
40 */
41#define TASK_SIZE	0x7fff8000UL
42
43/*
44 * This decides where the kernel will search for a free chunk of vm
45 * space during mmap's.
46 */
47#define TASK_UNMAPPED_BASE	(PAGE_ALIGN(TASK_SIZE / 3))
48#endif
49
50#ifdef CONFIG_64BIT
51/*
52 * User space process size: 1TB. This is hardcoded into a few places,
53 * so don't change it unless you know what you are doing.  TASK_SIZE
54 * is limited to 1TB by the R4000 architecture; R10000 and better can
55 * support 16TB; the architectural reserve for future expansion is
56 * 8192EB ...
57 */
58#define TASK_SIZE32	0x7fff8000UL
59#define TASK_SIZE	0x10000000000UL
60
61/*
62 * This decides where the kernel will search for a free chunk of vm
63 * space during mmap's.
64 */
65#define TASK_UNMAPPED_BASE	((current->thread.mflags & MF_32BIT_ADDR) ? \
66	PAGE_ALIGN(TASK_SIZE32 / 3) : PAGE_ALIGN(TASK_SIZE / 3))
67#endif
68
69#define NUM_FPU_REGS	32
70
71typedef __u64 fpureg_t;
72
73/*
74 * It would be nice to add some more fields for emulator statistics, but there
75 * are a number of fixed offsets in offset.h and elsewhere that would have to
76 * be recalculated by hand.  So the additional information will be private to
77 * the FPU emulator for now.  See asm-mips/fpu_emulator.h.
78 */
79
80struct mips_fpu_struct {
81	fpureg_t	fpr[NUM_FPU_REGS];
82	unsigned int	fcr31;
83};
84
85#define INIT_FPU { \
86	{0,} \
87}
88
89#define NUM_DSP_REGS   6
90
91typedef __u32 dspreg_t;
92
93struct mips_dsp_state {
94	dspreg_t        dspr[NUM_DSP_REGS];
95	unsigned int    dspcontrol;
96};
97
98#define INIT_DSP {{0,},}
99
100#define INIT_CPUMASK { \
101	{0,} \
102}
103
104typedef struct {
105	unsigned long seg;
106} mm_segment_t;
107
108#define ARCH_MIN_TASKALIGN	8
109
110struct mips_abi;
111
112/*
113 * If you change thread_struct remember to change the #defines below too!
114 */
115struct thread_struct {
116	/* Saved main processor registers. */
117	unsigned long reg16;
118	unsigned long reg17, reg18, reg19, reg20, reg21, reg22, reg23;
119	unsigned long reg29, reg30, reg31;
120
121	/* Saved cp0 stuff. */
122	unsigned long cp0_status;
123
124	/* Saved fpu/fpu emulator stuff. */
125	struct mips_fpu_struct fpu;
126#ifdef CONFIG_MIPS_MT_FPAFF
127	/* Emulated instruction count */
128	unsigned long emulated_fp;
129	/* Saved per-thread scheduler affinity mask */
130	cpumask_t user_cpus_allowed;
131#endif /* CONFIG_MIPS_MT_FPAFF */
132
133	/* Saved state of the DSP ASE, if available. */
134	struct mips_dsp_state dsp;
135
136	/* Other stuff associated with the thread. */
137	unsigned long cp0_badvaddr;	/* Last user fault */
138	unsigned long cp0_baduaddr;	/* Last kernel fault accessing USEG */
139	unsigned long error_code;
140	unsigned long trap_no;
141#define MF_FIXADE	1		/* Fix address errors in software */
142#define MF_LOGADE	2		/* Log address errors to syslog */
143#define MF_32BIT_REGS	4		/* also implies 16/32 fprs */
144#define MF_32BIT_ADDR	8		/* 32-bit address space (o32/n32) */
145#define MF_FPUBOUND	0x10		/* thread bound to FPU-full CPU set */
146	unsigned long mflags;
147	unsigned long irix_trampoline;  /* Wheee... */
148	unsigned long irix_oldctx;
149	struct mips_abi *abi;
150};
151
152#define MF_ABI_MASK	(MF_32BIT_REGS | MF_32BIT_ADDR)
153#define MF_O32		(MF_32BIT_REGS | MF_32BIT_ADDR)
154#define MF_N32		MF_32BIT_ADDR
155#define MF_N64		0
156
157#ifdef CONFIG_MIPS_MT_FPAFF
158#define FPAFF_INIT 0, INIT_CPUMASK,
159#else
160#define FPAFF_INIT
161#endif /* CONFIG_MIPS_MT_FPAFF */
162
163#define INIT_THREAD  { \
164        /* \
165         * saved main processor registers \
166         */ \
167	0, 0, 0, 0, 0, 0, 0, 0, \
168	               0, 0, 0, \
169	/* \
170	 * saved cp0 stuff \
171	 */ \
172	0, \
173	/* \
174	 * saved fpu/fpu emulator stuff \
175	 */ \
176	INIT_FPU, \
177	/* \
178	 * fpu affinity state (null if not FPAFF) \
179	 */ \
180	FPAFF_INIT \
181	/* \
182	 * saved dsp/dsp emulator stuff \
183	 */ \
184	INIT_DSP, \
185	/* \
186	 * Other stuff associated with the process \
187	 */ \
188	0, 0, 0, 0, \
189	/* \
190	 * For now the default is to fix address errors \
191	 */ \
192	MF_FIXADE, 0, 0 \
193}
194
195struct task_struct;
196
197/* Free all resources held by a thread. */
198#define release_thread(thread) do { } while(0)
199
200/* Prepare to copy thread state - unlazy all lazy status */
201#define prepare_to_copy(tsk)	do { } while (0)
202
203extern long kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
204
205extern unsigned long thread_saved_pc(struct task_struct *tsk);
206
207/*
208 * Do necessary setup to start up a newly executed thread.
209 */
210extern void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp);
211
212unsigned long get_wchan(struct task_struct *p);
213
214#define __KSTK_TOS(tsk) ((unsigned long)task_stack_page(tsk) + THREAD_SIZE - 32)
215#define task_pt_regs(tsk) ((struct pt_regs *)__KSTK_TOS(tsk) - 1)
216#define KSTK_EIP(tsk) (task_pt_regs(tsk)->cp0_epc)
217#define KSTK_ESP(tsk) (task_pt_regs(tsk)->regs[29])
218#define KSTK_STATUS(tsk) (task_pt_regs(tsk)->cp0_status)
219
220#define cpu_relax()	barrier()
221
222/*
223 * Return_address is a replacement for __builtin_return_address(count)
224 * which on certain architectures cannot reasonably be implemented in GCC
225 * (MIPS, Alpha) or is unuseable with -fomit-frame-pointer (i386).
226 * Note that __builtin_return_address(x>=1) is forbidden because GCC
227 * aborts compilation on some CPUs.  It's simply not possible to unwind
228 * some CPU's stackframes.
229 *
230 * __builtin_return_address works only for non-leaf functions.  We avoid the
231 * overhead of a function call by forcing the compiler to save the return
232 * address register on the stack.
233 */
234#define return_address() ({__asm__ __volatile__("":::"$31");__builtin_return_address(0);})
235
236#ifdef CONFIG_CPU_HAS_PREFETCH
237
238#define ARCH_HAS_PREFETCH
239
240extern inline void prefetch(const void *addr)
241{
242	__asm__ __volatile__(
243	"	.set	mips4		\n"
244	"	pref	%0, (%1)	\n"
245	"	.set	mips0		\n"
246	:
247	: "i" (Pref_Load), "r" (addr));
248}
249
250#endif
251
252#endif /* _ASM_PROCESSOR_H */
253