1#ifndef __ASM_MACH_APIC_H 2#define __ASM_MACH_APIC_H 3 4extern u8 bios_cpu_apicid[]; 5 6#define xapic_phys_to_log_apicid(cpu) (bios_cpu_apicid[cpu]) 7#define esr_disable (1) 8 9static inline int apic_id_registered(void) 10{ 11 return (1); 12} 13 14static inline cpumask_t target_cpus(void) 15{ 16#if defined CONFIG_ES7000_CLUSTERED_APIC 17 return CPU_MASK_ALL; 18#else 19 return cpumask_of_cpu(smp_processor_id()); 20#endif 21} 22#define TARGET_CPUS (target_cpus()) 23 24#if defined CONFIG_ES7000_CLUSTERED_APIC 25#define APIC_DFR_VALUE (APIC_DFR_CLUSTER) 26#define INT_DELIVERY_MODE (dest_LowestPrio) 27#define INT_DEST_MODE (1) /* logical delivery broadcast to all procs */ 28#define NO_BALANCE_IRQ (1) 29#undef WAKE_SECONDARY_VIA_INIT 30#define WAKE_SECONDARY_VIA_MIP 31#else 32#define APIC_DFR_VALUE (APIC_DFR_FLAT) 33#define INT_DELIVERY_MODE (dest_Fixed) 34#define INT_DEST_MODE (0) /* phys delivery to target procs */ 35#define NO_BALANCE_IRQ (0) 36#undef APIC_DEST_LOGICAL 37#define APIC_DEST_LOGICAL 0x0 38#define WAKE_SECONDARY_VIA_INIT 39#endif 40 41static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid) 42{ 43 return 0; 44} 45static inline unsigned long check_apicid_present(int bit) 46{ 47 return physid_isset(bit, phys_cpu_present_map); 48} 49 50#define apicid_cluster(apicid) (apicid & 0xF0) 51 52static inline unsigned long calculate_ldr(int cpu) 53{ 54 unsigned long id; 55 id = xapic_phys_to_log_apicid(cpu); 56 return (SET_APIC_LOGICAL_ID(id)); 57} 58 59/* 60 * Set up the logical destination ID. 61 * 62 * Intel recommends to set DFR, LdR and TPR before enabling 63 * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel 64 * document number 292116). So here it goes... 65 */ 66static inline void init_apic_ldr(void) 67{ 68 unsigned long val; 69 int cpu = smp_processor_id(); 70 71 apic_write_around(APIC_DFR, APIC_DFR_VALUE); 72 val = calculate_ldr(cpu); 73 apic_write_around(APIC_LDR, val); 74} 75 76#ifndef CONFIG_X86_GENERICARCH 77extern void enable_apic_mode(void); 78#endif 79 80extern int apic_version [MAX_APICS]; 81static inline void setup_apic_routing(void) 82{ 83 int apic = bios_cpu_apicid[smp_processor_id()]; 84 printk("Enabling APIC mode: %s. Using %d I/O APICs, target cpus %lx\n", 85 (apic_version[apic] == 0x14) ? 86 "Physical Cluster" : "Logical Cluster", nr_ioapics, cpus_addr(TARGET_CPUS)[0]); 87} 88 89static inline int multi_timer_check(int apic, int irq) 90{ 91 return 0; 92} 93 94static inline int apicid_to_node(int logical_apicid) 95{ 96 return 0; 97} 98 99 100static inline int cpu_present_to_apicid(int mps_cpu) 101{ 102 if (!mps_cpu) 103 return boot_cpu_physical_apicid; 104 else if (mps_cpu < NR_CPUS) 105 return (int) bios_cpu_apicid[mps_cpu]; 106 else 107 return BAD_APICID; 108} 109 110static inline physid_mask_t apicid_to_cpu_present(int phys_apicid) 111{ 112 static int id = 0; 113 physid_mask_t mask; 114 mask = physid_mask_of_physid(id); 115 ++id; 116 return mask; 117} 118 119extern u8 cpu_2_logical_apicid[]; 120/* Mapping from cpu number to logical apicid */ 121static inline int cpu_to_logical_apicid(int cpu) 122{ 123#ifdef CONFIG_SMP 124 if (cpu >= NR_CPUS) 125 return BAD_APICID; 126 return (int)cpu_2_logical_apicid[cpu]; 127#else 128 return logical_smp_processor_id(); 129#endif 130} 131 132static inline int mpc_apic_id(struct mpc_config_processor *m, struct mpc_config_translation *unused) 133{ 134 printk("Processor #%d %ld:%ld APIC version %d\n", 135 m->mpc_apicid, 136 (m->mpc_cpufeature & CPU_FAMILY_MASK) >> 8, 137 (m->mpc_cpufeature & CPU_MODEL_MASK) >> 4, 138 m->mpc_apicver); 139 return (m->mpc_apicid); 140} 141 142static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map) 143{ 144 /* For clustered we don't have a good way to do this yet - hack */ 145 return physids_promote(0xff); 146} 147 148 149static inline void setup_portio_remap(void) 150{ 151} 152 153extern unsigned int boot_cpu_physical_apicid; 154static inline int check_phys_apicid_present(int cpu_physical_apicid) 155{ 156 boot_cpu_physical_apicid = GET_APIC_ID(apic_read(APIC_ID)); 157 return (1); 158} 159 160static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask) 161{ 162 int num_bits_set; 163 int cpus_found = 0; 164 int cpu; 165 int apicid; 166 167 num_bits_set = cpus_weight(cpumask); 168 /* Return id to all */ 169 if (num_bits_set == NR_CPUS) 170#if defined CONFIG_ES7000_CLUSTERED_APIC 171 return 0xFF; 172#else 173 return cpu_to_logical_apicid(0); 174#endif 175 /* 176 * The cpus in the mask must all be on the apic cluster. If are not 177 * on the same apicid cluster return default value of TARGET_CPUS. 178 */ 179 cpu = first_cpu(cpumask); 180 apicid = cpu_to_logical_apicid(cpu); 181 while (cpus_found < num_bits_set) { 182 if (cpu_isset(cpu, cpumask)) { 183 int new_apicid = cpu_to_logical_apicid(cpu); 184 if (apicid_cluster(apicid) != 185 apicid_cluster(new_apicid)){ 186 printk ("%s: Not a valid mask!\n",__FUNCTION__); 187#if defined CONFIG_ES7000_CLUSTERED_APIC 188 return 0xFF; 189#else 190 return cpu_to_logical_apicid(0); 191#endif 192 } 193 apicid = new_apicid; 194 cpus_found++; 195 } 196 cpu++; 197 } 198 return apicid; 199} 200 201static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb) 202{ 203 return cpuid_apic >> index_msb; 204} 205 206#endif /* __ASM_MACH_APIC_H */ 207