1#ifndef __ASM_IO_APIC_H
2#define __ASM_IO_APIC_H
3
4#include <asm/types.h>
5#include <asm/mpspec.h>
6#include <asm/apicdef.h>
7
8/*
9 * Intel IO-APIC support for SMP and UP systems.
10 *
11 * Copyright (C) 1997, 1998, 1999, 2000 Ingo Molnar
12 */
13
14#ifdef CONFIG_X86_IO_APIC
15
16/*
17 * The structure of the IO-APIC:
18 */
19union IO_APIC_reg_00 {
20	u32	raw;
21	struct {
22		u32	__reserved_2	: 14,
23			LTS		:  1,
24			delivery_type	:  1,
25			__reserved_1	:  8,
26			ID		:  8;
27	} __attribute__ ((packed)) bits;
28};
29
30union IO_APIC_reg_01 {
31	u32	raw;
32	struct {
33		u32	version		:  8,
34			__reserved_2	:  7,
35			PRQ		:  1,
36			entries		:  8,
37			__reserved_1	:  8;
38	} __attribute__ ((packed)) bits;
39};
40
41union IO_APIC_reg_02 {
42	u32	raw;
43	struct {
44		u32	__reserved_2	: 24,
45			arbitration	:  4,
46			__reserved_1	:  4;
47	} __attribute__ ((packed)) bits;
48};
49
50union IO_APIC_reg_03 {
51	u32	raw;
52	struct {
53		u32	boot_DT		:  1,
54			__reserved_1	: 31;
55	} __attribute__ ((packed)) bits;
56};
57
58/*
59 * # of IO-APICs and # of IRQ routing registers
60 */
61extern int nr_ioapics;
62extern int nr_ioapic_registers[MAX_IO_APICS];
63
64enum ioapic_irq_destination_types {
65	dest_Fixed = 0,
66	dest_LowestPrio = 1,
67	dest_SMI = 2,
68	dest__reserved_1 = 3,
69	dest_NMI = 4,
70	dest_INIT = 5,
71	dest__reserved_2 = 6,
72	dest_ExtINT = 7
73};
74
75struct IO_APIC_route_entry {
76	__u32	vector		:  8,
77		delivery_mode	:  3,	/* 000: FIXED
78					 * 001: lowest prio
79					 * 111: ExtINT
80					 */
81		dest_mode	:  1,	/* 0: physical, 1: logical */
82		delivery_status	:  1,
83		polarity	:  1,
84		irr		:  1,
85		trigger		:  1,	/* 0: edge, 1: level */
86		mask		:  1,	/* 0: enabled, 1: disabled */
87		__reserved_2	: 15;
88
89	union {		struct { __u32
90					__reserved_1	: 24,
91					physical_dest	:  4,
92					__reserved_2	:  4;
93			} physical;
94
95			struct { __u32
96					__reserved_1	: 24,
97					logical_dest	:  8;
98			} logical;
99	} dest;
100
101} __attribute__ ((packed));
102
103/*
104 * MP-BIOS irq configuration table structures:
105 */
106
107/* I/O APIC entries */
108extern struct mpc_config_ioapic mp_ioapics[MAX_IO_APICS];
109
110/* # of MP IRQ source entries */
111extern int mp_irq_entries;
112
113/* MP IRQ source entries */
114extern struct mpc_config_intsrc mp_irqs[MAX_IRQ_SOURCES];
115
116/* non-0 if default (table-less) MP configuration */
117extern int mpc_default_type;
118
119/* Older SiS APIC requires we rewrite the index register */
120extern int sis_apic_bug;
121
122/* 1 if "noapic" boot option passed */
123extern int skip_ioapic_setup;
124
125static inline void disable_ioapic_setup(void)
126{
127	skip_ioapic_setup = 1;
128}
129
130static inline int ioapic_setup_disabled(void)
131{
132	return skip_ioapic_setup;
133}
134
135/*
136 * If we use the IO-APIC for IRQ routing, disable automatic
137 * assignment of PCI IRQ's.
138 */
139#define io_apic_assign_pci_irqs (mp_irq_entries && !skip_ioapic_setup && io_apic_irqs)
140
141#ifdef CONFIG_ACPI
142extern int io_apic_get_unique_id (int ioapic, int apic_id);
143extern int io_apic_get_version (int ioapic);
144extern int io_apic_get_redir_entries (int ioapic);
145extern int io_apic_set_pci_routing (int ioapic, int pin, int irq, int edge_level, int active_high_low);
146extern int timer_uses_ioapic_pin_0;
147#endif /* CONFIG_ACPI */
148
149extern int (*ioapic_renumber_irq)(int ioapic, int irq);
150
151#else  /* !CONFIG_X86_IO_APIC */
152#define io_apic_assign_pci_irqs 0
153static inline void disable_ioapic_setup(void) { }
154#endif
155
156#endif
157