1/* 2 * AVR32 System Registers 3 * 4 * Copyright (C) 2004-2006 Atmel Corporation 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 */ 10#ifndef __ASM_AVR32_SYSREG_H 11#define __ASM_AVR32_SYSREG_H 12 13/* sysreg register offsets */ 14#define SYSREG_SR 0x0000 15#define SYSREG_EVBA 0x0004 16#define SYSREG_ACBA 0x0008 17#define SYSREG_CPUCR 0x000c 18#define SYSREG_ECR 0x0010 19#define SYSREG_RSR_SUP 0x0014 20#define SYSREG_RSR_INT0 0x0018 21#define SYSREG_RSR_INT1 0x001c 22#define SYSREG_RSR_INT2 0x0020 23#define SYSREG_RSR_INT3 0x0024 24#define SYSREG_RSR_EX 0x0028 25#define SYSREG_RSR_NMI 0x002c 26#define SYSREG_RSR_DBG 0x0030 27#define SYSREG_RAR_SUP 0x0034 28#define SYSREG_RAR_INT0 0x0038 29#define SYSREG_RAR_INT1 0x003c 30#define SYSREG_RAR_INT2 0x0040 31#define SYSREG_RAR_INT3 0x0044 32#define SYSREG_RAR_EX 0x0048 33#define SYSREG_RAR_NMI 0x004c 34#define SYSREG_RAR_DBG 0x0050 35#define SYSREG_JECR 0x0054 36#define SYSREG_JOSP 0x0058 37#define SYSREG_JAVA_LV0 0x005c 38#define SYSREG_JAVA_LV1 0x0060 39#define SYSREG_JAVA_LV2 0x0064 40#define SYSREG_JAVA_LV3 0x0068 41#define SYSREG_JAVA_LV4 0x006c 42#define SYSREG_JAVA_LV5 0x0070 43#define SYSREG_JAVA_LV6 0x0074 44#define SYSREG_JAVA_LV7 0x0078 45#define SYSREG_JTBA 0x007c 46#define SYSREG_JBCR 0x0080 47#define SYSREG_CONFIG0 0x0100 48#define SYSREG_CONFIG1 0x0104 49#define SYSREG_COUNT 0x0108 50#define SYSREG_COMPARE 0x010c 51#define SYSREG_TLBEHI 0x0110 52#define SYSREG_TLBELO 0x0114 53#define SYSREG_PTBR 0x0118 54#define SYSREG_TLBEAR 0x011c 55#define SYSREG_MMUCR 0x0120 56#define SYSREG_TLBARLO 0x0124 57#define SYSREG_TLBARHI 0x0128 58#define SYSREG_PCCNT 0x012c 59#define SYSREG_PCNT0 0x0130 60#define SYSREG_PCNT1 0x0134 61#define SYSREG_PCCR 0x0138 62#define SYSREG_BEAR 0x013c 63#define SYSREG_SABAL 0x0300 64#define SYSREG_SABAH 0x0304 65#define SYSREG_SABD 0x0308 66 67/* Bitfields in SR */ 68#define SYSREG_SR_C_OFFSET 0 69#define SYSREG_SR_C_SIZE 1 70#define SYSREG_Z_OFFSET 1 71#define SYSREG_Z_SIZE 1 72#define SYSREG_SR_N_OFFSET 2 73#define SYSREG_SR_N_SIZE 1 74#define SYSREG_SR_V_OFFSET 3 75#define SYSREG_SR_V_SIZE 1 76#define SYSREG_Q_OFFSET 4 77#define SYSREG_Q_SIZE 1 78#define SYSREG_L_OFFSET 5 79#define SYSREG_L_SIZE 1 80#define SYSREG_T_OFFSET 14 81#define SYSREG_T_SIZE 1 82#define SYSREG_SR_R_OFFSET 15 83#define SYSREG_SR_R_SIZE 1 84#define SYSREG_GM_OFFSET 16 85#define SYSREG_GM_SIZE 1 86#define SYSREG_I0M_OFFSET 17 87#define SYSREG_I0M_SIZE 1 88#define SYSREG_I1M_OFFSET 18 89#define SYSREG_I1M_SIZE 1 90#define SYSREG_I2M_OFFSET 19 91#define SYSREG_I2M_SIZE 1 92#define SYSREG_I3M_OFFSET 20 93#define SYSREG_I3M_SIZE 1 94#define SYSREG_EM_OFFSET 21 95#define SYSREG_EM_SIZE 1 96#define SYSREG_M0_OFFSET 22 97#define SYSREG_M0_SIZE 1 98#define SYSREG_M1_OFFSET 23 99#define SYSREG_M1_SIZE 1 100#define SYSREG_M2_OFFSET 24 101#define SYSREG_M2_SIZE 1 102#define SYSREG_SR_D_OFFSET 26 103#define SYSREG_SR_D_SIZE 1 104#define SYSREG_DM_OFFSET 27 105#define SYSREG_DM_SIZE 1 106#define SYSREG_SR_J_OFFSET 28 107#define SYSREG_SR_J_SIZE 1 108#define SYSREG_H_OFFSET 29 109#define SYSREG_H_SIZE 1 110 111/* Bitfields in CPUCR */ 112#define SYSREG_BI_OFFSET 0 113#define SYSREG_BI_SIZE 1 114#define SYSREG_BE_OFFSET 1 115#define SYSREG_BE_SIZE 1 116#define SYSREG_FE_OFFSET 2 117#define SYSREG_FE_SIZE 1 118#define SYSREG_RE_OFFSET 3 119#define SYSREG_RE_SIZE 1 120#define SYSREG_IBE_OFFSET 4 121#define SYSREG_IBE_SIZE 1 122#define SYSREG_IEE_OFFSET 5 123#define SYSREG_IEE_SIZE 1 124 125/* Bitfields in CONFIG0 */ 126#define SYSREG_CONFIG0_R_OFFSET 0 127#define SYSREG_CONFIG0_R_SIZE 1 128#define SYSREG_CONFIG0_D_OFFSET 1 129#define SYSREG_CONFIG0_D_SIZE 1 130#define SYSREG_CONFIG0_S_OFFSET 2 131#define SYSREG_CONFIG0_S_SIZE 1 132#define SYSREG_CONFIG0_O_OFFSET 3 133#define SYSREG_CONFIG0_O_SIZE 1 134#define SYSREG_CONFIG0_P_OFFSET 4 135#define SYSREG_CONFIG0_P_SIZE 1 136#define SYSREG_CONFIG0_J_OFFSET 5 137#define SYSREG_CONFIG0_J_SIZE 1 138#define SYSREG_CONFIG0_F_OFFSET 6 139#define SYSREG_CONFIG0_F_SIZE 1 140#define SYSREG_MMUT_OFFSET 7 141#define SYSREG_MMUT_SIZE 3 142#define SYSREG_AR_OFFSET 10 143#define SYSREG_AR_SIZE 3 144#define SYSREG_AT_OFFSET 13 145#define SYSREG_AT_SIZE 3 146#define SYSREG_PROCESSORREVISION_OFFSET 16 147#define SYSREG_PROCESSORREVISION_SIZE 8 148#define SYSREG_PROCESSORID_OFFSET 24 149#define SYSREG_PROCESSORID_SIZE 8 150 151/* Bitfields in CONFIG1 */ 152#define SYSREG_DASS_OFFSET 0 153#define SYSREG_DASS_SIZE 3 154#define SYSREG_DLSZ_OFFSET 3 155#define SYSREG_DLSZ_SIZE 3 156#define SYSREG_DSET_OFFSET 6 157#define SYSREG_DSET_SIZE 4 158#define SYSREG_IASS_OFFSET 10 159#define SYSREG_IASS_SIZE 3 160#define SYSREG_ILSZ_OFFSET 13 161#define SYSREG_ILSZ_SIZE 3 162#define SYSREG_ISET_OFFSET 16 163#define SYSREG_ISET_SIZE 4 164#define SYSREG_DMMUSZ_OFFSET 20 165#define SYSREG_DMMUSZ_SIZE 6 166#define SYSREG_IMMUSZ_OFFSET 26 167#define SYSREG_IMMUSZ_SIZE 6 168 169/* Bitfields in TLBEHI */ 170#define SYSREG_ASID_OFFSET 0 171#define SYSREG_ASID_SIZE 8 172#define SYSREG_TLBEHI_I_OFFSET 8 173#define SYSREG_TLBEHI_I_SIZE 1 174#define SYSREG_TLBEHI_V_OFFSET 9 175#define SYSREG_TLBEHI_V_SIZE 1 176#define SYSREG_VPN_OFFSET 10 177#define SYSREG_VPN_SIZE 22 178 179/* Bitfields in TLBELO */ 180#define SYSREG_W_OFFSET 0 181#define SYSREG_W_SIZE 1 182#define SYSREG_TLBELO_D_OFFSET 1 183#define SYSREG_TLBELO_D_SIZE 1 184#define SYSREG_SZ_OFFSET 2 185#define SYSREG_SZ_SIZE 2 186#define SYSREG_AP_OFFSET 4 187#define SYSREG_AP_SIZE 3 188#define SYSREG_B_OFFSET 7 189#define SYSREG_B_SIZE 1 190#define SYSREG_G_OFFSET 8 191#define SYSREG_G_SIZE 1 192#define SYSREG_TLBELO_C_OFFSET 9 193#define SYSREG_TLBELO_C_SIZE 1 194#define SYSREG_PFN_OFFSET 10 195#define SYSREG_PFN_SIZE 22 196 197/* Bitfields in MMUCR */ 198#define SYSREG_E_OFFSET 0 199#define SYSREG_E_SIZE 1 200#define SYSREG_M_OFFSET 1 201#define SYSREG_M_SIZE 1 202#define SYSREG_MMUCR_I_OFFSET 2 203#define SYSREG_MMUCR_I_SIZE 1 204#define SYSREG_MMUCR_N_OFFSET 3 205#define SYSREG_MMUCR_N_SIZE 1 206#define SYSREG_MMUCR_S_OFFSET 4 207#define SYSREG_MMUCR_S_SIZE 1 208#define SYSREG_DLA_OFFSET 8 209#define SYSREG_DLA_SIZE 6 210#define SYSREG_DRP_OFFSET 14 211#define SYSREG_DRP_SIZE 6 212#define SYSREG_ILA_OFFSET 20 213#define SYSREG_ILA_SIZE 6 214#define SYSREG_IRP_OFFSET 26 215#define SYSREG_IRP_SIZE 6 216 217/* Bitfields in PCCR */ 218#define SYSREG_PCCR_R_OFFSET 1 219#define SYSREG_PCCR_R_SIZE 1 220#define SYSREG_PCCR_C_OFFSET 2 221#define SYSREG_PCCR_C_SIZE 1 222#define SYSREG_PCCR_S_OFFSET 3 223#define SYSREG_PCCR_S_SIZE 1 224#define SYSREG_IEC_OFFSET 4 225#define SYSREG_IEC_SIZE 1 226#define SYSREG_IE0_OFFSET 5 227#define SYSREG_IE0_SIZE 1 228#define SYSREG_IE1_OFFSET 6 229#define SYSREG_IE1_SIZE 1 230#define SYSREG_FC_OFFSET 8 231#define SYSREG_FC_SIZE 1 232#define SYSREG_F0_OFFSET 9 233#define SYSREG_F0_SIZE 1 234#define SYSREG_F1_OFFSET 10 235#define SYSREG_F1_SIZE 1 236#define SYSREG_CONF0_OFFSET 12 237#define SYSREG_CONF0_SIZE 6 238#define SYSREG_CONF1_OFFSET 18 239#define SYSREG_CONF1_SIZE 6 240 241/* Constants for ECR */ 242#define ECR_UNRECOVERABLE 0 243#define ECR_TLB_MULTIPLE 1 244#define ECR_BUS_ERROR_WRITE 2 245#define ECR_BUS_ERROR_READ 3 246#define ECR_NMI 4 247#define ECR_ADDR_ALIGN_X 5 248#define ECR_PROTECTION_X 6 249#define ECR_DEBUG 7 250#define ECR_ILLEGAL_OPCODE 8 251#define ECR_UNIMPL_INSTRUCTION 9 252#define ECR_PRIVILEGE_VIOLATION 10 253#define ECR_FPE 11 254#define ECR_COPROC_ABSENT 12 255#define ECR_ADDR_ALIGN_R 13 256#define ECR_ADDR_ALIGN_W 14 257#define ECR_PROTECTION_R 15 258#define ECR_PROTECTION_W 16 259#define ECR_DTLB_MODIFIED 17 260#define ECR_TLB_MISS_X 20 261#define ECR_TLB_MISS_R 24 262#define ECR_TLB_MISS_W 28 263 264/* Bit manipulation macros */ 265#define SYSREG_BIT(name) \ 266 (1 << SYSREG_##name##_OFFSET) 267#define SYSREG_BF(name,value) \ 268 (((value) & ((1 << SYSREG_##name##_SIZE) - 1)) \ 269 << SYSREG_##name##_OFFSET) 270#define SYSREG_BFEXT(name,value)\ 271 (((value) >> SYSREG_##name##_OFFSET) \ 272 & ((1 << SYSREG_##name##_SIZE) - 1)) 273#define SYSREG_BFINS(name,value,old) \ 274 (((old) & ~(((1 << SYSREG_##name##_SIZE) - 1) \ 275 << SYSREG_##name##_OFFSET)) \ 276 | SYSREG_BF(name,value)) 277 278/* Register access macros */ 279#ifdef __CHECKER__ 280extern unsigned long __builtin_mfsr(unsigned long reg); 281extern void __builtin_mtsr(unsigned long reg, unsigned long value); 282#endif 283 284#define sysreg_read(reg) __builtin_mfsr(SYSREG_##reg) 285#define sysreg_write(reg, value) __builtin_mtsr(SYSREG_##reg, value) 286 287#endif /* __ASM_AVR32_SYSREG_H */ 288