1/* 2 * linux/include/asm-arm/arch-imxads/irqs.h 3 * 4 * Copyright (C) 1999 ARM Limited 5 * Copyright (C) 2000 Deep Blue Solutions Ltd. 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 20 */ 21 22#ifndef __ARM_IRQS_H__ 23#define __ARM_IRQS_H__ 24 25/* Use the imx definitions */ 26#include <asm/hardware.h> 27 28/* 29 * IMX Interrupt numbers 30 * 31 */ 32#define INT_SOFTINT 0 33#define CSI_INT 6 34#define DSPA_MAC_INT 7 35#define DSPA_INT 8 36#define COMP_INT 9 37#define MSHC_XINT 10 38#define GPIO_INT_PORTA 11 39#define GPIO_INT_PORTB 12 40#define GPIO_INT_PORTC 13 41#define LCDC_INT 14 42#define SIM_INT 15 43#define SIM_DATA_INT 16 44#define RTC_INT 17 45#define RTC_SAMINT 18 46#define UART2_MINT_PFERR 19 47#define UART2_MINT_RTS 20 48#define UART2_MINT_DTR 21 49#define UART2_MINT_UARTC 22 50#define UART2_MINT_TX 23 51#define UART2_MINT_RX 24 52#define UART1_MINT_PFERR 25 53#define UART1_MINT_RTS 26 54#define UART1_MINT_DTR 27 55#define UART1_MINT_UARTC 28 56#define UART1_MINT_TX 29 57#define UART1_MINT_RX 30 58#define VOICE_DAC_INT 31 59#define VOICE_ADC_INT 32 60#define PEN_DATA_INT 33 61#define PWM_INT 34 62#define SDHC_INT 35 63#define I2C_INT 39 64#define CSPI_INT 41 65#define SSI_TX_INT 42 66#define SSI_TX_ERR_INT 43 67#define SSI_RX_INT 44 68#define SSI_RX_ERR_INT 45 69#define TOUCH_INT 46 70#define USBD_INT0 47 71#define USBD_INT1 48 72#define USBD_INT2 49 73#define USBD_INT3 50 74#define USBD_INT4 51 75#define USBD_INT5 52 76#define USBD_INT6 53 77#define BTSYS_INT 55 78#define BTTIM_INT 56 79#define BTWUI_INT 57 80#define TIM2_INT 58 81#define TIM1_INT 59 82#define DMA_ERR 60 83#define DMA_INT 61 84#define GPIO_INT_PORTD 62 85 86#define IMX_IRQS (64) 87 88/* note: the IMX has four gpio ports (A-D), but only 89 * the following pins are connected to the outside 90 * world: 91 * 92 * PORT A: bits 0-31 93 * PORT B: bits 8-31 94 * PORT C: bits 3-17 95 * PORT D: bits 6-31 96 * 97 * We map these interrupts straight on. As a result we have 98 * several holes in the interrupt mapping. We do this for two 99 * reasons: 100 * - mapping the interrupts without holes would get 101 * far more complicated 102 * - Motorola could well decide to bring some processor 103 * with more pins connected 104 */ 105 106#define IRQ_GPIOA(x) (IMX_IRQS + x) 107#define IRQ_GPIOB(x) (IRQ_GPIOA(32) + x) 108#define IRQ_GPIOC(x) (IRQ_GPIOB(32) + x) 109#define IRQ_GPIOD(x) (IRQ_GPIOC(32) + x) 110 111/* decode irq number to use with IMR(x), ISR(x) and friends */ 112#define IRQ_TO_REG(irq) ((irq - IMX_IRQS) >> 5) 113 114#define NR_IRQS (IRQ_GPIOD(32) + 1) 115#define IRQ_GPIO(x) 116#endif 117