1/* 2 * linux/drivers/serial/pxa.c 3 * 4 * Based on drivers/serial/8250.c by Russell King. 5 * 6 * Author: Nicolas Pitre 7 * Created: Feb 20, 2003 8 * Copyright: (C) 2003 Monta Vista Software, Inc. 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License as published by 12 * the Free Software Foundation; either version 2 of the License, or 13 * (at your option) any later version. 14 * 15 * Note 1: This driver is made separate from the already too overloaded 16 * 8250.c because it needs some kirks of its own and that'll make it 17 * easier to add DMA support. 18 * 19 * Note 2: I'm too sick of device allocation policies for serial ports. 20 * If someone else wants to request an "official" allocation of major/minor 21 * for this driver please be my guest. And don't forget that new hardware 22 * to come from Intel might have more than 3 or 4 of those UARTs. Let's 23 * hope for a better port registration and dynamic device allocation scheme 24 * with the serial core maintainer satisfaction to appear soon. 25 */ 26 27 28#if defined(CONFIG_SERIAL_PXA_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) 29#define SUPPORT_SYSRQ 30#endif 31 32#include <linux/module.h> 33#include <linux/ioport.h> 34#include <linux/init.h> 35#include <linux/console.h> 36#include <linux/sysrq.h> 37#include <linux/serial_reg.h> 38#include <linux/circ_buf.h> 39#include <linux/delay.h> 40#include <linux/interrupt.h> 41#include <linux/platform_device.h> 42#include <linux/tty.h> 43#include <linux/tty_flip.h> 44#include <linux/serial_core.h> 45 46#include <asm/io.h> 47#include <asm/hardware.h> 48#include <asm/irq.h> 49#include <asm/arch/pxa-regs.h> 50 51 52struct uart_pxa_port { 53 struct uart_port port; 54 unsigned char ier; 55 unsigned char lcr; 56 unsigned char mcr; 57 unsigned int lsr_break_flag; 58 unsigned int cken; 59 char *name; 60}; 61 62static inline unsigned int serial_in(struct uart_pxa_port *up, int offset) 63{ 64 offset <<= 2; 65 return readl(up->port.membase + offset); 66} 67 68static inline void serial_out(struct uart_pxa_port *up, int offset, int value) 69{ 70 offset <<= 2; 71 writel(value, up->port.membase + offset); 72} 73 74static void serial_pxa_enable_ms(struct uart_port *port) 75{ 76 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 77 78 up->ier |= UART_IER_MSI; 79 serial_out(up, UART_IER, up->ier); 80} 81 82static void serial_pxa_stop_tx(struct uart_port *port) 83{ 84 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 85 86 if (up->ier & UART_IER_THRI) { 87 up->ier &= ~UART_IER_THRI; 88 serial_out(up, UART_IER, up->ier); 89 } 90} 91 92static void serial_pxa_stop_rx(struct uart_port *port) 93{ 94 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 95 96 up->ier &= ~UART_IER_RLSI; 97 up->port.read_status_mask &= ~UART_LSR_DR; 98 serial_out(up, UART_IER, up->ier); 99} 100 101static inline void receive_chars(struct uart_pxa_port *up, int *status) 102{ 103 struct tty_struct *tty = up->port.info->tty; 104 unsigned int ch, flag; 105 int max_count = 256; 106 107 do { 108 ch = serial_in(up, UART_RX); 109 flag = TTY_NORMAL; 110 up->port.icount.rx++; 111 112 if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE | 113 UART_LSR_FE | UART_LSR_OE))) { 114 /* 115 * For statistics only 116 */ 117 if (*status & UART_LSR_BI) { 118 *status &= ~(UART_LSR_FE | UART_LSR_PE); 119 up->port.icount.brk++; 120 /* 121 * We do the SysRQ and SAK checking 122 * here because otherwise the break 123 * may get masked by ignore_status_mask 124 * or read_status_mask. 125 */ 126 if (uart_handle_break(&up->port)) 127 goto ignore_char; 128 } else if (*status & UART_LSR_PE) 129 up->port.icount.parity++; 130 else if (*status & UART_LSR_FE) 131 up->port.icount.frame++; 132 if (*status & UART_LSR_OE) 133 up->port.icount.overrun++; 134 135 /* 136 * Mask off conditions which should be ignored. 137 */ 138 *status &= up->port.read_status_mask; 139 140#ifdef CONFIG_SERIAL_PXA_CONSOLE 141 if (up->port.line == up->port.cons->index) { 142 /* Recover the break flag from console xmit */ 143 *status |= up->lsr_break_flag; 144 up->lsr_break_flag = 0; 145 } 146#endif 147 if (*status & UART_LSR_BI) { 148 flag = TTY_BREAK; 149 } else if (*status & UART_LSR_PE) 150 flag = TTY_PARITY; 151 else if (*status & UART_LSR_FE) 152 flag = TTY_FRAME; 153 } 154 155 if (uart_handle_sysrq_char(&up->port, ch)) 156 goto ignore_char; 157 158 uart_insert_char(&up->port, *status, UART_LSR_OE, ch, flag); 159 160 ignore_char: 161 *status = serial_in(up, UART_LSR); 162 } while ((*status & UART_LSR_DR) && (max_count-- > 0)); 163 tty_flip_buffer_push(tty); 164} 165 166static void transmit_chars(struct uart_pxa_port *up) 167{ 168 struct circ_buf *xmit = &up->port.info->xmit; 169 int count; 170 171 if (up->port.x_char) { 172 serial_out(up, UART_TX, up->port.x_char); 173 up->port.icount.tx++; 174 up->port.x_char = 0; 175 return; 176 } 177 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) { 178 serial_pxa_stop_tx(&up->port); 179 return; 180 } 181 182 count = up->port.fifosize / 2; 183 do { 184 serial_out(up, UART_TX, xmit->buf[xmit->tail]); 185 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); 186 up->port.icount.tx++; 187 if (uart_circ_empty(xmit)) 188 break; 189 } while (--count > 0); 190 191 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 192 uart_write_wakeup(&up->port); 193 194 195 if (uart_circ_empty(xmit)) 196 serial_pxa_stop_tx(&up->port); 197} 198 199static void serial_pxa_start_tx(struct uart_port *port) 200{ 201 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 202 203 if (!(up->ier & UART_IER_THRI)) { 204 up->ier |= UART_IER_THRI; 205 serial_out(up, UART_IER, up->ier); 206 } 207} 208 209static inline void check_modem_status(struct uart_pxa_port *up) 210{ 211 int status; 212 213 status = serial_in(up, UART_MSR); 214 215 if ((status & UART_MSR_ANY_DELTA) == 0) 216 return; 217 218 if (status & UART_MSR_TERI) 219 up->port.icount.rng++; 220 if (status & UART_MSR_DDSR) 221 up->port.icount.dsr++; 222 if (status & UART_MSR_DDCD) 223 uart_handle_dcd_change(&up->port, status & UART_MSR_DCD); 224 if (status & UART_MSR_DCTS) 225 uart_handle_cts_change(&up->port, status & UART_MSR_CTS); 226 227 wake_up_interruptible(&up->port.info->delta_msr_wait); 228} 229 230/* 231 * This handles the interrupt from one port. 232 */ 233static inline irqreturn_t serial_pxa_irq(int irq, void *dev_id) 234{ 235 struct uart_pxa_port *up = dev_id; 236 unsigned int iir, lsr; 237 238 iir = serial_in(up, UART_IIR); 239 if (iir & UART_IIR_NO_INT) 240 return IRQ_NONE; 241 lsr = serial_in(up, UART_LSR); 242 if (lsr & UART_LSR_DR) 243 receive_chars(up, &lsr); 244 check_modem_status(up); 245 if (lsr & UART_LSR_THRE) 246 transmit_chars(up); 247 return IRQ_HANDLED; 248} 249 250static unsigned int serial_pxa_tx_empty(struct uart_port *port) 251{ 252 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 253 unsigned long flags; 254 unsigned int ret; 255 256 spin_lock_irqsave(&up->port.lock, flags); 257 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0; 258 spin_unlock_irqrestore(&up->port.lock, flags); 259 260 return ret; 261} 262 263static unsigned int serial_pxa_get_mctrl(struct uart_port *port) 264{ 265 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 266 unsigned char status; 267 unsigned int ret; 268 269 status = serial_in(up, UART_MSR); 270 271 ret = 0; 272 if (status & UART_MSR_DCD) 273 ret |= TIOCM_CAR; 274 if (status & UART_MSR_RI) 275 ret |= TIOCM_RNG; 276 if (status & UART_MSR_DSR) 277 ret |= TIOCM_DSR; 278 if (status & UART_MSR_CTS) 279 ret |= TIOCM_CTS; 280 return ret; 281} 282 283static void serial_pxa_set_mctrl(struct uart_port *port, unsigned int mctrl) 284{ 285 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 286 unsigned char mcr = 0; 287 288 if (mctrl & TIOCM_RTS) 289 mcr |= UART_MCR_RTS; 290 if (mctrl & TIOCM_DTR) 291 mcr |= UART_MCR_DTR; 292 if (mctrl & TIOCM_OUT1) 293 mcr |= UART_MCR_OUT1; 294 if (mctrl & TIOCM_OUT2) 295 mcr |= UART_MCR_OUT2; 296 if (mctrl & TIOCM_LOOP) 297 mcr |= UART_MCR_LOOP; 298 299 mcr |= up->mcr; 300 301 serial_out(up, UART_MCR, mcr); 302} 303 304static void serial_pxa_break_ctl(struct uart_port *port, int break_state) 305{ 306 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 307 unsigned long flags; 308 309 spin_lock_irqsave(&up->port.lock, flags); 310 if (break_state == -1) 311 up->lcr |= UART_LCR_SBC; 312 else 313 up->lcr &= ~UART_LCR_SBC; 314 serial_out(up, UART_LCR, up->lcr); 315 spin_unlock_irqrestore(&up->port.lock, flags); 316} 317 318 319static int serial_pxa_startup(struct uart_port *port) 320{ 321 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 322 unsigned long flags; 323 int retval; 324 325 if (port->line == 3) /* HWUART */ 326 up->mcr |= UART_MCR_AFE; 327 else 328 up->mcr = 0; 329 330 /* 331 * Allocate the IRQ 332 */ 333 retval = request_irq(up->port.irq, serial_pxa_irq, 0, up->name, up); 334 if (retval) 335 return retval; 336 337 /* 338 * Clear the FIFO buffers and disable them. 339 * (they will be reenabled in set_termios()) 340 */ 341 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO); 342 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | 343 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT); 344 serial_out(up, UART_FCR, 0); 345 346 /* 347 * Clear the interrupt registers. 348 */ 349 (void) serial_in(up, UART_LSR); 350 (void) serial_in(up, UART_RX); 351 (void) serial_in(up, UART_IIR); 352 (void) serial_in(up, UART_MSR); 353 354 /* 355 * Now, initialize the UART 356 */ 357 serial_out(up, UART_LCR, UART_LCR_WLEN8); 358 359 spin_lock_irqsave(&up->port.lock, flags); 360 up->port.mctrl |= TIOCM_OUT2; 361 serial_pxa_set_mctrl(&up->port, up->port.mctrl); 362 spin_unlock_irqrestore(&up->port.lock, flags); 363 364 /* 365 * Finally, enable interrupts. Note: Modem status interrupts 366 * are set via set_termios(), which will be occurring imminently 367 * anyway, so we don't enable them here. 368 */ 369 up->ier = UART_IER_RLSI | UART_IER_RDI | UART_IER_RTOIE | UART_IER_UUE; 370 serial_out(up, UART_IER, up->ier); 371 372 /* 373 * And clear the interrupt registers again for luck. 374 */ 375 (void) serial_in(up, UART_LSR); 376 (void) serial_in(up, UART_RX); 377 (void) serial_in(up, UART_IIR); 378 (void) serial_in(up, UART_MSR); 379 380 return 0; 381} 382 383static void serial_pxa_shutdown(struct uart_port *port) 384{ 385 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 386 unsigned long flags; 387 388 free_irq(up->port.irq, up); 389 390 /* 391 * Disable interrupts from this port 392 */ 393 up->ier = 0; 394 serial_out(up, UART_IER, 0); 395 396 spin_lock_irqsave(&up->port.lock, flags); 397 up->port.mctrl &= ~TIOCM_OUT2; 398 serial_pxa_set_mctrl(&up->port, up->port.mctrl); 399 spin_unlock_irqrestore(&up->port.lock, flags); 400 401 /* 402 * Disable break condition and FIFOs 403 */ 404 serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC); 405 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | 406 UART_FCR_CLEAR_RCVR | 407 UART_FCR_CLEAR_XMIT); 408 serial_out(up, UART_FCR, 0); 409} 410 411static void 412serial_pxa_set_termios(struct uart_port *port, struct ktermios *termios, 413 struct ktermios *old) 414{ 415 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 416 unsigned char cval, fcr = 0; 417 unsigned long flags; 418 unsigned int baud, quot; 419 420 switch (termios->c_cflag & CSIZE) { 421 case CS5: 422 cval = UART_LCR_WLEN5; 423 break; 424 case CS6: 425 cval = UART_LCR_WLEN6; 426 break; 427 case CS7: 428 cval = UART_LCR_WLEN7; 429 break; 430 default: 431 case CS8: 432 cval = UART_LCR_WLEN8; 433 break; 434 } 435 436 if (termios->c_cflag & CSTOPB) 437 cval |= UART_LCR_STOP; 438 if (termios->c_cflag & PARENB) 439 cval |= UART_LCR_PARITY; 440 if (!(termios->c_cflag & PARODD)) 441 cval |= UART_LCR_EPAR; 442 443 /* 444 * Ask the core to calculate the divisor for us. 445 */ 446 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); 447 quot = uart_get_divisor(port, baud); 448 449 if ((up->port.uartclk / quot) < (2400 * 16)) 450 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR1; 451 else if ((up->port.uartclk / quot) < (230400 * 16)) 452 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR8; 453 else 454 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR32; 455 456 /* 457 * Ok, we're now changing the port state. Do it with 458 * interrupts disabled. 459 */ 460 spin_lock_irqsave(&up->port.lock, flags); 461 462 /* 463 * Ensure the port will be enabled. 464 * This is required especially for serial console. 465 */ 466 up->ier |= IER_UUE; 467 468 /* 469 * Update the per-port timeout. 470 */ 471 uart_update_timeout(port, termios->c_cflag, baud); 472 473 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR; 474 if (termios->c_iflag & INPCK) 475 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE; 476 if (termios->c_iflag & (BRKINT | PARMRK)) 477 up->port.read_status_mask |= UART_LSR_BI; 478 479 /* 480 * Characters to ignore 481 */ 482 up->port.ignore_status_mask = 0; 483 if (termios->c_iflag & IGNPAR) 484 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE; 485 if (termios->c_iflag & IGNBRK) { 486 up->port.ignore_status_mask |= UART_LSR_BI; 487 /* 488 * If we're ignoring parity and break indicators, 489 * ignore overruns too (for real raw support). 490 */ 491 if (termios->c_iflag & IGNPAR) 492 up->port.ignore_status_mask |= UART_LSR_OE; 493 } 494 495 /* 496 * ignore all characters if CREAD is not set 497 */ 498 if ((termios->c_cflag & CREAD) == 0) 499 up->port.ignore_status_mask |= UART_LSR_DR; 500 501 /* 502 * CTS flow control flag and modem status interrupts 503 */ 504 up->ier &= ~UART_IER_MSI; 505 if (UART_ENABLE_MS(&up->port, termios->c_cflag)) 506 up->ier |= UART_IER_MSI; 507 508 serial_out(up, UART_IER, up->ier); 509 510 serial_out(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */ 511 serial_out(up, UART_DLL, quot & 0xff); /* LS of divisor */ 512 serial_out(up, UART_DLM, quot >> 8); /* MS of divisor */ 513 serial_out(up, UART_LCR, cval); /* reset DLAB */ 514 up->lcr = cval; /* Save LCR */ 515 serial_pxa_set_mctrl(&up->port, up->port.mctrl); 516 serial_out(up, UART_FCR, fcr); 517 spin_unlock_irqrestore(&up->port.lock, flags); 518} 519 520static void 521serial_pxa_pm(struct uart_port *port, unsigned int state, 522 unsigned int oldstate) 523{ 524 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 525 pxa_set_cken(up->cken, !state); 526 if (!state) 527 udelay(1); 528} 529 530static void serial_pxa_release_port(struct uart_port *port) 531{ 532} 533 534static int serial_pxa_request_port(struct uart_port *port) 535{ 536 return 0; 537} 538 539static void serial_pxa_config_port(struct uart_port *port, int flags) 540{ 541 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 542 up->port.type = PORT_PXA; 543} 544 545static int 546serial_pxa_verify_port(struct uart_port *port, struct serial_struct *ser) 547{ 548 /* we don't want the core code to modify any port params */ 549 return -EINVAL; 550} 551 552static const char * 553serial_pxa_type(struct uart_port *port) 554{ 555 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 556 return up->name; 557} 558 559#ifdef CONFIG_SERIAL_PXA_CONSOLE 560 561static struct uart_pxa_port serial_pxa_ports[]; 562static struct uart_driver serial_pxa_reg; 563 564#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE) 565 566/* 567 * Wait for transmitter & holding register to empty 568 */ 569static inline void wait_for_xmitr(struct uart_pxa_port *up) 570{ 571 unsigned int status, tmout = 10000; 572 573 /* Wait up to 10ms for the character(s) to be sent. */ 574 do { 575 status = serial_in(up, UART_LSR); 576 577 if (status & UART_LSR_BI) 578 up->lsr_break_flag = UART_LSR_BI; 579 580 if (--tmout == 0) 581 break; 582 udelay(1); 583 } while ((status & BOTH_EMPTY) != BOTH_EMPTY); 584 585 /* Wait up to 1s for flow control if necessary */ 586 if (up->port.flags & UPF_CONS_FLOW) { 587 tmout = 1000000; 588 while (--tmout && 589 ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0)) 590 udelay(1); 591 } 592} 593 594static void serial_pxa_console_putchar(struct uart_port *port, int ch) 595{ 596 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 597 598 wait_for_xmitr(up); 599 serial_out(up, UART_TX, ch); 600} 601 602/* 603 * Print a string to the serial port trying not to disturb 604 * any possible real use of the port... 605 * 606 * The console_lock must be held when we get here. 607 */ 608static void 609serial_pxa_console_write(struct console *co, const char *s, unsigned int count) 610{ 611 struct uart_pxa_port *up = &serial_pxa_ports[co->index]; 612 unsigned int ier; 613 614 /* 615 * First save the IER then disable the interrupts 616 */ 617 ier = serial_in(up, UART_IER); 618 serial_out(up, UART_IER, UART_IER_UUE); 619 620 uart_console_write(&up->port, s, count, serial_pxa_console_putchar); 621 622 /* 623 * Finally, wait for transmitter to become empty 624 * and restore the IER 625 */ 626 wait_for_xmitr(up); 627 serial_out(up, UART_IER, ier); 628} 629 630static int __init 631serial_pxa_console_setup(struct console *co, char *options) 632{ 633 struct uart_pxa_port *up; 634 int baud = 9600; 635 int bits = 8; 636 int parity = 'n'; 637 int flow = 'n'; 638 639 if (co->index == -1 || co->index >= serial_pxa_reg.nr) 640 co->index = 0; 641 up = &serial_pxa_ports[co->index]; 642 643 if (options) 644 uart_parse_options(options, &baud, &parity, &bits, &flow); 645 646 return uart_set_options(&up->port, co, baud, parity, bits, flow); 647} 648 649static struct console serial_pxa_console = { 650 .name = "ttyS", 651 .write = serial_pxa_console_write, 652 .device = uart_console_device, 653 .setup = serial_pxa_console_setup, 654 .flags = CON_PRINTBUFFER, 655 .index = -1, 656 .data = &serial_pxa_reg, 657}; 658 659static int __init 660serial_pxa_console_init(void) 661{ 662 register_console(&serial_pxa_console); 663 return 0; 664} 665 666console_initcall(serial_pxa_console_init); 667 668#define PXA_CONSOLE &serial_pxa_console 669#else 670#define PXA_CONSOLE NULL 671#endif 672 673struct uart_ops serial_pxa_pops = { 674 .tx_empty = serial_pxa_tx_empty, 675 .set_mctrl = serial_pxa_set_mctrl, 676 .get_mctrl = serial_pxa_get_mctrl, 677 .stop_tx = serial_pxa_stop_tx, 678 .start_tx = serial_pxa_start_tx, 679 .stop_rx = serial_pxa_stop_rx, 680 .enable_ms = serial_pxa_enable_ms, 681 .break_ctl = serial_pxa_break_ctl, 682 .startup = serial_pxa_startup, 683 .shutdown = serial_pxa_shutdown, 684 .set_termios = serial_pxa_set_termios, 685 .pm = serial_pxa_pm, 686 .type = serial_pxa_type, 687 .release_port = serial_pxa_release_port, 688 .request_port = serial_pxa_request_port, 689 .config_port = serial_pxa_config_port, 690 .verify_port = serial_pxa_verify_port, 691}; 692 693static struct uart_pxa_port serial_pxa_ports[] = { 694 { /* FFUART */ 695 .name = "FFUART", 696 .cken = CKEN_FFUART, 697 .port = { 698 .type = PORT_PXA, 699 .iotype = UPIO_MEM, 700 .membase = (void *)&FFUART, 701 .mapbase = __PREG(FFUART), 702 .irq = IRQ_FFUART, 703 .uartclk = 921600 * 16, 704 .fifosize = 64, 705 .ops = &serial_pxa_pops, 706 .line = 0, 707 }, 708 }, { /* BTUART */ 709 .name = "BTUART", 710 .cken = CKEN_BTUART, 711 .port = { 712 .type = PORT_PXA, 713 .iotype = UPIO_MEM, 714 .membase = (void *)&BTUART, 715 .mapbase = __PREG(BTUART), 716 .irq = IRQ_BTUART, 717 .uartclk = 921600 * 16, 718 .fifosize = 64, 719 .ops = &serial_pxa_pops, 720 .line = 1, 721 }, 722 }, { /* STUART */ 723 .name = "STUART", 724 .cken = CKEN_STUART, 725 .port = { 726 .type = PORT_PXA, 727 .iotype = UPIO_MEM, 728 .membase = (void *)&STUART, 729 .mapbase = __PREG(STUART), 730 .irq = IRQ_STUART, 731 .uartclk = 921600 * 16, 732 .fifosize = 64, 733 .ops = &serial_pxa_pops, 734 .line = 2, 735 }, 736 }, { /* HWUART */ 737 .name = "HWUART", 738 .cken = CKEN_HWUART, 739 .port = { 740 .type = PORT_PXA, 741 .iotype = UPIO_MEM, 742 .membase = (void *)&HWUART, 743 .mapbase = __PREG(HWUART), 744 .irq = IRQ_HWUART, 745 .uartclk = 921600 * 16, 746 .fifosize = 64, 747 .ops = &serial_pxa_pops, 748 .line = 3, 749 }, 750 } 751}; 752 753static struct uart_driver serial_pxa_reg = { 754 .owner = THIS_MODULE, 755 .driver_name = "PXA serial", 756 .dev_name = "ttyS", 757 .major = TTY_MAJOR, 758 .minor = 64, 759 .nr = ARRAY_SIZE(serial_pxa_ports), 760 .cons = PXA_CONSOLE, 761}; 762 763static int serial_pxa_suspend(struct platform_device *dev, pm_message_t state) 764{ 765 struct uart_pxa_port *sport = platform_get_drvdata(dev); 766 767 if (sport) 768 uart_suspend_port(&serial_pxa_reg, &sport->port); 769 770 return 0; 771} 772 773static int serial_pxa_resume(struct platform_device *dev) 774{ 775 struct uart_pxa_port *sport = platform_get_drvdata(dev); 776 777 if (sport) 778 uart_resume_port(&serial_pxa_reg, &sport->port); 779 780 return 0; 781} 782 783static int serial_pxa_probe(struct platform_device *dev) 784{ 785 serial_pxa_ports[dev->id].port.dev = &dev->dev; 786 uart_add_one_port(&serial_pxa_reg, &serial_pxa_ports[dev->id].port); 787 platform_set_drvdata(dev, &serial_pxa_ports[dev->id]); 788 return 0; 789} 790 791static int serial_pxa_remove(struct platform_device *dev) 792{ 793 struct uart_pxa_port *sport = platform_get_drvdata(dev); 794 795 platform_set_drvdata(dev, NULL); 796 797 if (sport) 798 uart_remove_one_port(&serial_pxa_reg, &sport->port); 799 800 return 0; 801} 802 803static struct platform_driver serial_pxa_driver = { 804 .probe = serial_pxa_probe, 805 .remove = serial_pxa_remove, 806 807 .suspend = serial_pxa_suspend, 808 .resume = serial_pxa_resume, 809 .driver = { 810 .name = "pxa2xx-uart", 811 }, 812}; 813 814int __init serial_pxa_init(void) 815{ 816 int ret; 817 818 ret = uart_register_driver(&serial_pxa_reg); 819 if (ret != 0) 820 return ret; 821 822 ret = platform_driver_register(&serial_pxa_driver); 823 if (ret != 0) 824 uart_unregister_driver(&serial_pxa_reg); 825 826 return ret; 827} 828 829void __exit serial_pxa_exit(void) 830{ 831 platform_driver_unregister(&serial_pxa_driver); 832 uart_unregister_driver(&serial_pxa_reg); 833} 834 835module_init(serial_pxa_init); 836module_exit(serial_pxa_exit); 837 838MODULE_LICENSE("GPL"); 839