1/* $Id: crisv10.c,v 1.1.1.1 2007/08/03 18:53:00 Exp $ 2 * 3 * Serial port driver for the ETRAX 100LX chip 4 * 5 * Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Axis Communications AB 6 * 7 * Many, many authors. Based once upon a time on serial.c for 16x50. 8 * 9 * $Log: crisv10.c,v $ 10 * Revision 1.1.1.1 2007/08/03 18:53:00 rnuti 11 * Importing Linux MIPS Kernel 2.6.22 12 * 13 * Revision 1.25 2004/09/29 10:33:49 starvik 14 * Resolved a dealock when printing debug from kernel. 15 * 16 * Revision 1.24 2004/08/27 23:25:59 johana 17 * rs_set_termios() must call change_speed() if c_iflag has changed or 18 * automatic XOFF handling will be enabled and transmitter will stop 19 * if 0x13 is received. 20 * 21 * Revision 1.23 2004/08/24 06:57:13 starvik 22 * More whitespace cleanup 23 * 24 * Revision 1.22 2004/08/24 06:12:20 starvik 25 * Whitespace cleanup 26 * 27 * Revision 1.20 2004/05/24 12:00:20 starvik 28 * Big merge of stuff from Linux 2.4 (e.g. manual mode for the serial port). 29 * 30 * Revision 1.19 2004/05/17 13:12:15 starvik 31 * Kernel console hook 32 * Big merge from Linux 2.4 still pending. 33 * 34 * Revision 1.18 2003/10/28 07:18:30 starvik 35 * Compiles with debug info 36 * 37 * Revision 1.17 2003/07/04 08:27:37 starvik 38 * Merge of Linux 2.5.74 39 * 40 * Revision 1.16 2003/06/13 10:05:19 johana 41 * Help the user to avoid trouble by: 42 * Forcing mixed mode for status/control lines if not all pins are used. 43 * 44 * Revision 1.15 2003/06/13 09:43:01 johana 45 * Merged in the following changes from os/linux/arch/cris/drivers/serial.c 46 * + some minor changes to reduce diff. 47 * 48 * Revision 1.49 2003/05/30 11:31:54 johana 49 * Merged in change-branch--serial9bit that adds CMSPAR support for sticky 50 * parity (mark/space) 51 * 52 * Revision 1.48 2003/05/30 11:03:57 johana 53 * Implemented rs_send_xchar() by disabling the DMA and writing manually. 54 * Added e100_disable_txdma_channel() and e100_enable_txdma_channel(). 55 * Fixed rs_throttle() and rs_unthrottle() to properly call rs_send_xchar 56 * instead of setting info->x_char and check the CRTSCTS flag before 57 * controlling the rts pin. 58 * 59 * Revision 1.14 2003/04/09 08:12:44 pkj 60 * Corrected typo changes made upstream. 61 * 62 * Revision 1.13 2003/04/09 05:20:47 starvik 63 * Merge of Linux 2.5.67 64 * 65 * Revision 1.11 2003/01/22 06:48:37 starvik 66 * Fixed warnings issued by GCC 3.2.1 67 * 68 * Revision 1.9 2002/12/13 09:07:47 starvik 69 * Alert user that RX_TIMEOUT_TICKS==0 doesn't work 70 * 71 * Revision 1.8 2002/12/11 13:13:57 starvik 72 * Added arch/ to v10 specific includes 73 * Added fix from Linux 2.4 in serial.c (flush_to_flip_buffer) 74 * 75 * Revision 1.7 2002/12/06 07:13:57 starvik 76 * Corrected work queue stuff 77 * Removed CONFIG_ETRAX_SERIAL_FLUSH_DMA_FAST 78 * 79 * Revision 1.6 2002/11/21 07:17:46 starvik 80 * Change static inline to extern inline where otherwise outlined with gcc-3.2 81 * 82 * Revision 1.5 2002/11/14 15:59:49 starvik 83 * Linux 2.5 port of the latest serial driver from 2.4. The work queue stuff 84 * probably doesn't work yet. 85 * 86 * Revision 1.42 2002/11/05 09:08:47 johana 87 * Better implementation of rs_stop() and rs_start() that uses the XOFF 88 * register to start/stop transmission. 89 * change_speed() also initilises XOFF register correctly so that 90 * auto_xoff is enabled when IXON flag is set by user. 91 * This gives fast XOFF response times. 92 * 93 * Revision 1.41 2002/11/04 18:40:57 johana 94 * Implemented rs_stop() and rs_start(). 95 * Simple tests using hwtestserial indicates that this should be enough 96 * to make it work. 97 * 98 * Revision 1.40 2002/10/14 05:33:18 starvik 99 * RS-485 uses fast timers even if SERIAL_FAST_TIMER is disabled 100 * 101 * Revision 1.39 2002/09/30 21:00:57 johana 102 * Support for CONFIG_ETRAX_SERx_DTR_RI_DSR_CD_MIXED where the status and 103 * control pins can be mixed between PA and PB. 104 * If no serial port uses MIXED old solution is used 105 * (saves a few bytes and cycles). 106 * control_pins struct uses masks instead of bit numbers. 107 * Corrected dummy values and polarity in line_info() so 108 * /proc/tty/driver/serial is now correct. 109 * (the E100_xxx_GET() macros is really active low - perhaps not obvious) 110 * 111 * Revision 1.38 2002/08/23 11:01:36 starvik 112 * Check that serial port is enabled in all interrupt handlers to avoid 113 * restarts of DMA channels not assigned to serial ports 114 * 115 * Revision 1.37 2002/08/13 13:02:37 bjornw 116 * Removed some warnings because of unused code 117 * 118 * Revision 1.36 2002/08/08 12:50:01 starvik 119 * Serial interrupt is shared with synchronous serial port driver 120 * 121 * Revision 1.35 2002/06/03 10:40:49 starvik 122 * Increased RS-485 RTS toggle timer to 2 characters 123 * 124 * Revision 1.34 2002/05/28 18:59:36 johana 125 * Whitespace and comment fixing to be more like etrax100ser.c 1.71. 126 * 127 * Revision 1.33 2002/05/28 17:55:43 johana 128 * RS-485 uses FAST_TIMER if enabled, and starts a short (one char time) 129 * timer from tranismit_chars (interrupt context). 130 * The timer toggles RTS in interrupt context when expired giving minimum 131 * latencies. 132 * 133 * Revision 1.32 2002/05/22 13:58:00 johana 134 * Renamed rs_write() to raw_write() and made it inline. 135 * New rs_write() handles RS-485 if configured and enabled 136 * (moved code from e100_write_rs485()). 137 * RS-485 ioctl's uses copy_from_user() instead of verify_area(). 138 * 139 * Revision 1.31 2002/04/22 11:20:03 johana 140 * Updated copyright years. 141 * 142 * Revision 1.30 2002/04/22 09:39:12 johana 143 * RS-485 support compiles. 144 * 145 * Revision 1.29 2002/01/14 16:10:01 pkj 146 * Allocate the receive buffers dynamically. The static 4kB buffer was 147 * too small for the peaks. This means that we can get rid of the extra 148 * buffer and the copying to it. It also means we require less memory 149 * under normal operations, but can use more when needed (there is a 150 * cap at 64kB for safety reasons). If there is no memory available 151 * we panic(), and die a horrible death... 152 * 153 * Revision 1.28 2001/12/18 15:04:53 johana 154 * Cleaned up write_rs485() - now it works correctly without padding extra 155 * char. 156 * Added sane default initialisation of rs485. 157 * Added #ifdef around dummy variables. 158 * 159 * Revision 1.27 2001/11/29 17:00:41 pkj 160 * 2kB seems to be too small a buffer when using 921600 bps, 161 * so increase it to 4kB (this was already done for the elinux 162 * version of the serial driver). 163 * 164 * Revision 1.26 2001/11/19 14:20:41 pkj 165 * Minor changes to comments and unused code. 166 * 167 * Revision 1.25 2001/11/12 20:03:43 pkj 168 * Fixed compiler warnings. 169 * 170 * Revision 1.24 2001/11/12 15:10:05 pkj 171 * Total redesign of the receiving part of the serial driver. 172 * Uses eight chained descriptors to write to a 4kB buffer. 173 * This data is then serialised into a 2kB buffer. From there it 174 * is copied into the TTY's flip buffers when they become available. 175 * A lot of copying, and the sizes of the buffers might need to be 176 * tweaked, but all in all it should work better than the previous 177 * version, without the need to modify the TTY code in any way. 178 * Also note that erroneous bytes are now correctly marked in the 179 * flag buffers (instead of always marking the first byte). 180 * 181 * Revision 1.23 2001/10/30 17:53:26 pkj 182 * * Set info->uses_dma to 0 when a port is closed. 183 * * Mark the timer1 interrupt as a fast one (SA_INTERRUPT). 184 * * Call start_flush_timer() in start_receive() if 185 * CONFIG_ETRAX_SERIAL_FLUSH_DMA_FAST is defined. 186 * 187 * Revision 1.22 2001/10/30 17:44:03 pkj 188 * Use %lu for received and transmitted counters in line_info(). 189 * 190 * Revision 1.21 2001/10/30 17:40:34 pkj 191 * Clean-up. The only change to functionality is that 192 * CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS(=5) is used instead of 193 * MAX_FLUSH_TIME(=8). 194 * 195 * Revision 1.20 2001/10/30 15:24:49 johana 196 * Added char_time stuff from 2.0 driver. 197 * 198 * Revision 1.19 2001/10/30 15:23:03 johana 199 * Merged with 1.13.2 branch + fixed indentation 200 * and changed CONFIG_ETRAX100_XYS to CONFIG_ETRAX_XYZ 201 * 202 * Revision 1.18 2001/09/24 09:27:22 pkj 203 * Completed ext_baud_table[] in cflag_to_baud() and cflag_to_etrax_baud(). 204 * 205 * Revision 1.17 2001/08/24 11:32:49 ronny 206 * More fixes for the CONFIG_ETRAX_SERIAL_PORT0 define. 207 * 208 * Revision 1.16 2001/08/24 07:56:22 ronny 209 * Added config ifdefs around ser0 irq requests. 210 * 211 * Revision 1.15 2001/08/16 09:10:31 bjarne 212 * serial.c - corrected the initialization of rs_table, the wrong defines 213 * where used. 214 * Corrected a test in timed_flush_handler. 215 * Changed configured to enabled. 216 * serial.h - Changed configured to enabled. 217 * 218 * Revision 1.14 2001/08/15 07:31:23 bjarne 219 * Introduced two new members to the e100_serial struct. 220 * configured - Will be set to 1 if the port has been configured in .config 221 * uses_dma - Should be set to 1 if the port uses DMA. Currently it is set 222 * to 1 223 * when a port is opened. This is used to limit the DMA interrupt 224 * routines to only manipulate DMA channels actually used by the 225 * serial driver. 226 * 227 * Revision 1.13.2.2 2001/10/17 13:57:13 starvik 228 * Receiver was broken by the break fixes 229 * 230 * Revision 1.13.2.1 2001/07/20 13:57:39 ronny 231 * Merge with new stuff from etrax100ser.c. Works but haven't checked stuff 232 * like break handling. 233 * 234 * Revision 1.13 2001/05/09 12:40:31 johana 235 * Use DMA_NBR and IRQ_NBR defines from dma.h and irq.h 236 * 237 * Revision 1.12 2001/04/19 12:23:07 bjornw 238 * CONFIG_RS485 -> CONFIG_ETRAX_RS485 239 * 240 * Revision 1.11 2001/04/05 14:29:48 markusl 241 * Updated according to review remarks i.e. 242 * -Use correct types in port structure to avoid compiler warnings 243 * -Try to use IO_* macros whenever possible 244 * -Open should never return -EBUSY 245 * 246 * Revision 1.10 2001/03/05 13:14:07 bjornw 247 * Another spelling fix 248 * 249 * Revision 1.9 2001/02/23 13:46:38 bjornw 250 * Spellling check 251 * 252 * Revision 1.8 2001/01/23 14:56:35 markusl 253 * Made use of ser1 optional 254 * Needed by USB 255 * 256 * Revision 1.7 2001/01/19 16:14:48 perf 257 * Added kernel options for serial ports 234. 258 * Changed option names from CONFIG_ETRAX100_XYZ to CONFIG_ETRAX_XYZ. 259 * 260 * Revision 1.6 2000/11/22 16:36:09 bjornw 261 * Please marketing by using the correct case when spelling Etrax. 262 * 263 * Revision 1.5 2000/11/21 16:43:37 bjornw 264 * Fixed so it compiles under CONFIG_SVINTO_SIM 265 * 266 * Revision 1.4 2000/11/15 17:34:12 bjornw 267 * Added a timeout timer for flushing input channels. The interrupt-based 268 * fast flush system should be easy to merge with this later (works the same 269 * way, only with an irq instead of a system timer_list) 270 * 271 * Revision 1.3 2000/11/13 17:19:57 bjornw 272 * * Incredibly, this almost complete rewrite of serial.c worked (at least 273 * for output) the first time. 274 * 275 * Items worth noticing: 276 * 277 * No Etrax100 port 1 workarounds (does only compile on 2.4 anyway now) 278 * RS485 is not ported (why can't it be done in userspace as on x86 ?) 279 * Statistics done through async_icount - if any more stats are needed, 280 * that's the place to put them or in an arch-dep version of it. 281 * timeout_interrupt and the other fast timeout stuff not ported yet 282 * There be dragons in this 3k+ line driver 283 * 284 * Revision 1.2 2000/11/10 16:50:28 bjornw 285 * First shot at a 2.4 port, does not compile totally yet 286 * 287 * Revision 1.1 2000/11/10 16:47:32 bjornw 288 * Added verbatim copy of rev 1.49 etrax100ser.c from elinux 289 * 290 * Revision 1.49 2000/10/30 15:47:14 tobiasa 291 * Changed version number. 292 * 293 * Revision 1.48 2000/10/25 11:02:43 johana 294 * Changed %ul to %lu in printf's 295 * 296 * Revision 1.47 2000/10/18 15:06:53 pkj 297 * Compile correctly with CONFIG_ETRAX_SERIAL_FLUSH_DMA_FAST and 298 * CONFIG_ETRAX_SERIAL_PROC_ENTRY together. 299 * Some clean-up of the /proc/serial file. 300 * 301 * Revision 1.46 2000/10/16 12:59:40 johana 302 * Added CONFIG_ETRAX_SERIAL_PROC_ENTRY for statistics and debug info. 303 * 304 * Revision 1.45 2000/10/13 17:10:59 pkj 305 * Do not flush DMAs while flipping TTY buffers. 306 * 307 * Revision 1.44 2000/10/13 16:34:29 pkj 308 * Added a delay in ser_interrupt() for 2.3ms when an error is detected. 309 * We do not know why this delay is required yet, but without it the 310 * irmaflash program does not work (this was the program that needed 311 * the ser_interrupt() to be needed in the first place). This should not 312 * affect normal use of the serial ports. 313 * 314 * Revision 1.43 2000/10/13 16:30:44 pkj 315 * New version of the fast flush of serial buffers code. This time 316 * it is localized to the serial driver and uses a fast timer to 317 * do the work. 318 * 319 * Revision 1.42 2000/10/13 14:54:26 bennyo 320 * Fix for switching RTS when using rs485 321 * 322 * Revision 1.41 2000/10/12 11:43:44 pkj 323 * Cleaned up a number of comments. 324 * 325 * Revision 1.40 2000/10/10 11:58:39 johana 326 * Made RS485 support generic for all ports. 327 * Toggle rts in interrupt if no delay wanted. 328 * WARNING: No true transmitter empty check?? 329 * Set d_wait bit when sending data so interrupt is delayed until 330 * fifo flushed. (Fix tcdrain() problem) 331 * 332 * Revision 1.39 2000/10/04 16:08:02 bjornw 333 * * Use virt_to_phys etc. for DMA addresses 334 * * Removed CONFIG_FLUSH_DMA_FAST hacks 335 * * Indentation fix 336 * 337 * Revision 1.38 2000/10/02 12:27:10 mattias 338 * * added variable used when using fast flush on serial dma. 339 * (CONFIG_FLUSH_DMA_FAST) 340 * 341 * Revision 1.37 2000/09/27 09:44:24 pkj 342 * Uncomment definition of SERIAL_HANDLE_EARLY_ERRORS. 343 * 344 * Revision 1.36 2000/09/20 13:12:52 johana 345 * Support for CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS: 346 * Number of timer ticks between flush of receive fifo (1 tick = 10ms). 347 * Try 0-3 for low latency applications. Approx 5 for high load 348 * applications (e.g. PPP). Maybe this should be more adaptive some day... 349 * 350 * Revision 1.35 2000/09/20 10:36:08 johana 351 * Typo in get_lsr_info() 352 * 353 * Revision 1.34 2000/09/20 10:29:59 johana 354 * Let rs_chars_in_buffer() check fifo content as well. 355 * get_lsr_info() might work now (not tested). 356 * Easier to change the port to debug. 357 * 358 * Revision 1.33 2000/09/13 07:52:11 torbjore 359 * Support RS485 360 * 361 * Revision 1.32 2000/08/31 14:45:37 bjornw 362 * After sending a break we need to reset the transmit DMA channel 363 * 364 * Revision 1.31 2000/06/21 12:13:29 johana 365 * Fixed wait for all chars sent when closing port. 366 * (Used to always take 1 second!) 367 * Added shadows for directions of status/ctrl signals. 368 * 369 * Revision 1.30 2000/05/29 16:27:55 bjornw 370 * Simulator ifdef moved a bit 371 * 372 * Revision 1.29 2000/05/09 09:40:30 mattias 373 * * Added description of dma registers used in timeout_interrupt 374 * * Removed old code 375 * 376 * Revision 1.28 2000/05/08 16:38:58 mattias 377 * * Bugfix for flushing fifo in timeout_interrupt 378 * Problem occurs when bluetooth stack waits for a small number of bytes 379 * containing an event acknowledging free buffers in bluetooth HW 380 * As before, data was stuck in fifo until more data came on uart and 381 * flushed it up to the stack. 382 * 383 * Revision 1.27 2000/05/02 09:52:28 jonasd 384 * Added fix for peculiar etrax behaviour when eop is forced on an empty 385 * fifo. This is used when flashing the IRMA chip. Disabled by default. 386 * 387 * Revision 1.26 2000/03/29 15:32:02 bjornw 388 * 2.0.34 updates 389 * 390 * Revision 1.25 2000/02/16 16:59:36 bjornw 391 * * Receive DMA directly into the flip-buffer, eliminating an intermediary 392 * receive buffer and a memcpy. Will avoid some overruns. 393 * * Error message on debug port if an overrun or flip buffer overrun occurs. 394 * * Just use the first byte in the flag flip buffer for errors. 395 * * Check for timeout on the serial ports only each 5/100 s, not 1/100. 396 * 397 * Revision 1.24 2000/02/09 18:02:28 bjornw 398 * * Clear serial errors (overrun, framing, parity) correctly. Before, the 399 * receiver would get stuck if an error occurred and we did not restart 400 * the input DMA. 401 * * Cosmetics (indentation, some code made into inlines) 402 * * Some more debug options 403 * * Actually shut down the serial port (DMA irq, DMA reset, receiver stop) 404 * when the last open is closed. Corresponding fixes in startup(). 405 * * rs_close() "tx FIFO wait" code moved into right place, bug & -> && fixed 406 * and make a special case out of port 1 (R_DMA_CHx_STATUS is broken for that) 407 * * e100_disable_rx/enable_rx just disables/enables the receiver, not RTS 408 * 409 * Revision 1.23 2000/01/24 17:46:19 johana 410 * Wait for flush of DMA/FIFO when closing port. 411 * 412 * Revision 1.22 2000/01/20 18:10:23 johana 413 * Added TIOCMGET ioctl to return modem status. 414 * Implemented modem status/control that works with the extra signals 415 * (DTR, DSR, RI,CD) as well. 416 * 3 different modes supported: 417 * ser0 on PB (Bundy), ser1 on PB (Lisa) and ser2 on PA (Bundy) 418 * Fixed DEF_TX value that caused the serial transmitter pin (txd) to go to 0 when 419 * closing the last filehandle, NASTY!. 420 * Added break generation, not tested though! 421 * Use IRQF_SHARED when request_irq() for ser2 and ser3 (shared with) par0 and par1. 422 * You can't use them at the same time (yet..), but you can hopefully switch 423 * between ser2/par0, ser3/par1 with the same kernel config. 424 * Replaced some magic constants with defines 425 * 426 * 427 */ 428 429static char *serial_version = "$Revision: 1.1.1.1 $"; 430 431#include <linux/types.h> 432#include <linux/errno.h> 433#include <linux/signal.h> 434#include <linux/sched.h> 435#include <linux/timer.h> 436#include <linux/interrupt.h> 437#include <linux/tty.h> 438#include <linux/tty_flip.h> 439#include <linux/major.h> 440#include <linux/string.h> 441#include <linux/fcntl.h> 442#include <linux/mm.h> 443#include <linux/slab.h> 444#include <linux/init.h> 445#include <asm/uaccess.h> 446#include <linux/kernel.h> 447#include <linux/mutex.h> 448 449#include <asm/io.h> 450#include <asm/irq.h> 451#include <asm/system.h> 452#include <asm/bitops.h> 453#include <linux/delay.h> 454 455#include <asm/arch/svinto.h> 456 457/* non-arch dependent serial structures are in linux/serial.h */ 458#include <linux/serial.h> 459/* while we keep our own stuff (struct e100_serial) in a local .h file */ 460#include "serial.h" 461#include <asm/fasttimer.h> 462 463#ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER 464#ifndef CONFIG_ETRAX_FAST_TIMER 465#error "Enable FAST_TIMER to use SERIAL_FAST_TIMER" 466#endif 467#endif 468 469#if defined(CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS) && \ 470 (CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS == 0) 471#error "RX_TIMEOUT_TICKS == 0 not allowed, use 1" 472#endif 473 474#if defined(CONFIG_ETRAX_RS485_ON_PA) && defined(CONFIG_ETRAX_RS485_ON_PORT_G) 475#error "Disable either CONFIG_ETRAX_RS485_ON_PA or CONFIG_ETRAX_RS485_ON_PORT_G" 476#endif 477 478/* 479 * All of the compatibilty code so we can compile serial.c against 480 * older kernels is hidden in serial_compat.h 481 */ 482#if defined(LOCAL_HEADERS) 483#include "serial_compat.h" 484#endif 485 486struct tty_driver *serial_driver; 487 488/* serial subtype definitions */ 489#ifndef SERIAL_TYPE_NORMAL 490#define SERIAL_TYPE_NORMAL 1 491#endif 492 493/* number of characters left in xmit buffer before we ask for more */ 494#define WAKEUP_CHARS 256 495 496//#define SERIAL_DEBUG_INTR 497//#define SERIAL_DEBUG_OPEN 498//#define SERIAL_DEBUG_FLOW 499//#define SERIAL_DEBUG_DATA 500//#define SERIAL_DEBUG_THROTTLE 501//#define SERIAL_DEBUG_IO /* Debug for Extra control and status pins */ 502//#define SERIAL_DEBUG_LINE 0 /* What serport we want to debug */ 503 504/* Enable this to use serial interrupts to handle when you 505 expect the first received event on the serial port to 506 be an error, break or similar. Used to be able to flash IRMA 507 from eLinux */ 508#define SERIAL_HANDLE_EARLY_ERRORS 509 510/* Defined and used in n_tty.c, but we need it here as well */ 511#define TTY_THRESHOLD_THROTTLE 128 512 513/* Due to buffersizes and threshold values, our SERIAL_DESCR_BUF_SIZE 514 * must not be to high or flow control won't work if we leave it to the tty 515 * layer so we have our own throttling in flush_to_flip 516 * TTY_FLIPBUF_SIZE=512, 517 * TTY_THRESHOLD_THROTTLE/UNTHROTTLE=128 518 * BUF_SIZE can't be > 128 519 */ 520/* Currently 16 descriptors x 128 bytes = 2048 bytes */ 521#define SERIAL_DESCR_BUF_SIZE 256 522 523#define SERIAL_PRESCALE_BASE 3125000 /* 3.125MHz */ 524#define DEF_BAUD_BASE SERIAL_PRESCALE_BASE 525 526/* We don't want to load the system with massive fast timer interrupt 527 * on high baudrates so limit it to 250 us (4kHz) */ 528#define MIN_FLUSH_TIME_USEC 250 529 530/* Add an x here to log a lot of timer stuff */ 531#define TIMERD(x) 532/* Debug details of interrupt handling */ 533#define DINTR1(x) /* irq on/off, errors */ 534#define DINTR2(x) /* tx and rx */ 535/* Debug flip buffer stuff */ 536#define DFLIP(x) 537/* Debug flow control and overview of data flow */ 538#define DFLOW(x) 539#define DBAUD(x) 540#define DLOG_INT_TRIG(x) 541 542//#define DEBUG_LOG_INCLUDED 543#ifndef DEBUG_LOG_INCLUDED 544#define DEBUG_LOG(line, string, value) 545#else 546struct debug_log_info 547{ 548 unsigned long time; 549 unsigned long timer_data; 550// int line; 551 const char *string; 552 int value; 553}; 554#define DEBUG_LOG_SIZE 4096 555 556struct debug_log_info debug_log[DEBUG_LOG_SIZE]; 557int debug_log_pos = 0; 558 559#define DEBUG_LOG(_line, _string, _value) do { \ 560 if ((_line) == SERIAL_DEBUG_LINE) {\ 561 debug_log_func(_line, _string, _value); \ 562 }\ 563}while(0) 564 565void debug_log_func(int line, const char *string, int value) 566{ 567 if (debug_log_pos < DEBUG_LOG_SIZE) { 568 debug_log[debug_log_pos].time = jiffies; 569 debug_log[debug_log_pos].timer_data = *R_TIMER_DATA; 570// debug_log[debug_log_pos].line = line; 571 debug_log[debug_log_pos].string = string; 572 debug_log[debug_log_pos].value = value; 573 debug_log_pos++; 574 } 575 /*printk(string, value);*/ 576} 577#endif 578 579#ifndef CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS 580/* Default number of timer ticks before flushing rx fifo 581 * When using "little data, low latency applications: use 0 582 * When using "much data applications (PPP)" use ~5 583 */ 584#define CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS 5 585#endif 586 587unsigned long timer_data_to_ns(unsigned long timer_data); 588 589static void change_speed(struct e100_serial *info); 590static void rs_throttle(struct tty_struct * tty); 591static void rs_wait_until_sent(struct tty_struct *tty, int timeout); 592static int rs_write(struct tty_struct * tty, int from_user, 593 const unsigned char *buf, int count); 594#ifdef CONFIG_ETRAX_RS485 595static int e100_write_rs485(struct tty_struct * tty, int from_user, 596 const unsigned char *buf, int count); 597#endif 598static int get_lsr_info(struct e100_serial * info, unsigned int *value); 599 600 601#define DEF_BAUD 115200 /* 115.2 kbit/s */ 602#define STD_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST) 603#define DEF_RX 0x20 /* or SERIAL_CTRL_W >> 8 */ 604/* Default value of tx_ctrl register: has txd(bit 7)=1 (idle) as default */ 605#define DEF_TX 0x80 /* or SERIAL_CTRL_B */ 606 607/* offsets from R_SERIALx_CTRL */ 608 609#define REG_DATA 0 610#define REG_DATA_STATUS32 0 /* this is the 32 bit register R_SERIALx_READ */ 611#define REG_TR_DATA 0 612#define REG_STATUS 1 613#define REG_TR_CTRL 1 614#define REG_REC_CTRL 2 615#define REG_BAUD 3 616#define REG_XOFF 4 /* this is a 32 bit register */ 617 618/* The bitfields are the same for all serial ports */ 619#define SER_RXD_MASK IO_MASK(R_SERIAL0_STATUS, rxd) 620#define SER_DATA_AVAIL_MASK IO_MASK(R_SERIAL0_STATUS, data_avail) 621#define SER_FRAMING_ERR_MASK IO_MASK(R_SERIAL0_STATUS, framing_err) 622#define SER_PAR_ERR_MASK IO_MASK(R_SERIAL0_STATUS, par_err) 623#define SER_OVERRUN_MASK IO_MASK(R_SERIAL0_STATUS, overrun) 624 625#define SER_ERROR_MASK (SER_OVERRUN_MASK | SER_PAR_ERR_MASK | SER_FRAMING_ERR_MASK) 626 627/* Values for info->errorcode */ 628#define ERRCODE_SET_BREAK (TTY_BREAK) 629#define ERRCODE_INSERT 0x100 630#define ERRCODE_INSERT_BREAK (ERRCODE_INSERT | TTY_BREAK) 631 632#define FORCE_EOP(info) *R_SET_EOP = 1U << info->iseteop; 633 634/* 635 * General note regarding the use of IO_* macros in this file: 636 * 637 * We will use the bits defined for DMA channel 6 when using various 638 * IO_* macros (e.g. IO_STATE, IO_MASK, IO_EXTRACT) and _assume_ they are 639 * the same for all channels (which of course they are). 640 * 641 * We will also use the bits defined for serial port 0 when writing commands 642 * to the different ports, as these bits too are the same for all ports. 643 */ 644 645 646/* Mask for the irqs possibly enabled in R_IRQ_MASK1_RD etc. */ 647static const unsigned long e100_ser_int_mask = 0 648#ifdef CONFIG_ETRAX_SERIAL_PORT0 649| IO_MASK(R_IRQ_MASK1_RD, ser0_data) | IO_MASK(R_IRQ_MASK1_RD, ser0_ready) 650#endif 651#ifdef CONFIG_ETRAX_SERIAL_PORT1 652| IO_MASK(R_IRQ_MASK1_RD, ser1_data) | IO_MASK(R_IRQ_MASK1_RD, ser1_ready) 653#endif 654#ifdef CONFIG_ETRAX_SERIAL_PORT2 655| IO_MASK(R_IRQ_MASK1_RD, ser2_data) | IO_MASK(R_IRQ_MASK1_RD, ser2_ready) 656#endif 657#ifdef CONFIG_ETRAX_SERIAL_PORT3 658| IO_MASK(R_IRQ_MASK1_RD, ser3_data) | IO_MASK(R_IRQ_MASK1_RD, ser3_ready) 659#endif 660; 661unsigned long r_alt_ser_baudrate_shadow = 0; 662 663/* this is the data for the four serial ports in the etrax100 */ 664/* DMA2(ser2), DMA4(ser3), DMA6(ser0) or DMA8(ser1) */ 665/* R_DMA_CHx_CLR_INTR, R_DMA_CHx_FIRST, R_DMA_CHx_CMD */ 666 667static struct e100_serial rs_table[] = { 668 { .baud = DEF_BAUD, 669 .port = (unsigned char *)R_SERIAL0_CTRL, 670 .irq = 1U << 12, /* uses DMA 6 and 7 */ 671 .oclrintradr = R_DMA_CH6_CLR_INTR, 672 .ofirstadr = R_DMA_CH6_FIRST, 673 .ocmdadr = R_DMA_CH6_CMD, 674 .ostatusadr = R_DMA_CH6_STATUS, 675 .iclrintradr = R_DMA_CH7_CLR_INTR, 676 .ifirstadr = R_DMA_CH7_FIRST, 677 .icmdadr = R_DMA_CH7_CMD, 678 .idescradr = R_DMA_CH7_DESCR, 679 .flags = STD_FLAGS, 680 .rx_ctrl = DEF_RX, 681 .tx_ctrl = DEF_TX, 682 .iseteop = 2, 683#ifdef CONFIG_ETRAX_SERIAL_PORT0 684 .enabled = 1, 685#ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA6_OUT 686 .dma_out_enabled = 1, 687#else 688 .dma_out_enabled = 0, 689#endif 690#ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA7_IN 691 .dma_in_enabled = 1, 692#else 693 .dma_in_enabled = 0 694#endif 695#else 696 .enabled = 0, 697 .dma_out_enabled = 0, 698 .dma_in_enabled = 0 699#endif 700 701}, /* ttyS0 */ 702#ifndef CONFIG_SVINTO_SIM 703 { .baud = DEF_BAUD, 704 .port = (unsigned char *)R_SERIAL1_CTRL, 705 .irq = 1U << 16, /* uses DMA 8 and 9 */ 706 .oclrintradr = R_DMA_CH8_CLR_INTR, 707 .ofirstadr = R_DMA_CH8_FIRST, 708 .ocmdadr = R_DMA_CH8_CMD, 709 .ostatusadr = R_DMA_CH8_STATUS, 710 .iclrintradr = R_DMA_CH9_CLR_INTR, 711 .ifirstadr = R_DMA_CH9_FIRST, 712 .icmdadr = R_DMA_CH9_CMD, 713 .idescradr = R_DMA_CH9_DESCR, 714 .flags = STD_FLAGS, 715 .rx_ctrl = DEF_RX, 716 .tx_ctrl = DEF_TX, 717 .iseteop = 3, 718#ifdef CONFIG_ETRAX_SERIAL_PORT1 719 .enabled = 1, 720#ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA8_OUT 721 .dma_out_enabled = 1, 722#else 723 .dma_out_enabled = 0, 724#endif 725#ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA9_IN 726 .dma_in_enabled = 1, 727#else 728 .dma_in_enabled = 0 729#endif 730#else 731 .enabled = 0, 732 .dma_out_enabled = 0, 733 .dma_in_enabled = 0 734#endif 735}, /* ttyS1 */ 736 737 { .baud = DEF_BAUD, 738 .port = (unsigned char *)R_SERIAL2_CTRL, 739 .irq = 1U << 4, /* uses DMA 2 and 3 */ 740 .oclrintradr = R_DMA_CH2_CLR_INTR, 741 .ofirstadr = R_DMA_CH2_FIRST, 742 .ocmdadr = R_DMA_CH2_CMD, 743 .ostatusadr = R_DMA_CH2_STATUS, 744 .iclrintradr = R_DMA_CH3_CLR_INTR, 745 .ifirstadr = R_DMA_CH3_FIRST, 746 .icmdadr = R_DMA_CH3_CMD, 747 .idescradr = R_DMA_CH3_DESCR, 748 .flags = STD_FLAGS, 749 .rx_ctrl = DEF_RX, 750 .tx_ctrl = DEF_TX, 751 .iseteop = 0, 752#ifdef CONFIG_ETRAX_SERIAL_PORT2 753 .enabled = 1, 754#ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA2_OUT 755 .dma_out_enabled = 1, 756#else 757 .dma_out_enabled = 0, 758#endif 759#ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA3_IN 760 .dma_in_enabled = 1, 761#else 762 .dma_in_enabled = 0 763#endif 764#else 765 .enabled = 0, 766 .dma_out_enabled = 0, 767 .dma_in_enabled = 0 768#endif 769 }, /* ttyS2 */ 770 771 { .baud = DEF_BAUD, 772 .port = (unsigned char *)R_SERIAL3_CTRL, 773 .irq = 1U << 8, /* uses DMA 4 and 5 */ 774 .oclrintradr = R_DMA_CH4_CLR_INTR, 775 .ofirstadr = R_DMA_CH4_FIRST, 776 .ocmdadr = R_DMA_CH4_CMD, 777 .ostatusadr = R_DMA_CH4_STATUS, 778 .iclrintradr = R_DMA_CH5_CLR_INTR, 779 .ifirstadr = R_DMA_CH5_FIRST, 780 .icmdadr = R_DMA_CH5_CMD, 781 .idescradr = R_DMA_CH5_DESCR, 782 .flags = STD_FLAGS, 783 .rx_ctrl = DEF_RX, 784 .tx_ctrl = DEF_TX, 785 .iseteop = 1, 786#ifdef CONFIG_ETRAX_SERIAL_PORT3 787 .enabled = 1, 788#ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA4_OUT 789 .dma_out_enabled = 1, 790#else 791 .dma_out_enabled = 0, 792#endif 793#ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA5_IN 794 .dma_in_enabled = 1, 795#else 796 .dma_in_enabled = 0 797#endif 798#else 799 .enabled = 0, 800 .dma_out_enabled = 0, 801 .dma_in_enabled = 0 802#endif 803 } /* ttyS3 */ 804#endif 805}; 806 807 808#define NR_PORTS (sizeof(rs_table)/sizeof(struct e100_serial)) 809 810static struct ktermios *serial_termios[NR_PORTS]; 811static struct ktermios *serial_termios_locked[NR_PORTS]; 812#ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER 813static struct fast_timer fast_timers[NR_PORTS]; 814#endif 815 816#ifdef CONFIG_ETRAX_SERIAL_PROC_ENTRY 817#define PROCSTAT(x) x 818struct ser_statistics_type { 819 int overrun_cnt; 820 int early_errors_cnt; 821 int ser_ints_ok_cnt; 822 int errors_cnt; 823 unsigned long int processing_flip; 824 unsigned long processing_flip_still_room; 825 unsigned long int timeout_flush_cnt; 826 int rx_dma_ints; 827 int tx_dma_ints; 828 int rx_tot; 829 int tx_tot; 830}; 831 832static struct ser_statistics_type ser_stat[NR_PORTS]; 833 834#else 835 836#define PROCSTAT(x) 837 838#endif /* CONFIG_ETRAX_SERIAL_PROC_ENTRY */ 839 840/* RS-485 */ 841#if defined(CONFIG_ETRAX_RS485) 842#ifdef CONFIG_ETRAX_FAST_TIMER 843static struct fast_timer fast_timers_rs485[NR_PORTS]; 844#endif 845#if defined(CONFIG_ETRAX_RS485_ON_PA) 846static int rs485_pa_bit = CONFIG_ETRAX_RS485_ON_PA_BIT; 847#endif 848#if defined(CONFIG_ETRAX_RS485_ON_PORT_G) 849static int rs485_port_g_bit = CONFIG_ETRAX_RS485_ON_PORT_G_BIT; 850#endif 851#endif 852 853/* Info and macros needed for each ports extra control/status signals. */ 854#define E100_STRUCT_PORT(line, pinname) \ 855 ((CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT >= 0)? \ 856 (R_PORT_PA_DATA): ( \ 857 (CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT >= 0)? \ 858 (R_PORT_PB_DATA):&dummy_ser[line])) 859 860#define E100_STRUCT_SHADOW(line, pinname) \ 861 ((CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT >= 0)? \ 862 (&port_pa_data_shadow): ( \ 863 (CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT >= 0)? \ 864 (&port_pb_data_shadow):&dummy_ser[line])) 865#define E100_STRUCT_MASK(line, pinname) \ 866 ((CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT >= 0)? \ 867 (1<<CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT): ( \ 868 (CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT >= 0)? \ 869 (1<<CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT):DUMMY_##pinname##_MASK)) 870 871#define DUMMY_DTR_MASK 1 872#define DUMMY_RI_MASK 2 873#define DUMMY_DSR_MASK 4 874#define DUMMY_CD_MASK 8 875static unsigned char dummy_ser[NR_PORTS] = {0xFF, 0xFF, 0xFF,0xFF}; 876 877/* If not all status pins are used or disabled, use mixed mode */ 878#ifdef CONFIG_ETRAX_SERIAL_PORT0 879 880#define SER0_PA_BITSUM (CONFIG_ETRAX_SER0_DTR_ON_PA_BIT+CONFIG_ETRAX_SER0_RI_ON_PA_BIT+CONFIG_ETRAX_SER0_DSR_ON_PA_BIT+CONFIG_ETRAX_SER0_CD_ON_PA_BIT) 881 882#if SER0_PA_BITSUM != -4 883# if CONFIG_ETRAX_SER0_DTR_ON_PA_BIT == -1 884# ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 885# define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1 886# endif 887# endif 888# if CONFIG_ETRAX_SER0_RI_ON_PA_BIT == -1 889# ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 890# define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1 891# endif 892# endif 893# if CONFIG_ETRAX_SER0_DSR_ON_PA_BIT == -1 894# ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 895# define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1 896# endif 897# endif 898# if CONFIG_ETRAX_SER0_CD_ON_PA_BIT == -1 899# ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 900# define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1 901# endif 902# endif 903#endif 904 905#define SER0_PB_BITSUM (CONFIG_ETRAX_SER0_DTR_ON_PB_BIT+CONFIG_ETRAX_SER0_RI_ON_PB_BIT+CONFIG_ETRAX_SER0_DSR_ON_PB_BIT+CONFIG_ETRAX_SER0_CD_ON_PB_BIT) 906 907#if SER0_PB_BITSUM != -4 908# if CONFIG_ETRAX_SER0_DTR_ON_PB_BIT == -1 909# ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 910# define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1 911# endif 912# endif 913# if CONFIG_ETRAX_SER0_RI_ON_PB_BIT == -1 914# ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 915# define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1 916# endif 917# endif 918# if CONFIG_ETRAX_SER0_DSR_ON_PB_BIT == -1 919# ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 920# define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1 921# endif 922# endif 923# if CONFIG_ETRAX_SER0_CD_ON_PB_BIT == -1 924# ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 925# define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1 926# endif 927# endif 928#endif 929 930#endif /* PORT0 */ 931 932 933#ifdef CONFIG_ETRAX_SERIAL_PORT1 934 935#define SER1_PA_BITSUM (CONFIG_ETRAX_SER1_DTR_ON_PA_BIT+CONFIG_ETRAX_SER1_RI_ON_PA_BIT+CONFIG_ETRAX_SER1_DSR_ON_PA_BIT+CONFIG_ETRAX_SER1_CD_ON_PA_BIT) 936 937#if SER1_PA_BITSUM != -4 938# if CONFIG_ETRAX_SER1_DTR_ON_PA_BIT == -1 939# ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 940# define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1 941# endif 942# endif 943# if CONFIG_ETRAX_SER1_RI_ON_PA_BIT == -1 944# ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 945# define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1 946# endif 947# endif 948# if CONFIG_ETRAX_SER1_DSR_ON_PA_BIT == -1 949# ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 950# define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1 951# endif 952# endif 953# if CONFIG_ETRAX_SER1_CD_ON_PA_BIT == -1 954# ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 955# define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1 956# endif 957# endif 958#endif 959 960#define SER1_PB_BITSUM (CONFIG_ETRAX_SER1_DTR_ON_PB_BIT+CONFIG_ETRAX_SER1_RI_ON_PB_BIT+CONFIG_ETRAX_SER1_DSR_ON_PB_BIT+CONFIG_ETRAX_SER1_CD_ON_PB_BIT) 961 962#if SER1_PB_BITSUM != -4 963# if CONFIG_ETRAX_SER1_DTR_ON_PB_BIT == -1 964# ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 965# define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1 966# endif 967# endif 968# if CONFIG_ETRAX_SER1_RI_ON_PB_BIT == -1 969# ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 970# define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1 971# endif 972# endif 973# if CONFIG_ETRAX_SER1_DSR_ON_PB_BIT == -1 974# ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 975# define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1 976# endif 977# endif 978# if CONFIG_ETRAX_SER1_CD_ON_PB_BIT == -1 979# ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 980# define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1 981# endif 982# endif 983#endif 984 985#endif /* PORT1 */ 986 987#ifdef CONFIG_ETRAX_SERIAL_PORT2 988 989#define SER2_PA_BITSUM (CONFIG_ETRAX_SER2_DTR_ON_PA_BIT+CONFIG_ETRAX_SER2_RI_ON_PA_BIT+CONFIG_ETRAX_SER2_DSR_ON_PA_BIT+CONFIG_ETRAX_SER2_CD_ON_PA_BIT) 990 991#if SER2_PA_BITSUM != -4 992# if CONFIG_ETRAX_SER2_DTR_ON_PA_BIT == -1 993# ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 994# define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1 995# endif 996# endif 997# if CONFIG_ETRAX_SER2_RI_ON_PA_BIT == -1 998# ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 999# define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1 1000# endif 1001# endif 1002# if CONFIG_ETRAX_SER2_DSR_ON_PA_BIT == -1 1003# ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1004# define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1 1005# endif 1006# endif 1007# if CONFIG_ETRAX_SER2_CD_ON_PA_BIT == -1 1008# ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1009# define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1 1010# endif 1011# endif 1012#endif 1013 1014#define SER2_PB_BITSUM (CONFIG_ETRAX_SER2_DTR_ON_PB_BIT+CONFIG_ETRAX_SER2_RI_ON_PB_BIT+CONFIG_ETRAX_SER2_DSR_ON_PB_BIT+CONFIG_ETRAX_SER2_CD_ON_PB_BIT) 1015 1016#if SER2_PB_BITSUM != -4 1017# if CONFIG_ETRAX_SER2_DTR_ON_PB_BIT == -1 1018# ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1019# define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1 1020# endif 1021# endif 1022# if CONFIG_ETRAX_SER2_RI_ON_PB_BIT == -1 1023# ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1024# define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1 1025# endif 1026# endif 1027# if CONFIG_ETRAX_SER2_DSR_ON_PB_BIT == -1 1028# ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1029# define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1 1030# endif 1031# endif 1032# if CONFIG_ETRAX_SER2_CD_ON_PB_BIT == -1 1033# ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1034# define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1 1035# endif 1036# endif 1037#endif 1038 1039#endif /* PORT2 */ 1040 1041#ifdef CONFIG_ETRAX_SERIAL_PORT3 1042 1043#define SER3_PA_BITSUM (CONFIG_ETRAX_SER3_DTR_ON_PA_BIT+CONFIG_ETRAX_SER3_RI_ON_PA_BIT+CONFIG_ETRAX_SER3_DSR_ON_PA_BIT+CONFIG_ETRAX_SER3_CD_ON_PA_BIT) 1044 1045#if SER3_PA_BITSUM != -4 1046# if CONFIG_ETRAX_SER3_DTR_ON_PA_BIT == -1 1047# ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1048# define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1 1049# endif 1050# endif 1051# if CONFIG_ETRAX_SER3_RI_ON_PA_BIT == -1 1052# ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1053# define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1 1054# endif 1055# endif 1056# if CONFIG_ETRAX_SER3_DSR_ON_PA_BIT == -1 1057# ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1058# define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1 1059# endif 1060# endif 1061# if CONFIG_ETRAX_SER3_CD_ON_PA_BIT == -1 1062# ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1063# define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1 1064# endif 1065# endif 1066#endif 1067 1068#define SER3_PB_BITSUM (CONFIG_ETRAX_SER3_DTR_ON_PB_BIT+CONFIG_ETRAX_SER3_RI_ON_PB_BIT+CONFIG_ETRAX_SER3_DSR_ON_PB_BIT+CONFIG_ETRAX_SER3_CD_ON_PB_BIT) 1069 1070#if SER3_PB_BITSUM != -4 1071# if CONFIG_ETRAX_SER3_DTR_ON_PB_BIT == -1 1072# ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1073# define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1 1074# endif 1075# endif 1076# if CONFIG_ETRAX_SER3_RI_ON_PB_BIT == -1 1077# ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1078# define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1 1079# endif 1080# endif 1081# if CONFIG_ETRAX_SER3_DSR_ON_PB_BIT == -1 1082# ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1083# define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1 1084# endif 1085# endif 1086# if CONFIG_ETRAX_SER3_CD_ON_PB_BIT == -1 1087# ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1088# define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1 1089# endif 1090# endif 1091#endif 1092 1093#endif /* PORT3 */ 1094 1095 1096#if defined(CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED) || \ 1097 defined(CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED) || \ 1098 defined(CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED) || \ 1099 defined(CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED) 1100#define CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED 1101#endif 1102 1103#ifdef CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED 1104/* The pins can be mixed on PA and PB */ 1105#define CONTROL_PINS_PORT_NOT_USED(line) \ 1106 &dummy_ser[line], &dummy_ser[line], \ 1107 &dummy_ser[line], &dummy_ser[line], \ 1108 &dummy_ser[line], &dummy_ser[line], \ 1109 &dummy_ser[line], &dummy_ser[line], \ 1110 DUMMY_DTR_MASK, DUMMY_RI_MASK, DUMMY_DSR_MASK, DUMMY_CD_MASK 1111 1112 1113struct control_pins 1114{ 1115 volatile unsigned char *dtr_port; 1116 unsigned char *dtr_shadow; 1117 volatile unsigned char *ri_port; 1118 unsigned char *ri_shadow; 1119 volatile unsigned char *dsr_port; 1120 unsigned char *dsr_shadow; 1121 volatile unsigned char *cd_port; 1122 unsigned char *cd_shadow; 1123 1124 unsigned char dtr_mask; 1125 unsigned char ri_mask; 1126 unsigned char dsr_mask; 1127 unsigned char cd_mask; 1128}; 1129 1130static const struct control_pins e100_modem_pins[NR_PORTS] = 1131{ 1132 /* Ser 0 */ 1133 { 1134#ifdef CONFIG_ETRAX_SERIAL_PORT0 1135 E100_STRUCT_PORT(0,DTR), E100_STRUCT_SHADOW(0,DTR), 1136 E100_STRUCT_PORT(0,RI), E100_STRUCT_SHADOW(0,RI), 1137 E100_STRUCT_PORT(0,DSR), E100_STRUCT_SHADOW(0,DSR), 1138 E100_STRUCT_PORT(0,CD), E100_STRUCT_SHADOW(0,CD), 1139 E100_STRUCT_MASK(0,DTR), 1140 E100_STRUCT_MASK(0,RI), 1141 E100_STRUCT_MASK(0,DSR), 1142 E100_STRUCT_MASK(0,CD) 1143#else 1144 CONTROL_PINS_PORT_NOT_USED(0) 1145#endif 1146 }, 1147 1148 /* Ser 1 */ 1149 { 1150#ifdef CONFIG_ETRAX_SERIAL_PORT1 1151 E100_STRUCT_PORT(1,DTR), E100_STRUCT_SHADOW(1,DTR), 1152 E100_STRUCT_PORT(1,RI), E100_STRUCT_SHADOW(1,RI), 1153 E100_STRUCT_PORT(1,DSR), E100_STRUCT_SHADOW(1,DSR), 1154 E100_STRUCT_PORT(1,CD), E100_STRUCT_SHADOW(1,CD), 1155 E100_STRUCT_MASK(1,DTR), 1156 E100_STRUCT_MASK(1,RI), 1157 E100_STRUCT_MASK(1,DSR), 1158 E100_STRUCT_MASK(1,CD) 1159#else 1160 CONTROL_PINS_PORT_NOT_USED(1) 1161#endif 1162 }, 1163 1164 /* Ser 2 */ 1165 { 1166#ifdef CONFIG_ETRAX_SERIAL_PORT2 1167 E100_STRUCT_PORT(2,DTR), E100_STRUCT_SHADOW(2,DTR), 1168 E100_STRUCT_PORT(2,RI), E100_STRUCT_SHADOW(2,RI), 1169 E100_STRUCT_PORT(2,DSR), E100_STRUCT_SHADOW(2,DSR), 1170 E100_STRUCT_PORT(2,CD), E100_STRUCT_SHADOW(2,CD), 1171 E100_STRUCT_MASK(2,DTR), 1172 E100_STRUCT_MASK(2,RI), 1173 E100_STRUCT_MASK(2,DSR), 1174 E100_STRUCT_MASK(2,CD) 1175#else 1176 CONTROL_PINS_PORT_NOT_USED(2) 1177#endif 1178 }, 1179 1180 /* Ser 3 */ 1181 { 1182#ifdef CONFIG_ETRAX_SERIAL_PORT3 1183 E100_STRUCT_PORT(3,DTR), E100_STRUCT_SHADOW(3,DTR), 1184 E100_STRUCT_PORT(3,RI), E100_STRUCT_SHADOW(3,RI), 1185 E100_STRUCT_PORT(3,DSR), E100_STRUCT_SHADOW(3,DSR), 1186 E100_STRUCT_PORT(3,CD), E100_STRUCT_SHADOW(3,CD), 1187 E100_STRUCT_MASK(3,DTR), 1188 E100_STRUCT_MASK(3,RI), 1189 E100_STRUCT_MASK(3,DSR), 1190 E100_STRUCT_MASK(3,CD) 1191#else 1192 CONTROL_PINS_PORT_NOT_USED(3) 1193#endif 1194 } 1195}; 1196#else /* CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED */ 1197 1198/* All pins are on either PA or PB for each serial port */ 1199#define CONTROL_PINS_PORT_NOT_USED(line) \ 1200 &dummy_ser[line], &dummy_ser[line], \ 1201 DUMMY_DTR_MASK, DUMMY_RI_MASK, DUMMY_DSR_MASK, DUMMY_CD_MASK 1202 1203 1204struct control_pins 1205{ 1206 volatile unsigned char *port; 1207 unsigned char *shadow; 1208 1209 unsigned char dtr_mask; 1210 unsigned char ri_mask; 1211 unsigned char dsr_mask; 1212 unsigned char cd_mask; 1213}; 1214 1215#define dtr_port port 1216#define dtr_shadow shadow 1217#define ri_port port 1218#define ri_shadow shadow 1219#define dsr_port port 1220#define dsr_shadow shadow 1221#define cd_port port 1222#define cd_shadow shadow 1223 1224static const struct control_pins e100_modem_pins[NR_PORTS] = 1225{ 1226 /* Ser 0 */ 1227 { 1228#ifdef CONFIG_ETRAX_SERIAL_PORT0 1229 E100_STRUCT_PORT(0,DTR), E100_STRUCT_SHADOW(0,DTR), 1230 E100_STRUCT_MASK(0,DTR), 1231 E100_STRUCT_MASK(0,RI), 1232 E100_STRUCT_MASK(0,DSR), 1233 E100_STRUCT_MASK(0,CD) 1234#else 1235 CONTROL_PINS_PORT_NOT_USED(0) 1236#endif 1237 }, 1238 1239 /* Ser 1 */ 1240 { 1241#ifdef CONFIG_ETRAX_SERIAL_PORT1 1242 E100_STRUCT_PORT(1,DTR), E100_STRUCT_SHADOW(1,DTR), 1243 E100_STRUCT_MASK(1,DTR), 1244 E100_STRUCT_MASK(1,RI), 1245 E100_STRUCT_MASK(1,DSR), 1246 E100_STRUCT_MASK(1,CD) 1247#else 1248 CONTROL_PINS_PORT_NOT_USED(1) 1249#endif 1250 }, 1251 1252 /* Ser 2 */ 1253 { 1254#ifdef CONFIG_ETRAX_SERIAL_PORT2 1255 E100_STRUCT_PORT(2,DTR), E100_STRUCT_SHADOW(2,DTR), 1256 E100_STRUCT_MASK(2,DTR), 1257 E100_STRUCT_MASK(2,RI), 1258 E100_STRUCT_MASK(2,DSR), 1259 E100_STRUCT_MASK(2,CD) 1260#else 1261 CONTROL_PINS_PORT_NOT_USED(2) 1262#endif 1263 }, 1264 1265 /* Ser 3 */ 1266 { 1267#ifdef CONFIG_ETRAX_SERIAL_PORT3 1268 E100_STRUCT_PORT(3,DTR), E100_STRUCT_SHADOW(3,DTR), 1269 E100_STRUCT_MASK(3,DTR), 1270 E100_STRUCT_MASK(3,RI), 1271 E100_STRUCT_MASK(3,DSR), 1272 E100_STRUCT_MASK(3,CD) 1273#else 1274 CONTROL_PINS_PORT_NOT_USED(3) 1275#endif 1276 } 1277}; 1278#endif /* !CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED */ 1279 1280#define E100_RTS_MASK 0x20 1281#define E100_CTS_MASK 0x40 1282 1283/* All serial port signals are active low: 1284 * active = 0 -> 3.3V to RS-232 driver -> -12V on RS-232 level 1285 * inactive = 1 -> 0V to RS-232 driver -> +12V on RS-232 level 1286 * 1287 * These macros returns the pin value: 0=0V, >=1 = 3.3V on ETRAX chip 1288 */ 1289 1290/* Output */ 1291#define E100_RTS_GET(info) ((info)->rx_ctrl & E100_RTS_MASK) 1292/* Input */ 1293#define E100_CTS_GET(info) ((info)->port[REG_STATUS] & E100_CTS_MASK) 1294 1295/* These are typically PA or PB and 0 means 0V, 1 means 3.3V */ 1296/* Is an output */ 1297#define E100_DTR_GET(info) ((*e100_modem_pins[(info)->line].dtr_shadow) & e100_modem_pins[(info)->line].dtr_mask) 1298 1299/* Normally inputs */ 1300#define E100_RI_GET(info) ((*e100_modem_pins[(info)->line].ri_port) & e100_modem_pins[(info)->line].ri_mask) 1301#define E100_CD_GET(info) ((*e100_modem_pins[(info)->line].cd_port) & e100_modem_pins[(info)->line].cd_mask) 1302 1303/* Input */ 1304#define E100_DSR_GET(info) ((*e100_modem_pins[(info)->line].dsr_port) & e100_modem_pins[(info)->line].dsr_mask) 1305 1306 1307/* 1308 * tmp_buf is used as a temporary buffer by serial_write. We need to 1309 * lock it in case the memcpy_fromfs blocks while swapping in a page, 1310 * and some other program tries to do a serial write at the same time. 1311 * Since the lock will only come under contention when the system is 1312 * swapping and available memory is low, it makes sense to share one 1313 * buffer across all the serial ports, since it significantly saves 1314 * memory if large numbers of serial ports are open. 1315 */ 1316static unsigned char *tmp_buf; 1317static DEFINE_MUTEX(tmp_buf_mutex); 1318 1319/* Calculate the chartime depending on baudrate, numbor of bits etc. */ 1320static void update_char_time(struct e100_serial * info) 1321{ 1322 tcflag_t cflags = info->tty->termios->c_cflag; 1323 int bits; 1324 1325 /* calc. number of bits / data byte */ 1326 /* databits + startbit and 1 stopbit */ 1327 if ((cflags & CSIZE) == CS7) 1328 bits = 9; 1329 else 1330 bits = 10; 1331 1332 if (cflags & CSTOPB) /* 2 stopbits ? */ 1333 bits++; 1334 1335 if (cflags & PARENB) /* parity bit ? */ 1336 bits++; 1337 1338 /* calc timeout */ 1339 info->char_time_usec = ((bits * 1000000) / info->baud) + 1; 1340 info->flush_time_usec = 4*info->char_time_usec; 1341 if (info->flush_time_usec < MIN_FLUSH_TIME_USEC) 1342 info->flush_time_usec = MIN_FLUSH_TIME_USEC; 1343 1344} 1345 1346/* 1347 * This function maps from the Bxxxx defines in asm/termbits.h into real 1348 * baud rates. 1349 */ 1350 1351static int 1352cflag_to_baud(unsigned int cflag) 1353{ 1354 static int baud_table[] = { 1355 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400, 1356 4800, 9600, 19200, 38400 }; 1357 1358 static int ext_baud_table[] = { 1359 0, 57600, 115200, 230400, 460800, 921600, 1843200, 6250000, 1360 0, 0, 0, 0, 0, 0, 0, 0 }; 1361 1362 if (cflag & CBAUDEX) 1363 return ext_baud_table[(cflag & CBAUD) & ~CBAUDEX]; 1364 else 1365 return baud_table[cflag & CBAUD]; 1366} 1367 1368/* and this maps to an etrax100 hardware baud constant */ 1369 1370static unsigned char 1371cflag_to_etrax_baud(unsigned int cflag) 1372{ 1373 char retval; 1374 1375 static char baud_table[] = { 1376 -1, -1, -1, -1, -1, -1, -1, 0, 1, 2, -1, 3, 4, 5, 6, 7 }; 1377 1378 static char ext_baud_table[] = { 1379 -1, 8, 9, 10, 11, 12, 13, 14, -1, -1, -1, -1, -1, -1, -1, -1 }; 1380 1381 if (cflag & CBAUDEX) 1382 retval = ext_baud_table[(cflag & CBAUD) & ~CBAUDEX]; 1383 else 1384 retval = baud_table[cflag & CBAUD]; 1385 1386 if (retval < 0) { 1387 printk(KERN_WARNING "serdriver tried setting invalid baud rate, flags %x.\n", cflag); 1388 retval = 5; /* choose default 9600 instead */ 1389 } 1390 1391 return retval | (retval << 4); /* choose same for both TX and RX */ 1392} 1393 1394 1395/* Various static support functions */ 1396 1397/* Functions to set or clear DTR/RTS on the requested line */ 1398/* It is complicated by the fact that RTS is a serial port register, while 1399 * DTR might not be implemented in the HW at all, and if it is, it can be on 1400 * any general port. 1401 */ 1402 1403 1404static inline void 1405e100_dtr(struct e100_serial *info, int set) 1406{ 1407#ifndef CONFIG_SVINTO_SIM 1408 unsigned char mask = e100_modem_pins[info->line].dtr_mask; 1409 1410#ifdef SERIAL_DEBUG_IO 1411 printk("ser%i dtr %i mask: 0x%02X\n", info->line, set, mask); 1412 printk("ser%i shadow before 0x%02X get: %i\n", 1413 info->line, *e100_modem_pins[info->line].dtr_shadow, 1414 E100_DTR_GET(info)); 1415#endif 1416 /* DTR is active low */ 1417 { 1418 unsigned long flags; 1419 1420 save_flags(flags); 1421 cli(); 1422 *e100_modem_pins[info->line].dtr_shadow &= ~mask; 1423 *e100_modem_pins[info->line].dtr_shadow |= (set ? 0 : mask); 1424 *e100_modem_pins[info->line].dtr_port = *e100_modem_pins[info->line].dtr_shadow; 1425 restore_flags(flags); 1426 } 1427 1428#ifdef SERIAL_DEBUG_IO 1429 printk("ser%i shadow after 0x%02X get: %i\n", 1430 info->line, *e100_modem_pins[info->line].dtr_shadow, 1431 E100_DTR_GET(info)); 1432#endif 1433#endif 1434} 1435 1436/* set = 0 means 3.3V on the pin, bitvalue: 0=active, 1=inactive 1437 * 0=0V , 1=3.3V 1438 */ 1439static inline void 1440e100_rts(struct e100_serial *info, int set) 1441{ 1442#ifndef CONFIG_SVINTO_SIM 1443 unsigned long flags; 1444 save_flags(flags); 1445 cli(); 1446 info->rx_ctrl &= ~E100_RTS_MASK; 1447 info->rx_ctrl |= (set ? 0 : E100_RTS_MASK); /* RTS is active low */ 1448 info->port[REG_REC_CTRL] = info->rx_ctrl; 1449 restore_flags(flags); 1450#ifdef SERIAL_DEBUG_IO 1451 printk("ser%i rts %i\n", info->line, set); 1452#endif 1453#endif 1454} 1455 1456 1457/* If this behaves as a modem, RI and CD is an output */ 1458static inline void 1459e100_ri_out(struct e100_serial *info, int set) 1460{ 1461#ifndef CONFIG_SVINTO_SIM 1462 /* RI is active low */ 1463 { 1464 unsigned char mask = e100_modem_pins[info->line].ri_mask; 1465 unsigned long flags; 1466 1467 save_flags(flags); 1468 cli(); 1469 *e100_modem_pins[info->line].ri_shadow &= ~mask; 1470 *e100_modem_pins[info->line].ri_shadow |= (set ? 0 : mask); 1471 *e100_modem_pins[info->line].ri_port = *e100_modem_pins[info->line].ri_shadow; 1472 restore_flags(flags); 1473 } 1474#endif 1475} 1476static inline void 1477e100_cd_out(struct e100_serial *info, int set) 1478{ 1479#ifndef CONFIG_SVINTO_SIM 1480 /* CD is active low */ 1481 { 1482 unsigned char mask = e100_modem_pins[info->line].cd_mask; 1483 unsigned long flags; 1484 1485 save_flags(flags); 1486 cli(); 1487 *e100_modem_pins[info->line].cd_shadow &= ~mask; 1488 *e100_modem_pins[info->line].cd_shadow |= (set ? 0 : mask); 1489 *e100_modem_pins[info->line].cd_port = *e100_modem_pins[info->line].cd_shadow; 1490 restore_flags(flags); 1491 } 1492#endif 1493} 1494 1495static inline void 1496e100_disable_rx(struct e100_serial *info) 1497{ 1498#ifndef CONFIG_SVINTO_SIM 1499 /* disable the receiver */ 1500 info->port[REG_REC_CTRL] = 1501 (info->rx_ctrl &= ~IO_MASK(R_SERIAL0_REC_CTRL, rec_enable)); 1502#endif 1503} 1504 1505static inline void 1506e100_enable_rx(struct e100_serial *info) 1507{ 1508#ifndef CONFIG_SVINTO_SIM 1509 /* enable the receiver */ 1510 info->port[REG_REC_CTRL] = 1511 (info->rx_ctrl |= IO_MASK(R_SERIAL0_REC_CTRL, rec_enable)); 1512#endif 1513} 1514 1515/* the rx DMA uses both the dma_descr and the dma_eop interrupts */ 1516 1517static inline void 1518e100_disable_rxdma_irq(struct e100_serial *info) 1519{ 1520#ifdef SERIAL_DEBUG_INTR 1521 printk("rxdma_irq(%d): 0\n",info->line); 1522#endif 1523 DINTR1(DEBUG_LOG(info->line,"IRQ disable_rxdma_irq %i\n", info->line)); 1524 *R_IRQ_MASK2_CLR = (info->irq << 2) | (info->irq << 3); 1525} 1526 1527static inline void 1528e100_enable_rxdma_irq(struct e100_serial *info) 1529{ 1530#ifdef SERIAL_DEBUG_INTR 1531 printk("rxdma_irq(%d): 1\n",info->line); 1532#endif 1533 DINTR1(DEBUG_LOG(info->line,"IRQ enable_rxdma_irq %i\n", info->line)); 1534 *R_IRQ_MASK2_SET = (info->irq << 2) | (info->irq << 3); 1535} 1536 1537/* the tx DMA uses only dma_descr interrupt */ 1538 1539static void e100_disable_txdma_irq(struct e100_serial *info) 1540{ 1541#ifdef SERIAL_DEBUG_INTR 1542 printk("txdma_irq(%d): 0\n",info->line); 1543#endif 1544 DINTR1(DEBUG_LOG(info->line,"IRQ disable_txdma_irq %i\n", info->line)); 1545 *R_IRQ_MASK2_CLR = info->irq; 1546} 1547 1548static void e100_enable_txdma_irq(struct e100_serial *info) 1549{ 1550#ifdef SERIAL_DEBUG_INTR 1551 printk("txdma_irq(%d): 1\n",info->line); 1552#endif 1553 DINTR1(DEBUG_LOG(info->line,"IRQ enable_txdma_irq %i\n", info->line)); 1554 *R_IRQ_MASK2_SET = info->irq; 1555} 1556 1557static void e100_disable_txdma_channel(struct e100_serial *info) 1558{ 1559 unsigned long flags; 1560 1561 /* Disable output DMA channel for the serial port in question 1562 * ( set to something other then serialX) 1563 */ 1564 save_flags(flags); 1565 cli(); 1566 DFLOW(DEBUG_LOG(info->line, "disable_txdma_channel %i\n", info->line)); 1567 if (info->line == 0) { 1568 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma6)) == 1569 IO_STATE(R_GEN_CONFIG, dma6, serial0)) { 1570 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma6); 1571 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma6, unused); 1572 } 1573 } else if (info->line == 1) { 1574 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma8)) == 1575 IO_STATE(R_GEN_CONFIG, dma8, serial1)) { 1576 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma8); 1577 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma8, usb); 1578 } 1579 } else if (info->line == 2) { 1580 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma2)) == 1581 IO_STATE(R_GEN_CONFIG, dma2, serial2)) { 1582 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma2); 1583 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma2, par0); 1584 } 1585 } else if (info->line == 3) { 1586 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma4)) == 1587 IO_STATE(R_GEN_CONFIG, dma4, serial3)) { 1588 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma4); 1589 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma4, par1); 1590 } 1591 } 1592 *R_GEN_CONFIG = genconfig_shadow; 1593 restore_flags(flags); 1594} 1595 1596 1597static void e100_enable_txdma_channel(struct e100_serial *info) 1598{ 1599 unsigned long flags; 1600 1601 save_flags(flags); 1602 cli(); 1603 DFLOW(DEBUG_LOG(info->line, "enable_txdma_channel %i\n", info->line)); 1604 /* Enable output DMA channel for the serial port in question */ 1605 if (info->line == 0) { 1606 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma6); 1607 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma6, serial0); 1608 } else if (info->line == 1) { 1609 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma8); 1610 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma8, serial1); 1611 } else if (info->line == 2) { 1612 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma2); 1613 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma2, serial2); 1614 } else if (info->line == 3) { 1615 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma4); 1616 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma4, serial3); 1617 } 1618 *R_GEN_CONFIG = genconfig_shadow; 1619 restore_flags(flags); 1620} 1621 1622static void e100_disable_rxdma_channel(struct e100_serial *info) 1623{ 1624 unsigned long flags; 1625 1626 /* Disable input DMA channel for the serial port in question 1627 * ( set to something other then serialX) 1628 */ 1629 save_flags(flags); 1630 cli(); 1631 if (info->line == 0) { 1632 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma7)) == 1633 IO_STATE(R_GEN_CONFIG, dma7, serial0)) { 1634 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma7); 1635 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma7, unused); 1636 } 1637 } else if (info->line == 1) { 1638 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma9)) == 1639 IO_STATE(R_GEN_CONFIG, dma9, serial1)) { 1640 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma9); 1641 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma9, usb); 1642 } 1643 } else if (info->line == 2) { 1644 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma3)) == 1645 IO_STATE(R_GEN_CONFIG, dma3, serial2)) { 1646 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma3); 1647 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma3, par0); 1648 } 1649 } else if (info->line == 3) { 1650 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma5)) == 1651 IO_STATE(R_GEN_CONFIG, dma5, serial3)) { 1652 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma5); 1653 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma5, par1); 1654 } 1655 } 1656 *R_GEN_CONFIG = genconfig_shadow; 1657 restore_flags(flags); 1658} 1659 1660 1661static void e100_enable_rxdma_channel(struct e100_serial *info) 1662{ 1663 unsigned long flags; 1664 1665 save_flags(flags); 1666 cli(); 1667 /* Enable input DMA channel for the serial port in question */ 1668 if (info->line == 0) { 1669 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma7); 1670 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma7, serial0); 1671 } else if (info->line == 1) { 1672 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma9); 1673 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma9, serial1); 1674 } else if (info->line == 2) { 1675 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma3); 1676 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma3, serial2); 1677 } else if (info->line == 3) { 1678 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma5); 1679 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma5, serial3); 1680 } 1681 *R_GEN_CONFIG = genconfig_shadow; 1682 restore_flags(flags); 1683} 1684 1685#ifdef SERIAL_HANDLE_EARLY_ERRORS 1686/* in order to detect and fix errors on the first byte 1687 we have to use the serial interrupts as well. */ 1688 1689static inline void 1690e100_disable_serial_data_irq(struct e100_serial *info) 1691{ 1692#ifdef SERIAL_DEBUG_INTR 1693 printk("ser_irq(%d): 0\n",info->line); 1694#endif 1695 DINTR1(DEBUG_LOG(info->line,"IRQ disable data_irq %i\n", info->line)); 1696 *R_IRQ_MASK1_CLR = (1U << (8+2*info->line)); 1697} 1698 1699static inline void 1700e100_enable_serial_data_irq(struct e100_serial *info) 1701{ 1702#ifdef SERIAL_DEBUG_INTR 1703 printk("ser_irq(%d): 1\n",info->line); 1704 printk("**** %d = %d\n", 1705 (8+2*info->line), 1706 (1U << (8+2*info->line))); 1707#endif 1708 DINTR1(DEBUG_LOG(info->line,"IRQ enable data_irq %i\n", info->line)); 1709 *R_IRQ_MASK1_SET = (1U << (8+2*info->line)); 1710} 1711#endif 1712 1713static inline void 1714e100_disable_serial_tx_ready_irq(struct e100_serial *info) 1715{ 1716#ifdef SERIAL_DEBUG_INTR 1717 printk("ser_tx_irq(%d): 0\n",info->line); 1718#endif 1719 DINTR1(DEBUG_LOG(info->line,"IRQ disable ready_irq %i\n", info->line)); 1720 *R_IRQ_MASK1_CLR = (1U << (8+1+2*info->line)); 1721} 1722 1723static inline void 1724e100_enable_serial_tx_ready_irq(struct e100_serial *info) 1725{ 1726#ifdef SERIAL_DEBUG_INTR 1727 printk("ser_tx_irq(%d): 1\n",info->line); 1728 printk("**** %d = %d\n", 1729 (8+1+2*info->line), 1730 (1U << (8+1+2*info->line))); 1731#endif 1732 DINTR2(DEBUG_LOG(info->line,"IRQ enable ready_irq %i\n", info->line)); 1733 *R_IRQ_MASK1_SET = (1U << (8+1+2*info->line)); 1734} 1735 1736static inline void e100_enable_rx_irq(struct e100_serial *info) 1737{ 1738 if (info->uses_dma_in) 1739 e100_enable_rxdma_irq(info); 1740 else 1741 e100_enable_serial_data_irq(info); 1742} 1743static inline void e100_disable_rx_irq(struct e100_serial *info) 1744{ 1745 if (info->uses_dma_in) 1746 e100_disable_rxdma_irq(info); 1747 else 1748 e100_disable_serial_data_irq(info); 1749} 1750 1751#if defined(CONFIG_ETRAX_RS485) 1752/* Enable RS-485 mode on selected port. This is UGLY. */ 1753static int 1754e100_enable_rs485(struct tty_struct *tty,struct rs485_control *r) 1755{ 1756 struct e100_serial * info = (struct e100_serial *)tty->driver_data; 1757 1758#if defined(CONFIG_ETRAX_RS485_ON_PA) 1759 *R_PORT_PA_DATA = port_pa_data_shadow |= (1 << rs485_pa_bit); 1760#endif 1761#if defined(CONFIG_ETRAX_RS485_ON_PORT_G) 1762 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow, 1763 rs485_port_g_bit, 1); 1764#endif 1765#if defined(CONFIG_ETRAX_RS485_LTC1387) 1766 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow, 1767 CONFIG_ETRAX_RS485_LTC1387_DXEN_PORT_G_BIT, 1); 1768 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow, 1769 CONFIG_ETRAX_RS485_LTC1387_RXEN_PORT_G_BIT, 1); 1770#endif 1771 1772 info->rs485.rts_on_send = 0x01 & r->rts_on_send; 1773 info->rs485.rts_after_sent = 0x01 & r->rts_after_sent; 1774 if (r->delay_rts_before_send >= 1000) 1775 info->rs485.delay_rts_before_send = 1000; 1776 else 1777 info->rs485.delay_rts_before_send = r->delay_rts_before_send; 1778 info->rs485.enabled = r->enabled; 1779/* printk("rts: on send = %i, after = %i, enabled = %i", 1780 info->rs485.rts_on_send, 1781 info->rs485.rts_after_sent, 1782 info->rs485.enabled 1783 ); 1784*/ 1785 return 0; 1786} 1787 1788static int 1789e100_write_rs485(struct tty_struct *tty, int from_user, 1790 const unsigned char *buf, int count) 1791{ 1792 struct e100_serial * info = (struct e100_serial *)tty->driver_data; 1793 int old_enabled = info->rs485.enabled; 1794 1795 /* rs485 is always implicitly enabled if we're using the ioctl() 1796 * but it doesn't have to be set in the rs485_control 1797 * (to be backward compatible with old apps) 1798 * So we store, set and restore it. 1799 */ 1800 info->rs485.enabled = 1; 1801 /* rs_write now deals with RS485 if enabled */ 1802 count = rs_write(tty, from_user, buf, count); 1803 info->rs485.enabled = old_enabled; 1804 return count; 1805} 1806 1807#ifdef CONFIG_ETRAX_FAST_TIMER 1808/* Timer function to toggle RTS when using FAST_TIMER */ 1809static void rs485_toggle_rts_timer_function(unsigned long data) 1810{ 1811 struct e100_serial *info = (struct e100_serial *)data; 1812 1813 fast_timers_rs485[info->line].function = NULL; 1814 e100_rts(info, info->rs485.rts_after_sent); 1815#if defined(CONFIG_ETRAX_RS485_DISABLE_RECEIVER) 1816 e100_enable_rx(info); 1817 e100_enable_rx_irq(info); 1818#endif 1819} 1820#endif 1821#endif /* CONFIG_ETRAX_RS485 */ 1822 1823/* 1824 * ------------------------------------------------------------ 1825 * rs_stop() and rs_start() 1826 * 1827 * This routines are called before setting or resetting tty->stopped. 1828 * They enable or disable transmitter using the XOFF registers, as necessary. 1829 * ------------------------------------------------------------ 1830 */ 1831 1832static void 1833rs_stop(struct tty_struct *tty) 1834{ 1835 struct e100_serial *info = (struct e100_serial *)tty->driver_data; 1836 if (info) { 1837 unsigned long flags; 1838 unsigned long xoff; 1839 1840 save_flags(flags); cli(); 1841 DFLOW(DEBUG_LOG(info->line, "XOFF rs_stop xmit %i\n", 1842 CIRC_CNT(info->xmit.head, 1843 info->xmit.tail,SERIAL_XMIT_SIZE))); 1844 1845 xoff = IO_FIELD(R_SERIAL0_XOFF, xoff_char, STOP_CHAR(info->tty)); 1846 xoff |= IO_STATE(R_SERIAL0_XOFF, tx_stop, stop); 1847 if (tty->termios->c_iflag & IXON ) { 1848 xoff |= IO_STATE(R_SERIAL0_XOFF, auto_xoff, enable); 1849 } 1850 1851 *((unsigned long *)&info->port[REG_XOFF]) = xoff; 1852 restore_flags(flags); 1853 } 1854} 1855 1856static void 1857rs_start(struct tty_struct *tty) 1858{ 1859 struct e100_serial *info = (struct e100_serial *)tty->driver_data; 1860 if (info) { 1861 unsigned long flags; 1862 unsigned long xoff; 1863 1864 save_flags(flags); cli(); 1865 DFLOW(DEBUG_LOG(info->line, "XOFF rs_start xmit %i\n", 1866 CIRC_CNT(info->xmit.head, 1867 info->xmit.tail,SERIAL_XMIT_SIZE))); 1868 xoff = IO_FIELD(R_SERIAL0_XOFF, xoff_char, STOP_CHAR(tty)); 1869 xoff |= IO_STATE(R_SERIAL0_XOFF, tx_stop, enable); 1870 if (tty->termios->c_iflag & IXON ) { 1871 xoff |= IO_STATE(R_SERIAL0_XOFF, auto_xoff, enable); 1872 } 1873 1874 *((unsigned long *)&info->port[REG_XOFF]) = xoff; 1875 if (!info->uses_dma_out && 1876 info->xmit.head != info->xmit.tail && info->xmit.buf) 1877 e100_enable_serial_tx_ready_irq(info); 1878 1879 restore_flags(flags); 1880 } 1881} 1882 1883/* 1884 * ---------------------------------------------------------------------- 1885 * 1886 * Here starts the interrupt handling routines. All of the following 1887 * subroutines are declared as inline and are folded into 1888 * rs_interrupt(). They were separated out for readability's sake. 1889 * 1890 * Note: rs_interrupt() is a "fast" interrupt, which means that it 1891 * runs with interrupts turned off. People who may want to modify 1892 * rs_interrupt() should try to keep the interrupt handler as fast as 1893 * possible. After you are done making modifications, it is not a bad 1894 * idea to do: 1895 * 1896 * gcc -S -DKERNEL -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer serial.c 1897 * 1898 * and look at the resulting assemble code in serial.s. 1899 * 1900 * - Ted Ts'o (tytso@mit.edu), 7-Mar-93 1901 * ----------------------------------------------------------------------- 1902 */ 1903 1904/* 1905 * This routine is used by the interrupt handler to schedule 1906 * processing in the software interrupt portion of the driver. 1907 */ 1908static void rs_sched_event(struct e100_serial *info, int event) 1909{ 1910 if (info->event & (1 << event)) 1911 return; 1912 info->event |= 1 << event; 1913 schedule_work(&info->work); 1914} 1915 1916/* The output DMA channel is free - use it to send as many chars as possible 1917 * NOTES: 1918 * We don't pay attention to info->x_char, which means if the TTY wants to 1919 * use XON/XOFF it will set info->x_char but we won't send any X char! 1920 * 1921 * To implement this, we'd just start a DMA send of 1 byte pointing at a 1922 * buffer containing the X char, and skip updating xmit. We'd also have to 1923 * check if the last sent char was the X char when we enter this function 1924 * the next time, to avoid updating xmit with the sent X value. 1925 */ 1926 1927static void 1928transmit_chars_dma(struct e100_serial *info) 1929{ 1930 unsigned int c, sentl; 1931 struct etrax_dma_descr *descr; 1932 1933#ifdef CONFIG_SVINTO_SIM 1934 /* This will output too little if tail is not 0 always since 1935 * we don't reloop to send the other part. Anyway this SHOULD be a 1936 * no-op - transmit_chars_dma would never really be called during sim 1937 * since rs_write does not write into the xmit buffer then. 1938 */ 1939 if (info->xmit.tail) 1940 printk("Error in serial.c:transmit_chars-dma(), tail!=0\n"); 1941 if (info->xmit.head != info->xmit.tail) { 1942 SIMCOUT(info->xmit.buf + info->xmit.tail, 1943 CIRC_CNT(info->xmit.head, 1944 info->xmit.tail, 1945 SERIAL_XMIT_SIZE)); 1946 info->xmit.head = info->xmit.tail; /* move back head */ 1947 info->tr_running = 0; 1948 } 1949 return; 1950#endif 1951 /* acknowledge both dma_descr and dma_eop irq in R_DMA_CHx_CLR_INTR */ 1952 *info->oclrintradr = 1953 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) | 1954 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do); 1955 1956#ifdef SERIAL_DEBUG_INTR 1957 if (info->line == SERIAL_DEBUG_LINE) 1958 printk("tc\n"); 1959#endif 1960 if (!info->tr_running) { 1961 /* weirdo... we shouldn't get here! */ 1962 printk(KERN_WARNING "Achtung: transmit_chars_dma with !tr_running\n"); 1963 return; 1964 } 1965 1966 descr = &info->tr_descr; 1967 1968 /* first get the amount of bytes sent during the last DMA transfer, 1969 and update xmit accordingly */ 1970 1971 /* if the stop bit was not set, all data has been sent */ 1972 if (!(descr->status & d_stop)) { 1973 sentl = descr->sw_len; 1974 } else 1975 /* otherwise we find the amount of data sent here */ 1976 sentl = descr->hw_len; 1977 1978 DFLOW(DEBUG_LOG(info->line, "TX %i done\n", sentl)); 1979 1980 /* update stats */ 1981 info->icount.tx += sentl; 1982 1983 /* update xmit buffer */ 1984 info->xmit.tail = (info->xmit.tail + sentl) & (SERIAL_XMIT_SIZE - 1); 1985 1986 /* if there is only a few chars left in the buf, wake up the blocked 1987 write if any */ 1988 if (CIRC_CNT(info->xmit.head, 1989 info->xmit.tail, 1990 SERIAL_XMIT_SIZE) < WAKEUP_CHARS) 1991 rs_sched_event(info, RS_EVENT_WRITE_WAKEUP); 1992 1993 /* find out the largest amount of consecutive bytes we want to send now */ 1994 1995 c = CIRC_CNT_TO_END(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE); 1996 1997 /* Don't send all in one DMA transfer - divide it so we wake up 1998 * application before all is sent 1999 */ 2000 2001 if (c >= 4*WAKEUP_CHARS) 2002 c = c/2; 2003 2004 if (c <= 0) { 2005 /* our job here is done, don't schedule any new DMA transfer */ 2006 info->tr_running = 0; 2007 2008#if defined(CONFIG_ETRAX_RS485) && defined(CONFIG_ETRAX_FAST_TIMER) 2009 if (info->rs485.enabled) { 2010 /* Set a short timer to toggle RTS */ 2011 start_one_shot_timer(&fast_timers_rs485[info->line], 2012 rs485_toggle_rts_timer_function, 2013 (unsigned long)info, 2014 info->char_time_usec*2, 2015 "RS-485"); 2016 } 2017#endif /* RS485 */ 2018 return; 2019 } 2020 2021 /* ok we can schedule a dma send of c chars starting at info->xmit.tail */ 2022 /* set up the descriptor correctly for output */ 2023 DFLOW(DEBUG_LOG(info->line, "TX %i\n", c)); 2024 descr->ctrl = d_int | d_eol | d_wait; /* Wait needed for tty_wait_until_sent() */ 2025 descr->sw_len = c; 2026 descr->buf = virt_to_phys(info->xmit.buf + info->xmit.tail); 2027 descr->status = 0; 2028 2029 *info->ofirstadr = virt_to_phys(descr); /* write to R_DMAx_FIRST */ 2030 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, start); 2031 2032 /* DMA is now running (hopefully) */ 2033} /* transmit_chars_dma */ 2034 2035static void 2036start_transmit(struct e100_serial *info) 2037{ 2038 2039 info->tr_descr.sw_len = 0; 2040 info->tr_descr.hw_len = 0; 2041 info->tr_descr.status = 0; 2042 info->tr_running = 1; 2043 if (info->uses_dma_out) 2044 transmit_chars_dma(info); 2045 else 2046 e100_enable_serial_tx_ready_irq(info); 2047} /* start_transmit */ 2048 2049#ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER 2050static int serial_fast_timer_started = 0; 2051static int serial_fast_timer_expired = 0; 2052static void flush_timeout_function(unsigned long data); 2053#define START_FLUSH_FAST_TIMER_TIME(info, string, usec) {\ 2054 unsigned long timer_flags; \ 2055 save_flags(timer_flags); \ 2056 cli(); \ 2057 if (fast_timers[info->line].function == NULL) { \ 2058 serial_fast_timer_started++; \ 2059 TIMERD(DEBUG_LOG(info->line, "start_timer %i ", info->line)); \ 2060 TIMERD(DEBUG_LOG(info->line, "num started: %i\n", serial_fast_timer_started)); \ 2061 start_one_shot_timer(&fast_timers[info->line], \ 2062 flush_timeout_function, \ 2063 (unsigned long)info, \ 2064 (usec), \ 2065 string); \ 2066 } \ 2067 else { \ 2068 TIMERD(DEBUG_LOG(info->line, "timer %i already running\n", info->line)); \ 2069 } \ 2070 restore_flags(timer_flags); \ 2071} 2072#define START_FLUSH_FAST_TIMER(info, string) START_FLUSH_FAST_TIMER_TIME(info, string, info->flush_time_usec) 2073 2074#else 2075#define START_FLUSH_FAST_TIMER_TIME(info, string, usec) 2076#define START_FLUSH_FAST_TIMER(info, string) 2077#endif 2078 2079static struct etrax_recv_buffer * 2080alloc_recv_buffer(unsigned int size) 2081{ 2082 struct etrax_recv_buffer *buffer; 2083 2084 if (!(buffer = kmalloc(sizeof *buffer + size, GFP_ATOMIC))) 2085 return NULL; 2086 2087 buffer->next = NULL; 2088 buffer->length = 0; 2089 buffer->error = TTY_NORMAL; 2090 2091 return buffer; 2092} 2093 2094static void 2095append_recv_buffer(struct e100_serial *info, struct etrax_recv_buffer *buffer) 2096{ 2097 unsigned long flags; 2098 2099 save_flags(flags); 2100 cli(); 2101 2102 if (!info->first_recv_buffer) 2103 info->first_recv_buffer = buffer; 2104 else 2105 info->last_recv_buffer->next = buffer; 2106 2107 info->last_recv_buffer = buffer; 2108 2109 info->recv_cnt += buffer->length; 2110 if (info->recv_cnt > info->max_recv_cnt) 2111 info->max_recv_cnt = info->recv_cnt; 2112 2113 restore_flags(flags); 2114} 2115 2116static int 2117add_char_and_flag(struct e100_serial *info, unsigned char data, unsigned char flag) 2118{ 2119 struct etrax_recv_buffer *buffer; 2120 if (info->uses_dma_in) { 2121 if (!(buffer = alloc_recv_buffer(4))) 2122 return 0; 2123 2124 buffer->length = 1; 2125 buffer->error = flag; 2126 buffer->buffer[0] = data; 2127 2128 append_recv_buffer(info, buffer); 2129 2130 info->icount.rx++; 2131 } else { 2132 struct tty_struct *tty = info->tty; 2133 *tty->flip.char_buf_ptr = data; 2134 *tty->flip.flag_buf_ptr = flag; 2135 tty->flip.flag_buf_ptr++; 2136 tty->flip.char_buf_ptr++; 2137 tty->flip.count++; 2138 info->icount.rx++; 2139 } 2140 2141 return 1; 2142} 2143 2144static unsigned int handle_descr_data(struct e100_serial *info, 2145 struct etrax_dma_descr *descr, 2146 unsigned int recvl) 2147{ 2148 struct etrax_recv_buffer *buffer = phys_to_virt(descr->buf) - sizeof *buffer; 2149 2150 if (info->recv_cnt + recvl > 65536) { 2151 printk(KERN_CRIT 2152 "%s: Too much pending incoming serial data! Dropping %u bytes.\n", __FUNCTION__, recvl); 2153 return 0; 2154 } 2155 2156 buffer->length = recvl; 2157 2158 if (info->errorcode == ERRCODE_SET_BREAK) 2159 buffer->error = TTY_BREAK; 2160 info->errorcode = 0; 2161 2162 append_recv_buffer(info, buffer); 2163 2164 if (!(buffer = alloc_recv_buffer(SERIAL_DESCR_BUF_SIZE))) 2165 panic("%s: Failed to allocate memory for receive buffer!\n", __FUNCTION__); 2166 2167 descr->buf = virt_to_phys(buffer->buffer); 2168 2169 return recvl; 2170} 2171 2172static unsigned int handle_all_descr_data(struct e100_serial *info) 2173{ 2174 struct etrax_dma_descr *descr; 2175 unsigned int recvl; 2176 unsigned int ret = 0; 2177 2178 while (1) 2179 { 2180 descr = &info->rec_descr[info->cur_rec_descr]; 2181 2182 if (descr == phys_to_virt(*info->idescradr)) 2183 break; 2184 2185 if (++info->cur_rec_descr == SERIAL_RECV_DESCRIPTORS) 2186 info->cur_rec_descr = 0; 2187 2188 /* find out how many bytes were read */ 2189 2190 /* if the eop bit was not set, all data has been received */ 2191 if (!(descr->status & d_eop)) { 2192 recvl = descr->sw_len; 2193 } else { 2194 /* otherwise we find the amount of data received here */ 2195 recvl = descr->hw_len; 2196 } 2197 2198 /* Reset the status information */ 2199 descr->status = 0; 2200 2201 DFLOW( DEBUG_LOG(info->line, "RX %lu\n", recvl); 2202 if (info->tty->stopped) { 2203 unsigned char *buf = phys_to_virt(descr->buf); 2204 DEBUG_LOG(info->line, "rx 0x%02X\n", buf[0]); 2205 DEBUG_LOG(info->line, "rx 0x%02X\n", buf[1]); 2206 DEBUG_LOG(info->line, "rx 0x%02X\n", buf[2]); 2207 } 2208 ); 2209 2210 /* update stats */ 2211 info->icount.rx += recvl; 2212 2213 ret += handle_descr_data(info, descr, recvl); 2214 } 2215 2216 return ret; 2217} 2218 2219static void receive_chars_dma(struct e100_serial *info) 2220{ 2221 struct tty_struct *tty; 2222 unsigned char rstat; 2223 2224#ifdef CONFIG_SVINTO_SIM 2225 /* No receive in the simulator. Will probably be when the rest of 2226 * the serial interface works, and this piece will just be removed. 2227 */ 2228 return; 2229#endif 2230 2231 /* Acknowledge both dma_descr and dma_eop irq in R_DMA_CHx_CLR_INTR */ 2232 *info->iclrintradr = 2233 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) | 2234 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do); 2235 2236 tty = info->tty; 2237 if (!tty) /* Something wrong... */ 2238 return; 2239 2240#ifdef SERIAL_HANDLE_EARLY_ERRORS 2241 if (info->uses_dma_in) 2242 e100_enable_serial_data_irq(info); 2243#endif 2244 2245 if (info->errorcode == ERRCODE_INSERT_BREAK) 2246 add_char_and_flag(info, '\0', TTY_BREAK); 2247 2248 handle_all_descr_data(info); 2249 2250 /* Read the status register to detect errors */ 2251 rstat = info->port[REG_STATUS]; 2252 if (rstat & IO_MASK(R_SERIAL0_STATUS, xoff_detect) ) { 2253 DFLOW(DEBUG_LOG(info->line, "XOFF detect stat %x\n", rstat)); 2254 } 2255 2256 if (rstat & SER_ERROR_MASK) { 2257 /* If we got an error, we must reset it by reading the 2258 * data_in field 2259 */ 2260 unsigned char data = info->port[REG_DATA]; 2261 2262 PROCSTAT(ser_stat[info->line].errors_cnt++); 2263 DEBUG_LOG(info->line, "#dERR: s d 0x%04X\n", 2264 ((rstat & SER_ERROR_MASK) << 8) | data); 2265 2266 if (rstat & SER_PAR_ERR_MASK) 2267 add_char_and_flag(info, data, TTY_PARITY); 2268 else if (rstat & SER_OVERRUN_MASK) 2269 add_char_and_flag(info, data, TTY_OVERRUN); 2270 else if (rstat & SER_FRAMING_ERR_MASK) 2271 add_char_and_flag(info, data, TTY_FRAME); 2272 } 2273 2274 START_FLUSH_FAST_TIMER(info, "receive_chars"); 2275 2276 /* Restart the receiving DMA */ 2277 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, restart); 2278} 2279 2280static int start_recv_dma(struct e100_serial *info) 2281{ 2282 struct etrax_dma_descr *descr = info->rec_descr; 2283 struct etrax_recv_buffer *buffer; 2284 int i; 2285 2286 /* Set up the receiving descriptors */ 2287 for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++) { 2288 if (!(buffer = alloc_recv_buffer(SERIAL_DESCR_BUF_SIZE))) 2289 panic("%s: Failed to allocate memory for receive buffer!\n", __FUNCTION__); 2290 2291 descr[i].ctrl = d_int; 2292 descr[i].buf = virt_to_phys(buffer->buffer); 2293 descr[i].sw_len = SERIAL_DESCR_BUF_SIZE; 2294 descr[i].hw_len = 0; 2295 descr[i].status = 0; 2296 descr[i].next = virt_to_phys(&descr[i+1]); 2297 } 2298 2299 /* Link the last descriptor to the first */ 2300 descr[i-1].next = virt_to_phys(&descr[0]); 2301 2302 /* Start with the first descriptor in the list */ 2303 info->cur_rec_descr = 0; 2304 2305 /* Start the DMA */ 2306 *info->ifirstadr = virt_to_phys(&descr[info->cur_rec_descr]); 2307 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, start); 2308 2309 /* Input DMA should be running now */ 2310 return 1; 2311} 2312 2313static void 2314start_receive(struct e100_serial *info) 2315{ 2316#ifdef CONFIG_SVINTO_SIM 2317 /* No receive in the simulator. Will probably be when the rest of 2318 * the serial interface works, and this piece will just be removed. 2319 */ 2320 return; 2321#endif 2322 info->tty->flip.count = 0; 2323 if (info->uses_dma_in) { 2324 /* reset the input dma channel to be sure it works */ 2325 2326 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset); 2327 while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->icmdadr) == 2328 IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, reset)); 2329 2330 start_recv_dma(info); 2331 } 2332} 2333 2334 2335/* the bits in the MASK2 register are laid out like this: 2336 DMAI_EOP DMAI_DESCR DMAO_EOP DMAO_DESCR 2337 where I is the input channel and O is the output channel for the port. 2338 info->irq is the bit number for the DMAO_DESCR so to check the others we 2339 shift info->irq to the left. 2340*/ 2341 2342/* dma output channel interrupt handler 2343 this interrupt is called from DMA2(ser2), DMA4(ser3), DMA6(ser0) or 2344 DMA8(ser1) when they have finished a descriptor with the intr flag set. 2345*/ 2346 2347static irqreturn_t 2348tr_interrupt(int irq, void *dev_id) 2349{ 2350 struct e100_serial *info; 2351 unsigned long ireg; 2352 int i; 2353 int handled = 0; 2354 2355#ifdef CONFIG_SVINTO_SIM 2356 /* No receive in the simulator. Will probably be when the rest of 2357 * the serial interface works, and this piece will just be removed. 2358 */ 2359 { 2360 const char *s = "What? tr_interrupt in simulator??\n"; 2361 SIMCOUT(s,strlen(s)); 2362 } 2363 return IRQ_HANDLED; 2364#endif 2365 2366 /* find out the line that caused this irq and get it from rs_table */ 2367 2368 ireg = *R_IRQ_MASK2_RD; /* get the active irq bits for the dma channels */ 2369 2370 for (i = 0; i < NR_PORTS; i++) { 2371 info = rs_table + i; 2372 if (!info->enabled || !info->uses_dma_out) 2373 continue; 2374 /* check for dma_descr (don't need to check for dma_eop in output dma for serial */ 2375 if (ireg & info->irq) { 2376 handled = 1; 2377 /* we can send a new dma bunch. make it so. */ 2378 DINTR2(DEBUG_LOG(info->line, "tr_interrupt %i\n", i)); 2379 /* Read jiffies_usec first, 2380 * we want this time to be as late as possible 2381 */ 2382 PROCSTAT(ser_stat[info->line].tx_dma_ints++); 2383 info->last_tx_active_usec = GET_JIFFIES_USEC(); 2384 info->last_tx_active = jiffies; 2385 transmit_chars_dma(info); 2386 } 2387 2388 } 2389 return IRQ_RETVAL(handled); 2390} /* tr_interrupt */ 2391 2392/* dma input channel interrupt handler */ 2393 2394static irqreturn_t 2395rec_interrupt(int irq, void *dev_id) 2396{ 2397 struct e100_serial *info; 2398 unsigned long ireg; 2399 int i; 2400 int handled = 0; 2401 2402#ifdef CONFIG_SVINTO_SIM 2403 /* No receive in the simulator. Will probably be when the rest of 2404 * the serial interface works, and this piece will just be removed. 2405 */ 2406 { 2407 const char *s = "What? rec_interrupt in simulator??\n"; 2408 SIMCOUT(s,strlen(s)); 2409 } 2410 return IRQ_HANDLED; 2411#endif 2412 2413 /* find out the line that caused this irq and get it from rs_table */ 2414 2415 ireg = *R_IRQ_MASK2_RD; /* get the active irq bits for the dma channels */ 2416 2417 for (i = 0; i < NR_PORTS; i++) { 2418 info = rs_table + i; 2419 if (!info->enabled || !info->uses_dma_in) 2420 continue; 2421 /* check for both dma_eop and dma_descr for the input dma channel */ 2422 if (ireg & ((info->irq << 2) | (info->irq << 3))) { 2423 handled = 1; 2424 /* we have received something */ 2425 receive_chars_dma(info); 2426 } 2427 2428 } 2429 return IRQ_RETVAL(handled); 2430} /* rec_interrupt */ 2431 2432static int force_eop_if_needed(struct e100_serial *info) 2433{ 2434 /* We check data_avail bit to determine if data has 2435 * arrived since last time 2436 */ 2437 unsigned char rstat = info->port[REG_STATUS]; 2438 2439 /* error or datavail? */ 2440 if (rstat & SER_ERROR_MASK) { 2441 /* Some error has occurred. If there has been valid data, an 2442 * EOP interrupt will be made automatically. If no data, the 2443 * normal ser_interrupt should be enabled and handle it. 2444 * So do nothing! 2445 */ 2446 DEBUG_LOG(info->line, "timeout err: rstat 0x%03X\n", 2447 rstat | (info->line << 8)); 2448 return 0; 2449 } 2450 2451 if (rstat & SER_DATA_AVAIL_MASK) { 2452 /* Ok data, no error, count it */ 2453 TIMERD(DEBUG_LOG(info->line, "timeout: rstat 0x%03X\n", 2454 rstat | (info->line << 8))); 2455 /* Read data to clear status flags */ 2456 (void)info->port[REG_DATA]; 2457 2458 info->forced_eop = 0; 2459 START_FLUSH_FAST_TIMER(info, "magic"); 2460 return 0; 2461 } 2462 2463 /* hit the timeout, force an EOP for the input 2464 * dma channel if we haven't already 2465 */ 2466 if (!info->forced_eop) { 2467 info->forced_eop = 1; 2468 PROCSTAT(ser_stat[info->line].timeout_flush_cnt++); 2469 TIMERD(DEBUG_LOG(info->line, "timeout EOP %i\n", info->line)); 2470 FORCE_EOP(info); 2471 } 2472 2473 return 1; 2474} 2475 2476static void flush_to_flip_buffer(struct e100_serial *info) 2477{ 2478 struct tty_struct *tty; 2479 struct etrax_recv_buffer *buffer; 2480 unsigned int length; 2481 unsigned long flags; 2482 int max_flip_size; 2483 2484 if (!info->first_recv_buffer) 2485 return; 2486 2487 save_flags(flags); 2488 cli(); 2489 2490 if (!(tty = info->tty)) { 2491 restore_flags(flags); 2492 return; 2493 } 2494 2495 length = tty->flip.count; 2496 /* Don't flip more than the ldisc has room for. 2497 * The return value from ldisc.receive_room(tty) - might not be up to 2498 * date, the previous flip of up to TTY_FLIPBUF_SIZE might be on the 2499 * processed and not accounted for yet. 2500 * Since we use DMA, 1 SERIAL_DESCR_BUF_SIZE could be on the way. 2501 * Lets buffer data here and let flow control take care of it. 2502 * Since we normally flip large chunks, the ldisc don't react 2503 * with throttle until too late if we flip to much. 2504 */ 2505 max_flip_size = tty->ldisc.receive_room(tty); 2506 if (max_flip_size < 0) 2507 max_flip_size = 0; 2508 if (max_flip_size <= (TTY_FLIPBUF_SIZE + /* Maybe not accounted for */ 2509 length + info->recv_cnt + /* We have this queued */ 2510 2*SERIAL_DESCR_BUF_SIZE + /* This could be on the way */ 2511 TTY_THRESHOLD_THROTTLE)) { /* Some slack */ 2512 /* check TTY_THROTTLED first so it indicates our state */ 2513 if (!test_and_set_bit(TTY_THROTTLED, &tty->flags)) { 2514 DFLOW(DEBUG_LOG(info->line,"flush_to_flip throttles room %lu\n", max_flip_size)); 2515 rs_throttle(tty); 2516 } 2517 } 2518 2519 if (max_flip_size > TTY_FLIPBUF_SIZE) 2520 max_flip_size = TTY_FLIPBUF_SIZE; 2521 2522 while ((buffer = info->first_recv_buffer) && length < max_flip_size) { 2523 unsigned int count = buffer->length; 2524 2525 if (length + count > max_flip_size) 2526 count = max_flip_size - length; 2527 2528 memcpy(tty->flip.char_buf_ptr + length, buffer->buffer, count); 2529 memset(tty->flip.flag_buf_ptr + length, TTY_NORMAL, count); 2530 tty->flip.flag_buf_ptr[length] = buffer->error; 2531 2532 length += count; 2533 info->recv_cnt -= count; 2534 DFLIP(DEBUG_LOG(info->line,"flip: %i\n", length)); 2535 2536 if (count == buffer->length) { 2537 info->first_recv_buffer = buffer->next; 2538 kfree(buffer); 2539 } else { 2540 buffer->length -= count; 2541 memmove(buffer->buffer, buffer->buffer + count, buffer->length); 2542 buffer->error = TTY_NORMAL; 2543 } 2544 } 2545 2546 if (!info->first_recv_buffer) 2547 info->last_recv_buffer = NULL; 2548 2549 tty->flip.count = length; 2550 DFLIP(if (tty->ldisc.chars_in_buffer(tty) > 3500) { 2551 DEBUG_LOG(info->line, "ldisc %lu\n", 2552 tty->ldisc.chars_in_buffer(tty)); 2553 DEBUG_LOG(info->line, "flip.count %lu\n", 2554 tty->flip.count); 2555 } 2556 ); 2557 restore_flags(flags); 2558 2559 DFLIP( 2560 if (1) { 2561 DEBUG_LOG(info->line, "*** rxtot %i\n", info->icount.rx); 2562 DEBUG_LOG(info->line, "ldisc %lu\n", tty->ldisc.chars_in_buffer(tty)); 2563 DEBUG_LOG(info->line, "room %lu\n", tty->ldisc.receive_room(tty)); 2564 } 2565 2566 ); 2567 2568 /* this includes a check for low-latency */ 2569 tty_flip_buffer_push(tty); 2570} 2571 2572static void check_flush_timeout(struct e100_serial *info) 2573{ 2574 /* Flip what we've got (if we can) */ 2575 flush_to_flip_buffer(info); 2576 2577 /* We might need to flip later, but not to fast 2578 * since the system is busy processing input... */ 2579 if (info->first_recv_buffer) 2580 START_FLUSH_FAST_TIMER_TIME(info, "flip", 2000); 2581 2582 /* Force eop last, since data might have come while we're processing 2583 * and if we started the slow timer above, we won't start a fast 2584 * below. 2585 */ 2586 force_eop_if_needed(info); 2587} 2588 2589#ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER 2590static void flush_timeout_function(unsigned long data) 2591{ 2592 struct e100_serial *info = (struct e100_serial *)data; 2593 2594 fast_timers[info->line].function = NULL; 2595 serial_fast_timer_expired++; 2596 TIMERD(DEBUG_LOG(info->line, "flush_timout %i ", info->line)); 2597 TIMERD(DEBUG_LOG(info->line, "num expired: %i\n", serial_fast_timer_expired)); 2598 check_flush_timeout(info); 2599} 2600 2601#else 2602 2603/* dma fifo/buffer timeout handler 2604 forces an end-of-packet for the dma input channel if no chars 2605 have been received for CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS/100 s. 2606*/ 2607 2608static struct timer_list flush_timer; 2609 2610static void 2611timed_flush_handler(unsigned long ptr) 2612{ 2613 struct e100_serial *info; 2614 int i; 2615 2616#ifdef CONFIG_SVINTO_SIM 2617 return; 2618#endif 2619 2620 for (i = 0; i < NR_PORTS; i++) { 2621 info = rs_table + i; 2622 if (info->uses_dma_in) 2623 check_flush_timeout(info); 2624 } 2625 2626 /* restart flush timer */ 2627 mod_timer(&flush_timer, jiffies + CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS); 2628} 2629#endif 2630 2631#ifdef SERIAL_HANDLE_EARLY_ERRORS 2632 2633/* If there is an error (ie break) when the DMA is running and 2634 * there are no bytes in the fifo the DMA is stopped and we get no 2635 * eop interrupt. Thus we have to monitor the first bytes on a DMA 2636 * transfer, and if it is without error we can turn the serial 2637 * interrupts off. 2638 */ 2639 2640/* 2641BREAK handling on ETRAX 100: 2642ETRAX will generate interrupt although there is no stop bit between the 2643characters. 2644 2645Depending on how long the break sequence is, the end of the breaksequence 2646will look differently: 2647| indicates start/end of a character. 2648 2649B= Break character (0x00) with framing error. 2650E= Error byte with parity error received after B characters. 2651F= "Faked" valid byte received immediately after B characters. 2652V= Valid byte 2653 26541. 2655 B BL ___________________________ V 2656.._|__________|__________| |valid data | 2657 2658Multiple frame errors with data == 0x00 (B), 2659the timing matches up "perfectly" so no extra ending char is detected. 2660The RXD pin is 1 in the last interrupt, in that case 2661we set info->errorcode = ERRCODE_INSERT_BREAK, but we can't really 2662know if another byte will come and this really is case 2. below 2663(e.g F=0xFF or 0xFE) 2664If RXD pin is 0 we can expect another character (see 2. below). 2665 2666 26672. 2668 2669 B B E or F__________________..__ V 2670.._|__________|__________|______ | |valid data 2671 "valid" or 2672 parity error 2673 2674Multiple frame errors with data == 0x00 (B), 2675but the part of the break trigs is interpreted as a start bit (and possibly 2676some 0 bits followed by a number of 1 bits and a stop bit). 2677Depending on parity settings etc. this last character can be either 2678a fake "valid" char (F) or have a parity error (E). 2679 2680If the character is valid it will be put in the buffer, 2681we set info->errorcode = ERRCODE_SET_BREAK so the receive interrupt 2682will set the flags so the tty will handle it, 2683if it's an error byte it will not be put in the buffer 2684and we set info->errorcode = ERRCODE_INSERT_BREAK. 2685 2686To distinguish a V byte in 1. from an F byte in 2. we keep a timestamp 2687of the last faulty char (B) and compares it with the current time: 2688If the time elapsed time is less then 2*char_time_usec we will assume 2689it's a faked F char and not a Valid char and set 2690info->errorcode = ERRCODE_SET_BREAK. 2691 2692Flaws in the above solution: 2693~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 2694We use the timer to distinguish a F character from a V character, 2695if a V character is to close after the break we might make the wrong decision. 2696 2697TODO: The break will be delayed until an F or V character is received. 2698 2699*/ 2700 2701static 2702struct e100_serial * handle_ser_rx_interrupt_no_dma(struct e100_serial *info) 2703{ 2704 unsigned long data_read; 2705 struct tty_struct *tty = info->tty; 2706 2707 if (!tty) { 2708 printk("!NO TTY!\n"); 2709 return info; 2710 } 2711 if (tty->flip.count >= TTY_FLIPBUF_SIZE - TTY_THRESHOLD_THROTTLE) { 2712 /* check TTY_THROTTLED first so it indicates our state */ 2713 if (!test_and_set_bit(TTY_THROTTLED, &tty->flags)) { 2714 DFLOW(DEBUG_LOG(info->line, "rs_throttle flip.count: %i\n", tty->flip.count)); 2715 rs_throttle(tty); 2716 } 2717 } 2718 if (tty->flip.count >= TTY_FLIPBUF_SIZE) { 2719 DEBUG_LOG(info->line, "force FLIP! %i\n", tty->flip.count); 2720 tty->flip.work.func((void *) tty); 2721 if (tty->flip.count >= TTY_FLIPBUF_SIZE) { 2722 DEBUG_LOG(info->line, "FLIP FULL! %i\n", tty->flip.count); 2723 return info; /* if TTY_DONT_FLIP is set */ 2724 } 2725 } 2726 /* Read data and status at the same time */ 2727 data_read = *((unsigned long *)&info->port[REG_DATA_STATUS32]); 2728more_data: 2729 if (data_read & IO_MASK(R_SERIAL0_READ, xoff_detect) ) { 2730 DFLOW(DEBUG_LOG(info->line, "XOFF detect\n", 0)); 2731 } 2732 DINTR2(DEBUG_LOG(info->line, "ser_rx %c\n", IO_EXTRACT(R_SERIAL0_READ, data_in, data_read))); 2733 2734 if (data_read & ( IO_MASK(R_SERIAL0_READ, framing_err) | 2735 IO_MASK(R_SERIAL0_READ, par_err) | 2736 IO_MASK(R_SERIAL0_READ, overrun) )) { 2737 /* An error */ 2738 info->last_rx_active_usec = GET_JIFFIES_USEC(); 2739 info->last_rx_active = jiffies; 2740 DINTR1(DEBUG_LOG(info->line, "ser_rx err stat_data %04X\n", data_read)); 2741 DLOG_INT_TRIG( 2742 if (!log_int_trig1_pos) { 2743 log_int_trig1_pos = log_int_pos; 2744 log_int(rdpc(), 0, 0); 2745 } 2746 ); 2747 2748 2749 if ( ((data_read & IO_MASK(R_SERIAL0_READ, data_in)) == 0) && 2750 (data_read & IO_MASK(R_SERIAL0_READ, framing_err)) ) { 2751 /* Most likely a break, but we get interrupts over and 2752 * over again. 2753 */ 2754 2755 if (!info->break_detected_cnt) { 2756 DEBUG_LOG(info->line, "#BRK start\n", 0); 2757 } 2758 if (data_read & IO_MASK(R_SERIAL0_READ, rxd)) { 2759 /* The RX pin is high now, so the break 2760 * must be over, but.... 2761 * we can't really know if we will get another 2762 * last byte ending the break or not. 2763 * And we don't know if the byte (if any) will 2764 * have an error or look valid. 2765 */ 2766 DEBUG_LOG(info->line, "# BL BRK\n", 0); 2767 info->errorcode = ERRCODE_INSERT_BREAK; 2768 } 2769 info->break_detected_cnt++; 2770 } else { 2771 /* The error does not look like a break, but could be 2772 * the end of one 2773 */ 2774 if (info->break_detected_cnt) { 2775 DEBUG_LOG(info->line, "EBRK %i\n", info->break_detected_cnt); 2776 info->errorcode = ERRCODE_INSERT_BREAK; 2777 } else { 2778 if (info->errorcode == ERRCODE_INSERT_BREAK) { 2779 info->icount.brk++; 2780 *tty->flip.char_buf_ptr = 0; 2781 *tty->flip.flag_buf_ptr = TTY_BREAK; 2782 tty->flip.flag_buf_ptr++; 2783 tty->flip.char_buf_ptr++; 2784 tty->flip.count++; 2785 info->icount.rx++; 2786 } 2787 *tty->flip.char_buf_ptr = IO_EXTRACT(R_SERIAL0_READ, data_in, data_read); 2788 2789 if (data_read & IO_MASK(R_SERIAL0_READ, par_err)) { 2790 info->icount.parity++; 2791 *tty->flip.flag_buf_ptr = TTY_PARITY; 2792 } else if (data_read & IO_MASK(R_SERIAL0_READ, overrun)) { 2793 info->icount.overrun++; 2794 *tty->flip.flag_buf_ptr = TTY_OVERRUN; 2795 } else if (data_read & IO_MASK(R_SERIAL0_READ, framing_err)) { 2796 info->icount.frame++; 2797 *tty->flip.flag_buf_ptr = TTY_FRAME; 2798 } 2799 info->errorcode = 0; 2800 } 2801 info->break_detected_cnt = 0; 2802 } 2803 } else if (data_read & IO_MASK(R_SERIAL0_READ, data_avail)) { 2804 /* No error */ 2805 DLOG_INT_TRIG( 2806 if (!log_int_trig1_pos) { 2807 if (log_int_pos >= log_int_size) { 2808 log_int_pos = 0; 2809 } 2810 log_int_trig0_pos = log_int_pos; 2811 log_int(rdpc(), 0, 0); 2812 } 2813 ); 2814 *tty->flip.char_buf_ptr = IO_EXTRACT(R_SERIAL0_READ, data_in, data_read); 2815 *tty->flip.flag_buf_ptr = 0; 2816 } else { 2817 DEBUG_LOG(info->line, "ser_rx int but no data_avail %08lX\n", data_read); 2818 } 2819 2820 2821 tty->flip.flag_buf_ptr++; 2822 tty->flip.char_buf_ptr++; 2823 tty->flip.count++; 2824 info->icount.rx++; 2825 data_read = *((unsigned long *)&info->port[REG_DATA_STATUS32]); 2826 if (data_read & IO_MASK(R_SERIAL0_READ, data_avail)) { 2827 DEBUG_LOG(info->line, "ser_rx %c in loop\n", IO_EXTRACT(R_SERIAL0_READ, data_in, data_read)); 2828 goto more_data; 2829 } 2830 2831 tty_flip_buffer_push(info->tty); 2832 return info; 2833} 2834 2835static struct e100_serial* handle_ser_rx_interrupt(struct e100_serial *info) 2836{ 2837 unsigned char rstat; 2838 2839#ifdef SERIAL_DEBUG_INTR 2840 printk("Interrupt from serport %d\n", i); 2841#endif 2842/* DEBUG_LOG(info->line, "ser_interrupt stat %03X\n", rstat | (i << 8)); */ 2843 if (!info->uses_dma_in) { 2844 return handle_ser_rx_interrupt_no_dma(info); 2845 } 2846 /* DMA is used */ 2847 rstat = info->port[REG_STATUS]; 2848 if (rstat & IO_MASK(R_SERIAL0_STATUS, xoff_detect) ) { 2849 DFLOW(DEBUG_LOG(info->line, "XOFF detect\n", 0)); 2850 } 2851 2852 if (rstat & SER_ERROR_MASK) { 2853 unsigned char data; 2854 2855 info->last_rx_active_usec = GET_JIFFIES_USEC(); 2856 info->last_rx_active = jiffies; 2857 /* If we got an error, we must reset it by reading the 2858 * data_in field 2859 */ 2860 data = info->port[REG_DATA]; 2861 DINTR1(DEBUG_LOG(info->line, "ser_rx! %c\n", data)); 2862 DINTR1(DEBUG_LOG(info->line, "ser_rx err stat %02X\n", rstat)); 2863 if (!data && (rstat & SER_FRAMING_ERR_MASK)) { 2864 /* Most likely a break, but we get interrupts over and 2865 * over again. 2866 */ 2867 2868 if (!info->break_detected_cnt) { 2869 DEBUG_LOG(info->line, "#BRK start\n", 0); 2870 } 2871 if (rstat & SER_RXD_MASK) { 2872 /* The RX pin is high now, so the break 2873 * must be over, but.... 2874 * we can't really know if we will get another 2875 * last byte ending the break or not. 2876 * And we don't know if the byte (if any) will 2877 * have an error or look valid. 2878 */ 2879 DEBUG_LOG(info->line, "# BL BRK\n", 0); 2880 info->errorcode = ERRCODE_INSERT_BREAK; 2881 } 2882 info->break_detected_cnt++; 2883 } else { 2884 /* The error does not look like a break, but could be 2885 * the end of one 2886 */ 2887 if (info->break_detected_cnt) { 2888 DEBUG_LOG(info->line, "EBRK %i\n", info->break_detected_cnt); 2889 info->errorcode = ERRCODE_INSERT_BREAK; 2890 } else { 2891 if (info->errorcode == ERRCODE_INSERT_BREAK) { 2892 info->icount.brk++; 2893 add_char_and_flag(info, '\0', TTY_BREAK); 2894 } 2895 2896 if (rstat & SER_PAR_ERR_MASK) { 2897 info->icount.parity++; 2898 add_char_and_flag(info, data, TTY_PARITY); 2899 } else if (rstat & SER_OVERRUN_MASK) { 2900 info->icount.overrun++; 2901 add_char_and_flag(info, data, TTY_OVERRUN); 2902 } else if (rstat & SER_FRAMING_ERR_MASK) { 2903 info->icount.frame++; 2904 add_char_and_flag(info, data, TTY_FRAME); 2905 } 2906 2907 info->errorcode = 0; 2908 } 2909 info->break_detected_cnt = 0; 2910 DEBUG_LOG(info->line, "#iERR s d %04X\n", 2911 ((rstat & SER_ERROR_MASK) << 8) | data); 2912 } 2913 PROCSTAT(ser_stat[info->line].early_errors_cnt++); 2914 } else { /* It was a valid byte, now let the DMA do the rest */ 2915 unsigned long curr_time_u = GET_JIFFIES_USEC(); 2916 unsigned long curr_time = jiffies; 2917 2918 if (info->break_detected_cnt) { 2919 /* Detect if this character is a new valid char or the 2920 * last char in a break sequence: If LSBits are 0 and 2921 * MSBits are high AND the time is close to the 2922 * previous interrupt we should discard it. 2923 */ 2924 long elapsed_usec = 2925 (curr_time - info->last_rx_active) * (1000000/HZ) + 2926 curr_time_u - info->last_rx_active_usec; 2927 if (elapsed_usec < 2*info->char_time_usec) { 2928 DEBUG_LOG(info->line, "FBRK %i\n", info->line); 2929 /* Report as BREAK (error) and let 2930 * receive_chars_dma() handle it 2931 */ 2932 info->errorcode = ERRCODE_SET_BREAK; 2933 } else { 2934 DEBUG_LOG(info->line, "Not end of BRK (V)%i\n", info->line); 2935 } 2936 DEBUG_LOG(info->line, "num brk %i\n", info->break_detected_cnt); 2937 } 2938 2939#ifdef SERIAL_DEBUG_INTR 2940 printk("** OK, disabling ser_interrupts\n"); 2941#endif 2942 e100_disable_serial_data_irq(info); 2943 DINTR2(DEBUG_LOG(info->line, "ser_rx OK %d\n", info->line)); 2944 info->break_detected_cnt = 0; 2945 2946 PROCSTAT(ser_stat[info->line].ser_ints_ok_cnt++); 2947 } 2948 /* Restarting the DMA never hurts */ 2949 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, restart); 2950 START_FLUSH_FAST_TIMER(info, "ser_int"); 2951 return info; 2952} /* handle_ser_rx_interrupt */ 2953 2954static void handle_ser_tx_interrupt(struct e100_serial *info) 2955{ 2956 unsigned long flags; 2957 2958 if (info->x_char) { 2959 unsigned char rstat; 2960 DFLOW(DEBUG_LOG(info->line, "tx_int: xchar 0x%02X\n", info->x_char)); 2961 save_flags(flags); cli(); 2962 rstat = info->port[REG_STATUS]; 2963 DFLOW(DEBUG_LOG(info->line, "stat %x\n", rstat)); 2964 2965 info->port[REG_TR_DATA] = info->x_char; 2966 info->icount.tx++; 2967 info->x_char = 0; 2968 /* We must enable since it is disabled in ser_interrupt */ 2969 e100_enable_serial_tx_ready_irq(info); 2970 restore_flags(flags); 2971 return; 2972 } 2973 if (info->uses_dma_out) { 2974 unsigned char rstat; 2975 int i; 2976 /* We only use normal tx interrupt when sending x_char */ 2977 DFLOW(DEBUG_LOG(info->line, "tx_int: xchar sent\n", 0)); 2978 save_flags(flags); cli(); 2979 rstat = info->port[REG_STATUS]; 2980 DFLOW(DEBUG_LOG(info->line, "stat %x\n", rstat)); 2981 e100_disable_serial_tx_ready_irq(info); 2982 if (info->tty->stopped) 2983 rs_stop(info->tty); 2984 /* Enable the DMA channel and tell it to continue */ 2985 e100_enable_txdma_channel(info); 2986 /* Wait 12 cycles before doing the DMA command */ 2987 for(i = 6; i > 0; i--) 2988 nop(); 2989 2990 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, continue); 2991 restore_flags(flags); 2992 return; 2993 } 2994 /* Normal char-by-char interrupt */ 2995 if (info->xmit.head == info->xmit.tail 2996 || info->tty->stopped 2997 || info->tty->hw_stopped) { 2998 DFLOW(DEBUG_LOG(info->line, "tx_int: stopped %i\n", info->tty->stopped)); 2999 e100_disable_serial_tx_ready_irq(info); 3000 info->tr_running = 0; 3001 return; 3002 } 3003 DINTR2(DEBUG_LOG(info->line, "tx_int %c\n", info->xmit.buf[info->xmit.tail])); 3004 /* Send a byte, rs485 timing is critical so turn of ints */ 3005 save_flags(flags); cli(); 3006 info->port[REG_TR_DATA] = info->xmit.buf[info->xmit.tail]; 3007 info->xmit.tail = (info->xmit.tail + 1) & (SERIAL_XMIT_SIZE-1); 3008 info->icount.tx++; 3009 if (info->xmit.head == info->xmit.tail) { 3010#if defined(CONFIG_ETRAX_RS485) && defined(CONFIG_ETRAX_FAST_TIMER) 3011 if (info->rs485.enabled) { 3012 /* Set a short timer to toggle RTS */ 3013 start_one_shot_timer(&fast_timers_rs485[info->line], 3014 rs485_toggle_rts_timer_function, 3015 (unsigned long)info, 3016 info->char_time_usec*2, 3017 "RS-485"); 3018 } 3019#endif /* RS485 */ 3020 info->last_tx_active_usec = GET_JIFFIES_USEC(); 3021 info->last_tx_active = jiffies; 3022 e100_disable_serial_tx_ready_irq(info); 3023 info->tr_running = 0; 3024 DFLOW(DEBUG_LOG(info->line, "tx_int: stop2\n", 0)); 3025 } else { 3026 /* We must enable since it is disabled in ser_interrupt */ 3027 e100_enable_serial_tx_ready_irq(info); 3028 } 3029 restore_flags(flags); 3030 3031 if (CIRC_CNT(info->xmit.head, 3032 info->xmit.tail, 3033 SERIAL_XMIT_SIZE) < WAKEUP_CHARS) 3034 rs_sched_event(info, RS_EVENT_WRITE_WAKEUP); 3035 3036} /* handle_ser_tx_interrupt */ 3037 3038/* result of time measurements: 3039 * RX duration 54-60 us when doing something, otherwise 6-9 us 3040 * ser_int duration: just sending: 8-15 us normally, up to 73 us 3041 */ 3042static irqreturn_t 3043ser_interrupt(int irq, void *dev_id) 3044{ 3045 static volatile int tx_started = 0; 3046 struct e100_serial *info; 3047 int i; 3048 unsigned long flags; 3049 unsigned long irq_mask1_rd; 3050 unsigned long data_mask = (1 << (8+2*0)); /* ser0 data_avail */ 3051 int handled = 0; 3052 static volatile unsigned long reentered_ready_mask = 0; 3053 3054 save_flags(flags); cli(); 3055 irq_mask1_rd = *R_IRQ_MASK1_RD; 3056 /* First handle all rx interrupts with ints disabled */ 3057 info = rs_table; 3058 irq_mask1_rd &= e100_ser_int_mask; 3059 for (i = 0; i < NR_PORTS; i++) { 3060 /* Which line caused the data irq? */ 3061 if (irq_mask1_rd & data_mask) { 3062 handled = 1; 3063 handle_ser_rx_interrupt(info); 3064 } 3065 info += 1; 3066 data_mask <<= 2; 3067 } 3068 /* Handle tx interrupts with interrupts enabled so we 3069 * can take care of new data interrupts while transmitting 3070 * We protect the tx part with the tx_started flag. 3071 * We disable the tr_ready interrupts we are about to handle and 3072 * unblock the serial interrupt so new serial interrupts may come. 3073 * 3074 * If we get a new interrupt: 3075 * - it migth be due to synchronous serial ports. 3076 * - serial irq will be blocked by general irq handler. 3077 * - async data will be handled above (sync will be ignored). 3078 * - tx_started flag will prevent us from trying to send again and 3079 * we will exit fast - no need to unblock serial irq. 3080 * - Next (sync) serial interrupt handler will be runned with 3081 * disabled interrupt due to restore_flags() at end of function, 3082 * so sync handler will not be preempted or reentered. 3083 */ 3084 if (!tx_started) { 3085 unsigned long ready_mask; 3086 unsigned long 3087 tx_started = 1; 3088 /* Only the tr_ready interrupts left */ 3089 irq_mask1_rd &= (IO_MASK(R_IRQ_MASK1_RD, ser0_ready) | 3090 IO_MASK(R_IRQ_MASK1_RD, ser1_ready) | 3091 IO_MASK(R_IRQ_MASK1_RD, ser2_ready) | 3092 IO_MASK(R_IRQ_MASK1_RD, ser3_ready)); 3093 while (irq_mask1_rd) { 3094 /* Disable those we are about to handle */ 3095 *R_IRQ_MASK1_CLR = irq_mask1_rd; 3096 /* Unblock the serial interrupt */ 3097 *R_VECT_MASK_SET = IO_STATE(R_VECT_MASK_SET, serial, set); 3098 3099 sti(); 3100 ready_mask = (1 << (8+1+2*0)); /* ser0 tr_ready */ 3101 info = rs_table; 3102 for (i = 0; i < NR_PORTS; i++) { 3103 /* Which line caused the ready irq? */ 3104 if (irq_mask1_rd & ready_mask) { 3105 handled = 1; 3106 handle_ser_tx_interrupt(info); 3107 } 3108 info += 1; 3109 ready_mask <<= 2; 3110 } 3111 /* handle_ser_tx_interrupt enables tr_ready interrupts */ 3112 cli(); 3113 /* Handle reentered TX interrupt */ 3114 irq_mask1_rd = reentered_ready_mask; 3115 } 3116 cli(); 3117 tx_started = 0; 3118 } else { 3119 unsigned long ready_mask; 3120 ready_mask = irq_mask1_rd & (IO_MASK(R_IRQ_MASK1_RD, ser0_ready) | 3121 IO_MASK(R_IRQ_MASK1_RD, ser1_ready) | 3122 IO_MASK(R_IRQ_MASK1_RD, ser2_ready) | 3123 IO_MASK(R_IRQ_MASK1_RD, ser3_ready)); 3124 if (ready_mask) { 3125 reentered_ready_mask |= ready_mask; 3126 /* Disable those we are about to handle */ 3127 *R_IRQ_MASK1_CLR = ready_mask; 3128 DFLOW(DEBUG_LOG(SERIAL_DEBUG_LINE, "ser_int reentered with TX %X\n", ready_mask)); 3129 } 3130 } 3131 3132 restore_flags(flags); 3133 return IRQ_RETVAL(handled); 3134} /* ser_interrupt */ 3135#endif 3136 3137/* 3138 * ------------------------------------------------------------------- 3139 * Here ends the serial interrupt routines. 3140 * ------------------------------------------------------------------- 3141 */ 3142 3143/* 3144 * This routine is used to handle the "bottom half" processing for the 3145 * serial driver, known also the "software interrupt" processing. 3146 * This processing is done at the kernel interrupt level, after the 3147 * rs_interrupt() has returned, BUT WITH INTERRUPTS TURNED ON. This 3148 * is where time-consuming activities which can not be done in the 3149 * interrupt driver proper are done; the interrupt driver schedules 3150 * them using rs_sched_event(), and they get done here. 3151 */ 3152static void 3153do_softint(void *private_) 3154{ 3155 struct e100_serial *info = (struct e100_serial *) private_; 3156 struct tty_struct *tty; 3157 3158 tty = info->tty; 3159 if (!tty) 3160 return; 3161 3162 if (test_and_clear_bit(RS_EVENT_WRITE_WAKEUP, &info->event)) 3163 tty_wakeup(tty); 3164} 3165 3166static int 3167startup(struct e100_serial * info) 3168{ 3169 unsigned long flags; 3170 unsigned long xmit_page; 3171 int i; 3172 3173 xmit_page = get_zeroed_page(GFP_KERNEL); 3174 if (!xmit_page) 3175 return -ENOMEM; 3176 3177 save_flags(flags); 3178 cli(); 3179 3180 /* if it was already initialized, skip this */ 3181 3182 if (info->flags & ASYNC_INITIALIZED) { 3183 restore_flags(flags); 3184 free_page(xmit_page); 3185 return 0; 3186 } 3187 3188 if (info->xmit.buf) 3189 free_page(xmit_page); 3190 else 3191 info->xmit.buf = (unsigned char *) xmit_page; 3192 3193#ifdef SERIAL_DEBUG_OPEN 3194 printk("starting up ttyS%d (xmit_buf 0x%p)...\n", info->line, info->xmit.buf); 3195#endif 3196 3197#ifdef CONFIG_SVINTO_SIM 3198 /* Bits and pieces collected from below. Better to have them 3199 in one ifdef:ed clause than to mix in a lot of ifdefs, 3200 right? */ 3201 if (info->tty) 3202 clear_bit(TTY_IO_ERROR, &info->tty->flags); 3203 3204 info->xmit.head = info->xmit.tail = 0; 3205 info->first_recv_buffer = info->last_recv_buffer = NULL; 3206 info->recv_cnt = info->max_recv_cnt = 0; 3207 3208 for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++) 3209 info->rec_descr[i].buf = NULL; 3210 3211 /* No real action in the simulator, but may set info important 3212 to ioctl. */ 3213 change_speed(info); 3214#else 3215 3216 /* 3217 * Clear the FIFO buffers and disable them 3218 * (they will be reenabled in change_speed()) 3219 */ 3220 3221 /* 3222 * Reset the DMA channels and make sure their interrupts are cleared 3223 */ 3224 3225 if (info->dma_in_enabled) { 3226 info->uses_dma_in = 1; 3227 e100_enable_rxdma_channel(info); 3228 3229 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset); 3230 3231 /* Wait until reset cycle is complete */ 3232 while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->icmdadr) == 3233 IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, reset)); 3234 3235 /* Make sure the irqs are cleared */ 3236 *info->iclrintradr = 3237 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) | 3238 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do); 3239 } else { 3240 e100_disable_rxdma_channel(info); 3241 } 3242 3243 if (info->dma_out_enabled) { 3244 info->uses_dma_out = 1; 3245 e100_enable_txdma_channel(info); 3246 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset); 3247 3248 while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->ocmdadr) == 3249 IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, reset)); 3250 3251 /* Make sure the irqs are cleared */ 3252 *info->oclrintradr = 3253 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) | 3254 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do); 3255 } else { 3256 e100_disable_txdma_channel(info); 3257 } 3258 3259 if (info->tty) 3260 clear_bit(TTY_IO_ERROR, &info->tty->flags); 3261 3262 info->xmit.head = info->xmit.tail = 0; 3263 info->first_recv_buffer = info->last_recv_buffer = NULL; 3264 info->recv_cnt = info->max_recv_cnt = 0; 3265 3266 for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++) 3267 info->rec_descr[i].buf = 0; 3268 3269 /* 3270 * and set the speed and other flags of the serial port 3271 * this will start the rx/tx as well 3272 */ 3273#ifdef SERIAL_HANDLE_EARLY_ERRORS 3274 e100_enable_serial_data_irq(info); 3275#endif 3276 change_speed(info); 3277 3278 /* dummy read to reset any serial errors */ 3279 3280 (void)info->port[REG_DATA]; 3281 3282 /* enable the interrupts */ 3283 if (info->uses_dma_out) 3284 e100_enable_txdma_irq(info); 3285 3286 e100_enable_rx_irq(info); 3287 3288 info->tr_running = 0; /* to be sure we don't lock up the transmitter */ 3289 3290 /* setup the dma input descriptor and start dma */ 3291 3292 start_receive(info); 3293 3294 /* for safety, make sure the descriptors last result is 0 bytes written */ 3295 3296 info->tr_descr.sw_len = 0; 3297 info->tr_descr.hw_len = 0; 3298 info->tr_descr.status = 0; 3299 3300 /* enable RTS/DTR last */ 3301 3302 e100_rts(info, 1); 3303 e100_dtr(info, 1); 3304 3305#endif /* CONFIG_SVINTO_SIM */ 3306 3307 info->flags |= ASYNC_INITIALIZED; 3308 3309 restore_flags(flags); 3310 return 0; 3311} 3312 3313/* 3314 * This routine will shutdown a serial port; interrupts are disabled, and 3315 * DTR is dropped if the hangup on close termio flag is on. 3316 */ 3317static void 3318shutdown(struct e100_serial * info) 3319{ 3320 unsigned long flags; 3321 struct etrax_dma_descr *descr = info->rec_descr; 3322 struct etrax_recv_buffer *buffer; 3323 int i; 3324 3325#ifndef CONFIG_SVINTO_SIM 3326 /* shut down the transmitter and receiver */ 3327 DFLOW(DEBUG_LOG(info->line, "shutdown %i\n", info->line)); 3328 e100_disable_rx(info); 3329 info->port[REG_TR_CTRL] = (info->tx_ctrl &= ~0x40); 3330 3331 /* disable interrupts, reset dma channels */ 3332 if (info->uses_dma_in) { 3333 e100_disable_rxdma_irq(info); 3334 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset); 3335 info->uses_dma_in = 0; 3336 } else { 3337 e100_disable_serial_data_irq(info); 3338 } 3339 3340 if (info->uses_dma_out) { 3341 e100_disable_txdma_irq(info); 3342 info->tr_running = 0; 3343 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset); 3344 info->uses_dma_out = 0; 3345 } else { 3346 e100_disable_serial_tx_ready_irq(info); 3347 info->tr_running = 0; 3348 } 3349 3350#endif /* CONFIG_SVINTO_SIM */ 3351 3352 if (!(info->flags & ASYNC_INITIALIZED)) 3353 return; 3354 3355#ifdef SERIAL_DEBUG_OPEN 3356 printk("Shutting down serial port %d (irq %d)....\n", info->line, 3357 info->irq); 3358#endif 3359 3360 save_flags(flags); 3361 cli(); /* Disable interrupts */ 3362 3363 if (info->xmit.buf) { 3364 free_page((unsigned long)info->xmit.buf); 3365 info->xmit.buf = NULL; 3366 } 3367 3368 for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++) 3369 if (descr[i].buf) { 3370 buffer = phys_to_virt(descr[i].buf) - sizeof *buffer; 3371 kfree(buffer); 3372 descr[i].buf = 0; 3373 } 3374 3375 if (!info->tty || (info->tty->termios->c_cflag & HUPCL)) { 3376 /* hang up DTR and RTS if HUPCL is enabled */ 3377 e100_dtr(info, 0); 3378 e100_rts(info, 0); /* could check CRTSCTS before doing this */ 3379 } 3380 3381 if (info->tty) 3382 set_bit(TTY_IO_ERROR, &info->tty->flags); 3383 3384 info->flags &= ~ASYNC_INITIALIZED; 3385 restore_flags(flags); 3386} 3387 3388 3389/* change baud rate and other assorted parameters */ 3390 3391static void 3392change_speed(struct e100_serial *info) 3393{ 3394 unsigned int cflag; 3395 unsigned long xoff; 3396 unsigned long flags; 3397 /* first some safety checks */ 3398 3399 if (!info->tty || !info->tty->termios) 3400 return; 3401 if (!info->port) 3402 return; 3403 3404 cflag = info->tty->termios->c_cflag; 3405 3406 /* possibly, the tx/rx should be disabled first to do this safely */ 3407 3408 /* change baud-rate and write it to the hardware */ 3409 if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST) { 3410 /* Special baudrate */ 3411 u32 mask = 0xFF << (info->line*8); /* Each port has 8 bits */ 3412 unsigned long alt_source = 3413 IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, normal) | 3414 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, normal); 3415 /* R_ALT_SER_BAUDRATE selects the source */ 3416 DBAUD(printk("Custom baudrate: baud_base/divisor %lu/%i\n", 3417 (unsigned long)info->baud_base, info->custom_divisor)); 3418 if (info->baud_base == SERIAL_PRESCALE_BASE) { 3419 /* 0, 2-65535 (0=65536) */ 3420 u16 divisor = info->custom_divisor; 3421 /* R_SERIAL_PRESCALE (upper 16 bits of R_CLOCK_PRESCALE) */ 3422 /* baudrate is 3.125MHz/custom_divisor */ 3423 alt_source = 3424 IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, prescale) | 3425 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, prescale); 3426 alt_source = 0x11; 3427 DBAUD(printk("Writing SERIAL_PRESCALE: divisor %i\n", divisor)); 3428 *R_SERIAL_PRESCALE = divisor; 3429 info->baud = SERIAL_PRESCALE_BASE/divisor; 3430 } 3431#ifdef CONFIG_ETRAX_EXTERN_PB6CLK_ENABLED 3432 else if ((info->baud_base==CONFIG_ETRAX_EXTERN_PB6CLK_FREQ/8 && 3433 info->custom_divisor == 1) || 3434 (info->baud_base==CONFIG_ETRAX_EXTERN_PB6CLK_FREQ && 3435 info->custom_divisor == 8)) { 3436 /* ext_clk selected */ 3437 alt_source = 3438 IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, extern) | 3439 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, extern); 3440 DBAUD(printk("using external baudrate: %lu\n", CONFIG_ETRAX_EXTERN_PB6CLK_FREQ/8)); 3441 info->baud = CONFIG_ETRAX_EXTERN_PB6CLK_FREQ/8; 3442 } 3443 } 3444#endif 3445 else 3446 { 3447 /* Bad baudbase, we don't support using timer0 3448 * for baudrate. 3449 */ 3450 printk(KERN_WARNING "Bad baud_base/custom_divisor: %lu/%i\n", 3451 (unsigned long)info->baud_base, info->custom_divisor); 3452 } 3453 r_alt_ser_baudrate_shadow &= ~mask; 3454 r_alt_ser_baudrate_shadow |= (alt_source << (info->line*8)); 3455 *R_ALT_SER_BAUDRATE = r_alt_ser_baudrate_shadow; 3456 } else { 3457 /* Normal baudrate */ 3458 /* Make sure we use normal baudrate */ 3459 u32 mask = 0xFF << (info->line*8); /* Each port has 8 bits */ 3460 unsigned long alt_source = 3461 IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, normal) | 3462 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, normal); 3463 r_alt_ser_baudrate_shadow &= ~mask; 3464 r_alt_ser_baudrate_shadow |= (alt_source << (info->line*8)); 3465#ifndef CONFIG_SVINTO_SIM 3466 *R_ALT_SER_BAUDRATE = r_alt_ser_baudrate_shadow; 3467#endif /* CONFIG_SVINTO_SIM */ 3468 3469 info->baud = cflag_to_baud(cflag); 3470#ifndef CONFIG_SVINTO_SIM 3471 info->port[REG_BAUD] = cflag_to_etrax_baud(cflag); 3472#endif /* CONFIG_SVINTO_SIM */ 3473 } 3474 3475#ifndef CONFIG_SVINTO_SIM 3476 /* start with default settings and then fill in changes */ 3477 save_flags(flags); 3478 cli(); 3479 /* 8 bit, no/even parity */ 3480 info->rx_ctrl &= ~(IO_MASK(R_SERIAL0_REC_CTRL, rec_bitnr) | 3481 IO_MASK(R_SERIAL0_REC_CTRL, rec_par_en) | 3482 IO_MASK(R_SERIAL0_REC_CTRL, rec_par)); 3483 3484 /* 8 bit, no/even parity, 1 stop bit, no cts */ 3485 info->tx_ctrl &= ~(IO_MASK(R_SERIAL0_TR_CTRL, tr_bitnr) | 3486 IO_MASK(R_SERIAL0_TR_CTRL, tr_par_en) | 3487 IO_MASK(R_SERIAL0_TR_CTRL, tr_par) | 3488 IO_MASK(R_SERIAL0_TR_CTRL, stop_bits) | 3489 IO_MASK(R_SERIAL0_TR_CTRL, auto_cts)); 3490 3491 if ((cflag & CSIZE) == CS7) { 3492 /* set 7 bit mode */ 3493 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_bitnr, tr_7bit); 3494 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_bitnr, rec_7bit); 3495 } 3496 3497 if (cflag & CSTOPB) { 3498 /* set 2 stop bit mode */ 3499 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, stop_bits, two_bits); 3500 } 3501 3502 if (cflag & PARENB) { 3503 /* enable parity */ 3504 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_par_en, enable); 3505 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_par_en, enable); 3506 } 3507 3508 if (cflag & CMSPAR) { 3509 /* enable stick parity, PARODD mean Mark which matches ETRAX */ 3510 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_stick_par, stick); 3511 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_stick_par, stick); 3512 } 3513 if (cflag & PARODD) { 3514 /* set odd parity (or Mark if CMSPAR) */ 3515 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_par, odd); 3516 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_par, odd); 3517 } 3518 3519 if (cflag & CRTSCTS) { 3520 /* enable automatic CTS handling */ 3521 DFLOW(DEBUG_LOG(info->line, "FLOW auto_cts enabled\n", 0)); 3522 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, auto_cts, active); 3523 } 3524 3525 /* make sure the tx and rx are enabled */ 3526 3527 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_enable, enable); 3528 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_enable, enable); 3529 3530 /* actually write the control regs to the hardware */ 3531 3532 info->port[REG_TR_CTRL] = info->tx_ctrl; 3533 info->port[REG_REC_CTRL] = info->rx_ctrl; 3534 xoff = IO_FIELD(R_SERIAL0_XOFF, xoff_char, STOP_CHAR(info->tty)); 3535 xoff |= IO_STATE(R_SERIAL0_XOFF, tx_stop, enable); 3536 if (info->tty->termios->c_iflag & IXON ) { 3537 DFLOW(DEBUG_LOG(info->line, "FLOW XOFF enabled 0x%02X\n", STOP_CHAR(info->tty))); 3538 xoff |= IO_STATE(R_SERIAL0_XOFF, auto_xoff, enable); 3539 } 3540 3541 *((unsigned long *)&info->port[REG_XOFF]) = xoff; 3542 restore_flags(flags); 3543#endif /* !CONFIG_SVINTO_SIM */ 3544 3545 update_char_time(info); 3546 3547} /* change_speed */ 3548 3549/* start transmitting chars NOW */ 3550 3551static void 3552rs_flush_chars(struct tty_struct *tty) 3553{ 3554 struct e100_serial *info = (struct e100_serial *)tty->driver_data; 3555 unsigned long flags; 3556 3557 if (info->tr_running || 3558 info->xmit.head == info->xmit.tail || 3559 tty->stopped || 3560 tty->hw_stopped || 3561 !info->xmit.buf) 3562 return; 3563 3564#ifdef SERIAL_DEBUG_FLOW 3565 printk("rs_flush_chars\n"); 3566#endif 3567 3568 /* this protection might not exactly be necessary here */ 3569 3570 save_flags(flags); 3571 cli(); 3572 start_transmit(info); 3573 restore_flags(flags); 3574} 3575 3576static int rs_raw_write(struct tty_struct * tty, int from_user, 3577 const unsigned char *buf, int count) 3578{ 3579 int c, ret = 0; 3580 struct e100_serial *info = (struct e100_serial *)tty->driver_data; 3581 unsigned long flags; 3582 3583 /* first some sanity checks */ 3584 3585 if (!tty || !info->xmit.buf || !tmp_buf) 3586 return 0; 3587 3588#ifdef SERIAL_DEBUG_DATA 3589 if (info->line == SERIAL_DEBUG_LINE) 3590 printk("rs_raw_write (%d), status %d\n", 3591 count, info->port[REG_STATUS]); 3592#endif 3593 3594#ifdef CONFIG_SVINTO_SIM 3595 /* Really simple. The output is here and now. */ 3596 SIMCOUT(buf, count); 3597 return count; 3598#endif 3599 save_flags(flags); 3600 DFLOW(DEBUG_LOG(info->line, "write count %i ", count)); 3601 DFLOW(DEBUG_LOG(info->line, "ldisc %i\n", tty->ldisc.chars_in_buffer(tty))); 3602 3603 3604 /* the cli/restore_flags pairs below are needed because the 3605 * DMA interrupt handler moves the info->xmit values. the memcpy 3606 * needs to be in the critical region unfortunately, because we 3607 * need to read xmit values, memcpy, write xmit values in one 3608 * atomic operation... this could perhaps be avoided by more clever 3609 * design. 3610 */ 3611 if (from_user) { 3612 mutex_lock(&tmp_buf_mutex); 3613 while (1) { 3614 int c1; 3615 c = CIRC_SPACE_TO_END(info->xmit.head, 3616 info->xmit.tail, 3617 SERIAL_XMIT_SIZE); 3618 if (count < c) 3619 c = count; 3620 if (c <= 0) 3621 break; 3622 3623 c -= copy_from_user(tmp_buf, buf, c); 3624 if (!c) { 3625 if (!ret) 3626 ret = -EFAULT; 3627 break; 3628 } 3629 cli(); 3630 c1 = CIRC_SPACE_TO_END(info->xmit.head, 3631 info->xmit.tail, 3632 SERIAL_XMIT_SIZE); 3633 if (c1 < c) 3634 c = c1; 3635 memcpy(info->xmit.buf + info->xmit.head, tmp_buf, c); 3636 info->xmit.head = ((info->xmit.head + c) & 3637 (SERIAL_XMIT_SIZE-1)); 3638 restore_flags(flags); 3639 buf += c; 3640 count -= c; 3641 ret += c; 3642 } 3643 mutex_unlock(&tmp_buf_mutex); 3644 } else { 3645 cli(); 3646 while (count) { 3647 c = CIRC_SPACE_TO_END(info->xmit.head, 3648 info->xmit.tail, 3649 SERIAL_XMIT_SIZE); 3650 3651 if (count < c) 3652 c = count; 3653 if (c <= 0) 3654 break; 3655 3656 memcpy(info->xmit.buf + info->xmit.head, buf, c); 3657 info->xmit.head = (info->xmit.head + c) & 3658 (SERIAL_XMIT_SIZE-1); 3659 buf += c; 3660 count -= c; 3661 ret += c; 3662 } 3663 restore_flags(flags); 3664 } 3665 3666 /* enable transmitter if not running, unless the tty is stopped 3667 * this does not need IRQ protection since if tr_running == 0 3668 * the IRQ's are not running anyway for this port. 3669 */ 3670 DFLOW(DEBUG_LOG(info->line, "write ret %i\n", ret)); 3671 3672 if (info->xmit.head != info->xmit.tail && 3673 !tty->stopped && 3674 !tty->hw_stopped && 3675 !info->tr_running) { 3676 start_transmit(info); 3677 } 3678 3679 return ret; 3680} /* raw_raw_write() */ 3681 3682static int 3683rs_write(struct tty_struct * tty, int from_user, 3684 const unsigned char *buf, int count) 3685{ 3686#if defined(CONFIG_ETRAX_RS485) 3687 struct e100_serial *info = (struct e100_serial *)tty->driver_data; 3688 3689 if (info->rs485.enabled) 3690 { 3691 /* If we are in RS-485 mode, we need to toggle RTS and disable 3692 * the receiver before initiating a DMA transfer 3693 */ 3694#ifdef CONFIG_ETRAX_FAST_TIMER 3695 /* Abort any started timer */ 3696 fast_timers_rs485[info->line].function = NULL; 3697 del_fast_timer(&fast_timers_rs485[info->line]); 3698#endif 3699 e100_rts(info, info->rs485.rts_on_send); 3700#if defined(CONFIG_ETRAX_RS485_DISABLE_RECEIVER) 3701 e100_disable_rx(info); 3702 e100_enable_rx_irq(info); 3703#endif 3704 3705 if (info->rs485.delay_rts_before_send > 0) 3706 msleep(info->rs485.delay_rts_before_send); 3707 } 3708#endif /* CONFIG_ETRAX_RS485 */ 3709 3710 count = rs_raw_write(tty, from_user, buf, count); 3711 3712#if defined(CONFIG_ETRAX_RS485) 3713 if (info->rs485.enabled) 3714 { 3715 unsigned int val; 3716 /* If we are in RS-485 mode the following has to be done: 3717 * wait until DMA is ready 3718 * wait on transmit shift register 3719 * toggle RTS 3720 * enable the receiver 3721 */ 3722 3723 /* Sleep until all sent */ 3724 tty_wait_until_sent(tty, 0); 3725#ifdef CONFIG_ETRAX_FAST_TIMER 3726 /* Now sleep a little more so that shift register is empty */ 3727 schedule_usleep(info->char_time_usec * 2); 3728#endif 3729 /* wait on transmit shift register */ 3730 do{ 3731 get_lsr_info(info, &val); 3732 }while (!(val & TIOCSER_TEMT)); 3733 3734 e100_rts(info, info->rs485.rts_after_sent); 3735 3736#if defined(CONFIG_ETRAX_RS485_DISABLE_RECEIVER) 3737 e100_enable_rx(info); 3738 e100_enable_rxdma_irq(info); 3739#endif 3740 } 3741#endif /* CONFIG_ETRAX_RS485 */ 3742 3743 return count; 3744} /* rs_write */ 3745 3746 3747/* how much space is available in the xmit buffer? */ 3748 3749static int 3750rs_write_room(struct tty_struct *tty) 3751{ 3752 struct e100_serial *info = (struct e100_serial *)tty->driver_data; 3753 3754 return CIRC_SPACE(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE); 3755} 3756 3757/* How many chars are in the xmit buffer? 3758 * This does not include any chars in the transmitter FIFO. 3759 * Use wait_until_sent for waiting for FIFO drain. 3760 */ 3761 3762static int 3763rs_chars_in_buffer(struct tty_struct *tty) 3764{ 3765 struct e100_serial *info = (struct e100_serial *)tty->driver_data; 3766 3767 return CIRC_CNT(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE); 3768} 3769 3770/* discard everything in the xmit buffer */ 3771 3772static void 3773rs_flush_buffer(struct tty_struct *tty) 3774{ 3775 struct e100_serial *info = (struct e100_serial *)tty->driver_data; 3776 unsigned long flags; 3777 3778 save_flags(flags); 3779 cli(); 3780 info->xmit.head = info->xmit.tail = 0; 3781 restore_flags(flags); 3782 3783 tty_wakeup(tty); 3784} 3785 3786/* 3787 * This function is used to send a high-priority XON/XOFF character to 3788 * the device 3789 * 3790 * Since we use DMA we don't check for info->x_char in transmit_chars_dma(), 3791 * but we do it in handle_ser_tx_interrupt(). 3792 * We disable DMA channel and enable tx ready interrupt and write the 3793 * character when possible. 3794 */ 3795static void rs_send_xchar(struct tty_struct *tty, char ch) 3796{ 3797 struct e100_serial *info = (struct e100_serial *)tty->driver_data; 3798 unsigned long flags; 3799 save_flags(flags); cli(); 3800 if (info->uses_dma_out) { 3801 /* Put the DMA on hold and disable the channel */ 3802 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, hold); 3803 while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->ocmdadr) != 3804 IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, hold)); 3805 e100_disable_txdma_channel(info); 3806 } 3807 3808 /* Must make sure transmitter is not stopped before we can transmit */ 3809 if (tty->stopped) 3810 rs_start(tty); 3811 3812 /* Enable manual transmit interrupt and send from there */ 3813 DFLOW(DEBUG_LOG(info->line, "rs_send_xchar 0x%02X\n", ch)); 3814 info->x_char = ch; 3815 e100_enable_serial_tx_ready_irq(info); 3816 restore_flags(flags); 3817} 3818 3819/* 3820 * ------------------------------------------------------------ 3821 * rs_throttle() 3822 * 3823 * This routine is called by the upper-layer tty layer to signal that 3824 * incoming characters should be throttled. 3825 * ------------------------------------------------------------ 3826 */ 3827static void 3828rs_throttle(struct tty_struct * tty) 3829{ 3830 struct e100_serial *info = (struct e100_serial *)tty->driver_data; 3831#ifdef SERIAL_DEBUG_THROTTLE 3832 char buf[64]; 3833 3834 printk("throttle %s: %lu....\n", tty_name(tty, buf), 3835 (unsigned long)tty->ldisc.chars_in_buffer(tty)); 3836#endif 3837 DFLOW(DEBUG_LOG(info->line,"rs_throttle %lu\n", tty->ldisc.chars_in_buffer(tty))); 3838 3839 /* Do RTS before XOFF since XOFF might take some time */ 3840 if (tty->termios->c_cflag & CRTSCTS) { 3841 /* Turn off RTS line */ 3842 e100_rts(info, 0); 3843 } 3844 if (I_IXOFF(tty)) 3845 rs_send_xchar(tty, STOP_CHAR(tty)); 3846 3847} 3848 3849static void 3850rs_unthrottle(struct tty_struct * tty) 3851{ 3852 struct e100_serial *info = (struct e100_serial *)tty->driver_data; 3853#ifdef SERIAL_DEBUG_THROTTLE 3854 char buf[64]; 3855 3856 printk("unthrottle %s: %lu....\n", tty_name(tty, buf), 3857 (unsigned long)tty->ldisc.chars_in_buffer(tty)); 3858#endif 3859 DFLOW(DEBUG_LOG(info->line,"rs_unthrottle ldisc %d\n", tty->ldisc.chars_in_buffer(tty))); 3860 DFLOW(DEBUG_LOG(info->line,"rs_unthrottle flip.count: %i\n", tty->flip.count)); 3861 /* Do RTS before XOFF since XOFF might take some time */ 3862 if (tty->termios->c_cflag & CRTSCTS) { 3863 /* Assert RTS line */ 3864 e100_rts(info, 1); 3865 } 3866 3867 if (I_IXOFF(tty)) { 3868 if (info->x_char) 3869 info->x_char = 0; 3870 else 3871 rs_send_xchar(tty, START_CHAR(tty)); 3872 } 3873 3874} 3875 3876/* 3877 * ------------------------------------------------------------ 3878 * rs_ioctl() and friends 3879 * ------------------------------------------------------------ 3880 */ 3881 3882static int 3883get_serial_info(struct e100_serial * info, 3884 struct serial_struct * retinfo) 3885{ 3886 struct serial_struct tmp; 3887 3888 /* this is all probably wrong, there are a lot of fields 3889 * here that we don't have in e100_serial and maybe we 3890 * should set them to something else than 0. 3891 */ 3892 3893 if (!retinfo) 3894 return -EFAULT; 3895 memset(&tmp, 0, sizeof(tmp)); 3896 tmp.type = info->type; 3897 tmp.line = info->line; 3898 tmp.port = (int)info->port; 3899 tmp.irq = info->irq; 3900 tmp.flags = info->flags; 3901 tmp.baud_base = info->baud_base; 3902 tmp.close_delay = info->close_delay; 3903 tmp.closing_wait = info->closing_wait; 3904 tmp.custom_divisor = info->custom_divisor; 3905 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo))) 3906 return -EFAULT; 3907 return 0; 3908} 3909 3910static int 3911set_serial_info(struct e100_serial *info, 3912 struct serial_struct *new_info) 3913{ 3914 struct serial_struct new_serial; 3915 struct e100_serial old_info; 3916 int retval = 0; 3917 3918 if (copy_from_user(&new_serial, new_info, sizeof(new_serial))) 3919 return -EFAULT; 3920 3921 old_info = *info; 3922 3923 if (!capable(CAP_SYS_ADMIN)) { 3924 if ((new_serial.type != info->type) || 3925 (new_serial.close_delay != info->close_delay) || 3926 ((new_serial.flags & ~ASYNC_USR_MASK) != 3927 (info->flags & ~ASYNC_USR_MASK))) 3928 return -EPERM; 3929 info->flags = ((info->flags & ~ASYNC_USR_MASK) | 3930 (new_serial.flags & ASYNC_USR_MASK)); 3931 goto check_and_exit; 3932 } 3933 3934 if (info->count > 1) 3935 return -EBUSY; 3936 3937 /* 3938 * OK, past this point, all the error checking has been done. 3939 * At this point, we start making changes..... 3940 */ 3941 3942 info->baud_base = new_serial.baud_base; 3943 info->flags = ((info->flags & ~ASYNC_FLAGS) | 3944 (new_serial.flags & ASYNC_FLAGS)); 3945 info->custom_divisor = new_serial.custom_divisor; 3946 info->type = new_serial.type; 3947 info->close_delay = new_serial.close_delay; 3948 info->closing_wait = new_serial.closing_wait; 3949 info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0; 3950 3951 check_and_exit: 3952 if (info->flags & ASYNC_INITIALIZED) { 3953 change_speed(info); 3954 } else 3955 retval = startup(info); 3956 return retval; 3957} 3958 3959/* 3960 * get_lsr_info - get line status register info 3961 * 3962 * Purpose: Let user call ioctl() to get info when the UART physically 3963 * is emptied. On bus types like RS485, the transmitter must 3964 * release the bus after transmitting. This must be done when 3965 * the transmit shift register is empty, not be done when the 3966 * transmit holding register is empty. This functionality 3967 * allows an RS485 driver to be written in user space. 3968 */ 3969static int 3970get_lsr_info(struct e100_serial * info, unsigned int *value) 3971{ 3972 unsigned int result = TIOCSER_TEMT; 3973#ifndef CONFIG_SVINTO_SIM 3974 unsigned long curr_time = jiffies; 3975 unsigned long curr_time_usec = GET_JIFFIES_USEC(); 3976 unsigned long elapsed_usec = 3977 (curr_time - info->last_tx_active) * 1000000/HZ + 3978 curr_time_usec - info->last_tx_active_usec; 3979 3980 if (info->xmit.head != info->xmit.tail || 3981 elapsed_usec < 2*info->char_time_usec) { 3982 result = 0; 3983 } 3984#endif 3985 3986 if (copy_to_user(value, &result, sizeof(int))) 3987 return -EFAULT; 3988 return 0; 3989} 3990 3991#ifdef SERIAL_DEBUG_IO 3992struct state_str 3993{ 3994 int state; 3995 const char *str; 3996}; 3997 3998const struct state_str control_state_str[] = { 3999 {TIOCM_DTR, "DTR" }, 4000 {TIOCM_RTS, "RTS"}, 4001 {TIOCM_ST, "ST?" }, 4002 {TIOCM_SR, "SR?" }, 4003 {TIOCM_CTS, "CTS" }, 4004 {TIOCM_CD, "CD" }, 4005 {TIOCM_RI, "RI" }, 4006 {TIOCM_DSR, "DSR" }, 4007 {0, NULL } 4008}; 4009 4010char *get_control_state_str(int MLines, char *s) 4011{ 4012 int i = 0; 4013 4014 s[0]='\0'; 4015 while (control_state_str[i].str != NULL) { 4016 if (MLines & control_state_str[i].state) { 4017 if (s[0] != '\0') { 4018 strcat(s, ", "); 4019 } 4020 strcat(s, control_state_str[i].str); 4021 } 4022 i++; 4023 } 4024 return s; 4025} 4026#endif 4027 4028static int 4029get_modem_info(struct e100_serial * info, unsigned int *value) 4030{ 4031 unsigned int result; 4032 /* Polarity isn't verified */ 4033 4034 result = 4035 (!E100_RTS_GET(info) ? TIOCM_RTS : 0) 4036 | (!E100_DTR_GET(info) ? TIOCM_DTR : 0) 4037 | (!E100_RI_GET(info) ? TIOCM_RNG : 0) 4038 | (!E100_DSR_GET(info) ? TIOCM_DSR : 0) 4039 | (!E100_CD_GET(info) ? TIOCM_CAR : 0) 4040 | (!E100_CTS_GET(info) ? TIOCM_CTS : 0); 4041 4042#ifdef SERIAL_DEBUG_IO 4043 printk("e100ser: modem state: %i 0x%08X\n", result, result); 4044 { 4045 char s[100]; 4046 4047 get_control_state_str(result, s); 4048 printk("state: %s\n", s); 4049 } 4050#endif 4051 if (copy_to_user(value, &result, sizeof(int))) 4052 return -EFAULT; 4053 return 0; 4054} 4055 4056 4057static int 4058set_modem_info(struct e100_serial * info, unsigned int cmd, 4059 unsigned int *value) 4060{ 4061 unsigned int arg; 4062 4063 if (copy_from_user(&arg, value, sizeof(int))) 4064 return -EFAULT; 4065 4066 switch (cmd) { 4067 case TIOCMBIS: 4068 if (arg & TIOCM_RTS) { 4069 e100_rts(info, 1); 4070 } 4071 if (arg & TIOCM_DTR) { 4072 e100_dtr(info, 1); 4073 } 4074 /* Handle FEMALE behaviour */ 4075 if (arg & TIOCM_RI) { 4076 e100_ri_out(info, 1); 4077 } 4078 if (arg & TIOCM_CD) { 4079 e100_cd_out(info, 1); 4080 } 4081 break; 4082 case TIOCMBIC: 4083 if (arg & TIOCM_RTS) { 4084 e100_rts(info, 0); 4085 } 4086 if (arg & TIOCM_DTR) { 4087 e100_dtr(info, 0); 4088 } 4089 /* Handle FEMALE behaviour */ 4090 if (arg & TIOCM_RI) { 4091 e100_ri_out(info, 0); 4092 } 4093 if (arg & TIOCM_CD) { 4094 e100_cd_out(info, 0); 4095 } 4096 break; 4097 case TIOCMSET: 4098 e100_rts(info, arg & TIOCM_RTS); 4099 e100_dtr(info, arg & TIOCM_DTR); 4100 /* Handle FEMALE behaviour */ 4101 e100_ri_out(info, arg & TIOCM_RI); 4102 e100_cd_out(info, arg & TIOCM_CD); 4103 break; 4104 default: 4105 return -EINVAL; 4106 } 4107 return 0; 4108} 4109 4110 4111static void 4112rs_break(struct tty_struct *tty, int break_state) 4113{ 4114 struct e100_serial * info = (struct e100_serial *)tty->driver_data; 4115 unsigned long flags; 4116 4117 if (!info->port) 4118 return; 4119 4120 save_flags(flags); 4121 cli(); 4122 if (break_state == -1) { 4123 /* Go to manual mode and set the txd pin to 0 */ 4124 info->tx_ctrl &= 0x3F; /* Clear bit 7 (txd) and 6 (tr_enable) */ 4125 } else { 4126 info->tx_ctrl |= (0x80 | 0x40); /* Set bit 7 (txd) and 6 (tr_enable) */ 4127 } 4128 info->port[REG_TR_CTRL] = info->tx_ctrl; 4129 restore_flags(flags); 4130} 4131 4132static int 4133rs_ioctl(struct tty_struct *tty, struct file * file, 4134 unsigned int cmd, unsigned long arg) 4135{ 4136 struct e100_serial * info = (struct e100_serial *)tty->driver_data; 4137 4138 if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) && 4139 (cmd != TIOCSERCONFIG) && (cmd != TIOCSERGWILD) && 4140 (cmd != TIOCSERSWILD) && (cmd != TIOCSERGSTRUCT)) { 4141 if (tty->flags & (1 << TTY_IO_ERROR)) 4142 return -EIO; 4143 } 4144 4145 switch (cmd) { 4146 case TIOCMGET: 4147 return get_modem_info(info, (unsigned int *) arg); 4148 case TIOCMBIS: 4149 case TIOCMBIC: 4150 case TIOCMSET: 4151 return set_modem_info(info, cmd, (unsigned int *) arg); 4152 case TIOCGSERIAL: 4153 return get_serial_info(info, 4154 (struct serial_struct *) arg); 4155 case TIOCSSERIAL: 4156 return set_serial_info(info, 4157 (struct serial_struct *) arg); 4158 case TIOCSERGETLSR: /* Get line status register */ 4159 return get_lsr_info(info, (unsigned int *) arg); 4160 4161 case TIOCSERGSTRUCT: 4162 if (copy_to_user((struct e100_serial *) arg, 4163 info, sizeof(struct e100_serial))) 4164 return -EFAULT; 4165 return 0; 4166 4167#if defined(CONFIG_ETRAX_RS485) 4168 case TIOCSERSETRS485: 4169 { 4170 struct rs485_control rs485ctrl; 4171 if (copy_from_user(&rs485ctrl, (struct rs485_control*)arg, sizeof(rs485ctrl))) 4172 return -EFAULT; 4173 4174 return e100_enable_rs485(tty, &rs485ctrl); 4175 } 4176 4177 case TIOCSERWRRS485: 4178 { 4179 struct rs485_write rs485wr; 4180 if (copy_from_user(&rs485wr, (struct rs485_write*)arg, sizeof(rs485wr))) 4181 return -EFAULT; 4182 4183 return e100_write_rs485(tty, 1, rs485wr.outc, rs485wr.outc_size); 4184 } 4185#endif 4186 4187 default: 4188 return -ENOIOCTLCMD; 4189 } 4190 return 0; 4191} 4192 4193static void 4194rs_set_termios(struct tty_struct *tty, struct ktermios *old_termios) 4195{ 4196 struct e100_serial *info = (struct e100_serial *)tty->driver_data; 4197 4198 if (tty->termios->c_cflag == old_termios->c_cflag && 4199 tty->termios->c_iflag == old_termios->c_iflag) 4200 return; 4201 4202 change_speed(info); 4203 4204 /* Handle turning off CRTSCTS */ 4205 if ((old_termios->c_cflag & CRTSCTS) && 4206 !(tty->termios->c_cflag & CRTSCTS)) { 4207 tty->hw_stopped = 0; 4208 rs_start(tty); 4209 } 4210 4211} 4212 4213/* In debugport.c - register a console write function that uses the normal 4214 * serial driver 4215 */ 4216typedef int (*debugport_write_function)(int i, const char *buf, unsigned int len); 4217 4218extern debugport_write_function debug_write_function; 4219 4220static int rs_debug_write_function(int i, const char *buf, unsigned int len) 4221{ 4222 int cnt; 4223 int written = 0; 4224 struct tty_struct *tty; 4225 static int recurse_cnt = 0; 4226 4227 tty = rs_table[i].tty; 4228 if (tty) { 4229 unsigned long flags; 4230 if (recurse_cnt > 5) /* We skip this debug output */ 4231 return 1; 4232 4233 local_irq_save(flags); 4234 recurse_cnt++; 4235 local_irq_restore(flags); 4236 do { 4237 cnt = rs_write(tty, 0, buf + written, len); 4238 if (cnt >= 0) { 4239 written += cnt; 4240 buf += cnt; 4241 len -= cnt; 4242 } else 4243 len = cnt; 4244 } while(len > 0); 4245 local_irq_save(flags); 4246 recurse_cnt--; 4247 local_irq_restore(flags); 4248 return 1; 4249 } 4250 return 0; 4251} 4252 4253/* 4254 * ------------------------------------------------------------ 4255 * rs_close() 4256 * 4257 * This routine is called when the serial port gets closed. First, we 4258 * wait for the last remaining data to be sent. Then, we unlink its 4259 * S structure from the interrupt chain if necessary, and we free 4260 * that IRQ if nothing is left in the chain. 4261 * ------------------------------------------------------------ 4262 */ 4263static void 4264rs_close(struct tty_struct *tty, struct file * filp) 4265{ 4266 struct e100_serial * info = (struct e100_serial *)tty->driver_data; 4267 unsigned long flags; 4268 4269 if (!info) 4270 return; 4271 4272 /* interrupts are disabled for this entire function */ 4273 4274 save_flags(flags); 4275 cli(); 4276 4277 if (tty_hung_up_p(filp)) { 4278 restore_flags(flags); 4279 return; 4280 } 4281 4282#ifdef SERIAL_DEBUG_OPEN 4283 printk("[%d] rs_close ttyS%d, count = %d\n", current->pid, 4284 info->line, info->count); 4285#endif 4286 if ((tty->count == 1) && (info->count != 1)) { 4287 /* 4288 * Uh, oh. tty->count is 1, which means that the tty 4289 * structure will be freed. Info->count should always 4290 * be one in these conditions. If it's greater than 4291 * one, we've got real problems, since it means the 4292 * serial port won't be shutdown. 4293 */ 4294 printk(KERN_CRIT 4295 "rs_close: bad serial port count; tty->count is 1, " 4296 "info->count is %d\n", info->count); 4297 info->count = 1; 4298 } 4299 if (--info->count < 0) { 4300 printk(KERN_CRIT "rs_close: bad serial port count for ttyS%d: %d\n", 4301 info->line, info->count); 4302 info->count = 0; 4303 } 4304 if (info->count) { 4305 restore_flags(flags); 4306 return; 4307 } 4308 info->flags |= ASYNC_CLOSING; 4309 /* 4310 * Save the termios structure, since this port may have 4311 * separate termios for callout and dialin. 4312 */ 4313 if (info->flags & ASYNC_NORMAL_ACTIVE) 4314 info->normal_termios = *tty->termios; 4315 /* 4316 * Now we wait for the transmit buffer to clear; and we notify 4317 * the line discipline to only process XON/XOFF characters. 4318 */ 4319 tty->closing = 1; 4320 if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE) 4321 tty_wait_until_sent(tty, info->closing_wait); 4322 /* 4323 * At this point we stop accepting input. To do this, we 4324 * disable the serial receiver and the DMA receive interrupt. 4325 */ 4326#ifdef SERIAL_HANDLE_EARLY_ERRORS 4327 e100_disable_serial_data_irq(info); 4328#endif 4329 4330#ifndef CONFIG_SVINTO_SIM 4331 e100_disable_rx(info); 4332 e100_disable_rx_irq(info); 4333 4334 if (info->flags & ASYNC_INITIALIZED) { 4335 /* 4336 * Before we drop DTR, make sure the UART transmitter 4337 * has completely drained; this is especially 4338 * important as we have a transmit FIFO! 4339 */ 4340 rs_wait_until_sent(tty, HZ); 4341 } 4342#endif 4343 4344 shutdown(info); 4345 if (tty->driver->flush_buffer) 4346 tty->driver->flush_buffer(tty); 4347 if (tty->ldisc.flush_buffer) 4348 tty->ldisc.flush_buffer(tty); 4349 tty->closing = 0; 4350 info->event = 0; 4351 info->tty = 0; 4352 if (info->blocked_open) { 4353 if (info->close_delay) 4354 schedule_timeout_interruptible(info->close_delay); 4355 wake_up_interruptible(&info->open_wait); 4356 } 4357 info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING); 4358 wake_up_interruptible(&info->close_wait); 4359 restore_flags(flags); 4360 4361 /* port closed */ 4362 4363#if defined(CONFIG_ETRAX_RS485) 4364 if (info->rs485.enabled) { 4365 info->rs485.enabled = 0; 4366#if defined(CONFIG_ETRAX_RS485_ON_PA) 4367 *R_PORT_PA_DATA = port_pa_data_shadow &= ~(1 << rs485_pa_bit); 4368#endif 4369#if defined(CONFIG_ETRAX_RS485_ON_PORT_G) 4370 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow, 4371 rs485_port_g_bit, 0); 4372#endif 4373#if defined(CONFIG_ETRAX_RS485_LTC1387) 4374 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow, 4375 CONFIG_ETRAX_RS485_LTC1387_DXEN_PORT_G_BIT, 0); 4376 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow, 4377 CONFIG_ETRAX_RS485_LTC1387_RXEN_PORT_G_BIT, 0); 4378#endif 4379 } 4380#endif 4381} 4382 4383/* 4384 * rs_wait_until_sent() --- wait until the transmitter is empty 4385 */ 4386static void rs_wait_until_sent(struct tty_struct *tty, int timeout) 4387{ 4388 unsigned long orig_jiffies; 4389 struct e100_serial *info = (struct e100_serial *)tty->driver_data; 4390 unsigned long curr_time = jiffies; 4391 unsigned long curr_time_usec = GET_JIFFIES_USEC(); 4392 long elapsed_usec = 4393 (curr_time - info->last_tx_active) * (1000000/HZ) + 4394 curr_time_usec - info->last_tx_active_usec; 4395 4396 /* 4397 * Check R_DMA_CHx_STATUS bit 0-6=number of available bytes in FIFO 4398 * R_DMA_CHx_HWSW bit 31-16=nbr of bytes left in DMA buffer (0=64k) 4399 */ 4400 orig_jiffies = jiffies; 4401 while (info->xmit.head != info->xmit.tail || /* More in send queue */ 4402 (*info->ostatusadr & 0x007f) || /* more in FIFO */ 4403 (elapsed_usec < 2*info->char_time_usec)) { 4404 schedule_timeout_interruptible(1); 4405 if (signal_pending(current)) 4406 break; 4407 if (timeout && time_after(jiffies, orig_jiffies + timeout)) 4408 break; 4409 curr_time = jiffies; 4410 curr_time_usec = GET_JIFFIES_USEC(); 4411 elapsed_usec = 4412 (curr_time - info->last_tx_active) * (1000000/HZ) + 4413 curr_time_usec - info->last_tx_active_usec; 4414 } 4415 set_current_state(TASK_RUNNING); 4416} 4417 4418/* 4419 * rs_hangup() --- called by tty_hangup() when a hangup is signaled. 4420 */ 4421void 4422rs_hangup(struct tty_struct *tty) 4423{ 4424 struct e100_serial * info = (struct e100_serial *)tty->driver_data; 4425 4426 rs_flush_buffer(tty); 4427 shutdown(info); 4428 info->event = 0; 4429 info->count = 0; 4430 info->flags &= ~ASYNC_NORMAL_ACTIVE; 4431 info->tty = 0; 4432 wake_up_interruptible(&info->open_wait); 4433} 4434 4435/* 4436 * ------------------------------------------------------------ 4437 * rs_open() and friends 4438 * ------------------------------------------------------------ 4439 */ 4440static int 4441block_til_ready(struct tty_struct *tty, struct file * filp, 4442 struct e100_serial *info) 4443{ 4444 DECLARE_WAITQUEUE(wait, current); 4445 unsigned long flags; 4446 int retval; 4447 int do_clocal = 0, extra_count = 0; 4448 4449 /* 4450 * If the device is in the middle of being closed, then block 4451 * until it's done, and then try again. 4452 */ 4453 if (tty_hung_up_p(filp) || 4454 (info->flags & ASYNC_CLOSING)) { 4455 if (info->flags & ASYNC_CLOSING) 4456 interruptible_sleep_on(&info->close_wait); 4457#ifdef SERIAL_DO_RESTART 4458 if (info->flags & ASYNC_HUP_NOTIFY) 4459 return -EAGAIN; 4460 else 4461 return -ERESTARTSYS; 4462#else 4463 return -EAGAIN; 4464#endif 4465 } 4466 4467 /* 4468 * If non-blocking mode is set, or the port is not enabled, 4469 * then make the check up front and then exit. 4470 */ 4471 if ((filp->f_flags & O_NONBLOCK) || 4472 (tty->flags & (1 << TTY_IO_ERROR))) { 4473 info->flags |= ASYNC_NORMAL_ACTIVE; 4474 return 0; 4475 } 4476 4477 if (tty->termios->c_cflag & CLOCAL) { 4478 do_clocal = 1; 4479 } 4480 4481 /* 4482 * Block waiting for the carrier detect and the line to become 4483 * free (i.e., not in use by the callout). While we are in 4484 * this loop, info->count is dropped by one, so that 4485 * rs_close() knows when to free things. We restore it upon 4486 * exit, either normal or abnormal. 4487 */ 4488 retval = 0; 4489 add_wait_queue(&info->open_wait, &wait); 4490#ifdef SERIAL_DEBUG_OPEN 4491 printk("block_til_ready before block: ttyS%d, count = %d\n", 4492 info->line, info->count); 4493#endif 4494 save_flags(flags); 4495 cli(); 4496 if (!tty_hung_up_p(filp)) { 4497 extra_count++; 4498 info->count--; 4499 } 4500 restore_flags(flags); 4501 info->blocked_open++; 4502 while (1) { 4503 save_flags(flags); 4504 cli(); 4505 /* assert RTS and DTR */ 4506 e100_rts(info, 1); 4507 e100_dtr(info, 1); 4508 restore_flags(flags); 4509 set_current_state(TASK_INTERRUPTIBLE); 4510 if (tty_hung_up_p(filp) || 4511 !(info->flags & ASYNC_INITIALIZED)) { 4512#ifdef SERIAL_DO_RESTART 4513 if (info->flags & ASYNC_HUP_NOTIFY) 4514 retval = -EAGAIN; 4515 else 4516 retval = -ERESTARTSYS; 4517#else 4518 retval = -EAGAIN; 4519#endif 4520 break; 4521 } 4522 if (!(info->flags & ASYNC_CLOSING) && do_clocal) 4523 /* && (do_clocal || DCD_IS_ASSERTED) */ 4524 break; 4525 if (signal_pending(current)) { 4526 retval = -ERESTARTSYS; 4527 break; 4528 } 4529#ifdef SERIAL_DEBUG_OPEN 4530 printk("block_til_ready blocking: ttyS%d, count = %d\n", 4531 info->line, info->count); 4532#endif 4533 schedule(); 4534 } 4535 set_current_state(TASK_RUNNING); 4536 remove_wait_queue(&info->open_wait, &wait); 4537 if (extra_count) 4538 info->count++; 4539 info->blocked_open--; 4540#ifdef SERIAL_DEBUG_OPEN 4541 printk("block_til_ready after blocking: ttyS%d, count = %d\n", 4542 info->line, info->count); 4543#endif 4544 if (retval) 4545 return retval; 4546 info->flags |= ASYNC_NORMAL_ACTIVE; 4547 return 0; 4548} 4549 4550/* 4551 * This routine is called whenever a serial port is opened. 4552 * It performs the serial-specific initialization for the tty structure. 4553 */ 4554static int 4555rs_open(struct tty_struct *tty, struct file * filp) 4556{ 4557 struct e100_serial *info; 4558 int retval, line; 4559 unsigned long page; 4560 4561 /* find which port we want to open */ 4562 4563 line = tty->index; 4564 4565 if (line < 0 || line >= NR_PORTS) 4566 return -ENODEV; 4567 4568 /* find the corresponding e100_serial struct in the table */ 4569 info = rs_table + line; 4570 4571 /* don't allow the opening of ports that are not enabled in the HW config */ 4572 if (!info->enabled) 4573 return -ENODEV; 4574 4575#ifdef SERIAL_DEBUG_OPEN 4576 printk("[%d] rs_open %s, count = %d\n", current->pid, tty->name, 4577 info->count); 4578#endif 4579 4580 info->count++; 4581 tty->driver_data = info; 4582 info->tty = tty; 4583 4584 info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0; 4585 4586 if (!tmp_buf) { 4587 page = get_zeroed_page(GFP_KERNEL); 4588 if (!page) { 4589 return -ENOMEM; 4590 } 4591 if (tmp_buf) 4592 free_page(page); 4593 else 4594 tmp_buf = (unsigned char *) page; 4595 } 4596 4597 /* 4598 * If the port is in the middle of closing, bail out now 4599 */ 4600 if (tty_hung_up_p(filp) || 4601 (info->flags & ASYNC_CLOSING)) { 4602 if (info->flags & ASYNC_CLOSING) 4603 interruptible_sleep_on(&info->close_wait); 4604#ifdef SERIAL_DO_RESTART 4605 return ((info->flags & ASYNC_HUP_NOTIFY) ? 4606 -EAGAIN : -ERESTARTSYS); 4607#else 4608 return -EAGAIN; 4609#endif 4610 } 4611 4612 /* 4613 * Start up the serial port 4614 */ 4615 4616 retval = startup(info); 4617 if (retval) 4618 return retval; 4619 4620 retval = block_til_ready(tty, filp, info); 4621 if (retval) { 4622#ifdef SERIAL_DEBUG_OPEN 4623 printk("rs_open returning after block_til_ready with %d\n", 4624 retval); 4625#endif 4626 return retval; 4627 } 4628 4629 if ((info->count == 1) && (info->flags & ASYNC_SPLIT_TERMIOS)) { 4630 *tty->termios = info->normal_termios; 4631 change_speed(info); 4632 } 4633 4634#ifdef SERIAL_DEBUG_OPEN 4635 printk("rs_open ttyS%d successful...\n", info->line); 4636#endif 4637 DLOG_INT_TRIG( log_int_pos = 0); 4638 4639 DFLIP( if (info->line == SERIAL_DEBUG_LINE) { 4640 info->icount.rx = 0; 4641 } ); 4642 4643 return 0; 4644} 4645 4646/* 4647 * /proc fs routines.... 4648 */ 4649 4650static int line_info(char *buf, struct e100_serial *info) 4651{ 4652 char stat_buf[30]; 4653 int ret; 4654 unsigned long tmp; 4655 4656 ret = sprintf(buf, "%d: uart:E100 port:%lX irq:%d", 4657 info->line, (unsigned long)info->port, info->irq); 4658 4659 if (!info->port || (info->type == PORT_UNKNOWN)) { 4660 ret += sprintf(buf+ret, "\n"); 4661 return ret; 4662 } 4663 4664 stat_buf[0] = 0; 4665 stat_buf[1] = 0; 4666 if (!E100_RTS_GET(info)) 4667 strcat(stat_buf, "|RTS"); 4668 if (!E100_CTS_GET(info)) 4669 strcat(stat_buf, "|CTS"); 4670 if (!E100_DTR_GET(info)) 4671 strcat(stat_buf, "|DTR"); 4672 if (!E100_DSR_GET(info)) 4673 strcat(stat_buf, "|DSR"); 4674 if (!E100_CD_GET(info)) 4675 strcat(stat_buf, "|CD"); 4676 if (!E100_RI_GET(info)) 4677 strcat(stat_buf, "|RI"); 4678 4679 ret += sprintf(buf+ret, " baud:%d", info->baud); 4680 4681 ret += sprintf(buf+ret, " tx:%lu rx:%lu", 4682 (unsigned long)info->icount.tx, 4683 (unsigned long)info->icount.rx); 4684 tmp = CIRC_CNT(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE); 4685 if (tmp) { 4686 ret += sprintf(buf+ret, " tx_pend:%lu/%lu", 4687 (unsigned long)tmp, 4688 (unsigned long)SERIAL_XMIT_SIZE); 4689 } 4690 4691 ret += sprintf(buf+ret, " rx_pend:%lu/%lu", 4692 (unsigned long)info->recv_cnt, 4693 (unsigned long)info->max_recv_cnt); 4694 4695 if (info->tty) { 4696 4697 if (info->tty->stopped) 4698 ret += sprintf(buf+ret, " stopped:%i", 4699 (int)info->tty->stopped); 4700 if (info->tty->hw_stopped) 4701 ret += sprintf(buf+ret, " hw_stopped:%i", 4702 (int)info->tty->hw_stopped); 4703 } 4704 4705 { 4706 unsigned char rstat = info->port[REG_STATUS]; 4707 if (rstat & IO_MASK(R_SERIAL0_STATUS, xoff_detect) ) 4708 ret += sprintf(buf+ret, " xoff_detect:1"); 4709 } 4710 4711 4712 4713 4714 4715 if (info->icount.frame) 4716 ret += sprintf(buf+ret, " fe:%lu", 4717 (unsigned long)info->icount.frame); 4718 4719 if (info->icount.parity) 4720 ret += sprintf(buf+ret, " pe:%lu", 4721 (unsigned long)info->icount.parity); 4722 4723 if (info->icount.brk) 4724 ret += sprintf(buf+ret, " brk:%lu", 4725 (unsigned long)info->icount.brk); 4726 4727 if (info->icount.overrun) 4728 ret += sprintf(buf+ret, " oe:%lu", 4729 (unsigned long)info->icount.overrun); 4730 4731 /* 4732 * Last thing is the RS-232 status lines 4733 */ 4734 ret += sprintf(buf+ret, " %s\n", stat_buf+1); 4735 return ret; 4736} 4737 4738int rs_read_proc(char *page, char **start, off_t off, int count, 4739 int *eof, void *data) 4740{ 4741 int i, len = 0, l; 4742 off_t begin = 0; 4743 4744 len += sprintf(page, "serinfo:1.0 driver:%s\n", 4745 serial_version); 4746 for (i = 0; i < NR_PORTS && len < 4000; i++) { 4747 if (!rs_table[i].enabled) 4748 continue; 4749 l = line_info(page + len, &rs_table[i]); 4750 len += l; 4751 if (len+begin > off+count) 4752 goto done; 4753 if (len+begin < off) { 4754 begin += len; 4755 len = 0; 4756 } 4757 } 4758#ifdef DEBUG_LOG_INCLUDED 4759 for (i = 0; i < debug_log_pos; i++) { 4760 len += sprintf(page + len, "%-4i %lu.%lu ", i, debug_log[i].time, timer_data_to_ns(debug_log[i].timer_data)); 4761 len += sprintf(page + len, debug_log[i].string, debug_log[i].value); 4762 if (len+begin > off+count) 4763 goto done; 4764 if (len+begin < off) { 4765 begin += len; 4766 len = 0; 4767 } 4768 } 4769 len += sprintf(page + len, "debug_log %i/%i %li bytes\n", 4770 i, DEBUG_LOG_SIZE, begin+len); 4771 debug_log_pos = 0; 4772#endif 4773 4774 *eof = 1; 4775done: 4776 if (off >= len+begin) 4777 return 0; 4778 *start = page + (off-begin); 4779 return ((count < begin+len-off) ? count : begin+len-off); 4780} 4781 4782/* Finally, routines used to initialize the serial driver. */ 4783 4784static void 4785show_serial_version(void) 4786{ 4787 printk(KERN_INFO 4788 "ETRAX 100LX serial-driver %s, (c) 2000-2004 Axis Communications AB\r\n", 4789 &serial_version[11]); /* "$Revision: x.yy" */ 4790} 4791 4792/* rs_init inits the driver at boot (using the module_init chain) */ 4793 4794static const struct tty_operations rs_ops = { 4795 .open = rs_open, 4796 .close = rs_close, 4797 .write = rs_write, 4798 .flush_chars = rs_flush_chars, 4799 .write_room = rs_write_room, 4800 .chars_in_buffer = rs_chars_in_buffer, 4801 .flush_buffer = rs_flush_buffer, 4802 .ioctl = rs_ioctl, 4803 .throttle = rs_throttle, 4804 .unthrottle = rs_unthrottle, 4805 .set_termios = rs_set_termios, 4806 .stop = rs_stop, 4807 .start = rs_start, 4808 .hangup = rs_hangup, 4809 .break_ctl = rs_break, 4810 .send_xchar = rs_send_xchar, 4811 .wait_until_sent = rs_wait_until_sent, 4812 .read_proc = rs_read_proc, 4813}; 4814 4815static int __init 4816rs_init(void) 4817{ 4818 int i; 4819 struct e100_serial *info; 4820 struct tty_driver *driver = alloc_tty_driver(NR_PORTS); 4821 4822 if (!driver) 4823 return -ENOMEM; 4824 4825 show_serial_version(); 4826 4827 /* Setup the timed flush handler system */ 4828 4829#if !defined(CONFIG_ETRAX_SERIAL_FAST_TIMER) 4830 init_timer(&flush_timer); 4831 flush_timer.function = timed_flush_handler; 4832 mod_timer(&flush_timer, jiffies + CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS); 4833#endif 4834 4835 /* Initialize the tty_driver structure */ 4836 4837 driver->driver_name = "serial"; 4838 driver->name = "ttyS"; 4839 driver->major = TTY_MAJOR; 4840 driver->minor_start = 64; 4841 driver->type = TTY_DRIVER_TYPE_SERIAL; 4842 driver->subtype = SERIAL_TYPE_NORMAL; 4843 driver->init_termios = tty_std_termios; 4844 driver->init_termios.c_cflag = 4845 B115200 | CS8 | CREAD | HUPCL | CLOCAL; /* is normally B9600 default... */ 4846 driver->init_termios.c_ispeed = 115200; 4847 driver->init_termios.c_ospeed = 115200; 4848 driver->flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_DYNAMIC_DEV; 4849 driver->termios = serial_termios; 4850 driver->termios_locked = serial_termios_locked; 4851 4852 tty_set_operations(driver, &rs_ops); 4853 serial_driver = driver; 4854 if (tty_register_driver(driver)) 4855 panic("Couldn't register serial driver\n"); 4856 /* do some initializing for the separate ports */ 4857 4858 for (i = 0, info = rs_table; i < NR_PORTS; i++,info++) { 4859 info->uses_dma_in = 0; 4860 info->uses_dma_out = 0; 4861 info->line = i; 4862 info->tty = 0; 4863 info->type = PORT_ETRAX; 4864 info->tr_running = 0; 4865 info->forced_eop = 0; 4866 info->baud_base = DEF_BAUD_BASE; 4867 info->custom_divisor = 0; 4868 info->flags = 0; 4869 info->close_delay = 5*HZ/10; 4870 info->closing_wait = 30*HZ; 4871 info->x_char = 0; 4872 info->event = 0; 4873 info->count = 0; 4874 info->blocked_open = 0; 4875 info->normal_termios = driver->init_termios; 4876 init_waitqueue_head(&info->open_wait); 4877 init_waitqueue_head(&info->close_wait); 4878 info->xmit.buf = NULL; 4879 info->xmit.tail = info->xmit.head = 0; 4880 info->first_recv_buffer = info->last_recv_buffer = NULL; 4881 info->recv_cnt = info->max_recv_cnt = 0; 4882 info->last_tx_active_usec = 0; 4883 info->last_tx_active = 0; 4884 4885#if defined(CONFIG_ETRAX_RS485) 4886 /* Set sane defaults */ 4887 info->rs485.rts_on_send = 0; 4888 info->rs485.rts_after_sent = 1; 4889 info->rs485.delay_rts_before_send = 0; 4890 info->rs485.enabled = 0; 4891#endif 4892 INIT_WORK(&info->work, do_softint, info); 4893 4894 if (info->enabled) { 4895 printk(KERN_INFO "%s%d at 0x%x is a builtin UART with DMA\n", 4896 serial_driver->name, info->line, (unsigned int)info->port); 4897 } 4898 } 4899#ifdef CONFIG_ETRAX_FAST_TIMER 4900#ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER 4901 memset(fast_timers, 0, sizeof(fast_timers)); 4902#endif 4903#ifdef CONFIG_ETRAX_RS485 4904 memset(fast_timers_rs485, 0, sizeof(fast_timers_rs485)); 4905#endif 4906 fast_timer_init(); 4907#endif 4908 4909#ifndef CONFIG_SVINTO_SIM 4910 /* Not needed in simulator. May only complicate stuff. */ 4911 /* hook the irq's for DMA channel 6 and 7, serial output and input, and some more... */ 4912 4913 if (request_irq(SERIAL_IRQ_NBR, ser_interrupt, IRQF_SHARED | IRQF_DISABLED, "serial ", NULL)) 4914 panic("irq8"); 4915 4916#ifdef CONFIG_ETRAX_SERIAL_PORT0 4917#ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA6_OUT 4918 if (request_irq(SER0_DMA_TX_IRQ_NBR, tr_interrupt, IRQF_DISABLED, "serial 0 dma tr", NULL)) 4919 panic("irq22"); 4920#endif 4921#ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA7_IN 4922 if (request_irq(SER0_DMA_RX_IRQ_NBR, rec_interrupt, IRQF_DISABLED, "serial 0 dma rec", NULL)) 4923 panic("irq23"); 4924#endif 4925#endif 4926 4927#ifdef CONFIG_ETRAX_SERIAL_PORT1 4928#ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA8_OUT 4929 if (request_irq(SER1_DMA_TX_IRQ_NBR, tr_interrupt, IRQF_DISABLED, "serial 1 dma tr", NULL)) 4930 panic("irq24"); 4931#endif 4932#ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA9_IN 4933 if (request_irq(SER1_DMA_RX_IRQ_NBR, rec_interrupt, IRQF_DISABLED, "serial 1 dma rec", NULL)) 4934 panic("irq25"); 4935#endif 4936#endif 4937#ifdef CONFIG_ETRAX_SERIAL_PORT2 4938 /* DMA Shared with par0 (and SCSI0 and ATA) */ 4939#ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA2_OUT 4940 if (request_irq(SER2_DMA_TX_IRQ_NBR, tr_interrupt, IRQF_SHARED | IRQF_DISABLED, "serial 2 dma tr", NULL)) 4941 panic("irq18"); 4942#endif 4943#ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA3_IN 4944 if (request_irq(SER2_DMA_RX_IRQ_NBR, rec_interrupt, IRQF_SHARED | IRQF_DISABLED, "serial 2 dma rec", NULL)) 4945 panic("irq19"); 4946#endif 4947#endif 4948#ifdef CONFIG_ETRAX_SERIAL_PORT3 4949 /* DMA Shared with par1 (and SCSI1 and Extern DMA 0) */ 4950#ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA4_OUT 4951 if (request_irq(SER3_DMA_TX_IRQ_NBR, tr_interrupt, IRQF_SHARED | IRQF_DISABLED, "serial 3 dma tr", NULL)) 4952 panic("irq20"); 4953#endif 4954#ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA5_IN 4955 if (request_irq(SER3_DMA_RX_IRQ_NBR, rec_interrupt, IRQF_SHARED | IRQF_DISABLED, "serial 3 dma rec", NULL)) 4956 panic("irq21"); 4957#endif 4958#endif 4959 4960#ifdef CONFIG_ETRAX_SERIAL_FLUSH_DMA_FAST 4961 if (request_irq(TIMER1_IRQ_NBR, timeout_interrupt, IRQF_SHARED | IRQF_DISABLED, 4962 "fast serial dma timeout", NULL)) { 4963 printk(KERN_CRIT "err: timer1 irq\n"); 4964 } 4965#endif 4966#endif /* CONFIG_SVINTO_SIM */ 4967 debug_write_function = rs_debug_write_function; 4968 return 0; 4969} 4970 4971/* this makes sure that rs_init is called during kernel boot */ 4972 4973module_init(rs_init); 4974