1/*+M*************************************************************************
2 * Perceptive Solutions, Inc. PSI-240I device driver proc support for Linux.
3 *
4 * Copyright (c) 1997 Perceptive Solutions, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2, or (at your option)
9 * any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; see the file COPYING.  If not, write to
18 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
19 *
20 *
21 *	File Name:		psi240i.h
22 *
23 *	Description:	Header file for the SCSI driver for the PSI240I
24 *					EIDE interface card.
25 *
26 *-M*************************************************************************/
27#ifndef _PSI240I_H
28#define _PSI240I_H
29
30#include <linux/types.h>
31
32#ifndef	PSI_EIDE_SCSIOP
33#define	PSI_EIDE_SCSIOP	1
34
35/************************************************/
36/*		Some defines that we like 				*/
37/************************************************/
38#define	CHAR		char
39#define	UCHAR		unsigned char
40#define	SHORT		short
41#define	USHORT		unsigned short
42#define	BOOL		unsigned short
43#define	LONG		long
44#define	ULONG		unsigned long
45#define	VOID		void
46
47/************************************************/
48/*		Timeout konstants		 				*/
49/************************************************/
50#define	TIMEOUT_READY				10		// 100 mSec
51#define	TIMEOUT_DRQ					40		// 400 mSec
52
53/************************************************/
54/*		Misc. macros			 				*/
55/************************************************/
56#define ANY2SCSI(up, p)					\
57((UCHAR *)up)[0] = (((ULONG)(p)) >> 8);	\
58((UCHAR *)up)[1] = ((ULONG)(p));
59
60#define SCSI2LONG(up)					\
61( (((long)*(((UCHAR *)up))) << 16)		\
62+ (((long)(((UCHAR *)up)[1])) << 8)		\
63+ ((long)(((UCHAR *)up)[2])) )
64
65#define XANY2SCSI(up, p)				\
66((UCHAR *)up)[0] = ((long)(p)) >> 24;	\
67((UCHAR *)up)[1] = ((long)(p)) >> 16;	\
68((UCHAR *)up)[2] = ((long)(p)) >> 8;	\
69((UCHAR *)up)[3] = ((long)(p));
70
71#define XSCSI2LONG(up)					\
72( (((long)(((UCHAR *)up)[0])) << 24)	\
73+ (((long)(((UCHAR *)up)[1])) << 16)	\
74+ (((long)(((UCHAR *)up)[2])) <<  8)	\
75+ ((long)(((UCHAR *)up)[3])) )
76
77/************************************************/
78/*		SCSI CDB operation codes 				*/
79/************************************************/
80#define SCSIOP_TEST_UNIT_READY		0x00
81#define SCSIOP_REZERO_UNIT			0x01
82#define SCSIOP_REWIND				0x01
83#define SCSIOP_REQUEST_BLOCK_ADDR	0x02
84#define SCSIOP_REQUEST_SENSE		0x03
85#define SCSIOP_FORMAT_UNIT			0x04
86#define SCSIOP_READ_BLOCK_LIMITS	0x05
87#define SCSIOP_REASSIGN_BLOCKS		0x07
88#define SCSIOP_READ6				0x08
89#define SCSIOP_RECEIVE				0x08
90#define SCSIOP_WRITE6				0x0A
91#define SCSIOP_PRINT				0x0A
92#define SCSIOP_SEND					0x0A
93#define SCSIOP_SEEK6				0x0B
94#define SCSIOP_TRACK_SELECT			0x0B
95#define SCSIOP_SLEW_PRINT			0x0B
96#define SCSIOP_SEEK_BLOCK			0x0C
97#define SCSIOP_PARTITION			0x0D
98#define SCSIOP_READ_REVERSE			0x0F
99#define SCSIOP_WRITE_FILEMARKS		0x10
100#define SCSIOP_FLUSH_BUFFER			0x10
101#define SCSIOP_SPACE				0x11
102#define SCSIOP_INQUIRY				0x12
103#define SCSIOP_VERIFY6				0x13
104#define SCSIOP_RECOVER_BUF_DATA		0x14
105#define SCSIOP_MODE_SELECT			0x15
106#define SCSIOP_RESERVE_UNIT			0x16
107#define SCSIOP_RELEASE_UNIT			0x17
108#define SCSIOP_COPY					0x18
109#define SCSIOP_ERASE				0x19
110#define SCSIOP_MODE_SENSE			0x1A
111#define SCSIOP_START_STOP_UNIT		0x1B
112#define SCSIOP_STOP_PRINT			0x1B
113#define SCSIOP_LOAD_UNLOAD			0x1B
114#define SCSIOP_RECEIVE_DIAGNOSTIC	0x1C
115#define SCSIOP_SEND_DIAGNOSTIC		0x1D
116#define SCSIOP_MEDIUM_REMOVAL		0x1E
117#define SCSIOP_READ_CAPACITY		0x25
118#define SCSIOP_READ					0x28
119#define SCSIOP_WRITE				0x2A
120#define SCSIOP_SEEK					0x2B
121#define SCSIOP_LOCATE				0x2B
122#define SCSIOP_WRITE_VERIFY			0x2E
123#define SCSIOP_VERIFY				0x2F
124#define SCSIOP_SEARCH_DATA_HIGH		0x30
125#define SCSIOP_SEARCH_DATA_EQUAL	0x31
126#define SCSIOP_SEARCH_DATA_LOW		0x32
127#define SCSIOP_SET_LIMITS			0x33
128#define SCSIOP_READ_POSITION		0x34
129#define SCSIOP_SYNCHRONIZE_CACHE	0x35
130#define SCSIOP_COMPARE				0x39
131#define SCSIOP_COPY_COMPARE			0x3A
132#define SCSIOP_WRITE_DATA_BUFF		0x3B
133#define SCSIOP_READ_DATA_BUFF		0x3C
134#define SCSIOP_CHANGE_DEFINITION	0x40
135#define SCSIOP_READ_SUB_CHANNEL		0x42
136#define SCSIOP_READ_TOC				0x43
137#define SCSIOP_READ_HEADER			0x44
138#define SCSIOP_PLAY_AUDIO			0x45
139#define SCSIOP_PLAY_AUDIO_MSF		0x47
140#define SCSIOP_PLAY_TRACK_INDEX		0x48
141#define SCSIOP_PLAY_TRACK_RELATIVE	0x49
142#define SCSIOP_PAUSE_RESUME			0x4B
143#define SCSIOP_LOG_SELECT			0x4C
144#define SCSIOP_LOG_SENSE			0x4D
145#define SCSIOP_MODE_SELECT10		0x55
146#define SCSIOP_MODE_SENSE10			0x5A
147#define SCSIOP_LOAD_UNLOAD_SLOT		0xA6
148#define SCSIOP_MECHANISM_STATUS		0xBD
149#define SCSIOP_READ_CD				0xBE
150
151// IDE command definitions
152#define IDE_COMMAND_ATAPI_RESET		0x08
153#define IDE_COMMAND_READ			0x20
154#define IDE_COMMAND_WRITE			0x30
155#define IDE_COMMAND_RECALIBRATE		0x10
156#define IDE_COMMAND_SEEK			0x70
157#define IDE_COMMAND_SET_PARAMETERS	0x91
158#define IDE_COMMAND_VERIFY			0x40
159#define IDE_COMMAND_ATAPI_PACKET	0xA0
160#define IDE_COMMAND_ATAPI_IDENTIFY	0xA1
161#define	IDE_CMD_READ_MULTIPLE		0xC4
162#define	IDE_CMD_WRITE_MULTIPLE		0xC5
163#define	IDE_CMD_SET_MULTIPLE		0xC6
164#define IDE_COMMAND_WRITE_DMA		0xCA
165#define IDE_COMMAND_READ_DMA		0xC8
166#define IDE_COMMAND_IDENTIFY		0xEC
167
168// IDE status definitions
169#define IDE_STATUS_ERROR			0x01
170#define IDE_STATUS_INDEX			0x02
171#define IDE_STATUS_CORRECTED_ERROR	0x04
172#define IDE_STATUS_DRQ				0x08
173#define IDE_STATUS_DSC				0x10
174#define	IDE_STATUS_WRITE_FAULT		0x20
175#define IDE_STATUS_DRDY				0x40
176#define IDE_STATUS_BUSY				0x80
177
178// IDE error definitions
179#define	IDE_ERROR_AMNF				0x01
180#define	IDE_ERROR_TKONF				0x02
181#define	IDE_ERROR_ABRT				0x04
182#define	IDE_ERROR_MCR				0x08
183#define	IDE_ERROR_IDFN				0x10
184#define	IDE_ERROR_MC				0x20
185#define	IDE_ERROR_UNC				0x40
186#define	IDE_ERROR_BBK				0x80
187
188//	IDE interface structure
189typedef struct _IDE_STRUCT
190	{
191	union
192		{
193		UCHAR	ide[9];
194		struct
195			{
196			USHORT	data;
197			UCHAR	sectors;
198			UCHAR	lba[4];
199			UCHAR	cmd;
200			UCHAR	spigot;
201			}	ides;
202		} ide;
203	}	IDE_STRUCT;
204
205// SCSI read capacity structure
206typedef	struct _READ_CAPACITY_DATA
207	{
208	ULONG blks;				/* total blocks (converted to little endian) */
209	ULONG blksiz;			/* size of each (converted to little endian) */
210	}	READ_CAPACITY_DATA, *PREAD_CAPACITY_DATA;
211
212// SCSI inquiry data
213#ifndef HOSTS_C
214
215typedef struct _INQUIRYDATA
216	{
217	UCHAR DeviceType			:5;
218	UCHAR DeviceTypeQualifier	:3;
219	UCHAR DeviceTypeModifier	:7;
220	UCHAR RemovableMedia		:1;
221    UCHAR Versions;
222    UCHAR ResponseDataFormat;
223    UCHAR AdditionalLength;
224    UCHAR Reserved[2];
225	UCHAR SoftReset				:1;
226	UCHAR CommandQueue			:1;
227	UCHAR Reserved2				:1;
228	UCHAR LinkedCommands		:1;
229	UCHAR Synchronous			:1;
230	UCHAR Wide16Bit				:1;
231	UCHAR Wide32Bit				:1;
232	UCHAR RelativeAddressing	:1;
233    UCHAR VendorId[8];
234    UCHAR ProductId[16];
235    UCHAR ProductRevisionLevel[4];
236    UCHAR VendorSpecific[20];
237    UCHAR Reserved3[40];
238	}	INQUIRYDATA, *PINQUIRYDATA;
239#endif
240
241// IDE IDENTIFY data
242typedef struct _IDENTIFY_DATA
243	{
244    USHORT GeneralConfiguration;            // 00
245    USHORT NumberOfCylinders;               // 02
246    USHORT Reserved1;                       // 04
247    USHORT NumberOfHeads;                   // 06
248    USHORT UnformattedBytesPerTrack;        // 08
249    USHORT UnformattedBytesPerSector;       // 0A
250    USHORT SectorsPerTrack;                 // 0C
251    USHORT VendorUnique1[3];                // 0E
252    USHORT SerialNumber[10];                // 14
253    USHORT BufferType;                      // 28
254    USHORT BufferSectorSize;                // 2A
255    USHORT NumberOfEccBytes;                // 2C
256    USHORT FirmwareRevision[4];             // 2E
257    USHORT ModelNumber[20];                 // 36
258    UCHAR  MaximumBlockTransfer;            // 5E
259    UCHAR  VendorUnique2;                   // 5F
260    USHORT DoubleWordIo;                    // 60
261    USHORT Capabilities;                    // 62
262    USHORT Reserved2;                       // 64
263    UCHAR  VendorUnique3;                   // 66
264    UCHAR  PioCycleTimingMode;              // 67
265    UCHAR  VendorUnique4;                   // 68
266    UCHAR  DmaCycleTimingMode;              // 69
267    USHORT TranslationFieldsValid:1;        // 6A
268    USHORT Reserved3:15;
269    USHORT NumberOfCurrentCylinders;        // 6C
270    USHORT NumberOfCurrentHeads;            // 6E
271    USHORT CurrentSectorsPerTrack;          // 70
272    ULONG  CurrentSectorCapacity;           // 72
273    USHORT Reserved4[197];                  // 76
274	}	IDENTIFY_DATA, *PIDENTIFY_DATA;
275
276// Identify data without the Reserved4.
277typedef struct _IDENTIFY_DATA2 {
278    USHORT GeneralConfiguration;            // 00
279    USHORT NumberOfCylinders;               // 02
280    USHORT Reserved1;                       // 04
281    USHORT NumberOfHeads;                   // 06
282    USHORT UnformattedBytesPerTrack;        // 08
283    USHORT UnformattedBytesPerSector;       // 0A
284    USHORT SectorsPerTrack;                 // 0C
285    USHORT VendorUnique1[3];                // 0E
286    USHORT SerialNumber[10];                // 14
287    USHORT BufferType;                      // 28
288    USHORT BufferSectorSize;                // 2A
289    USHORT NumberOfEccBytes;                // 2C
290    USHORT FirmwareRevision[4];             // 2E
291    USHORT ModelNumber[20];                 // 36
292    UCHAR  MaximumBlockTransfer;            // 5E
293    UCHAR  VendorUnique2;                   // 5F
294    USHORT DoubleWordIo;                    // 60
295    USHORT Capabilities;                    // 62
296    USHORT Reserved2;                       // 64
297    UCHAR  VendorUnique3;                   // 66
298    UCHAR  PioCycleTimingMode;              // 67
299    UCHAR  VendorUnique4;                   // 68
300    UCHAR  DmaCycleTimingMode;              // 69
301	USHORT TranslationFieldsValid:1;     	// 6A
302    USHORT Reserved3:15;
303    USHORT NumberOfCurrentCylinders;        // 6C
304    USHORT NumberOfCurrentHeads;            // 6E
305    USHORT CurrentSectorsPerTrack;          // 70
306    ULONG  CurrentSectorCapacity;           // 72
307	}	IDENTIFY_DATA2, *PIDENTIFY_DATA2;
308
309#endif	// PSI_EIDE_SCSIOP
310
311// function prototypes
312int Psi240i_Command(struct scsi_cmnd *SCpnt);
313int Psi240i_Abort(struct scsi_cmnd *SCpnt);
314int Psi240i_Reset(struct scsi_cmnd *SCpnt, unsigned int flags);
315#endif
316