1/****************************************************************************** 2** Device driver for the PCI-SCSI NCR538XX controller family. 3** 4** Copyright (C) 1994 Wolfgang Stanglmeier 5** 6** This program is free software; you can redistribute it and/or modify 7** it under the terms of the GNU General Public License as published by 8** the Free Software Foundation; either version 2 of the License, or 9** (at your option) any later version. 10** 11** This program is distributed in the hope that it will be useful, 12** but WITHOUT ANY WARRANTY; without even the implied warranty of 13** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14** GNU General Public License for more details. 15** 16** You should have received a copy of the GNU General Public License 17** along with this program; if not, write to the Free Software 18** Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 19** 20**----------------------------------------------------------------------------- 21** 22** This driver has been ported to Linux from the FreeBSD NCR53C8XX driver 23** and is currently maintained by 24** 25** Gerard Roudier <groudier@free.fr> 26** 27** Being given that this driver originates from the FreeBSD version, and 28** in order to keep synergy on both, any suggested enhancements and corrections 29** received on Linux are automatically a potential candidate for the FreeBSD 30** version. 31** 32** The original driver has been written for 386bsd and FreeBSD by 33** Wolfgang Stanglmeier <wolf@cologne.de> 34** Stefan Esser <se@mi.Uni-Koeln.de> 35** 36** And has been ported to NetBSD by 37** Charles M. Hannum <mycroft@gnu.ai.mit.edu> 38** 39**----------------------------------------------------------------------------- 40** 41** Brief history 42** 43** December 10 1995 by Gerard Roudier: 44** Initial port to Linux. 45** 46** June 23 1996 by Gerard Roudier: 47** Support for 64 bits architectures (Alpha). 48** 49** November 30 1996 by Gerard Roudier: 50** Support for Fast-20 scsi. 51** Support for large DMA fifo and 128 dwords bursting. 52** 53** February 27 1997 by Gerard Roudier: 54** Support for Fast-40 scsi. 55** Support for on-Board RAM. 56** 57** May 3 1997 by Gerard Roudier: 58** Full support for scsi scripts instructions pre-fetching. 59** 60** May 19 1997 by Richard Waltham <dormouse@farsrobt.demon.co.uk>: 61** Support for NvRAM detection and reading. 62** 63** August 18 1997 by Cort <cort@cs.nmt.edu>: 64** Support for Power/PC (Big Endian). 65** 66** June 20 1998 by Gerard Roudier 67** Support for up to 64 tags per lun. 68** O(1) everywhere (C and SCRIPTS) for normal cases. 69** Low PCI traffic for command handling when on-chip RAM is present. 70** Aggressive SCSI SCRIPTS optimizations. 71** 72** 2005 by Matthew Wilcox and James Bottomley 73** PCI-ectomy. This driver now supports only the 720 chip (see the 74** NCR_Q720 and zalon drivers for the bus probe logic). 75** 76******************************************************************************* 77*/ 78 79/* 80** Supported SCSI-II features: 81** Synchronous negotiation 82** Wide negotiation (depends on the NCR Chip) 83** Enable disconnection 84** Tagged command queuing 85** Parity checking 86** Etc... 87** 88** Supported NCR/SYMBIOS chips: 89** 53C720 (Wide, Fast SCSI-2, intfly problems) 90*/ 91 92/* Name and version of the driver */ 93#define SCSI_NCR_DRIVER_NAME "ncr53c8xx-3.4.3g" 94 95#define SCSI_NCR_DEBUG_FLAGS (0) 96 97#include <linux/blkdev.h> 98#include <linux/delay.h> 99#include <linux/dma-mapping.h> 100#include <linux/errno.h> 101#include <linux/init.h> 102#include <linux/interrupt.h> 103#include <linux/ioport.h> 104#include <linux/mm.h> 105#include <linux/module.h> 106#include <linux/sched.h> 107#include <linux/signal.h> 108#include <linux/spinlock.h> 109#include <linux/stat.h> 110#include <linux/string.h> 111#include <linux/time.h> 112#include <linux/timer.h> 113#include <linux/types.h> 114 115#include <asm/dma.h> 116#include <asm/io.h> 117#include <asm/system.h> 118 119#include <scsi/scsi.h> 120#include <scsi/scsi_cmnd.h> 121#include <scsi/scsi_dbg.h> 122#include <scsi/scsi_device.h> 123#include <scsi/scsi_tcq.h> 124#include <scsi/scsi_transport.h> 125#include <scsi/scsi_transport_spi.h> 126 127#include "ncr53c8xx.h" 128 129#define NAME53C8XX "ncr53c8xx" 130 131/*========================================================== 132** 133** Debugging tags 134** 135**========================================================== 136*/ 137 138#define DEBUG_ALLOC (0x0001) 139#define DEBUG_PHASE (0x0002) 140#define DEBUG_QUEUE (0x0008) 141#define DEBUG_RESULT (0x0010) 142#define DEBUG_POINTER (0x0020) 143#define DEBUG_SCRIPT (0x0040) 144#define DEBUG_TINY (0x0080) 145#define DEBUG_TIMING (0x0100) 146#define DEBUG_NEGO (0x0200) 147#define DEBUG_TAGS (0x0400) 148#define DEBUG_SCATTER (0x0800) 149#define DEBUG_IC (0x1000) 150 151/* 152** Enable/Disable debug messages. 153** Can be changed at runtime too. 154*/ 155 156#ifdef SCSI_NCR_DEBUG_INFO_SUPPORT 157static int ncr_debug = SCSI_NCR_DEBUG_FLAGS; 158 #define DEBUG_FLAGS ncr_debug 159#else 160 #define DEBUG_FLAGS SCSI_NCR_DEBUG_FLAGS 161#endif 162 163static inline struct list_head *ncr_list_pop(struct list_head *head) 164{ 165 if (!list_empty(head)) { 166 struct list_head *elem = head->next; 167 168 list_del(elem); 169 return elem; 170 } 171 172 return NULL; 173} 174 175/*========================================================== 176** 177** Simple power of two buddy-like allocator. 178** 179** This simple code is not intended to be fast, but to 180** provide power of 2 aligned memory allocations. 181** Since the SCRIPTS processor only supplies 8 bit 182** arithmetic, this allocator allows simple and fast 183** address calculations from the SCRIPTS code. 184** In addition, cache line alignment is guaranteed for 185** power of 2 cache line size. 186** Enhanced in linux-2.3.44 to provide a memory pool 187** per pcidev to support dynamic dma mapping. (I would 188** have preferred a real bus abstraction, btw). 189** 190**========================================================== 191*/ 192 193#define MEMO_SHIFT 4 /* 16 bytes minimum memory chunk */ 194#if PAGE_SIZE >= 8192 195#define MEMO_PAGE_ORDER 0 /* 1 PAGE maximum */ 196#else 197#define MEMO_PAGE_ORDER 1 /* 2 PAGES maximum */ 198#endif 199#define MEMO_FREE_UNUSED /* Free unused pages immediately */ 200#define MEMO_WARN 1 201#define MEMO_GFP_FLAGS GFP_ATOMIC 202#define MEMO_CLUSTER_SHIFT (PAGE_SHIFT+MEMO_PAGE_ORDER) 203#define MEMO_CLUSTER_SIZE (1UL << MEMO_CLUSTER_SHIFT) 204#define MEMO_CLUSTER_MASK (MEMO_CLUSTER_SIZE-1) 205 206typedef u_long m_addr_t; /* Enough bits to bit-hack addresses */ 207typedef struct device *m_bush_t; /* Something that addresses DMAable */ 208 209typedef struct m_link { /* Link between free memory chunks */ 210 struct m_link *next; 211} m_link_s; 212 213typedef struct m_vtob { /* Virtual to Bus address translation */ 214 struct m_vtob *next; 215 m_addr_t vaddr; 216 m_addr_t baddr; 217} m_vtob_s; 218#define VTOB_HASH_SHIFT 5 219#define VTOB_HASH_SIZE (1UL << VTOB_HASH_SHIFT) 220#define VTOB_HASH_MASK (VTOB_HASH_SIZE-1) 221#define VTOB_HASH_CODE(m) \ 222 ((((m_addr_t) (m)) >> MEMO_CLUSTER_SHIFT) & VTOB_HASH_MASK) 223 224typedef struct m_pool { /* Memory pool of a given kind */ 225 m_bush_t bush; 226 m_addr_t (*getp)(struct m_pool *); 227 void (*freep)(struct m_pool *, m_addr_t); 228 int nump; 229 m_vtob_s *(vtob[VTOB_HASH_SIZE]); 230 struct m_pool *next; 231 struct m_link h[PAGE_SHIFT-MEMO_SHIFT+MEMO_PAGE_ORDER+1]; 232} m_pool_s; 233 234static void *___m_alloc(m_pool_s *mp, int size) 235{ 236 int i = 0; 237 int s = (1 << MEMO_SHIFT); 238 int j; 239 m_addr_t a; 240 m_link_s *h = mp->h; 241 242 if (size > (PAGE_SIZE << MEMO_PAGE_ORDER)) 243 return NULL; 244 245 while (size > s) { 246 s <<= 1; 247 ++i; 248 } 249 250 j = i; 251 while (!h[j].next) { 252 if (s == (PAGE_SIZE << MEMO_PAGE_ORDER)) { 253 h[j].next = (m_link_s *)mp->getp(mp); 254 if (h[j].next) 255 h[j].next->next = NULL; 256 break; 257 } 258 ++j; 259 s <<= 1; 260 } 261 a = (m_addr_t) h[j].next; 262 if (a) { 263 h[j].next = h[j].next->next; 264 while (j > i) { 265 j -= 1; 266 s >>= 1; 267 h[j].next = (m_link_s *) (a+s); 268 h[j].next->next = NULL; 269 } 270 } 271#ifdef DEBUG 272 printk("___m_alloc(%d) = %p\n", size, (void *) a); 273#endif 274 return (void *) a; 275} 276 277static void ___m_free(m_pool_s *mp, void *ptr, int size) 278{ 279 int i = 0; 280 int s = (1 << MEMO_SHIFT); 281 m_link_s *q; 282 m_addr_t a, b; 283 m_link_s *h = mp->h; 284 285#ifdef DEBUG 286 printk("___m_free(%p, %d)\n", ptr, size); 287#endif 288 289 if (size > (PAGE_SIZE << MEMO_PAGE_ORDER)) 290 return; 291 292 while (size > s) { 293 s <<= 1; 294 ++i; 295 } 296 297 a = (m_addr_t) ptr; 298 299 while (1) { 300#ifdef MEMO_FREE_UNUSED 301 if (s == (PAGE_SIZE << MEMO_PAGE_ORDER)) { 302 mp->freep(mp, a); 303 break; 304 } 305#endif 306 b = a ^ s; 307 q = &h[i]; 308 while (q->next && q->next != (m_link_s *) b) { 309 q = q->next; 310 } 311 if (!q->next) { 312 ((m_link_s *) a)->next = h[i].next; 313 h[i].next = (m_link_s *) a; 314 break; 315 } 316 q->next = q->next->next; 317 a = a & b; 318 s <<= 1; 319 ++i; 320 } 321} 322 323static DEFINE_SPINLOCK(ncr53c8xx_lock); 324 325static void *__m_calloc2(m_pool_s *mp, int size, char *name, int uflags) 326{ 327 void *p; 328 329 p = ___m_alloc(mp, size); 330 331 if (DEBUG_FLAGS & DEBUG_ALLOC) 332 printk ("new %-10s[%4d] @%p.\n", name, size, p); 333 334 if (p) 335 memset(p, 0, size); 336 else if (uflags & MEMO_WARN) 337 printk (NAME53C8XX ": failed to allocate %s[%d]\n", name, size); 338 339 return p; 340} 341 342#define __m_calloc(mp, s, n) __m_calloc2(mp, s, n, MEMO_WARN) 343 344static void __m_free(m_pool_s *mp, void *ptr, int size, char *name) 345{ 346 if (DEBUG_FLAGS & DEBUG_ALLOC) 347 printk ("freeing %-10s[%4d] @%p.\n", name, size, ptr); 348 349 ___m_free(mp, ptr, size); 350 351} 352 353/* 354 * With pci bus iommu support, we use a default pool of unmapped memory 355 * for memory we donnot need to DMA from/to and one pool per pcidev for 356 * memory accessed by the PCI chip. `mp0' is the default not DMAable pool. 357 */ 358 359static m_addr_t ___mp0_getp(m_pool_s *mp) 360{ 361 m_addr_t m = __get_free_pages(MEMO_GFP_FLAGS, MEMO_PAGE_ORDER); 362 if (m) 363 ++mp->nump; 364 return m; 365} 366 367static void ___mp0_freep(m_pool_s *mp, m_addr_t m) 368{ 369 free_pages(m, MEMO_PAGE_ORDER); 370 --mp->nump; 371} 372 373static m_pool_s mp0 = {NULL, ___mp0_getp, ___mp0_freep}; 374 375/* 376 * DMAable pools. 377 */ 378 379/* 380 * With pci bus iommu support, we maintain one pool per pcidev and a 381 * hashed reverse table for virtual to bus physical address translations. 382 */ 383static m_addr_t ___dma_getp(m_pool_s *mp) 384{ 385 m_addr_t vp; 386 m_vtob_s *vbp; 387 388 vbp = __m_calloc(&mp0, sizeof(*vbp), "VTOB"); 389 if (vbp) { 390 dma_addr_t daddr; 391 vp = (m_addr_t) dma_alloc_coherent(mp->bush, 392 PAGE_SIZE<<MEMO_PAGE_ORDER, 393 &daddr, GFP_ATOMIC); 394 if (vp) { 395 int hc = VTOB_HASH_CODE(vp); 396 vbp->vaddr = vp; 397 vbp->baddr = daddr; 398 vbp->next = mp->vtob[hc]; 399 mp->vtob[hc] = vbp; 400 ++mp->nump; 401 return vp; 402 } 403 } 404 if (vbp) 405 __m_free(&mp0, vbp, sizeof(*vbp), "VTOB"); 406 return 0; 407} 408 409static void ___dma_freep(m_pool_s *mp, m_addr_t m) 410{ 411 m_vtob_s **vbpp, *vbp; 412 int hc = VTOB_HASH_CODE(m); 413 414 vbpp = &mp->vtob[hc]; 415 while (*vbpp && (*vbpp)->vaddr != m) 416 vbpp = &(*vbpp)->next; 417 if (*vbpp) { 418 vbp = *vbpp; 419 *vbpp = (*vbpp)->next; 420 dma_free_coherent(mp->bush, PAGE_SIZE<<MEMO_PAGE_ORDER, 421 (void *)vbp->vaddr, (dma_addr_t)vbp->baddr); 422 __m_free(&mp0, vbp, sizeof(*vbp), "VTOB"); 423 --mp->nump; 424 } 425} 426 427static inline m_pool_s *___get_dma_pool(m_bush_t bush) 428{ 429 m_pool_s *mp; 430 for (mp = mp0.next; mp && mp->bush != bush; mp = mp->next); 431 return mp; 432} 433 434static m_pool_s *___cre_dma_pool(m_bush_t bush) 435{ 436 m_pool_s *mp; 437 mp = __m_calloc(&mp0, sizeof(*mp), "MPOOL"); 438 if (mp) { 439 memset(mp, 0, sizeof(*mp)); 440 mp->bush = bush; 441 mp->getp = ___dma_getp; 442 mp->freep = ___dma_freep; 443 mp->next = mp0.next; 444 mp0.next = mp; 445 } 446 return mp; 447} 448 449static void ___del_dma_pool(m_pool_s *p) 450{ 451 struct m_pool **pp = &mp0.next; 452 453 while (*pp && *pp != p) 454 pp = &(*pp)->next; 455 if (*pp) { 456 *pp = (*pp)->next; 457 __m_free(&mp0, p, sizeof(*p), "MPOOL"); 458 } 459} 460 461static void *__m_calloc_dma(m_bush_t bush, int size, char *name) 462{ 463 u_long flags; 464 struct m_pool *mp; 465 void *m = NULL; 466 467 spin_lock_irqsave(&ncr53c8xx_lock, flags); 468 mp = ___get_dma_pool(bush); 469 if (!mp) 470 mp = ___cre_dma_pool(bush); 471 if (mp) 472 m = __m_calloc(mp, size, name); 473 if (mp && !mp->nump) 474 ___del_dma_pool(mp); 475 spin_unlock_irqrestore(&ncr53c8xx_lock, flags); 476 477 return m; 478} 479 480static void __m_free_dma(m_bush_t bush, void *m, int size, char *name) 481{ 482 u_long flags; 483 struct m_pool *mp; 484 485 spin_lock_irqsave(&ncr53c8xx_lock, flags); 486 mp = ___get_dma_pool(bush); 487 if (mp) 488 __m_free(mp, m, size, name); 489 if (mp && !mp->nump) 490 ___del_dma_pool(mp); 491 spin_unlock_irqrestore(&ncr53c8xx_lock, flags); 492} 493 494static m_addr_t __vtobus(m_bush_t bush, void *m) 495{ 496 u_long flags; 497 m_pool_s *mp; 498 int hc = VTOB_HASH_CODE(m); 499 m_vtob_s *vp = NULL; 500 m_addr_t a = ((m_addr_t) m) & ~MEMO_CLUSTER_MASK; 501 502 spin_lock_irqsave(&ncr53c8xx_lock, flags); 503 mp = ___get_dma_pool(bush); 504 if (mp) { 505 vp = mp->vtob[hc]; 506 while (vp && (m_addr_t) vp->vaddr != a) 507 vp = vp->next; 508 } 509 spin_unlock_irqrestore(&ncr53c8xx_lock, flags); 510 return vp ? vp->baddr + (((m_addr_t) m) - a) : 0; 511} 512 513#define _m_calloc_dma(np, s, n) __m_calloc_dma(np->dev, s, n) 514#define _m_free_dma(np, p, s, n) __m_free_dma(np->dev, p, s, n) 515#define m_calloc_dma(s, n) _m_calloc_dma(np, s, n) 516#define m_free_dma(p, s, n) _m_free_dma(np, p, s, n) 517#define _vtobus(np, p) __vtobus(np->dev, p) 518#define vtobus(p) _vtobus(np, p) 519 520/* 521 * Deal with DMA mapping/unmapping. 522 */ 523 524/* To keep track of the dma mapping (sg/single) that has been set */ 525#define __data_mapped SCp.phase 526#define __data_mapping SCp.have_data_in 527 528static void __unmap_scsi_data(struct device *dev, struct scsi_cmnd *cmd) 529{ 530 switch(cmd->__data_mapped) { 531 case 2: 532 dma_unmap_sg(dev, cmd->request_buffer, cmd->use_sg, 533 cmd->sc_data_direction); 534 break; 535 case 1: 536 dma_unmap_single(dev, cmd->__data_mapping, 537 cmd->request_bufflen, 538 cmd->sc_data_direction); 539 break; 540 } 541 cmd->__data_mapped = 0; 542} 543 544static u_long __map_scsi_single_data(struct device *dev, struct scsi_cmnd *cmd) 545{ 546 dma_addr_t mapping; 547 548 if (cmd->request_bufflen == 0) 549 return 0; 550 551 mapping = dma_map_single(dev, cmd->request_buffer, 552 cmd->request_bufflen, 553 cmd->sc_data_direction); 554 cmd->__data_mapped = 1; 555 cmd->__data_mapping = mapping; 556 557 return mapping; 558} 559 560static int __map_scsi_sg_data(struct device *dev, struct scsi_cmnd *cmd) 561{ 562 int use_sg; 563 564 if (cmd->use_sg == 0) 565 return 0; 566 567 use_sg = dma_map_sg(dev, cmd->request_buffer, cmd->use_sg, 568 cmd->sc_data_direction); 569 cmd->__data_mapped = 2; 570 cmd->__data_mapping = use_sg; 571 572 return use_sg; 573} 574 575#define unmap_scsi_data(np, cmd) __unmap_scsi_data(np->dev, cmd) 576#define map_scsi_single_data(np, cmd) __map_scsi_single_data(np->dev, cmd) 577#define map_scsi_sg_data(np, cmd) __map_scsi_sg_data(np->dev, cmd) 578 579/*========================================================== 580** 581** Driver setup. 582** 583** This structure is initialized from linux config 584** options. It can be overridden at boot-up by the boot 585** command line. 586** 587**========================================================== 588*/ 589static struct ncr_driver_setup 590 driver_setup = SCSI_NCR_DRIVER_SETUP; 591 592#ifndef MODULE 593#ifdef SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT 594static struct ncr_driver_setup 595 driver_safe_setup __initdata = SCSI_NCR_DRIVER_SAFE_SETUP; 596#endif 597#endif /* !MODULE */ 598 599#define initverbose (driver_setup.verbose) 600#define bootverbose (np->verbose) 601 602 603/*=================================================================== 604** 605** Driver setup from the boot command line 606** 607**=================================================================== 608*/ 609 610#ifdef MODULE 611#define ARG_SEP ' ' 612#else 613#define ARG_SEP ',' 614#endif 615 616#define OPT_TAGS 1 617#define OPT_MASTER_PARITY 2 618#define OPT_SCSI_PARITY 3 619#define OPT_DISCONNECTION 4 620#define OPT_SPECIAL_FEATURES 5 621#define OPT_UNUSED_1 6 622#define OPT_FORCE_SYNC_NEGO 7 623#define OPT_REVERSE_PROBE 8 624#define OPT_DEFAULT_SYNC 9 625#define OPT_VERBOSE 10 626#define OPT_DEBUG 11 627#define OPT_BURST_MAX 12 628#define OPT_LED_PIN 13 629#define OPT_MAX_WIDE 14 630#define OPT_SETTLE_DELAY 15 631#define OPT_DIFF_SUPPORT 16 632#define OPT_IRQM 17 633#define OPT_PCI_FIX_UP 18 634#define OPT_BUS_CHECK 19 635#define OPT_OPTIMIZE 20 636#define OPT_RECOVERY 21 637#define OPT_SAFE_SETUP 22 638#define OPT_USE_NVRAM 23 639#define OPT_EXCLUDE 24 640#define OPT_HOST_ID 25 641 642#ifdef SCSI_NCR_IARB_SUPPORT 643#define OPT_IARB 26 644#endif 645 646#ifdef MODULE 647#define ARG_SEP ' ' 648#else 649#define ARG_SEP ',' 650#endif 651 652#ifndef MODULE 653static char setup_token[] __initdata = 654 "tags:" "mpar:" 655 "spar:" "disc:" 656 "specf:" "ultra:" 657 "fsn:" "revprob:" 658 "sync:" "verb:" 659 "debug:" "burst:" 660 "led:" "wide:" 661 "settle:" "diff:" 662 "irqm:" "pcifix:" 663 "buschk:" "optim:" 664 "recovery:" 665 "safe:" "nvram:" 666 "excl:" "hostid:" 667#ifdef SCSI_NCR_IARB_SUPPORT 668 "iarb:" 669#endif 670 ; /* DONNOT REMOVE THIS ';' */ 671 672static int __init get_setup_token(char *p) 673{ 674 char *cur = setup_token; 675 char *pc; 676 int i = 0; 677 678 while (cur != NULL && (pc = strchr(cur, ':')) != NULL) { 679 ++pc; 680 ++i; 681 if (!strncmp(p, cur, pc - cur)) 682 return i; 683 cur = pc; 684 } 685 return 0; 686} 687 688static int __init sym53c8xx__setup(char *str) 689{ 690#ifdef SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT 691 char *cur = str; 692 char *pc, *pv; 693 int i, val, c; 694 int xi = 0; 695 696 while (cur != NULL && (pc = strchr(cur, ':')) != NULL) { 697 char *pe; 698 699 val = 0; 700 pv = pc; 701 c = *++pv; 702 703 if (c == 'n') 704 val = 0; 705 else if (c == 'y') 706 val = 1; 707 else 708 val = (int) simple_strtoul(pv, &pe, 0); 709 710 switch (get_setup_token(cur)) { 711 case OPT_TAGS: 712 driver_setup.default_tags = val; 713 if (pe && *pe == '/') { 714 i = 0; 715 while (*pe && *pe != ARG_SEP && 716 i < sizeof(driver_setup.tag_ctrl)-1) { 717 driver_setup.tag_ctrl[i++] = *pe++; 718 } 719 driver_setup.tag_ctrl[i] = '\0'; 720 } 721 break; 722 case OPT_MASTER_PARITY: 723 driver_setup.master_parity = val; 724 break; 725 case OPT_SCSI_PARITY: 726 driver_setup.scsi_parity = val; 727 break; 728 case OPT_DISCONNECTION: 729 driver_setup.disconnection = val; 730 break; 731 case OPT_SPECIAL_FEATURES: 732 driver_setup.special_features = val; 733 break; 734 case OPT_FORCE_SYNC_NEGO: 735 driver_setup.force_sync_nego = val; 736 break; 737 case OPT_REVERSE_PROBE: 738 driver_setup.reverse_probe = val; 739 break; 740 case OPT_DEFAULT_SYNC: 741 driver_setup.default_sync = val; 742 break; 743 case OPT_VERBOSE: 744 driver_setup.verbose = val; 745 break; 746 case OPT_DEBUG: 747 driver_setup.debug = val; 748 break; 749 case OPT_BURST_MAX: 750 driver_setup.burst_max = val; 751 break; 752 case OPT_LED_PIN: 753 driver_setup.led_pin = val; 754 break; 755 case OPT_MAX_WIDE: 756 driver_setup.max_wide = val? 1:0; 757 break; 758 case OPT_SETTLE_DELAY: 759 driver_setup.settle_delay = val; 760 break; 761 case OPT_DIFF_SUPPORT: 762 driver_setup.diff_support = val; 763 break; 764 case OPT_IRQM: 765 driver_setup.irqm = val; 766 break; 767 case OPT_PCI_FIX_UP: 768 driver_setup.pci_fix_up = val; 769 break; 770 case OPT_BUS_CHECK: 771 driver_setup.bus_check = val; 772 break; 773 case OPT_OPTIMIZE: 774 driver_setup.optimize = val; 775 break; 776 case OPT_RECOVERY: 777 driver_setup.recovery = val; 778 break; 779 case OPT_USE_NVRAM: 780 driver_setup.use_nvram = val; 781 break; 782 case OPT_SAFE_SETUP: 783 memcpy(&driver_setup, &driver_safe_setup, 784 sizeof(driver_setup)); 785 break; 786 case OPT_EXCLUDE: 787 if (xi < SCSI_NCR_MAX_EXCLUDES) 788 driver_setup.excludes[xi++] = val; 789 break; 790 case OPT_HOST_ID: 791 driver_setup.host_id = val; 792 break; 793#ifdef SCSI_NCR_IARB_SUPPORT 794 case OPT_IARB: 795 driver_setup.iarb = val; 796 break; 797#endif 798 default: 799 printk("sym53c8xx_setup: unexpected boot option '%.*s' ignored\n", (int)(pc-cur+1), cur); 800 break; 801 } 802 803 if ((cur = strchr(cur, ARG_SEP)) != NULL) 804 ++cur; 805 } 806#endif /* SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT */ 807 return 1; 808} 809#endif /* !MODULE */ 810 811/*=================================================================== 812** 813** Get device queue depth from boot command line. 814** 815**=================================================================== 816*/ 817#define DEF_DEPTH (driver_setup.default_tags) 818#define ALL_TARGETS -2 819#define NO_TARGET -1 820#define ALL_LUNS -2 821#define NO_LUN -1 822 823static int device_queue_depth(int unit, int target, int lun) 824{ 825 int c, h, t, u, v; 826 char *p = driver_setup.tag_ctrl; 827 char *ep; 828 829 h = -1; 830 t = NO_TARGET; 831 u = NO_LUN; 832 while ((c = *p++) != 0) { 833 v = simple_strtoul(p, &ep, 0); 834 switch(c) { 835 case '/': 836 ++h; 837 t = ALL_TARGETS; 838 u = ALL_LUNS; 839 break; 840 case 't': 841 if (t != target) 842 t = (target == v) ? v : NO_TARGET; 843 u = ALL_LUNS; 844 break; 845 case 'u': 846 if (u != lun) 847 u = (lun == v) ? v : NO_LUN; 848 break; 849 case 'q': 850 if (h == unit && 851 (t == ALL_TARGETS || t == target) && 852 (u == ALL_LUNS || u == lun)) 853 return v; 854 break; 855 case '-': 856 t = ALL_TARGETS; 857 u = ALL_LUNS; 858 break; 859 default: 860 break; 861 } 862 p = ep; 863 } 864 return DEF_DEPTH; 865} 866 867 868/*========================================================== 869** 870** The CCB done queue uses an array of CCB virtual 871** addresses. Empty entries are flagged using the bogus 872** virtual address 0xffffffff. 873** 874** Since PCI ensures that only aligned DWORDs are accessed 875** atomically, 64 bit little-endian architecture requires 876** to test the high order DWORD of the entry to determine 877** if it is empty or valid. 878** 879** BTW, I will make things differently as soon as I will 880** have a better idea, but this is simple and should work. 881** 882**========================================================== 883*/ 884 885#define SCSI_NCR_CCB_DONE_SUPPORT 886#ifdef SCSI_NCR_CCB_DONE_SUPPORT 887 888#define MAX_DONE 24 889#define CCB_DONE_EMPTY 0xffffffffUL 890 891/* All 32 bit architectures */ 892#if BITS_PER_LONG == 32 893#define CCB_DONE_VALID(cp) (((u_long) cp) != CCB_DONE_EMPTY) 894 895/* All > 32 bit (64 bit) architectures regardless endian-ness */ 896#else 897#define CCB_DONE_VALID(cp) \ 898 ((((u_long) cp) & 0xffffffff00000000ul) && \ 899 (((u_long) cp) & 0xfffffffful) != CCB_DONE_EMPTY) 900#endif 901 902#endif /* SCSI_NCR_CCB_DONE_SUPPORT */ 903 904/*========================================================== 905** 906** Configuration and Debugging 907** 908**========================================================== 909*/ 910 911/* 912** SCSI address of this device. 913** The boot routines should have set it. 914** If not, use this. 915*/ 916 917#ifndef SCSI_NCR_MYADDR 918#define SCSI_NCR_MYADDR (7) 919#endif 920 921/* 922** The maximum number of tags per logic unit. 923** Used only for disk devices that support tags. 924*/ 925 926#ifndef SCSI_NCR_MAX_TAGS 927#define SCSI_NCR_MAX_TAGS (8) 928#endif 929 930/* 931** TAGS are actually limited to 64 tags/lun. 932** We need to deal with power of 2, for alignment constraints. 933*/ 934#if SCSI_NCR_MAX_TAGS > 64 935#define MAX_TAGS (64) 936#else 937#define MAX_TAGS SCSI_NCR_MAX_TAGS 938#endif 939 940#define NO_TAG (255) 941 942/* 943** Choose appropriate type for tag bitmap. 944*/ 945#if MAX_TAGS > 32 946typedef u64 tagmap_t; 947#else 948typedef u32 tagmap_t; 949#endif 950 951/* 952** Number of targets supported by the driver. 953** n permits target numbers 0..n-1. 954** Default is 16, meaning targets #0..#15. 955** #7 .. is myself. 956*/ 957 958#ifdef SCSI_NCR_MAX_TARGET 959#define MAX_TARGET (SCSI_NCR_MAX_TARGET) 960#else 961#define MAX_TARGET (16) 962#endif 963 964/* 965** Number of logic units supported by the driver. 966** n enables logic unit numbers 0..n-1. 967** The common SCSI devices require only 968** one lun, so take 1 as the default. 969*/ 970 971#ifdef SCSI_NCR_MAX_LUN 972#define MAX_LUN SCSI_NCR_MAX_LUN 973#else 974#define MAX_LUN (1) 975#endif 976 977/* 978** Asynchronous pre-scaler (ns). Shall be 40 979*/ 980 981#ifndef SCSI_NCR_MIN_ASYNC 982#define SCSI_NCR_MIN_ASYNC (40) 983#endif 984 985/* 986** The maximum number of jobs scheduled for starting. 987** There should be one slot per target, and one slot 988** for each tag of each target in use. 989** The calculation below is actually quite silly ... 990*/ 991 992#ifdef SCSI_NCR_CAN_QUEUE 993#define MAX_START (SCSI_NCR_CAN_QUEUE + 4) 994#else 995#define MAX_START (MAX_TARGET + 7 * MAX_TAGS) 996#endif 997 998/* 999** We limit the max number of pending IO to 250. 1000** since we donnot want to allocate more than 1 1001** PAGE for 'scripth'. 1002*/ 1003#if MAX_START > 250 1004#undef MAX_START 1005#define MAX_START 250 1006#endif 1007 1008/* 1009** The maximum number of segments a transfer is split into. 1010** We support up to 127 segments for both read and write. 1011** The data scripts are broken into 2 sub-scripts. 1012** 80 (MAX_SCATTERL) segments are moved from a sub-script 1013** in on-chip RAM. This makes data transfers shorter than 1014** 80k (assuming 1k fs) as fast as possible. 1015*/ 1016 1017#define MAX_SCATTER (SCSI_NCR_MAX_SCATTER) 1018 1019#if (MAX_SCATTER > 80) 1020#define MAX_SCATTERL 80 1021#define MAX_SCATTERH (MAX_SCATTER - MAX_SCATTERL) 1022#else 1023#define MAX_SCATTERL (MAX_SCATTER-1) 1024#define MAX_SCATTERH 1 1025#endif 1026 1027/* 1028** other 1029*/ 1030 1031#define NCR_SNOOP_TIMEOUT (1000000) 1032 1033/* 1034** Other definitions 1035*/ 1036 1037#define ScsiResult(host_code, scsi_code) (((host_code) << 16) + ((scsi_code) & 0x7f)) 1038 1039#define initverbose (driver_setup.verbose) 1040#define bootverbose (np->verbose) 1041 1042/*========================================================== 1043** 1044** Command control block states. 1045** 1046**========================================================== 1047*/ 1048 1049#define HS_IDLE (0) 1050#define HS_BUSY (1) 1051#define HS_NEGOTIATE (2) /* sync/wide data transfer*/ 1052#define HS_DISCONNECT (3) /* Disconnected by target */ 1053 1054#define HS_DONEMASK (0x80) 1055#define HS_COMPLETE (4|HS_DONEMASK) 1056#define HS_SEL_TIMEOUT (5|HS_DONEMASK) /* Selection timeout */ 1057#define HS_RESET (6|HS_DONEMASK) /* SCSI reset */ 1058#define HS_ABORTED (7|HS_DONEMASK) /* Transfer aborted */ 1059#define HS_TIMEOUT (8|HS_DONEMASK) /* Software timeout */ 1060#define HS_FAIL (9|HS_DONEMASK) /* SCSI or PCI bus errors */ 1061#define HS_UNEXPECTED (10|HS_DONEMASK)/* Unexpected disconnect */ 1062 1063/* 1064** Invalid host status values used by the SCRIPTS processor 1065** when the nexus is not fully identified. 1066** Shall never appear in a CCB. 1067*/ 1068 1069#define HS_INVALMASK (0x40) 1070#define HS_SELECTING (0|HS_INVALMASK) 1071#define HS_IN_RESELECT (1|HS_INVALMASK) 1072#define HS_STARTING (2|HS_INVALMASK) 1073 1074/* 1075** Flags set by the SCRIPT processor for commands 1076** that have been skipped. 1077*/ 1078#define HS_SKIPMASK (0x20) 1079 1080/*========================================================== 1081** 1082** Software Interrupt Codes 1083** 1084**========================================================== 1085*/ 1086 1087#define SIR_BAD_STATUS (1) 1088#define SIR_XXXXXXXXXX (2) 1089#define SIR_NEGO_SYNC (3) 1090#define SIR_NEGO_WIDE (4) 1091#define SIR_NEGO_FAILED (5) 1092#define SIR_NEGO_PROTO (6) 1093#define SIR_REJECT_RECEIVED (7) 1094#define SIR_REJECT_SENT (8) 1095#define SIR_IGN_RESIDUE (9) 1096#define SIR_MISSING_SAVE (10) 1097#define SIR_RESEL_NO_MSG_IN (11) 1098#define SIR_RESEL_NO_IDENTIFY (12) 1099#define SIR_RESEL_BAD_LUN (13) 1100#define SIR_RESEL_BAD_TARGET (14) 1101#define SIR_RESEL_BAD_I_T_L (15) 1102#define SIR_RESEL_BAD_I_T_L_Q (16) 1103#define SIR_DONE_OVERFLOW (17) 1104#define SIR_INTFLY (18) 1105#define SIR_MAX (18) 1106 1107/*========================================================== 1108** 1109** Extended error codes. 1110** xerr_status field of struct ccb. 1111** 1112**========================================================== 1113*/ 1114 1115#define XE_OK (0) 1116#define XE_EXTRA_DATA (1) /* unexpected data phase */ 1117#define XE_BAD_PHASE (2) /* illegal phase (4/5) */ 1118 1119/*========================================================== 1120** 1121** Negotiation status. 1122** nego_status field of struct ccb. 1123** 1124**========================================================== 1125*/ 1126 1127#define NS_NOCHANGE (0) 1128#define NS_SYNC (1) 1129#define NS_WIDE (2) 1130#define NS_PPR (4) 1131 1132/*========================================================== 1133** 1134** Misc. 1135** 1136**========================================================== 1137*/ 1138 1139#define CCB_MAGIC (0xf2691ad2) 1140 1141/*========================================================== 1142** 1143** Declaration of structs. 1144** 1145**========================================================== 1146*/ 1147 1148static struct scsi_transport_template *ncr53c8xx_transport_template = NULL; 1149 1150struct tcb; 1151struct lcb; 1152struct ccb; 1153struct ncb; 1154struct script; 1155 1156struct link { 1157 ncrcmd l_cmd; 1158 ncrcmd l_paddr; 1159}; 1160 1161struct usrcmd { 1162 u_long target; 1163 u_long lun; 1164 u_long data; 1165 u_long cmd; 1166}; 1167 1168#define UC_SETSYNC 10 1169#define UC_SETTAGS 11 1170#define UC_SETDEBUG 12 1171#define UC_SETORDER 13 1172#define UC_SETWIDE 14 1173#define UC_SETFLAG 15 1174#define UC_SETVERBOSE 17 1175 1176#define UF_TRACE (0x01) 1177#define UF_NODISC (0x02) 1178#define UF_NOSCAN (0x04) 1179 1180/*======================================================================== 1181** 1182** Declaration of structs: target control block 1183** 1184**======================================================================== 1185*/ 1186struct tcb { 1187 /*---------------------------------------------------------------- 1188 ** During reselection the ncr jumps to this point with SFBR 1189 ** set to the encoded target number with bit 7 set. 1190 ** if it's not this target, jump to the next. 1191 ** 1192 ** JUMP IF (SFBR != #target#), @(next tcb) 1193 **---------------------------------------------------------------- 1194 */ 1195 struct link jump_tcb; 1196 1197 /*---------------------------------------------------------------- 1198 ** Load the actual values for the sxfer and the scntl3 1199 ** register (sync/wide mode). 1200 ** 1201 ** SCR_COPY (1), @(sval field of this tcb), @(sxfer register) 1202 ** SCR_COPY (1), @(wval field of this tcb), @(scntl3 register) 1203 **---------------------------------------------------------------- 1204 */ 1205 ncrcmd getscr[6]; 1206 1207 /*---------------------------------------------------------------- 1208 ** Get the IDENTIFY message and load the LUN to SFBR. 1209 ** 1210 ** CALL, <RESEL_LUN> 1211 **---------------------------------------------------------------- 1212 */ 1213 struct link call_lun; 1214 1215 /*---------------------------------------------------------------- 1216 ** Now look for the right lun. 1217 ** 1218 ** For i = 0 to 3 1219 ** SCR_JUMP ^ IFTRUE(MASK(i, 3)), @(first lcb mod. i) 1220 ** 1221 ** Recent chips will prefetch the 4 JUMPS using only 1 burst. 1222 ** It is kind of hashcoding. 1223 **---------------------------------------------------------------- 1224 */ 1225 struct link jump_lcb[4]; /* JUMPs for reselection */ 1226 struct lcb * lp[MAX_LUN]; /* The lcb's of this tcb */ 1227 1228 /*---------------------------------------------------------------- 1229 ** Pointer to the ccb used for negotiation. 1230 ** Prevent from starting a negotiation for all queued commands 1231 ** when tagged command queuing is enabled. 1232 **---------------------------------------------------------------- 1233 */ 1234 struct ccb * nego_cp; 1235 1236 /*---------------------------------------------------------------- 1237 ** statistical data 1238 **---------------------------------------------------------------- 1239 */ 1240 u_long transfers; 1241 u_long bytes; 1242 1243 /*---------------------------------------------------------------- 1244 ** negotiation of wide and synch transfer and device quirks. 1245 **---------------------------------------------------------------- 1246 */ 1247#ifdef SCSI_NCR_BIG_ENDIAN 1248/*0*/ u16 period; 1249/*2*/ u_char sval; 1250/*3*/ u_char minsync; 1251/*0*/ u_char wval; 1252/*1*/ u_char widedone; 1253/*2*/ u_char quirks; 1254/*3*/ u_char maxoffs; 1255#else 1256/*0*/ u_char minsync; 1257/*1*/ u_char sval; 1258/*2*/ u16 period; 1259/*0*/ u_char maxoffs; 1260/*1*/ u_char quirks; 1261/*2*/ u_char widedone; 1262/*3*/ u_char wval; 1263#endif 1264 1265 /* User settable limits and options. */ 1266 u_char usrsync; 1267 u_char usrwide; 1268 u_char usrtags; 1269 u_char usrflag; 1270 struct scsi_target *starget; 1271}; 1272 1273/*======================================================================== 1274** 1275** Declaration of structs: lun control block 1276** 1277**======================================================================== 1278*/ 1279struct lcb { 1280 /*---------------------------------------------------------------- 1281 ** During reselection the ncr jumps to this point 1282 ** with SFBR set to the "Identify" message. 1283 ** if it's not this lun, jump to the next. 1284 ** 1285 ** JUMP IF (SFBR != #lun#), @(next lcb of this target) 1286 ** 1287 ** It is this lun. Load TEMP with the nexus jumps table 1288 ** address and jump to RESEL_TAG (or RESEL_NOTAG). 1289 ** 1290 ** SCR_COPY (4), p_jump_ccb, TEMP, 1291 ** SCR_JUMP, <RESEL_TAG> 1292 **---------------------------------------------------------------- 1293 */ 1294 struct link jump_lcb; 1295 ncrcmd load_jump_ccb[3]; 1296 struct link jump_tag; 1297 ncrcmd p_jump_ccb; /* Jump table bus address */ 1298 1299 /*---------------------------------------------------------------- 1300 ** Jump table used by the script processor to directly jump 1301 ** to the CCB corresponding to the reselected nexus. 1302 ** Address is allocated on 256 bytes boundary in order to 1303 ** allow 8 bit calculation of the tag jump entry for up to 1304 ** 64 possible tags. 1305 **---------------------------------------------------------------- 1306 */ 1307 u32 jump_ccb_0; /* Default table if no tags */ 1308 u32 *jump_ccb; /* Virtual address */ 1309 1310 /*---------------------------------------------------------------- 1311 ** CCB queue management. 1312 **---------------------------------------------------------------- 1313 */ 1314 struct list_head free_ccbq; /* Queue of available CCBs */ 1315 struct list_head busy_ccbq; /* Queue of busy CCBs */ 1316 struct list_head wait_ccbq; /* Queue of waiting for IO CCBs */ 1317 struct list_head skip_ccbq; /* Queue of skipped CCBs */ 1318 u_char actccbs; /* Number of allocated CCBs */ 1319 u_char busyccbs; /* CCBs busy for this lun */ 1320 u_char queuedccbs; /* CCBs queued to the controller*/ 1321 u_char queuedepth; /* Queue depth for this lun */ 1322 u_char scdev_depth; /* SCSI device queue depth */ 1323 u_char maxnxs; /* Max possible nexuses */ 1324 1325 /*---------------------------------------------------------------- 1326 ** Control of tagged command queuing. 1327 ** Tags allocation is performed using a circular buffer. 1328 ** This avoids using a loop for tag allocation. 1329 **---------------------------------------------------------------- 1330 */ 1331 u_char ia_tag; /* Allocation index */ 1332 u_char if_tag; /* Freeing index */ 1333 u_char cb_tags[MAX_TAGS]; /* Circular tags buffer */ 1334 u_char usetags; /* Command queuing is active */ 1335 u_char maxtags; /* Max nr of tags asked by user */ 1336 u_char numtags; /* Current number of tags */ 1337 1338 /*---------------------------------------------------------------- 1339 ** QUEUE FULL control and ORDERED tag control. 1340 **---------------------------------------------------------------- 1341 */ 1342 /*---------------------------------------------------------------- 1343 ** QUEUE FULL and ORDERED tag control. 1344 **---------------------------------------------------------------- 1345 */ 1346 u16 num_good; /* Nr of GOOD since QUEUE FULL */ 1347 tagmap_t tags_umap; /* Used tags bitmap */ 1348 tagmap_t tags_smap; /* Tags in use at 'tag_stime' */ 1349 u_long tags_stime; /* Last time we set smap=umap */ 1350 struct ccb * held_ccb; /* CCB held for QUEUE FULL */ 1351}; 1352 1353/*======================================================================== 1354** 1355** Declaration of structs: the launch script. 1356** 1357**======================================================================== 1358** 1359** It is part of the CCB and is called by the scripts processor to 1360** start or restart the data structure (nexus). 1361** This 6 DWORDs mini script makes use of prefetching. 1362** 1363**------------------------------------------------------------------------ 1364*/ 1365struct launch { 1366 /*---------------------------------------------------------------- 1367 ** SCR_COPY(4), @(p_phys), @(dsa register) 1368 ** SCR_JUMP, @(scheduler_point) 1369 **---------------------------------------------------------------- 1370 */ 1371 ncrcmd setup_dsa[3]; /* Copy 'phys' address to dsa */ 1372 struct link schedule; /* Jump to scheduler point */ 1373 ncrcmd p_phys; /* 'phys' header bus address */ 1374}; 1375 1376/*======================================================================== 1377** 1378** Declaration of structs: global HEADER. 1379** 1380**======================================================================== 1381** 1382** This substructure is copied from the ccb to a global address after 1383** selection (or reselection) and copied back before disconnect. 1384** 1385** These fields are accessible to the script processor. 1386** 1387**------------------------------------------------------------------------ 1388*/ 1389 1390struct head { 1391 /*---------------------------------------------------------------- 1392 ** Saved data pointer. 1393 ** Points to the position in the script responsible for the 1394 ** actual transfer transfer of data. 1395 ** It's written after reception of a SAVE_DATA_POINTER message. 1396 ** The goalpointer points after the last transfer command. 1397 **---------------------------------------------------------------- 1398 */ 1399 u32 savep; 1400 u32 lastp; 1401 u32 goalp; 1402 1403 /*---------------------------------------------------------------- 1404 ** Alternate data pointer. 1405 ** They are copied back to savep/lastp/goalp by the SCRIPTS 1406 ** when the direction is unknown and the device claims data out. 1407 **---------------------------------------------------------------- 1408 */ 1409 u32 wlastp; 1410 u32 wgoalp; 1411 1412 /*---------------------------------------------------------------- 1413 ** The virtual address of the ccb containing this header. 1414 **---------------------------------------------------------------- 1415 */ 1416 struct ccb * cp; 1417 1418 /*---------------------------------------------------------------- 1419 ** Status fields. 1420 **---------------------------------------------------------------- 1421 */ 1422 u_char scr_st[4]; /* script status */ 1423 u_char status[4]; /* host status. must be the */ 1424 /* last DWORD of the header. */ 1425}; 1426 1427/* 1428** The status bytes are used by the host and the script processor. 1429** 1430** The byte corresponding to the host_status must be stored in the 1431** last DWORD of the CCB header since it is used for command 1432** completion (ncr_wakeup()). Doing so, we are sure that the header 1433** has been entirely copied back to the CCB when the host_status is 1434** seen complete by the CPU. 1435** 1436** The last four bytes (status[4]) are copied to the scratchb register 1437** (declared as scr0..scr3 in ncr_reg.h) just after the select/reselect, 1438** and copied back just after disconnecting. 1439** Inside the script the XX_REG are used. 1440** 1441** The first four bytes (scr_st[4]) are used inside the script by 1442** "COPY" commands. 1443** Because source and destination must have the same alignment 1444** in a DWORD, the fields HAVE to be at the chosen offsets. 1445** xerr_st 0 (0x34) scratcha 1446** sync_st 1 (0x05) sxfer 1447** wide_st 3 (0x03) scntl3 1448*/ 1449 1450/* 1451** Last four bytes (script) 1452*/ 1453#define QU_REG scr0 1454#define HS_REG scr1 1455#define HS_PRT nc_scr1 1456#define SS_REG scr2 1457#define SS_PRT nc_scr2 1458#define PS_REG scr3 1459 1460/* 1461** Last four bytes (host) 1462*/ 1463#ifdef SCSI_NCR_BIG_ENDIAN 1464#define actualquirks phys.header.status[3] 1465#define host_status phys.header.status[2] 1466#define scsi_status phys.header.status[1] 1467#define parity_status phys.header.status[0] 1468#else 1469#define actualquirks phys.header.status[0] 1470#define host_status phys.header.status[1] 1471#define scsi_status phys.header.status[2] 1472#define parity_status phys.header.status[3] 1473#endif 1474 1475/* 1476** First four bytes (script) 1477*/ 1478#define xerr_st header.scr_st[0] 1479#define sync_st header.scr_st[1] 1480#define nego_st header.scr_st[2] 1481#define wide_st header.scr_st[3] 1482 1483/* 1484** First four bytes (host) 1485*/ 1486#define xerr_status phys.xerr_st 1487#define nego_status phys.nego_st 1488 1489 1490/*========================================================== 1491** 1492** Declaration of structs: Data structure block 1493** 1494**========================================================== 1495** 1496** During execution of a ccb by the script processor, 1497** the DSA (data structure address) register points 1498** to this substructure of the ccb. 1499** This substructure contains the header with 1500** the script-processor-changeable data and 1501** data blocks for the indirect move commands. 1502** 1503**---------------------------------------------------------- 1504*/ 1505 1506struct dsb { 1507 1508 /* 1509 ** Header. 1510 */ 1511 1512 struct head header; 1513 1514 /* 1515 ** Table data for Script 1516 */ 1517 1518 struct scr_tblsel select; 1519 struct scr_tblmove smsg ; 1520 struct scr_tblmove cmd ; 1521 struct scr_tblmove sense ; 1522 struct scr_tblmove data[MAX_SCATTER]; 1523}; 1524 1525 1526/*======================================================================== 1527** 1528** Declaration of structs: Command control block. 1529** 1530**======================================================================== 1531*/ 1532struct ccb { 1533 /*---------------------------------------------------------------- 1534 ** This is the data structure which is pointed by the DSA 1535 ** register when it is executed by the script processor. 1536 ** It must be the first entry because it contains the header 1537 ** as first entry that must be cache line aligned. 1538 **---------------------------------------------------------------- 1539 */ 1540 struct dsb phys; 1541 1542 /*---------------------------------------------------------------- 1543 ** Mini-script used at CCB execution start-up. 1544 ** Load the DSA with the data structure address (phys) and 1545 ** jump to SELECT. Jump to CANCEL if CCB is to be canceled. 1546 **---------------------------------------------------------------- 1547 */ 1548 struct launch start; 1549 1550 /*---------------------------------------------------------------- 1551 ** Mini-script used at CCB relection to restart the nexus. 1552 ** Load the DSA with the data structure address (phys) and 1553 ** jump to RESEL_DSA. Jump to ABORT if CCB is to be aborted. 1554 **---------------------------------------------------------------- 1555 */ 1556 struct launch restart; 1557 1558 /*---------------------------------------------------------------- 1559 ** If a data transfer phase is terminated too early 1560 ** (after reception of a message (i.e. DISCONNECT)), 1561 ** we have to prepare a mini script to transfer 1562 ** the rest of the data. 1563 **---------------------------------------------------------------- 1564 */ 1565 ncrcmd patch[8]; 1566 1567 /*---------------------------------------------------------------- 1568 ** The general SCSI driver provides a 1569 ** pointer to a control block. 1570 **---------------------------------------------------------------- 1571 */ 1572 struct scsi_cmnd *cmd; /* SCSI command */ 1573 u_char cdb_buf[16]; /* Copy of CDB */ 1574 u_char sense_buf[64]; 1575 int data_len; /* Total data length */ 1576 1577 /*---------------------------------------------------------------- 1578 ** Message areas. 1579 ** We prepare a message to be sent after selection. 1580 ** We may use a second one if the command is rescheduled 1581 ** due to GETCC or QFULL. 1582 ** Contents are IDENTIFY and SIMPLE_TAG. 1583 ** While negotiating sync or wide transfer, 1584 ** a SDTR or WDTR message is appended. 1585 **---------------------------------------------------------------- 1586 */ 1587 u_char scsi_smsg [8]; 1588 u_char scsi_smsg2[8]; 1589 1590 /*---------------------------------------------------------------- 1591 ** Other fields. 1592 **---------------------------------------------------------------- 1593 */ 1594 u_long p_ccb; /* BUS address of this CCB */ 1595 u_char sensecmd[6]; /* Sense command */ 1596 u_char tag; /* Tag for this transfer */ 1597 /* 255 means no tag */ 1598 u_char target; 1599 u_char lun; 1600 u_char queued; 1601 u_char auto_sense; 1602 struct ccb * link_ccb; /* Host adapter CCB chain */ 1603 struct list_head link_ccbq; /* Link to unit CCB queue */ 1604 u32 startp; /* Initial data pointer */ 1605 u_long magic; /* Free / busy CCB flag */ 1606}; 1607 1608#define CCB_PHYS(cp,lbl) (cp->p_ccb + offsetof(struct ccb, lbl)) 1609 1610 1611/*======================================================================== 1612** 1613** Declaration of structs: NCR device descriptor 1614** 1615**======================================================================== 1616*/ 1617struct ncb { 1618 /*---------------------------------------------------------------- 1619 ** The global header. 1620 ** It is accessible to both the host and the script processor. 1621 ** Must be cache line size aligned (32 for x86) in order to 1622 ** allow cache line bursting when it is copied to/from CCB. 1623 **---------------------------------------------------------------- 1624 */ 1625 struct head header; 1626 1627 /*---------------------------------------------------------------- 1628 ** CCBs management queues. 1629 **---------------------------------------------------------------- 1630 */ 1631 struct scsi_cmnd *waiting_list; /* Commands waiting for a CCB */ 1632 /* when lcb is not allocated. */ 1633 struct scsi_cmnd *done_list; /* Commands waiting for done() */ 1634 /* callback to be invoked. */ 1635 spinlock_t smp_lock; /* Lock for SMP threading */ 1636 1637 /*---------------------------------------------------------------- 1638 ** Chip and controller indentification. 1639 **---------------------------------------------------------------- 1640 */ 1641 int unit; /* Unit number */ 1642 char inst_name[16]; /* ncb instance name */ 1643 1644 /*---------------------------------------------------------------- 1645 ** Initial value of some IO register bits. 1646 ** These values are assumed to have been set by BIOS, and may 1647 ** be used for probing adapter implementation differences. 1648 **---------------------------------------------------------------- 1649 */ 1650 u_char sv_scntl0, sv_scntl3, sv_dmode, sv_dcntl, sv_ctest0, sv_ctest3, 1651 sv_ctest4, sv_ctest5, sv_gpcntl, sv_stest2, sv_stest4; 1652 1653 /*---------------------------------------------------------------- 1654 ** Actual initial value of IO register bits used by the 1655 ** driver. They are loaded at initialisation according to 1656 ** features that are to be enabled. 1657 **---------------------------------------------------------------- 1658 */ 1659 u_char rv_scntl0, rv_scntl3, rv_dmode, rv_dcntl, rv_ctest0, rv_ctest3, 1660 rv_ctest4, rv_ctest5, rv_stest2; 1661 1662 /*---------------------------------------------------------------- 1663 ** Targets management. 1664 ** During reselection the ncr jumps to jump_tcb. 1665 ** The SFBR register is loaded with the encoded target id. 1666 ** For i = 0 to 3 1667 ** SCR_JUMP ^ IFTRUE(MASK(i, 3)), @(next tcb mod. i) 1668 ** 1669 ** Recent chips will prefetch the 4 JUMPS using only 1 burst. 1670 ** It is kind of hashcoding. 1671 **---------------------------------------------------------------- 1672 */ 1673 struct link jump_tcb[4]; /* JUMPs for reselection */ 1674 struct tcb target[MAX_TARGET]; /* Target data */ 1675 1676 /*---------------------------------------------------------------- 1677 ** Virtual and physical bus addresses of the chip. 1678 **---------------------------------------------------------------- 1679 */ 1680 void __iomem *vaddr; /* Virtual and bus address of */ 1681 unsigned long paddr; /* chip's IO registers. */ 1682 unsigned long paddr2; /* On-chip RAM bus address. */ 1683 volatile /* Pointer to volatile for */ 1684 struct ncr_reg __iomem *reg; /* memory mapped IO. */ 1685 1686 /*---------------------------------------------------------------- 1687 ** SCRIPTS virtual and physical bus addresses. 1688 ** 'script' is loaded in the on-chip RAM if present. 1689 ** 'scripth' stays in main memory. 1690 **---------------------------------------------------------------- 1691 */ 1692 struct script *script0; /* Copies of script and scripth */ 1693 struct scripth *scripth0; /* relocated for this ncb. */ 1694 struct scripth *scripth; /* Actual scripth virt. address */ 1695 u_long p_script; /* Actual script and scripth */ 1696 u_long p_scripth; /* bus addresses. */ 1697 1698 /*---------------------------------------------------------------- 1699 ** General controller parameters and configuration. 1700 **---------------------------------------------------------------- 1701 */ 1702 struct device *dev; 1703 u_char revision_id; /* PCI device revision id */ 1704 u32 irq; /* IRQ level */ 1705 u32 features; /* Chip features map */ 1706 u_char myaddr; /* SCSI id of the adapter */ 1707 u_char maxburst; /* log base 2 of dwords burst */ 1708 u_char maxwide; /* Maximum transfer width */ 1709 u_char minsync; /* Minimum sync period factor */ 1710 u_char maxsync; /* Maximum sync period factor */ 1711 u_char maxoffs; /* Max scsi offset */ 1712 u_char multiplier; /* Clock multiplier (1,2,4) */ 1713 u_char clock_divn; /* Number of clock divisors */ 1714 u_long clock_khz; /* SCSI clock frequency in KHz */ 1715 1716 /*---------------------------------------------------------------- 1717 ** Start queue management. 1718 ** It is filled up by the host processor and accessed by the 1719 ** SCRIPTS processor in order to start SCSI commands. 1720 **---------------------------------------------------------------- 1721 */ 1722 u16 squeueput; /* Next free slot of the queue */ 1723 u16 actccbs; /* Number of allocated CCBs */ 1724 u16 queuedccbs; /* Number of CCBs in start queue*/ 1725 u16 queuedepth; /* Start queue depth */ 1726 1727 /*---------------------------------------------------------------- 1728 ** Timeout handler. 1729 **---------------------------------------------------------------- 1730 */ 1731 struct timer_list timer; /* Timer handler link header */ 1732 u_long lasttime; 1733 u_long settle_time; /* Resetting the SCSI BUS */ 1734 1735 /*---------------------------------------------------------------- 1736 ** Debugging and profiling. 1737 **---------------------------------------------------------------- 1738 */ 1739 struct ncr_reg regdump; /* Register dump */ 1740 u_long regtime; /* Time it has been done */ 1741 1742 /*---------------------------------------------------------------- 1743 ** Miscellaneous buffers accessed by the scripts-processor. 1744 ** They shall be DWORD aligned, because they may be read or 1745 ** written with a SCR_COPY script command. 1746 **---------------------------------------------------------------- 1747 */ 1748 u_char msgout[8]; /* Buffer for MESSAGE OUT */ 1749 u_char msgin [8]; /* Buffer for MESSAGE IN */ 1750 u32 lastmsg; /* Last SCSI message sent */ 1751 u_char scratch; /* Scratch for SCSI receive */ 1752 1753 /*---------------------------------------------------------------- 1754 ** Miscellaneous configuration and status parameters. 1755 **---------------------------------------------------------------- 1756 */ 1757 u_char disc; /* Diconnection allowed */ 1758 u_char scsi_mode; /* Current SCSI BUS mode */ 1759 u_char order; /* Tag order to use */ 1760 u_char verbose; /* Verbosity for this controller*/ 1761 int ncr_cache; /* Used for cache test at init. */ 1762 u_long p_ncb; /* BUS address of this NCB */ 1763 1764 /*---------------------------------------------------------------- 1765 ** Command completion handling. 1766 **---------------------------------------------------------------- 1767 */ 1768#ifdef SCSI_NCR_CCB_DONE_SUPPORT 1769 struct ccb *(ccb_done[MAX_DONE]); 1770 int ccb_done_ic; 1771#endif 1772 /*---------------------------------------------------------------- 1773 ** Fields that should be removed or changed. 1774 **---------------------------------------------------------------- 1775 */ 1776 struct ccb *ccb; /* Global CCB */ 1777 struct usrcmd user; /* Command from user */ 1778 volatile u_char release_stage; /* Synchronisation stage on release */ 1779}; 1780 1781#define NCB_SCRIPT_PHYS(np,lbl) (np->p_script + offsetof (struct script, lbl)) 1782#define NCB_SCRIPTH_PHYS(np,lbl) (np->p_scripth + offsetof (struct scripth,lbl)) 1783 1784/*========================================================== 1785** 1786** 1787** Script for NCR-Processor. 1788** 1789** Use ncr_script_fill() to create the variable parts. 1790** Use ncr_script_copy_and_bind() to make a copy and 1791** bind to physical addresses. 1792** 1793** 1794**========================================================== 1795** 1796** We have to know the offsets of all labels before 1797** we reach them (for forward jumps). 1798** Therefore we declare a struct here. 1799** If you make changes inside the script, 1800** DONT FORGET TO CHANGE THE LENGTHS HERE! 1801** 1802**---------------------------------------------------------- 1803*/ 1804 1805/* 1806** For HP Zalon/53c720 systems, the Zalon interface 1807** between CPU and 53c720 does prefetches, which causes 1808** problems with self modifying scripts. The problem 1809** is overcome by calling a dummy subroutine after each 1810** modification, to force a refetch of the script on 1811** return from the subroutine. 1812*/ 1813 1814#ifdef CONFIG_NCR53C8XX_PREFETCH 1815#define PREFETCH_FLUSH_CNT 2 1816#define PREFETCH_FLUSH SCR_CALL, PADDRH (wait_dma), 1817#else 1818#define PREFETCH_FLUSH_CNT 0 1819#define PREFETCH_FLUSH 1820#endif 1821 1822/* 1823** Script fragments which are loaded into the on-chip RAM 1824** of 825A, 875 and 895 chips. 1825*/ 1826struct script { 1827 ncrcmd start [ 5]; 1828 ncrcmd startpos [ 1]; 1829 ncrcmd select [ 6]; 1830 ncrcmd select2 [ 9 + PREFETCH_FLUSH_CNT]; 1831 ncrcmd loadpos [ 4]; 1832 ncrcmd send_ident [ 9]; 1833 ncrcmd prepare [ 6]; 1834 ncrcmd prepare2 [ 7]; 1835 ncrcmd command [ 6]; 1836 ncrcmd dispatch [ 32]; 1837 ncrcmd clrack [ 4]; 1838 ncrcmd no_data [ 17]; 1839 ncrcmd status [ 8]; 1840 ncrcmd msg_in [ 2]; 1841 ncrcmd msg_in2 [ 16]; 1842 ncrcmd msg_bad [ 4]; 1843 ncrcmd setmsg [ 7]; 1844 ncrcmd cleanup [ 6]; 1845 ncrcmd complete [ 9]; 1846 ncrcmd cleanup_ok [ 8 + PREFETCH_FLUSH_CNT]; 1847 ncrcmd cleanup0 [ 1]; 1848#ifndef SCSI_NCR_CCB_DONE_SUPPORT 1849 ncrcmd signal [ 12]; 1850#else 1851 ncrcmd signal [ 9]; 1852 ncrcmd done_pos [ 1]; 1853 ncrcmd done_plug [ 2]; 1854 ncrcmd done_end [ 7]; 1855#endif 1856 ncrcmd save_dp [ 7]; 1857 ncrcmd restore_dp [ 5]; 1858 ncrcmd disconnect [ 10]; 1859 ncrcmd msg_out [ 9]; 1860 ncrcmd msg_out_done [ 7]; 1861 ncrcmd idle [ 2]; 1862 ncrcmd reselect [ 8]; 1863 ncrcmd reselected [ 8]; 1864 ncrcmd resel_dsa [ 6 + PREFETCH_FLUSH_CNT]; 1865 ncrcmd loadpos1 [ 4]; 1866 ncrcmd resel_lun [ 6]; 1867 ncrcmd resel_tag [ 6]; 1868 ncrcmd jump_to_nexus [ 4 + PREFETCH_FLUSH_CNT]; 1869 ncrcmd nexus_indirect [ 4]; 1870 ncrcmd resel_notag [ 4]; 1871 ncrcmd data_in [MAX_SCATTERL * 4]; 1872 ncrcmd data_in2 [ 4]; 1873 ncrcmd data_out [MAX_SCATTERL * 4]; 1874 ncrcmd data_out2 [ 4]; 1875}; 1876 1877/* 1878** Script fragments which stay in main memory for all chips. 1879*/ 1880struct scripth { 1881 ncrcmd tryloop [MAX_START*2]; 1882 ncrcmd tryloop2 [ 2]; 1883#ifdef SCSI_NCR_CCB_DONE_SUPPORT 1884 ncrcmd done_queue [MAX_DONE*5]; 1885 ncrcmd done_queue2 [ 2]; 1886#endif 1887 ncrcmd select_no_atn [ 8]; 1888 ncrcmd cancel [ 4]; 1889 ncrcmd skip [ 9 + PREFETCH_FLUSH_CNT]; 1890 ncrcmd skip2 [ 19]; 1891 ncrcmd par_err_data_in [ 6]; 1892 ncrcmd par_err_other [ 4]; 1893 ncrcmd msg_reject [ 8]; 1894 ncrcmd msg_ign_residue [ 24]; 1895 ncrcmd msg_extended [ 10]; 1896 ncrcmd msg_ext_2 [ 10]; 1897 ncrcmd msg_wdtr [ 14]; 1898 ncrcmd send_wdtr [ 7]; 1899 ncrcmd msg_ext_3 [ 10]; 1900 ncrcmd msg_sdtr [ 14]; 1901 ncrcmd send_sdtr [ 7]; 1902 ncrcmd nego_bad_phase [ 4]; 1903 ncrcmd msg_out_abort [ 10]; 1904 ncrcmd hdata_in [MAX_SCATTERH * 4]; 1905 ncrcmd hdata_in2 [ 2]; 1906 ncrcmd hdata_out [MAX_SCATTERH * 4]; 1907 ncrcmd hdata_out2 [ 2]; 1908 ncrcmd reset [ 4]; 1909 ncrcmd aborttag [ 4]; 1910 ncrcmd abort [ 2]; 1911 ncrcmd abort_resel [ 20]; 1912 ncrcmd resend_ident [ 4]; 1913 ncrcmd clratn_go_on [ 3]; 1914 ncrcmd nxtdsp_go_on [ 1]; 1915 ncrcmd sdata_in [ 8]; 1916 ncrcmd data_io [ 18]; 1917 ncrcmd bad_identify [ 12]; 1918 ncrcmd bad_i_t_l [ 4]; 1919 ncrcmd bad_i_t_l_q [ 4]; 1920 ncrcmd bad_target [ 8]; 1921 ncrcmd bad_status [ 8]; 1922 ncrcmd start_ram [ 4 + PREFETCH_FLUSH_CNT]; 1923 ncrcmd start_ram0 [ 4]; 1924 ncrcmd sto_restart [ 5]; 1925 ncrcmd wait_dma [ 2]; 1926 ncrcmd snooptest [ 9]; 1927 ncrcmd snoopend [ 2]; 1928}; 1929 1930/*========================================================== 1931** 1932** 1933** Function headers. 1934** 1935** 1936**========================================================== 1937*/ 1938 1939static void ncr_alloc_ccb (struct ncb *np, u_char tn, u_char ln); 1940static void ncr_complete (struct ncb *np, struct ccb *cp); 1941static void ncr_exception (struct ncb *np); 1942static void ncr_free_ccb (struct ncb *np, struct ccb *cp); 1943static void ncr_init_ccb (struct ncb *np, struct ccb *cp); 1944static void ncr_init_tcb (struct ncb *np, u_char tn); 1945static struct lcb * ncr_alloc_lcb (struct ncb *np, u_char tn, u_char ln); 1946static struct lcb * ncr_setup_lcb (struct ncb *np, struct scsi_device *sdev); 1947static void ncr_getclock (struct ncb *np, int mult); 1948static void ncr_selectclock (struct ncb *np, u_char scntl3); 1949static struct ccb *ncr_get_ccb (struct ncb *np, struct scsi_cmnd *cmd); 1950static void ncr_chip_reset (struct ncb *np, int delay); 1951static void ncr_init (struct ncb *np, int reset, char * msg, u_long code); 1952static int ncr_int_sbmc (struct ncb *np); 1953static int ncr_int_par (struct ncb *np); 1954static void ncr_int_ma (struct ncb *np); 1955static void ncr_int_sir (struct ncb *np); 1956static void ncr_int_sto (struct ncb *np); 1957static void ncr_negotiate (struct ncb* np, struct tcb* tp); 1958static int ncr_prepare_nego(struct ncb *np, struct ccb *cp, u_char *msgptr); 1959 1960static void ncr_script_copy_and_bind 1961 (struct ncb *np, ncrcmd *src, ncrcmd *dst, int len); 1962static void ncr_script_fill (struct script * scr, struct scripth * scripth); 1963static int ncr_scatter (struct ncb *np, struct ccb *cp, struct scsi_cmnd *cmd); 1964static void ncr_getsync (struct ncb *np, u_char sfac, u_char *fakp, u_char *scntl3p); 1965static void ncr_setsync (struct ncb *np, struct ccb *cp, u_char scntl3, u_char sxfer); 1966static void ncr_setup_tags (struct ncb *np, struct scsi_device *sdev); 1967static void ncr_setwide (struct ncb *np, struct ccb *cp, u_char wide, u_char ack); 1968static int ncr_snooptest (struct ncb *np); 1969static void ncr_timeout (struct ncb *np); 1970static void ncr_wakeup (struct ncb *np, u_long code); 1971static void ncr_wakeup_done (struct ncb *np); 1972static void ncr_start_next_ccb (struct ncb *np, struct lcb * lp, int maxn); 1973static void ncr_put_start_queue(struct ncb *np, struct ccb *cp); 1974 1975static void insert_into_waiting_list(struct ncb *np, struct scsi_cmnd *cmd); 1976static struct scsi_cmnd *retrieve_from_waiting_list(int to_remove, struct ncb *np, struct scsi_cmnd *cmd); 1977static void process_waiting_list(struct ncb *np, int sts); 1978 1979#define remove_from_waiting_list(np, cmd) \ 1980 retrieve_from_waiting_list(1, (np), (cmd)) 1981#define requeue_waiting_list(np) process_waiting_list((np), DID_OK) 1982#define reset_waiting_list(np) process_waiting_list((np), DID_RESET) 1983 1984static inline char *ncr_name (struct ncb *np) 1985{ 1986 return np->inst_name; 1987} 1988 1989 1990/*========================================================== 1991** 1992** 1993** Scripts for NCR-Processor. 1994** 1995** Use ncr_script_bind for binding to physical addresses. 1996** 1997** 1998**========================================================== 1999** 2000** NADDR generates a reference to a field of the controller data. 2001** PADDR generates a reference to another part of the script. 2002** RADDR generates a reference to a script processor register. 2003** FADDR generates a reference to a script processor register 2004** with offset. 2005** 2006**---------------------------------------------------------- 2007*/ 2008 2009#define RELOC_SOFTC 0x40000000 2010#define RELOC_LABEL 0x50000000 2011#define RELOC_REGISTER 0x60000000 2012#define RELOC_LABELH 0x80000000 2013#define RELOC_MASK 0xf0000000 2014 2015#define NADDR(label) (RELOC_SOFTC | offsetof(struct ncb, label)) 2016#define PADDR(label) (RELOC_LABEL | offsetof(struct script, label)) 2017#define PADDRH(label) (RELOC_LABELH | offsetof(struct scripth, label)) 2018#define RADDR(label) (RELOC_REGISTER | REG(label)) 2019#define FADDR(label,ofs)(RELOC_REGISTER | ((REG(label))+(ofs))) 2020 2021 2022static struct script script0 __initdata = { 2023/*--------------------------< START >-----------------------*/ { 2024 /* 2025 ** This NOP will be patched with LED ON 2026 ** SCR_REG_REG (gpreg, SCR_AND, 0xfe) 2027 */ 2028 SCR_NO_OP, 2029 0, 2030 /* 2031 ** Clear SIGP. 2032 */ 2033 SCR_FROM_REG (ctest2), 2034 0, 2035 /* 2036 ** Then jump to a certain point in tryloop. 2037 ** Due to the lack of indirect addressing the code 2038 ** is self modifying here. 2039 */ 2040 SCR_JUMP, 2041}/*-------------------------< STARTPOS >--------------------*/,{ 2042 PADDRH(tryloop), 2043 2044}/*-------------------------< SELECT >----------------------*/,{ 2045 /* 2046 ** DSA contains the address of a scheduled 2047 ** data structure. 2048 ** 2049 ** SCRATCHA contains the address of the script, 2050 ** which starts the next entry. 2051 ** 2052 ** Set Initiator mode. 2053 ** 2054 ** (Target mode is left as an exercise for the reader) 2055 */ 2056 2057 SCR_CLR (SCR_TRG), 2058 0, 2059 SCR_LOAD_REG (HS_REG, HS_SELECTING), 2060 0, 2061 2062 /* 2063 ** And try to select this target. 2064 */ 2065 SCR_SEL_TBL_ATN ^ offsetof (struct dsb, select), 2066 PADDR (reselect), 2067 2068}/*-------------------------< SELECT2 >----------------------*/,{ 2069 /* 2070 ** Now there are 4 possibilities: 2071 ** 2072 ** (1) The ncr loses arbitration. 2073 ** This is ok, because it will try again, 2074 ** when the bus becomes idle. 2075 ** (But beware of the timeout function!) 2076 ** 2077 ** (2) The ncr is reselected. 2078 ** Then the script processor takes the jump 2079 ** to the RESELECT label. 2080 ** 2081 ** (3) The ncr wins arbitration. 2082 ** Then it will execute SCRIPTS instruction until 2083 ** the next instruction that checks SCSI phase. 2084 ** Then will stop and wait for selection to be 2085 ** complete or selection time-out to occur. 2086 ** As a result the SCRIPTS instructions until 2087 ** LOADPOS + 2 should be executed in parallel with 2088 ** the SCSI core performing selection. 2089 */ 2090 2091 /* 2092 ** The MESSAGE_REJECT problem seems to be due to a selection 2093 ** timing problem. 2094 ** Wait immediately for the selection to complete. 2095 ** (2.5x behaves so) 2096 */ 2097 SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_OUT)), 2098 0, 2099 2100 /* 2101 ** Next time use the next slot. 2102 */ 2103 SCR_COPY (4), 2104 RADDR (temp), 2105 PADDR (startpos), 2106 /* 2107 ** The ncr doesn't have an indirect load 2108 ** or store command. So we have to 2109 ** copy part of the control block to a 2110 ** fixed place, where we can access it. 2111 ** 2112 ** We patch the address part of a 2113 ** COPY command with the DSA-register. 2114 */ 2115 SCR_COPY_F (4), 2116 RADDR (dsa), 2117 PADDR (loadpos), 2118 /* 2119 ** Flush script prefetch if required 2120 */ 2121 PREFETCH_FLUSH 2122 /* 2123 ** then we do the actual copy. 2124 */ 2125 SCR_COPY (sizeof (struct head)), 2126 /* 2127 ** continued after the next label ... 2128 */ 2129}/*-------------------------< LOADPOS >---------------------*/,{ 2130 0, 2131 NADDR (header), 2132 /* 2133 ** Wait for the next phase or the selection 2134 ** to complete or time-out. 2135 */ 2136 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_OUT)), 2137 PADDR (prepare), 2138 2139}/*-------------------------< SEND_IDENT >----------------------*/,{ 2140 /* 2141 ** Selection complete. 2142 ** Send the IDENTIFY and SIMPLE_TAG messages 2143 ** (and the EXTENDED_SDTR message) 2144 */ 2145 SCR_MOVE_TBL ^ SCR_MSG_OUT, 2146 offsetof (struct dsb, smsg), 2147 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_OUT)), 2148 PADDRH (resend_ident), 2149 SCR_LOAD_REG (scratcha, 0x80), 2150 0, 2151 SCR_COPY (1), 2152 RADDR (scratcha), 2153 NADDR (lastmsg), 2154}/*-------------------------< PREPARE >----------------------*/,{ 2155 /* 2156 ** load the savep (saved pointer) into 2157 ** the TEMP register (actual pointer) 2158 */ 2159 SCR_COPY (4), 2160 NADDR (header.savep), 2161 RADDR (temp), 2162 /* 2163 ** Initialize the status registers 2164 */ 2165 SCR_COPY (4), 2166 NADDR (header.status), 2167 RADDR (scr0), 2168}/*-------------------------< PREPARE2 >---------------------*/,{ 2169 /* 2170 ** Initialize the msgout buffer with a NOOP message. 2171 */ 2172 SCR_LOAD_REG (scratcha, NOP), 2173 0, 2174 SCR_COPY (1), 2175 RADDR (scratcha), 2176 NADDR (msgout), 2177 /* 2178 ** Anticipate the COMMAND phase. 2179 ** This is the normal case for initial selection. 2180 */ 2181 SCR_JUMP ^ IFFALSE (WHEN (SCR_COMMAND)), 2182 PADDR (dispatch), 2183 2184}/*-------------------------< COMMAND >--------------------*/,{ 2185 /* 2186 ** ... and send the command 2187 */ 2188 SCR_MOVE_TBL ^ SCR_COMMAND, 2189 offsetof (struct dsb, cmd), 2190 /* 2191 ** If status is still HS_NEGOTIATE, negotiation failed. 2192 ** We check this here, since we want to do that 2193 ** only once. 2194 */ 2195 SCR_FROM_REG (HS_REG), 2196 0, 2197 SCR_INT ^ IFTRUE (DATA (HS_NEGOTIATE)), 2198 SIR_NEGO_FAILED, 2199 2200}/*-----------------------< DISPATCH >----------------------*/,{ 2201 /* 2202 ** MSG_IN is the only phase that shall be 2203 ** entered at least once for each (re)selection. 2204 ** So we test it first. 2205 */ 2206 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_IN)), 2207 PADDR (msg_in), 2208 2209 SCR_RETURN ^ IFTRUE (IF (SCR_DATA_OUT)), 2210 0, 2211 SCR_JUMPR ^ IFFALSE (IF (SCR_DATA_IN)), 2212 20, 2213 SCR_COPY (4), 2214 RADDR (scratcha), 2215 RADDR (scratcha), 2216 SCR_RETURN, 2217 0, 2218 SCR_JUMP ^ IFTRUE (IF (SCR_STATUS)), 2219 PADDR (status), 2220 SCR_JUMP ^ IFTRUE (IF (SCR_COMMAND)), 2221 PADDR (command), 2222 SCR_JUMP ^ IFTRUE (IF (SCR_MSG_OUT)), 2223 PADDR (msg_out), 2224 /* 2225 ** Discard one illegal phase byte, if required. 2226 */ 2227 SCR_LOAD_REG (scratcha, XE_BAD_PHASE), 2228 0, 2229 SCR_COPY (1), 2230 RADDR (scratcha), 2231 NADDR (xerr_st), 2232 SCR_JUMPR ^ IFFALSE (IF (SCR_ILG_OUT)), 2233 8, 2234 SCR_MOVE_ABS (1) ^ SCR_ILG_OUT, 2235 NADDR (scratch), 2236 SCR_JUMPR ^ IFFALSE (IF (SCR_ILG_IN)), 2237 8, 2238 SCR_MOVE_ABS (1) ^ SCR_ILG_IN, 2239 NADDR (scratch), 2240 SCR_JUMP, 2241 PADDR (dispatch), 2242 2243}/*-------------------------< CLRACK >----------------------*/,{ 2244 /* 2245 ** Terminate possible pending message phase. 2246 */ 2247 SCR_CLR (SCR_ACK), 2248 0, 2249 SCR_JUMP, 2250 PADDR (dispatch), 2251 2252}/*-------------------------< NO_DATA >--------------------*/,{ 2253 /* 2254 ** The target wants to tranfer too much data 2255 ** or in the wrong direction. 2256 ** Remember that in extended error. 2257 */ 2258 SCR_LOAD_REG (scratcha, XE_EXTRA_DATA), 2259 0, 2260 SCR_COPY (1), 2261 RADDR (scratcha), 2262 NADDR (xerr_st), 2263 /* 2264 ** Discard one data byte, if required. 2265 */ 2266 SCR_JUMPR ^ IFFALSE (WHEN (SCR_DATA_OUT)), 2267 8, 2268 SCR_MOVE_ABS (1) ^ SCR_DATA_OUT, 2269 NADDR (scratch), 2270 SCR_JUMPR ^ IFFALSE (IF (SCR_DATA_IN)), 2271 8, 2272 SCR_MOVE_ABS (1) ^ SCR_DATA_IN, 2273 NADDR (scratch), 2274 /* 2275 ** .. and repeat as required. 2276 */ 2277 SCR_CALL, 2278 PADDR (dispatch), 2279 SCR_JUMP, 2280 PADDR (no_data), 2281 2282}/*-------------------------< STATUS >--------------------*/,{ 2283 /* 2284 ** get the status 2285 */ 2286 SCR_MOVE_ABS (1) ^ SCR_STATUS, 2287 NADDR (scratch), 2288 /* 2289 ** save status to scsi_status. 2290 ** mark as complete. 2291 */ 2292 SCR_TO_REG (SS_REG), 2293 0, 2294 SCR_LOAD_REG (HS_REG, HS_COMPLETE), 2295 0, 2296 SCR_JUMP, 2297 PADDR (dispatch), 2298}/*-------------------------< MSG_IN >--------------------*/,{ 2299 /* 2300 ** Get the first byte of the message 2301 ** and save it to SCRATCHA. 2302 ** 2303 ** The script processor doesn't negate the 2304 ** ACK signal after this transfer. 2305 */ 2306 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 2307 NADDR (msgin[0]), 2308}/*-------------------------< MSG_IN2 >--------------------*/,{ 2309 /* 2310 ** Handle this message. 2311 */ 2312 SCR_JUMP ^ IFTRUE (DATA (COMMAND_COMPLETE)), 2313 PADDR (complete), 2314 SCR_JUMP ^ IFTRUE (DATA (DISCONNECT)), 2315 PADDR (disconnect), 2316 SCR_JUMP ^ IFTRUE (DATA (SAVE_POINTERS)), 2317 PADDR (save_dp), 2318 SCR_JUMP ^ IFTRUE (DATA (RESTORE_POINTERS)), 2319 PADDR (restore_dp), 2320 SCR_JUMP ^ IFTRUE (DATA (EXTENDED_MESSAGE)), 2321 PADDRH (msg_extended), 2322 SCR_JUMP ^ IFTRUE (DATA (NOP)), 2323 PADDR (clrack), 2324 SCR_JUMP ^ IFTRUE (DATA (MESSAGE_REJECT)), 2325 PADDRH (msg_reject), 2326 SCR_JUMP ^ IFTRUE (DATA (IGNORE_WIDE_RESIDUE)), 2327 PADDRH (msg_ign_residue), 2328 /* 2329 ** Rest of the messages left as 2330 ** an exercise ... 2331 ** 2332 ** Unimplemented messages: 2333 ** fall through to MSG_BAD. 2334 */ 2335}/*-------------------------< MSG_BAD >------------------*/,{ 2336 /* 2337 ** unimplemented message - reject it. 2338 */ 2339 SCR_INT, 2340 SIR_REJECT_SENT, 2341 SCR_LOAD_REG (scratcha, MESSAGE_REJECT), 2342 0, 2343}/*-------------------------< SETMSG >----------------------*/,{ 2344 SCR_COPY (1), 2345 RADDR (scratcha), 2346 NADDR (msgout), 2347 SCR_SET (SCR_ATN), 2348 0, 2349 SCR_JUMP, 2350 PADDR (clrack), 2351}/*-------------------------< CLEANUP >-------------------*/,{ 2352 /* 2353 ** dsa: Pointer to ccb 2354 ** or xxxxxxFF (no ccb) 2355 ** 2356 ** HS_REG: Host-Status (<>0!) 2357 */ 2358 SCR_FROM_REG (dsa), 2359 0, 2360 SCR_JUMP ^ IFTRUE (DATA (0xff)), 2361 PADDR (start), 2362 /* 2363 ** dsa is valid. 2364 ** complete the cleanup. 2365 */ 2366 SCR_JUMP, 2367 PADDR (cleanup_ok), 2368 2369}/*-------------------------< COMPLETE >-----------------*/,{ 2370 /* 2371 ** Complete message. 2372 ** 2373 ** Copy TEMP register to LASTP in header. 2374 */ 2375 SCR_COPY (4), 2376 RADDR (temp), 2377 NADDR (header.lastp), 2378 /* 2379 ** When we terminate the cycle by clearing ACK, 2380 ** the target may disconnect immediately. 2381 ** 2382 ** We don't want to be told of an 2383 ** "unexpected disconnect", 2384 ** so we disable this feature. 2385 */ 2386 SCR_REG_REG (scntl2, SCR_AND, 0x7f), 2387 0, 2388 /* 2389 ** Terminate cycle ... 2390 */ 2391 SCR_CLR (SCR_ACK|SCR_ATN), 2392 0, 2393 /* 2394 ** ... and wait for the disconnect. 2395 */ 2396 SCR_WAIT_DISC, 2397 0, 2398}/*-------------------------< CLEANUP_OK >----------------*/,{ 2399 /* 2400 ** Save host status to header. 2401 */ 2402 SCR_COPY (4), 2403 RADDR (scr0), 2404 NADDR (header.status), 2405 /* 2406 ** and copy back the header to the ccb. 2407 */ 2408 SCR_COPY_F (4), 2409 RADDR (dsa), 2410 PADDR (cleanup0), 2411 /* 2412 ** Flush script prefetch if required 2413 */ 2414 PREFETCH_FLUSH 2415 SCR_COPY (sizeof (struct head)), 2416 NADDR (header), 2417}/*-------------------------< CLEANUP0 >--------------------*/,{ 2418 0, 2419}/*-------------------------< SIGNAL >----------------------*/,{ 2420 /* 2421 ** if job not completed ... 2422 */ 2423 SCR_FROM_REG (HS_REG), 2424 0, 2425 /* 2426 ** ... start the next command. 2427 */ 2428 SCR_JUMP ^ IFTRUE (MASK (0, (HS_DONEMASK|HS_SKIPMASK))), 2429 PADDR(start), 2430 /* 2431 ** If command resulted in not GOOD status, 2432 ** call the C code if needed. 2433 */ 2434 SCR_FROM_REG (SS_REG), 2435 0, 2436 SCR_CALL ^ IFFALSE (DATA (S_GOOD)), 2437 PADDRH (bad_status), 2438 2439#ifndef SCSI_NCR_CCB_DONE_SUPPORT 2440 2441 /* 2442 ** ... signal completion to the host 2443 */ 2444 SCR_INT, 2445 SIR_INTFLY, 2446 /* 2447 ** Auf zu neuen Schandtaten! 2448 */ 2449 SCR_JUMP, 2450 PADDR(start), 2451 2452#else /* defined SCSI_NCR_CCB_DONE_SUPPORT */ 2453 2454 /* 2455 ** ... signal completion to the host 2456 */ 2457 SCR_JUMP, 2458}/*------------------------< DONE_POS >---------------------*/,{ 2459 PADDRH (done_queue), 2460}/*------------------------< DONE_PLUG >--------------------*/,{ 2461 SCR_INT, 2462 SIR_DONE_OVERFLOW, 2463}/*------------------------< DONE_END >---------------------*/,{ 2464 SCR_INT, 2465 SIR_INTFLY, 2466 SCR_COPY (4), 2467 RADDR (temp), 2468 PADDR (done_pos), 2469 SCR_JUMP, 2470 PADDR (start), 2471 2472#endif /* SCSI_NCR_CCB_DONE_SUPPORT */ 2473 2474}/*-------------------------< SAVE_DP >------------------*/,{ 2475 /* 2476 ** SAVE_DP message: 2477 ** Copy TEMP register to SAVEP in header. 2478 */ 2479 SCR_COPY (4), 2480 RADDR (temp), 2481 NADDR (header.savep), 2482 SCR_CLR (SCR_ACK), 2483 0, 2484 SCR_JUMP, 2485 PADDR (dispatch), 2486}/*-------------------------< RESTORE_DP >---------------*/,{ 2487 /* 2488 ** RESTORE_DP message: 2489 ** Copy SAVEP in header to TEMP register. 2490 */ 2491 SCR_COPY (4), 2492 NADDR (header.savep), 2493 RADDR (temp), 2494 SCR_JUMP, 2495 PADDR (clrack), 2496 2497}/*-------------------------< DISCONNECT >---------------*/,{ 2498 /* 2499 ** DISCONNECTing ... 2500 ** 2501 ** disable the "unexpected disconnect" feature, 2502 ** and remove the ACK signal. 2503 */ 2504 SCR_REG_REG (scntl2, SCR_AND, 0x7f), 2505 0, 2506 SCR_CLR (SCR_ACK|SCR_ATN), 2507 0, 2508 /* 2509 ** Wait for the disconnect. 2510 */ 2511 SCR_WAIT_DISC, 2512 0, 2513 /* 2514 ** Status is: DISCONNECTED. 2515 */ 2516 SCR_LOAD_REG (HS_REG, HS_DISCONNECT), 2517 0, 2518 SCR_JUMP, 2519 PADDR (cleanup_ok), 2520 2521}/*-------------------------< MSG_OUT >-------------------*/,{ 2522 /* 2523 ** The target requests a message. 2524 */ 2525 SCR_MOVE_ABS (1) ^ SCR_MSG_OUT, 2526 NADDR (msgout), 2527 SCR_COPY (1), 2528 NADDR (msgout), 2529 NADDR (lastmsg), 2530 /* 2531 ** If it was no ABORT message ... 2532 */ 2533 SCR_JUMP ^ IFTRUE (DATA (ABORT_TASK_SET)), 2534 PADDRH (msg_out_abort), 2535 /* 2536 ** ... wait for the next phase 2537 ** if it's a message out, send it again, ... 2538 */ 2539 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_OUT)), 2540 PADDR (msg_out), 2541}/*-------------------------< MSG_OUT_DONE >--------------*/,{ 2542 /* 2543 ** ... else clear the message ... 2544 */ 2545 SCR_LOAD_REG (scratcha, NOP), 2546 0, 2547 SCR_COPY (4), 2548 RADDR (scratcha), 2549 NADDR (msgout), 2550 /* 2551 ** ... and process the next phase 2552 */ 2553 SCR_JUMP, 2554 PADDR (dispatch), 2555}/*-------------------------< IDLE >------------------------*/,{ 2556 /* 2557 ** Nothing to do? 2558 ** Wait for reselect. 2559 ** This NOP will be patched with LED OFF 2560 ** SCR_REG_REG (gpreg, SCR_OR, 0x01) 2561 */ 2562 SCR_NO_OP, 2563 0, 2564}/*-------------------------< RESELECT >--------------------*/,{ 2565 /* 2566 ** make the DSA invalid. 2567 */ 2568 SCR_LOAD_REG (dsa, 0xff), 2569 0, 2570 SCR_CLR (SCR_TRG), 2571 0, 2572 SCR_LOAD_REG (HS_REG, HS_IN_RESELECT), 2573 0, 2574 /* 2575 ** Sleep waiting for a reselection. 2576 ** If SIGP is set, special treatment. 2577 ** 2578 ** Zu allem bereit .. 2579 */ 2580 SCR_WAIT_RESEL, 2581 PADDR(start), 2582}/*-------------------------< RESELECTED >------------------*/,{ 2583 /* 2584 ** This NOP will be patched with LED ON 2585 ** SCR_REG_REG (gpreg, SCR_AND, 0xfe) 2586 */ 2587 SCR_NO_OP, 2588 0, 2589 /* 2590 ** ... zu nichts zu gebrauchen ? 2591 ** 2592 ** load the target id into the SFBR 2593 ** and jump to the control block. 2594 ** 2595 ** Look at the declarations of 2596 ** - struct ncb 2597 ** - struct tcb 2598 ** - struct lcb 2599 ** - struct ccb 2600 ** to understand what's going on. 2601 */ 2602 SCR_REG_SFBR (ssid, SCR_AND, 0x8F), 2603 0, 2604 SCR_TO_REG (sdid), 2605 0, 2606 SCR_JUMP, 2607 NADDR (jump_tcb), 2608 2609}/*-------------------------< RESEL_DSA >-------------------*/,{ 2610 /* 2611 ** Ack the IDENTIFY or TAG previously received. 2612 */ 2613 SCR_CLR (SCR_ACK), 2614 0, 2615 /* 2616 ** The ncr doesn't have an indirect load 2617 ** or store command. So we have to 2618 ** copy part of the control block to a 2619 ** fixed place, where we can access it. 2620 ** 2621 ** We patch the address part of a 2622 ** COPY command with the DSA-register. 2623 */ 2624 SCR_COPY_F (4), 2625 RADDR (dsa), 2626 PADDR (loadpos1), 2627 /* 2628 ** Flush script prefetch if required 2629 */ 2630 PREFETCH_FLUSH 2631 /* 2632 ** then we do the actual copy. 2633 */ 2634 SCR_COPY (sizeof (struct head)), 2635 /* 2636 ** continued after the next label ... 2637 */ 2638 2639}/*-------------------------< LOADPOS1 >-------------------*/,{ 2640 0, 2641 NADDR (header), 2642 /* 2643 ** The DSA contains the data structure address. 2644 */ 2645 SCR_JUMP, 2646 PADDR (prepare), 2647 2648}/*-------------------------< RESEL_LUN >-------------------*/,{ 2649 /* 2650 ** come back to this point 2651 ** to get an IDENTIFY message 2652 ** Wait for a msg_in phase. 2653 */ 2654 SCR_INT ^ IFFALSE (WHEN (SCR_MSG_IN)), 2655 SIR_RESEL_NO_MSG_IN, 2656 /* 2657 ** message phase. 2658 ** Read the data directly from the BUS DATA lines. 2659 ** This helps to support very old SCSI devices that 2660 ** may reselect without sending an IDENTIFY. 2661 */ 2662 SCR_FROM_REG (sbdl), 2663 0, 2664 /* 2665 ** It should be an Identify message. 2666 */ 2667 SCR_RETURN, 2668 0, 2669}/*-------------------------< RESEL_TAG >-------------------*/,{ 2670 /* 2671 ** Read IDENTIFY + SIMPLE + TAG using a single MOVE. 2672 ** Agressive optimization, is'nt it? 2673 ** No need to test the SIMPLE TAG message, since the 2674 ** driver only supports conformant devices for tags. ;-) 2675 */ 2676 SCR_MOVE_ABS (3) ^ SCR_MSG_IN, 2677 NADDR (msgin), 2678 /* 2679 ** Read the TAG from the SIDL. 2680 ** Still an aggressive optimization. ;-) 2681 ** Compute the CCB indirect jump address which 2682 ** is (#TAG*2 & 0xfc) due to tag numbering using 2683 ** 1,3,5..MAXTAGS*2+1 actual values. 2684 */ 2685 SCR_REG_SFBR (sidl, SCR_SHL, 0), 2686 0, 2687 SCR_SFBR_REG (temp, SCR_AND, 0xfc), 2688 0, 2689}/*-------------------------< JUMP_TO_NEXUS >-------------------*/,{ 2690 SCR_COPY_F (4), 2691 RADDR (temp), 2692 PADDR (nexus_indirect), 2693 /* 2694 ** Flush script prefetch if required 2695 */ 2696 PREFETCH_FLUSH 2697 SCR_COPY (4), 2698}/*-------------------------< NEXUS_INDIRECT >-------------------*/,{ 2699 0, 2700 RADDR (temp), 2701 SCR_RETURN, 2702 0, 2703}/*-------------------------< RESEL_NOTAG >-------------------*/,{ 2704 /* 2705 ** No tag expected. 2706 ** Read an throw away the IDENTIFY. 2707 */ 2708 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 2709 NADDR (msgin), 2710 SCR_JUMP, 2711 PADDR (jump_to_nexus), 2712}/*-------------------------< DATA_IN >--------------------*/,{ 2713/* 2714** Because the size depends on the 2715** #define MAX_SCATTERL parameter, 2716** it is filled in at runtime. 2717** 2718** ##===========< i=0; i<MAX_SCATTERL >========= 2719** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN)), 2720** || PADDR (dispatch), 2721** || SCR_MOVE_TBL ^ SCR_DATA_IN, 2722** || offsetof (struct dsb, data[ i]), 2723** ##========================================== 2724** 2725**--------------------------------------------------------- 2726*/ 27270 2728}/*-------------------------< DATA_IN2 >-------------------*/,{ 2729 SCR_CALL, 2730 PADDR (dispatch), 2731 SCR_JUMP, 2732 PADDR (no_data), 2733}/*-------------------------< DATA_OUT >--------------------*/,{ 2734/* 2735** Because the size depends on the 2736** #define MAX_SCATTERL parameter, 2737** it is filled in at runtime. 2738** 2739** ##===========< i=0; i<MAX_SCATTERL >========= 2740** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT)), 2741** || PADDR (dispatch), 2742** || SCR_MOVE_TBL ^ SCR_DATA_OUT, 2743** || offsetof (struct dsb, data[ i]), 2744** ##========================================== 2745** 2746**--------------------------------------------------------- 2747*/ 27480 2749}/*-------------------------< DATA_OUT2 >-------------------*/,{ 2750 SCR_CALL, 2751 PADDR (dispatch), 2752 SCR_JUMP, 2753 PADDR (no_data), 2754}/*--------------------------------------------------------*/ 2755}; 2756 2757static struct scripth scripth0 __initdata = { 2758/*-------------------------< TRYLOOP >---------------------*/{ 2759/* 2760** Start the next entry. 2761** Called addresses point to the launch script in the CCB. 2762** They are patched by the main processor. 2763** 2764** Because the size depends on the 2765** #define MAX_START parameter, it is filled 2766** in at runtime. 2767** 2768**----------------------------------------------------------- 2769** 2770** ##===========< I=0; i<MAX_START >=========== 2771** || SCR_CALL, 2772** || PADDR (idle), 2773** ##========================================== 2774** 2775**----------------------------------------------------------- 2776*/ 27770 2778}/*------------------------< TRYLOOP2 >---------------------*/,{ 2779 SCR_JUMP, 2780 PADDRH(tryloop), 2781 2782#ifdef SCSI_NCR_CCB_DONE_SUPPORT 2783 2784}/*------------------------< DONE_QUEUE >-------------------*/,{ 2785/* 2786** Copy the CCB address to the next done entry. 2787** Because the size depends on the 2788** #define MAX_DONE parameter, it is filled 2789** in at runtime. 2790** 2791**----------------------------------------------------------- 2792** 2793** ##===========< I=0; i<MAX_DONE >=========== 2794** || SCR_COPY (sizeof(struct ccb *), 2795** || NADDR (header.cp), 2796** || NADDR (ccb_done[i]), 2797** || SCR_CALL, 2798** || PADDR (done_end), 2799** ##========================================== 2800** 2801**----------------------------------------------------------- 2802*/ 28030 2804}/*------------------------< DONE_QUEUE2 >------------------*/,{ 2805 SCR_JUMP, 2806 PADDRH (done_queue), 2807 2808#endif /* SCSI_NCR_CCB_DONE_SUPPORT */ 2809}/*------------------------< SELECT_NO_ATN >-----------------*/,{ 2810 /* 2811 ** Set Initiator mode. 2812 ** And try to select this target without ATN. 2813 */ 2814 2815 SCR_CLR (SCR_TRG), 2816 0, 2817 SCR_LOAD_REG (HS_REG, HS_SELECTING), 2818 0, 2819 SCR_SEL_TBL ^ offsetof (struct dsb, select), 2820 PADDR (reselect), 2821 SCR_JUMP, 2822 PADDR (select2), 2823 2824}/*-------------------------< CANCEL >------------------------*/,{ 2825 2826 SCR_LOAD_REG (scratcha, HS_ABORTED), 2827 0, 2828 SCR_JUMPR, 2829 8, 2830}/*-------------------------< SKIP >------------------------*/,{ 2831 SCR_LOAD_REG (scratcha, 0), 2832 0, 2833 /* 2834 ** This entry has been canceled. 2835 ** Next time use the next slot. 2836 */ 2837 SCR_COPY (4), 2838 RADDR (temp), 2839 PADDR (startpos), 2840 /* 2841 ** The ncr doesn't have an indirect load 2842 ** or store command. So we have to 2843 ** copy part of the control block to a 2844 ** fixed place, where we can access it. 2845 ** 2846 ** We patch the address part of a 2847 ** COPY command with the DSA-register. 2848 */ 2849 SCR_COPY_F (4), 2850 RADDR (dsa), 2851 PADDRH (skip2), 2852 /* 2853 ** Flush script prefetch if required 2854 */ 2855 PREFETCH_FLUSH 2856 /* 2857 ** then we do the actual copy. 2858 */ 2859 SCR_COPY (sizeof (struct head)), 2860 /* 2861 ** continued after the next label ... 2862 */ 2863}/*-------------------------< SKIP2 >---------------------*/,{ 2864 0, 2865 NADDR (header), 2866 /* 2867 ** Initialize the status registers 2868 */ 2869 SCR_COPY (4), 2870 NADDR (header.status), 2871 RADDR (scr0), 2872 /* 2873 ** Force host status. 2874 */ 2875 SCR_FROM_REG (scratcha), 2876 0, 2877 SCR_JUMPR ^ IFFALSE (MASK (0, HS_DONEMASK)), 2878 16, 2879 SCR_REG_REG (HS_REG, SCR_OR, HS_SKIPMASK), 2880 0, 2881 SCR_JUMPR, 2882 8, 2883 SCR_TO_REG (HS_REG), 2884 0, 2885 SCR_LOAD_REG (SS_REG, S_GOOD), 2886 0, 2887 SCR_JUMP, 2888 PADDR (cleanup_ok), 2889 2890},/*-------------------------< PAR_ERR_DATA_IN >---------------*/{ 2891 /* 2892 ** Ignore all data in byte, until next phase 2893 */ 2894 SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_IN)), 2895 PADDRH (par_err_other), 2896 SCR_MOVE_ABS (1) ^ SCR_DATA_IN, 2897 NADDR (scratch), 2898 SCR_JUMPR, 2899 -24, 2900},/*-------------------------< PAR_ERR_OTHER >------------------*/{ 2901 /* 2902 ** count it. 2903 */ 2904 SCR_REG_REG (PS_REG, SCR_ADD, 0x01), 2905 0, 2906 /* 2907 ** jump to dispatcher. 2908 */ 2909 SCR_JUMP, 2910 PADDR (dispatch), 2911}/*-------------------------< MSG_REJECT >---------------*/,{ 2912 /* 2913 ** If a negotiation was in progress, 2914 ** negotiation failed. 2915 ** Otherwise, let the C code print 2916 ** some message. 2917 */ 2918 SCR_FROM_REG (HS_REG), 2919 0, 2920 SCR_INT ^ IFFALSE (DATA (HS_NEGOTIATE)), 2921 SIR_REJECT_RECEIVED, 2922 SCR_INT ^ IFTRUE (DATA (HS_NEGOTIATE)), 2923 SIR_NEGO_FAILED, 2924 SCR_JUMP, 2925 PADDR (clrack), 2926 2927}/*-------------------------< MSG_IGN_RESIDUE >----------*/,{ 2928 /* 2929 ** Terminate cycle 2930 */ 2931 SCR_CLR (SCR_ACK), 2932 0, 2933 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)), 2934 PADDR (dispatch), 2935 /* 2936 ** get residue size. 2937 */ 2938 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 2939 NADDR (msgin[1]), 2940 /* 2941 ** Size is 0 .. ignore message. 2942 */ 2943 SCR_JUMP ^ IFTRUE (DATA (0)), 2944 PADDR (clrack), 2945 /* 2946 ** Size is not 1 .. have to interrupt. 2947 */ 2948 SCR_JUMPR ^ IFFALSE (DATA (1)), 2949 40, 2950 /* 2951 ** Check for residue byte in swide register 2952 */ 2953 SCR_FROM_REG (scntl2), 2954 0, 2955 SCR_JUMPR ^ IFFALSE (MASK (WSR, WSR)), 2956 16, 2957 /* 2958 ** There IS data in the swide register. 2959 ** Discard it. 2960 */ 2961 SCR_REG_REG (scntl2, SCR_OR, WSR), 2962 0, 2963 SCR_JUMP, 2964 PADDR (clrack), 2965 /* 2966 ** Load again the size to the sfbr register. 2967 */ 2968 SCR_FROM_REG (scratcha), 2969 0, 2970 SCR_INT, 2971 SIR_IGN_RESIDUE, 2972 SCR_JUMP, 2973 PADDR (clrack), 2974 2975}/*-------------------------< MSG_EXTENDED >-------------*/,{ 2976 /* 2977 ** Terminate cycle 2978 */ 2979 SCR_CLR (SCR_ACK), 2980 0, 2981 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)), 2982 PADDR (dispatch), 2983 /* 2984 ** get length. 2985 */ 2986 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 2987 NADDR (msgin[1]), 2988 /* 2989 */ 2990 SCR_JUMP ^ IFTRUE (DATA (3)), 2991 PADDRH (msg_ext_3), 2992 SCR_JUMP ^ IFFALSE (DATA (2)), 2993 PADDR (msg_bad), 2994}/*-------------------------< MSG_EXT_2 >----------------*/,{ 2995 SCR_CLR (SCR_ACK), 2996 0, 2997 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)), 2998 PADDR (dispatch), 2999 /* 3000 ** get extended message code. 3001 */ 3002 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 3003 NADDR (msgin[2]), 3004 SCR_JUMP ^ IFTRUE (DATA (EXTENDED_WDTR)), 3005 PADDRH (msg_wdtr), 3006 /* 3007 ** unknown extended message 3008 */ 3009 SCR_JUMP, 3010 PADDR (msg_bad) 3011}/*-------------------------< MSG_WDTR >-----------------*/,{ 3012 SCR_CLR (SCR_ACK), 3013 0, 3014 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)), 3015 PADDR (dispatch), 3016 /* 3017 ** get data bus width 3018 */ 3019 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 3020 NADDR (msgin[3]), 3021 /* 3022 ** let the host do the real work. 3023 */ 3024 SCR_INT, 3025 SIR_NEGO_WIDE, 3026 /* 3027 ** let the target fetch our answer. 3028 */ 3029 SCR_SET (SCR_ATN), 3030 0, 3031 SCR_CLR (SCR_ACK), 3032 0, 3033 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_OUT)), 3034 PADDRH (nego_bad_phase), 3035 3036}/*-------------------------< SEND_WDTR >----------------*/,{ 3037 /* 3038 ** Send the EXTENDED_WDTR 3039 */ 3040 SCR_MOVE_ABS (4) ^ SCR_MSG_OUT, 3041 NADDR (msgout), 3042 SCR_COPY (1), 3043 NADDR (msgout), 3044 NADDR (lastmsg), 3045 SCR_JUMP, 3046 PADDR (msg_out_done), 3047 3048}/*-------------------------< MSG_EXT_3 >----------------*/,{ 3049 SCR_CLR (SCR_ACK), 3050 0, 3051 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)), 3052 PADDR (dispatch), 3053 /* 3054 ** get extended message code. 3055 */ 3056 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 3057 NADDR (msgin[2]), 3058 SCR_JUMP ^ IFTRUE (DATA (EXTENDED_SDTR)), 3059 PADDRH (msg_sdtr), 3060 /* 3061 ** unknown extended message 3062 */ 3063 SCR_JUMP, 3064 PADDR (msg_bad) 3065 3066}/*-------------------------< MSG_SDTR >-----------------*/,{ 3067 SCR_CLR (SCR_ACK), 3068 0, 3069 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)), 3070 PADDR (dispatch), 3071 /* 3072 ** get period and offset 3073 */ 3074 SCR_MOVE_ABS (2) ^ SCR_MSG_IN, 3075 NADDR (msgin[3]), 3076 /* 3077 ** let the host do the real work. 3078 */ 3079 SCR_INT, 3080 SIR_NEGO_SYNC, 3081 /* 3082 ** let the target fetch our answer. 3083 */ 3084 SCR_SET (SCR_ATN), 3085 0, 3086 SCR_CLR (SCR_ACK), 3087 0, 3088 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_OUT)), 3089 PADDRH (nego_bad_phase), 3090 3091}/*-------------------------< SEND_SDTR >-------------*/,{ 3092 /* 3093 ** Send the EXTENDED_SDTR 3094 */ 3095 SCR_MOVE_ABS (5) ^ SCR_MSG_OUT, 3096 NADDR (msgout), 3097 SCR_COPY (1), 3098 NADDR (msgout), 3099 NADDR (lastmsg), 3100 SCR_JUMP, 3101 PADDR (msg_out_done), 3102 3103}/*-------------------------< NEGO_BAD_PHASE >------------*/,{ 3104 SCR_INT, 3105 SIR_NEGO_PROTO, 3106 SCR_JUMP, 3107 PADDR (dispatch), 3108 3109}/*-------------------------< MSG_OUT_ABORT >-------------*/,{ 3110 /* 3111 ** After ABORT message, 3112 ** 3113 ** expect an immediate disconnect, ... 3114 */ 3115 SCR_REG_REG (scntl2, SCR_AND, 0x7f), 3116 0, 3117 SCR_CLR (SCR_ACK|SCR_ATN), 3118 0, 3119 SCR_WAIT_DISC, 3120 0, 3121 /* 3122 ** ... and set the status to "ABORTED" 3123 */ 3124 SCR_LOAD_REG (HS_REG, HS_ABORTED), 3125 0, 3126 SCR_JUMP, 3127 PADDR (cleanup), 3128 3129}/*-------------------------< HDATA_IN >-------------------*/,{ 3130/* 3131** Because the size depends on the 3132** #define MAX_SCATTERH parameter, 3133** it is filled in at runtime. 3134** 3135** ##==< i=MAX_SCATTERL; i<MAX_SCATTERL+MAX_SCATTERH >== 3136** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN)), 3137** || PADDR (dispatch), 3138** || SCR_MOVE_TBL ^ SCR_DATA_IN, 3139** || offsetof (struct dsb, data[ i]), 3140** ##=================================================== 3141** 3142**--------------------------------------------------------- 3143*/ 31440 3145}/*-------------------------< HDATA_IN2 >------------------*/,{ 3146 SCR_JUMP, 3147 PADDR (data_in), 3148 3149}/*-------------------------< HDATA_OUT >-------------------*/,{ 3150/* 3151** Because the size depends on the 3152** #define MAX_SCATTERH parameter, 3153** it is filled in at runtime. 3154** 3155** ##==< i=MAX_SCATTERL; i<MAX_SCATTERL+MAX_SCATTERH >== 3156** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT)), 3157** || PADDR (dispatch), 3158** || SCR_MOVE_TBL ^ SCR_DATA_OUT, 3159** || offsetof (struct dsb, data[ i]), 3160** ##=================================================== 3161** 3162**--------------------------------------------------------- 3163*/ 31640 3165}/*-------------------------< HDATA_OUT2 >------------------*/,{ 3166 SCR_JUMP, 3167 PADDR (data_out), 3168 3169}/*-------------------------< RESET >----------------------*/,{ 3170 /* 3171 ** Send a TARGET_RESET message if bad IDENTIFY 3172 ** received on reselection. 3173 */ 3174 SCR_LOAD_REG (scratcha, ABORT_TASK), 3175 0, 3176 SCR_JUMP, 3177 PADDRH (abort_resel), 3178}/*-------------------------< ABORTTAG >-------------------*/,{ 3179 /* 3180 ** Abort a wrong tag received on reselection. 3181 */ 3182 SCR_LOAD_REG (scratcha, ABORT_TASK), 3183 0, 3184 SCR_JUMP, 3185 PADDRH (abort_resel), 3186}/*-------------------------< ABORT >----------------------*/,{ 3187 /* 3188 ** Abort a reselection when no active CCB. 3189 */ 3190 SCR_LOAD_REG (scratcha, ABORT_TASK_SET), 3191 0, 3192}/*-------------------------< ABORT_RESEL >----------------*/,{ 3193 SCR_COPY (1), 3194 RADDR (scratcha), 3195 NADDR (msgout), 3196 SCR_SET (SCR_ATN), 3197 0, 3198 SCR_CLR (SCR_ACK), 3199 0, 3200 /* 3201 ** and send it. 3202 ** we expect an immediate disconnect 3203 */ 3204 SCR_REG_REG (scntl2, SCR_AND, 0x7f), 3205 0, 3206 SCR_MOVE_ABS (1) ^ SCR_MSG_OUT, 3207 NADDR (msgout), 3208 SCR_COPY (1), 3209 NADDR (msgout), 3210 NADDR (lastmsg), 3211 SCR_CLR (SCR_ACK|SCR_ATN), 3212 0, 3213 SCR_WAIT_DISC, 3214 0, 3215 SCR_JUMP, 3216 PADDR (start), 3217}/*-------------------------< RESEND_IDENT >-------------------*/,{ 3218 /* 3219 ** The target stays in MSG OUT phase after having acked 3220 ** Identify [+ Tag [+ Extended message ]]. Targets shall 3221 ** behave this way on parity error. 3222 ** We must send it again all the messages. 3223 */ 3224 SCR_SET (SCR_ATN), /* Shall be asserted 2 deskew delays before the */ 3225 0, /* 1rst ACK = 90 ns. Hope the NCR is'nt too fast */ 3226 SCR_JUMP, 3227 PADDR (send_ident), 3228}/*-------------------------< CLRATN_GO_ON >-------------------*/,{ 3229 SCR_CLR (SCR_ATN), 3230 0, 3231 SCR_JUMP, 3232}/*-------------------------< NXTDSP_GO_ON >-------------------*/,{ 3233 0, 3234}/*-------------------------< SDATA_IN >-------------------*/,{ 3235 SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN)), 3236 PADDR (dispatch), 3237 SCR_MOVE_TBL ^ SCR_DATA_IN, 3238 offsetof (struct dsb, sense), 3239 SCR_CALL, 3240 PADDR (dispatch), 3241 SCR_JUMP, 3242 PADDR (no_data), 3243}/*-------------------------< DATA_IO >--------------------*/,{ 3244 /* 3245 ** We jump here if the data direction was unknown at the 3246 ** time we had to queue the command to the scripts processor. 3247 ** Pointers had been set as follow in this situation: 3248 ** savep --> DATA_IO 3249 ** lastp --> start pointer when DATA_IN 3250 ** goalp --> goal pointer when DATA_IN 3251 ** wlastp --> start pointer when DATA_OUT 3252 ** wgoalp --> goal pointer when DATA_OUT 3253 ** This script sets savep/lastp/goalp according to the 3254 ** direction chosen by the target. 3255 */ 3256 SCR_JUMPR ^ IFTRUE (WHEN (SCR_DATA_OUT)), 3257 32, 3258 /* 3259 ** Direction is DATA IN. 3260 ** Warning: we jump here, even when phase is DATA OUT. 3261 */ 3262 SCR_COPY (4), 3263 NADDR (header.lastp), 3264 NADDR (header.savep), 3265 3266 /* 3267 ** Jump to the SCRIPTS according to actual direction. 3268 */ 3269 SCR_COPY (4), 3270 NADDR (header.savep), 3271 RADDR (temp), 3272 SCR_RETURN, 3273 0, 3274 /* 3275 ** Direction is DATA OUT. 3276 */ 3277 SCR_COPY (4), 3278 NADDR (header.wlastp), 3279 NADDR (header.lastp), 3280 SCR_COPY (4), 3281 NADDR (header.wgoalp), 3282 NADDR (header.goalp), 3283 SCR_JUMPR, 3284 -64, 3285}/*-------------------------< BAD_IDENTIFY >---------------*/,{ 3286 /* 3287 ** If message phase but not an IDENTIFY, 3288 ** get some help from the C code. 3289 ** Old SCSI device may behave so. 3290 */ 3291 SCR_JUMPR ^ IFTRUE (MASK (0x80, 0x80)), 3292 16, 3293 SCR_INT, 3294 SIR_RESEL_NO_IDENTIFY, 3295 SCR_JUMP, 3296 PADDRH (reset), 3297 /* 3298 ** Message is an IDENTIFY, but lun is unknown. 3299 ** Read the message, since we got it directly 3300 ** from the SCSI BUS data lines. 3301 ** Signal problem to C code for logging the event. 3302 ** Send an ABORT_TASK_SET to clear all pending tasks. 3303 */ 3304 SCR_INT, 3305 SIR_RESEL_BAD_LUN, 3306 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 3307 NADDR (msgin), 3308 SCR_JUMP, 3309 PADDRH (abort), 3310}/*-------------------------< BAD_I_T_L >------------------*/,{ 3311 /* 3312 ** We donnot have a task for that I_T_L. 3313 ** Signal problem to C code for logging the event. 3314 ** Send an ABORT_TASK_SET message. 3315 */ 3316 SCR_INT, 3317 SIR_RESEL_BAD_I_T_L, 3318 SCR_JUMP, 3319 PADDRH (abort), 3320}/*-------------------------< BAD_I_T_L_Q >----------------*/,{ 3321 /* 3322 ** We donnot have a task that matches the tag. 3323 ** Signal problem to C code for logging the event. 3324 ** Send an ABORT_TASK message. 3325 */ 3326 SCR_INT, 3327 SIR_RESEL_BAD_I_T_L_Q, 3328 SCR_JUMP, 3329 PADDRH (aborttag), 3330}/*-------------------------< BAD_TARGET >-----------------*/,{ 3331 /* 3332 ** We donnot know the target that reselected us. 3333 ** Grab the first message if any (IDENTIFY). 3334 ** Signal problem to C code for logging the event. 3335 ** TARGET_RESET message. 3336 */ 3337 SCR_INT, 3338 SIR_RESEL_BAD_TARGET, 3339 SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_IN)), 3340 8, 3341 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 3342 NADDR (msgin), 3343 SCR_JUMP, 3344 PADDRH (reset), 3345}/*-------------------------< BAD_STATUS >-----------------*/,{ 3346 /* 3347 ** If command resulted in either QUEUE FULL, 3348 ** CHECK CONDITION or COMMAND TERMINATED, 3349 ** call the C code. 3350 */ 3351 SCR_INT ^ IFTRUE (DATA (S_QUEUE_FULL)), 3352 SIR_BAD_STATUS, 3353 SCR_INT ^ IFTRUE (DATA (S_CHECK_COND)), 3354 SIR_BAD_STATUS, 3355 SCR_INT ^ IFTRUE (DATA (S_TERMINATED)), 3356 SIR_BAD_STATUS, 3357 SCR_RETURN, 3358 0, 3359}/*-------------------------< START_RAM >-------------------*/,{ 3360 /* 3361 ** Load the script into on-chip RAM, 3362 ** and jump to start point. 3363 */ 3364 SCR_COPY_F (4), 3365 RADDR (scratcha), 3366 PADDRH (start_ram0), 3367 /* 3368 ** Flush script prefetch if required 3369 */ 3370 PREFETCH_FLUSH 3371 SCR_COPY (sizeof (struct script)), 3372}/*-------------------------< START_RAM0 >--------------------*/,{ 3373 0, 3374 PADDR (start), 3375 SCR_JUMP, 3376 PADDR (start), 3377}/*-------------------------< STO_RESTART >-------------------*/,{ 3378 /* 3379 ** 3380 ** Repair start queue (e.g. next time use the next slot) 3381 ** and jump to start point. 3382 */ 3383 SCR_COPY (4), 3384 RADDR (temp), 3385 PADDR (startpos), 3386 SCR_JUMP, 3387 PADDR (start), 3388}/*-------------------------< WAIT_DMA >-------------------*/,{ 3389 /* 3390 ** For HP Zalon/53c720 systems, the Zalon interface 3391 ** between CPU and 53c720 does prefetches, which causes 3392 ** problems with self modifying scripts. The problem 3393 ** is overcome by calling a dummy subroutine after each 3394 ** modification, to force a refetch of the script on 3395 ** return from the subroutine. 3396 */ 3397 SCR_RETURN, 3398 0, 3399}/*-------------------------< SNOOPTEST >-------------------*/,{ 3400 /* 3401 ** Read the variable. 3402 */ 3403 SCR_COPY (4), 3404 NADDR(ncr_cache), 3405 RADDR (scratcha), 3406 /* 3407 ** Write the variable. 3408 */ 3409 SCR_COPY (4), 3410 RADDR (temp), 3411 NADDR(ncr_cache), 3412 /* 3413 ** Read back the variable. 3414 */ 3415 SCR_COPY (4), 3416 NADDR(ncr_cache), 3417 RADDR (temp), 3418}/*-------------------------< SNOOPEND >-------------------*/,{ 3419 /* 3420 ** And stop. 3421 */ 3422 SCR_INT, 3423 99, 3424}/*--------------------------------------------------------*/ 3425}; 3426 3427/*========================================================== 3428** 3429** 3430** Fill in #define dependent parts of the script 3431** 3432** 3433**========================================================== 3434*/ 3435 3436void __init ncr_script_fill (struct script * scr, struct scripth * scrh) 3437{ 3438 int i; 3439 ncrcmd *p; 3440 3441 p = scrh->tryloop; 3442 for (i=0; i<MAX_START; i++) { 3443 *p++ =SCR_CALL; 3444 *p++ =PADDR (idle); 3445 } 3446 3447 BUG_ON((u_long)p != (u_long)&scrh->tryloop + sizeof (scrh->tryloop)); 3448 3449#ifdef SCSI_NCR_CCB_DONE_SUPPORT 3450 3451 p = scrh->done_queue; 3452 for (i = 0; i<MAX_DONE; i++) { 3453 *p++ =SCR_COPY (sizeof(struct ccb *)); 3454 *p++ =NADDR (header.cp); 3455 *p++ =NADDR (ccb_done[i]); 3456 *p++ =SCR_CALL; 3457 *p++ =PADDR (done_end); 3458 } 3459 3460 BUG_ON((u_long)p != (u_long)&scrh->done_queue+sizeof(scrh->done_queue)); 3461 3462#endif /* SCSI_NCR_CCB_DONE_SUPPORT */ 3463 3464 p = scrh->hdata_in; 3465 for (i=0; i<MAX_SCATTERH; i++) { 3466 *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN)); 3467 *p++ =PADDR (dispatch); 3468 *p++ =SCR_MOVE_TBL ^ SCR_DATA_IN; 3469 *p++ =offsetof (struct dsb, data[i]); 3470 } 3471 3472 BUG_ON((u_long)p != (u_long)&scrh->hdata_in + sizeof (scrh->hdata_in)); 3473 3474 p = scr->data_in; 3475 for (i=MAX_SCATTERH; i<MAX_SCATTERH+MAX_SCATTERL; i++) { 3476 *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN)); 3477 *p++ =PADDR (dispatch); 3478 *p++ =SCR_MOVE_TBL ^ SCR_DATA_IN; 3479 *p++ =offsetof (struct dsb, data[i]); 3480 } 3481 3482 BUG_ON((u_long)p != (u_long)&scr->data_in + sizeof (scr->data_in)); 3483 3484 p = scrh->hdata_out; 3485 for (i=0; i<MAX_SCATTERH; i++) { 3486 *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT)); 3487 *p++ =PADDR (dispatch); 3488 *p++ =SCR_MOVE_TBL ^ SCR_DATA_OUT; 3489 *p++ =offsetof (struct dsb, data[i]); 3490 } 3491 3492 BUG_ON((u_long)p != (u_long)&scrh->hdata_out + sizeof (scrh->hdata_out)); 3493 3494 p = scr->data_out; 3495 for (i=MAX_SCATTERH; i<MAX_SCATTERH+MAX_SCATTERL; i++) { 3496 *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT)); 3497 *p++ =PADDR (dispatch); 3498 *p++ =SCR_MOVE_TBL ^ SCR_DATA_OUT; 3499 *p++ =offsetof (struct dsb, data[i]); 3500 } 3501 3502 BUG_ON((u_long) p != (u_long)&scr->data_out + sizeof (scr->data_out)); 3503} 3504 3505/*========================================================== 3506** 3507** 3508** Copy and rebind a script. 3509** 3510** 3511**========================================================== 3512*/ 3513 3514static void __init 3515ncr_script_copy_and_bind (struct ncb *np, ncrcmd *src, ncrcmd *dst, int len) 3516{ 3517 ncrcmd opcode, new, old, tmp1, tmp2; 3518 ncrcmd *start, *end; 3519 int relocs; 3520 int opchanged = 0; 3521 3522 start = src; 3523 end = src + len/4; 3524 3525 while (src < end) { 3526 3527 opcode = *src++; 3528 *dst++ = cpu_to_scr(opcode); 3529 3530 /* 3531 ** If we forget to change the length 3532 ** in struct script, a field will be 3533 ** padded with 0. This is an illegal 3534 ** command. 3535 */ 3536 3537 if (opcode == 0) { 3538 printk (KERN_ERR "%s: ERROR0 IN SCRIPT at %d.\n", 3539 ncr_name(np), (int) (src-start-1)); 3540 mdelay(1000); 3541 } 3542 3543 if (DEBUG_FLAGS & DEBUG_SCRIPT) 3544 printk (KERN_DEBUG "%p: <%x>\n", 3545 (src-1), (unsigned)opcode); 3546 3547 /* 3548 ** We don't have to decode ALL commands 3549 */ 3550 switch (opcode >> 28) { 3551 3552 case 0xc: 3553 /* 3554 ** COPY has TWO arguments. 3555 */ 3556 relocs = 2; 3557 tmp1 = src[0]; 3558#ifdef RELOC_KVAR 3559 if ((tmp1 & RELOC_MASK) == RELOC_KVAR) 3560 tmp1 = 0; 3561#endif 3562 tmp2 = src[1]; 3563#ifdef RELOC_KVAR 3564 if ((tmp2 & RELOC_MASK) == RELOC_KVAR) 3565 tmp2 = 0; 3566#endif 3567 if ((tmp1 ^ tmp2) & 3) { 3568 printk (KERN_ERR"%s: ERROR1 IN SCRIPT at %d.\n", 3569 ncr_name(np), (int) (src-start-1)); 3570 mdelay(1000); 3571 } 3572 /* 3573 ** If PREFETCH feature not enabled, remove 3574 ** the NO FLUSH bit if present. 3575 */ 3576 if ((opcode & SCR_NO_FLUSH) && !(np->features & FE_PFEN)) { 3577 dst[-1] = cpu_to_scr(opcode & ~SCR_NO_FLUSH); 3578 ++opchanged; 3579 } 3580 break; 3581 3582 case 0x0: 3583 /* 3584 ** MOVE (absolute address) 3585 */ 3586 relocs = 1; 3587 break; 3588 3589 case 0x8: 3590 /* 3591 ** JUMP / CALL 3592 ** don't relocate if relative :-) 3593 */ 3594 if (opcode & 0x00800000) 3595 relocs = 0; 3596 else 3597 relocs = 1; 3598 break; 3599 3600 case 0x4: 3601 case 0x5: 3602 case 0x6: 3603 case 0x7: 3604 relocs = 1; 3605 break; 3606 3607 default: 3608 relocs = 0; 3609 break; 3610 } 3611 3612 if (relocs) { 3613 while (relocs--) { 3614 old = *src++; 3615 3616 switch (old & RELOC_MASK) { 3617 case RELOC_REGISTER: 3618 new = (old & ~RELOC_MASK) + np->paddr; 3619 break; 3620 case RELOC_LABEL: 3621 new = (old & ~RELOC_MASK) + np->p_script; 3622 break; 3623 case RELOC_LABELH: 3624 new = (old & ~RELOC_MASK) + np->p_scripth; 3625 break; 3626 case RELOC_SOFTC: 3627 new = (old & ~RELOC_MASK) + np->p_ncb; 3628 break; 3629#ifdef RELOC_KVAR 3630 case RELOC_KVAR: 3631 if (((old & ~RELOC_MASK) < 3632 SCRIPT_KVAR_FIRST) || 3633 ((old & ~RELOC_MASK) > 3634 SCRIPT_KVAR_LAST)) 3635 panic("ncr KVAR out of range"); 3636 new = vtophys(script_kvars[old & 3637 ~RELOC_MASK]); 3638 break; 3639#endif 3640 case 0: 3641 /* Don't relocate a 0 address. */ 3642 if (old == 0) { 3643 new = old; 3644 break; 3645 } 3646 /* fall through */ 3647 default: 3648 panic("ncr_script_copy_and_bind: weird relocation %x\n", old); 3649 break; 3650 } 3651 3652 *dst++ = cpu_to_scr(new); 3653 } 3654 } else 3655 *dst++ = cpu_to_scr(*src++); 3656 3657 } 3658} 3659 3660/* 3661** Linux host data structure 3662*/ 3663 3664struct host_data { 3665 struct ncb *ncb; 3666}; 3667 3668#define PRINT_ADDR(cmd, arg...) dev_info(&cmd->device->sdev_gendev , ## arg) 3669 3670static void ncr_print_msg(struct ccb *cp, char *label, u_char *msg) 3671{ 3672 PRINT_ADDR(cp->cmd, "%s: ", label); 3673 3674 spi_print_msg(msg); 3675 printk("\n"); 3676} 3677 3678/*========================================================== 3679** 3680** NCR chip clock divisor table. 3681** Divisors are multiplied by 10,000,000 in order to make 3682** calculations more simple. 3683** 3684**========================================================== 3685*/ 3686 3687#define _5M 5000000 3688static u_long div_10M[] = 3689 {2*_5M, 3*_5M, 4*_5M, 6*_5M, 8*_5M, 12*_5M, 16*_5M}; 3690 3691 3692/*=============================================================== 3693** 3694** Prepare io register values used by ncr_init() according 3695** to selected and supported features. 3696** 3697** NCR chips allow burst lengths of 2, 4, 8, 16, 32, 64, 128 3698** transfers. 32,64,128 are only supported by 875 and 895 chips. 3699** We use log base 2 (burst length) as internal code, with 3700** value 0 meaning "burst disabled". 3701** 3702**=============================================================== 3703*/ 3704 3705/* 3706 * Burst length from burst code. 3707 */ 3708#define burst_length(bc) (!(bc))? 0 : 1 << (bc) 3709 3710/* 3711 * Burst code from io register bits. Burst enable is ctest0 for c720 3712 */ 3713#define burst_code(dmode, ctest0) \ 3714 (ctest0) & 0x80 ? 0 : (((dmode) & 0xc0) >> 6) + 1 3715 3716/* 3717 * Set initial io register bits from burst code. 3718 */ 3719static inline void ncr_init_burst(struct ncb *np, u_char bc) 3720{ 3721 u_char *be = &np->rv_ctest0; 3722 *be &= ~0x80; 3723 np->rv_dmode &= ~(0x3 << 6); 3724 np->rv_ctest5 &= ~0x4; 3725 3726 if (!bc) { 3727 *be |= 0x80; 3728 } else { 3729 --bc; 3730 np->rv_dmode |= ((bc & 0x3) << 6); 3731 np->rv_ctest5 |= (bc & 0x4); 3732 } 3733} 3734 3735static void __init ncr_prepare_setting(struct ncb *np) 3736{ 3737 u_char burst_max; 3738 u_long period; 3739 int i; 3740 3741 /* 3742 ** Save assumed BIOS setting 3743 */ 3744 3745 np->sv_scntl0 = INB(nc_scntl0) & 0x0a; 3746 np->sv_scntl3 = INB(nc_scntl3) & 0x07; 3747 np->sv_dmode = INB(nc_dmode) & 0xce; 3748 np->sv_dcntl = INB(nc_dcntl) & 0xa8; 3749 np->sv_ctest0 = INB(nc_ctest0) & 0x84; 3750 np->sv_ctest3 = INB(nc_ctest3) & 0x01; 3751 np->sv_ctest4 = INB(nc_ctest4) & 0x80; 3752 np->sv_ctest5 = INB(nc_ctest5) & 0x24; 3753 np->sv_gpcntl = INB(nc_gpcntl); 3754 np->sv_stest2 = INB(nc_stest2) & 0x20; 3755 np->sv_stest4 = INB(nc_stest4); 3756 3757 /* 3758 ** Wide ? 3759 */ 3760 3761 np->maxwide = (np->features & FE_WIDE)? 1 : 0; 3762 3763 /* 3764 * Guess the frequency of the chip's clock. 3765 */ 3766 if (np->features & FE_ULTRA) 3767 np->clock_khz = 80000; 3768 else 3769 np->clock_khz = 40000; 3770 3771 /* 3772 * Get the clock multiplier factor. 3773 */ 3774 if (np->features & FE_QUAD) 3775 np->multiplier = 4; 3776 else if (np->features & FE_DBLR) 3777 np->multiplier = 2; 3778 else 3779 np->multiplier = 1; 3780 3781 /* 3782 * Measure SCSI clock frequency for chips 3783 * it may vary from assumed one. 3784 */ 3785 if (np->features & FE_VARCLK) 3786 ncr_getclock(np, np->multiplier); 3787 3788 /* 3789 * Divisor to be used for async (timer pre-scaler). 3790 */ 3791 i = np->clock_divn - 1; 3792 while (--i >= 0) { 3793 if (10ul * SCSI_NCR_MIN_ASYNC * np->clock_khz > div_10M[i]) { 3794 ++i; 3795 break; 3796 } 3797 } 3798 np->rv_scntl3 = i+1; 3799 3800 /* 3801 * Minimum synchronous period factor supported by the chip. 3802 * Btw, 'period' is in tenths of nanoseconds. 3803 */ 3804 3805 period = (4 * div_10M[0] + np->clock_khz - 1) / np->clock_khz; 3806 if (period <= 250) np->minsync = 10; 3807 else if (period <= 303) np->minsync = 11; 3808 else if (period <= 500) np->minsync = 12; 3809 else np->minsync = (period + 40 - 1) / 40; 3810 3811 /* 3812 * Check against chip SCSI standard support (SCSI-2,ULTRA,ULTRA2). 3813 */ 3814 3815 if (np->minsync < 25 && !(np->features & FE_ULTRA)) 3816 np->minsync = 25; 3817 3818 /* 3819 * Maximum synchronous period factor supported by the chip. 3820 */ 3821 3822 period = (11 * div_10M[np->clock_divn - 1]) / (4 * np->clock_khz); 3823 np->maxsync = period > 2540 ? 254 : period / 10; 3824 3825 /* 3826 ** Prepare initial value of other IO registers 3827 */ 3828#if defined SCSI_NCR_TRUST_BIOS_SETTING 3829 np->rv_scntl0 = np->sv_scntl0; 3830 np->rv_dmode = np->sv_dmode; 3831 np->rv_dcntl = np->sv_dcntl; 3832 np->rv_ctest0 = np->sv_ctest0; 3833 np->rv_ctest3 = np->sv_ctest3; 3834 np->rv_ctest4 = np->sv_ctest4; 3835 np->rv_ctest5 = np->sv_ctest5; 3836 burst_max = burst_code(np->sv_dmode, np->sv_ctest0); 3837#else 3838 3839 /* 3840 ** Select burst length (dwords) 3841 */ 3842 burst_max = driver_setup.burst_max; 3843 if (burst_max == 255) 3844 burst_max = burst_code(np->sv_dmode, np->sv_ctest0); 3845 if (burst_max > 7) 3846 burst_max = 7; 3847 if (burst_max > np->maxburst) 3848 burst_max = np->maxburst; 3849 3850 /* 3851 ** Select all supported special features 3852 */ 3853 if (np->features & FE_ERL) 3854 np->rv_dmode |= ERL; /* Enable Read Line */ 3855 if (np->features & FE_BOF) 3856 np->rv_dmode |= BOF; /* Burst Opcode Fetch */ 3857 if (np->features & FE_ERMP) 3858 np->rv_dmode |= ERMP; /* Enable Read Multiple */ 3859 if (np->features & FE_PFEN) 3860 np->rv_dcntl |= PFEN; /* Prefetch Enable */ 3861 if (np->features & FE_CLSE) 3862 np->rv_dcntl |= CLSE; /* Cache Line Size Enable */ 3863 if (np->features & FE_WRIE) 3864 np->rv_ctest3 |= WRIE; /* Write and Invalidate */ 3865 if (np->features & FE_DFS) 3866 np->rv_ctest5 |= DFS; /* Dma Fifo Size */ 3867 if (np->features & FE_MUX) 3868 np->rv_ctest4 |= MUX; /* Host bus multiplex mode */ 3869 if (np->features & FE_EA) 3870 np->rv_dcntl |= EA; /* Enable ACK */ 3871 if (np->features & FE_EHP) 3872 np->rv_ctest0 |= EHP; /* Even host parity */ 3873 3874 /* 3875 ** Select some other 3876 */ 3877 if (driver_setup.master_parity) 3878 np->rv_ctest4 |= MPEE; /* Master parity checking */ 3879 if (driver_setup.scsi_parity) 3880 np->rv_scntl0 |= 0x0a; /* full arb., ena parity, par->ATN */ 3881 3882 /* 3883 ** Get SCSI addr of host adapter (set by bios?). 3884 */ 3885 if (np->myaddr == 255) { 3886 np->myaddr = INB(nc_scid) & 0x07; 3887 if (!np->myaddr) 3888 np->myaddr = SCSI_NCR_MYADDR; 3889 } 3890 3891#endif /* SCSI_NCR_TRUST_BIOS_SETTING */ 3892 3893 /* 3894 * Prepare initial io register bits for burst length 3895 */ 3896 ncr_init_burst(np, burst_max); 3897 3898 /* 3899 ** Set SCSI BUS mode. 3900 ** 3901 ** - ULTRA2 chips (895/895A/896) report the current 3902 ** BUS mode through the STEST4 IO register. 3903 ** - For previous generation chips (825/825A/875), 3904 ** user has to tell us how to check against HVD, 3905 ** since a 100% safe algorithm is not possible. 3906 */ 3907 np->scsi_mode = SMODE_SE; 3908 if (np->features & FE_DIFF) { 3909 switch(driver_setup.diff_support) { 3910 case 4: /* Trust previous settings if present, then GPIO3 */ 3911 if (np->sv_scntl3) { 3912 if (np->sv_stest2 & 0x20) 3913 np->scsi_mode = SMODE_HVD; 3914 break; 3915 } 3916 case 3: /* SYMBIOS controllers report HVD through GPIO3 */ 3917 if (INB(nc_gpreg) & 0x08) 3918 break; 3919 case 2: /* Set HVD unconditionally */ 3920 np->scsi_mode = SMODE_HVD; 3921 case 1: /* Trust previous settings for HVD */ 3922 if (np->sv_stest2 & 0x20) 3923 np->scsi_mode = SMODE_HVD; 3924 break; 3925 default:/* Don't care about HVD */ 3926 break; 3927 } 3928 } 3929 if (np->scsi_mode == SMODE_HVD) 3930 np->rv_stest2 |= 0x20; 3931 3932 /* 3933 ** Set LED support from SCRIPTS. 3934 ** Ignore this feature for boards known to use a 3935 ** specific GPIO wiring and for the 895A or 896 3936 ** that drive the LED directly. 3937 ** Also probe initial setting of GPIO0 as output. 3938 */ 3939 if ((driver_setup.led_pin) && 3940 !(np->features & FE_LEDC) && !(np->sv_gpcntl & 0x01)) 3941 np->features |= FE_LED0; 3942 3943 /* 3944 ** Set irq mode. 3945 */ 3946 switch(driver_setup.irqm & 3) { 3947 case 2: 3948 np->rv_dcntl |= IRQM; 3949 break; 3950 case 1: 3951 np->rv_dcntl |= (np->sv_dcntl & IRQM); 3952 break; 3953 default: 3954 break; 3955 } 3956 3957 /* 3958 ** Configure targets according to driver setup. 3959 ** Allow to override sync, wide and NOSCAN from 3960 ** boot command line. 3961 */ 3962 for (i = 0 ; i < MAX_TARGET ; i++) { 3963 struct tcb *tp = &np->target[i]; 3964 3965 tp->usrsync = driver_setup.default_sync; 3966 tp->usrwide = driver_setup.max_wide; 3967 tp->usrtags = MAX_TAGS; 3968 tp->period = 0xffff; 3969 if (!driver_setup.disconnection) 3970 np->target[i].usrflag = UF_NODISC; 3971 } 3972 3973 /* 3974 ** Announce all that stuff to user. 3975 */ 3976 3977 printk(KERN_INFO "%s: ID %d, Fast-%d%s%s\n", ncr_name(np), 3978 np->myaddr, 3979 np->minsync < 12 ? 40 : (np->minsync < 25 ? 20 : 10), 3980 (np->rv_scntl0 & 0xa) ? ", Parity Checking" : ", NO Parity", 3981 (np->rv_stest2 & 0x20) ? ", Differential" : ""); 3982 3983 if (bootverbose > 1) { 3984 printk (KERN_INFO "%s: initial SCNTL3/DMODE/DCNTL/CTEST3/4/5 = " 3985 "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n", 3986 ncr_name(np), np->sv_scntl3, np->sv_dmode, np->sv_dcntl, 3987 np->sv_ctest3, np->sv_ctest4, np->sv_ctest5); 3988 3989 printk (KERN_INFO "%s: final SCNTL3/DMODE/DCNTL/CTEST3/4/5 = " 3990 "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n", 3991 ncr_name(np), np->rv_scntl3, np->rv_dmode, np->rv_dcntl, 3992 np->rv_ctest3, np->rv_ctest4, np->rv_ctest5); 3993 } 3994 3995 if (bootverbose && np->paddr2) 3996 printk (KERN_INFO "%s: on-chip RAM at 0x%lx\n", 3997 ncr_name(np), np->paddr2); 3998} 3999 4000/*========================================================== 4001** 4002** 4003** Done SCSI commands list management. 4004** 4005** We donnot enter the scsi_done() callback immediately 4006** after a command has been seen as completed but we 4007** insert it into a list which is flushed outside any kind 4008** of driver critical section. 4009** This allows to do minimal stuff under interrupt and 4010** inside critical sections and to also avoid locking up 4011** on recursive calls to driver entry points under SMP. 4012** In fact, the only kernel point which is entered by the 4013** driver with a driver lock set is kmalloc(GFP_ATOMIC) 4014** that shall not reenter the driver under any circumstances, 4015** AFAIK. 4016** 4017**========================================================== 4018*/ 4019static inline void ncr_queue_done_cmd(struct ncb *np, struct scsi_cmnd *cmd) 4020{ 4021 unmap_scsi_data(np, cmd); 4022 cmd->host_scribble = (char *) np->done_list; 4023 np->done_list = cmd; 4024} 4025 4026static inline void ncr_flush_done_cmds(struct scsi_cmnd *lcmd) 4027{ 4028 struct scsi_cmnd *cmd; 4029 4030 while (lcmd) { 4031 cmd = lcmd; 4032 lcmd = (struct scsi_cmnd *) cmd->host_scribble; 4033 cmd->scsi_done(cmd); 4034 } 4035} 4036 4037/*========================================================== 4038** 4039** 4040** Prepare the next negotiation message if needed. 4041** 4042** Fill in the part of message buffer that contains the 4043** negotiation and the nego_status field of the CCB. 4044** Returns the size of the message in bytes. 4045** 4046** 4047**========================================================== 4048*/ 4049 4050 4051static int ncr_prepare_nego(struct ncb *np, struct ccb *cp, u_char *msgptr) 4052{ 4053 struct tcb *tp = &np->target[cp->target]; 4054 int msglen = 0; 4055 int nego = 0; 4056 struct scsi_target *starget = tp->starget; 4057 4058 /* negotiate wide transfers ? */ 4059 if (!tp->widedone) { 4060 if (spi_support_wide(starget)) { 4061 nego = NS_WIDE; 4062 } else 4063 tp->widedone=1; 4064 } 4065 4066 /* negotiate synchronous transfers? */ 4067 if (!nego && !tp->period) { 4068 if (spi_support_sync(starget)) { 4069 nego = NS_SYNC; 4070 } else { 4071 tp->period =0xffff; 4072 dev_info(&starget->dev, "target did not report SYNC.\n"); 4073 } 4074 } 4075 4076 switch (nego) { 4077 case NS_SYNC: 4078 msglen += spi_populate_sync_msg(msgptr + msglen, 4079 tp->maxoffs ? tp->minsync : 0, tp->maxoffs); 4080 break; 4081 case NS_WIDE: 4082 msglen += spi_populate_width_msg(msgptr + msglen, tp->usrwide); 4083 break; 4084 } 4085 4086 cp->nego_status = nego; 4087 4088 if (nego) { 4089 tp->nego_cp = cp; 4090 if (DEBUG_FLAGS & DEBUG_NEGO) { 4091 ncr_print_msg(cp, nego == NS_WIDE ? 4092 "wide msgout":"sync_msgout", msgptr); 4093 } 4094 } 4095 4096 return msglen; 4097} 4098 4099 4100 4101/*========================================================== 4102** 4103** 4104** Start execution of a SCSI command. 4105** This is called from the generic SCSI driver. 4106** 4107** 4108**========================================================== 4109*/ 4110static int ncr_queue_command (struct ncb *np, struct scsi_cmnd *cmd) 4111{ 4112 struct scsi_device *sdev = cmd->device; 4113 struct tcb *tp = &np->target[sdev->id]; 4114 struct lcb *lp = tp->lp[sdev->lun]; 4115 struct ccb *cp; 4116 4117 int segments; 4118 u_char idmsg, *msgptr; 4119 u32 msglen; 4120 int direction; 4121 u32 lastp, goalp; 4122 4123 /*--------------------------------------------- 4124 ** 4125 ** Some shortcuts ... 4126 ** 4127 **--------------------------------------------- 4128 */ 4129 if ((sdev->id == np->myaddr ) || 4130 (sdev->id >= MAX_TARGET) || 4131 (sdev->lun >= MAX_LUN )) { 4132 return(DID_BAD_TARGET); 4133 } 4134 4135 /*--------------------------------------------- 4136 ** 4137 ** Complete the 1st TEST UNIT READY command 4138 ** with error condition if the device is 4139 ** flagged NOSCAN, in order to speed up 4140 ** the boot. 4141 ** 4142 **--------------------------------------------- 4143 */ 4144 if ((cmd->cmnd[0] == 0 || cmd->cmnd[0] == 0x12) && 4145 (tp->usrflag & UF_NOSCAN)) { 4146 tp->usrflag &= ~UF_NOSCAN; 4147 return DID_BAD_TARGET; 4148 } 4149 4150 if (DEBUG_FLAGS & DEBUG_TINY) { 4151 PRINT_ADDR(cmd, "CMD=%x ", cmd->cmnd[0]); 4152 } 4153 4154 /*--------------------------------------------------- 4155 ** 4156 ** Assign a ccb / bind cmd. 4157 ** If resetting, shorten settle_time if necessary 4158 ** in order to avoid spurious timeouts. 4159 ** If resetting or no free ccb, 4160 ** insert cmd into the waiting list. 4161 ** 4162 **---------------------------------------------------- 4163 */ 4164 if (np->settle_time && cmd->timeout_per_command >= HZ) { 4165 u_long tlimit = jiffies + cmd->timeout_per_command - HZ; 4166 if (time_after(np->settle_time, tlimit)) 4167 np->settle_time = tlimit; 4168 } 4169 4170 if (np->settle_time || !(cp=ncr_get_ccb (np, cmd))) { 4171 insert_into_waiting_list(np, cmd); 4172 return(DID_OK); 4173 } 4174 cp->cmd = cmd; 4175 4176 /*---------------------------------------------------- 4177 ** 4178 ** Build the identify / tag / sdtr message 4179 ** 4180 **---------------------------------------------------- 4181 */ 4182 4183 idmsg = IDENTIFY(0, sdev->lun); 4184 4185 if (cp ->tag != NO_TAG || 4186 (cp != np->ccb && np->disc && !(tp->usrflag & UF_NODISC))) 4187 idmsg |= 0x40; 4188 4189 msgptr = cp->scsi_smsg; 4190 msglen = 0; 4191 msgptr[msglen++] = idmsg; 4192 4193 if (cp->tag != NO_TAG) { 4194 char order = np->order; 4195 4196 /* 4197 ** Force ordered tag if necessary to avoid timeouts 4198 ** and to preserve interactivity. 4199 */ 4200 if (lp && time_after(jiffies, lp->tags_stime)) { 4201 if (lp->tags_smap) { 4202 order = ORDERED_QUEUE_TAG; 4203 if ((DEBUG_FLAGS & DEBUG_TAGS)||bootverbose>2){ 4204 PRINT_ADDR(cmd, 4205 "ordered tag forced.\n"); 4206 } 4207 } 4208 lp->tags_stime = jiffies + 3*HZ; 4209 lp->tags_smap = lp->tags_umap; 4210 } 4211 4212 if (order == 0) { 4213 /* 4214 ** Ordered write ops, unordered read ops. 4215 */ 4216 switch (cmd->cmnd[0]) { 4217 case 0x08: /* READ_SMALL (6) */ 4218 case 0x28: /* READ_BIG (10) */ 4219 case 0xa8: /* READ_HUGE (12) */ 4220 order = SIMPLE_QUEUE_TAG; 4221 break; 4222 default: 4223 order = ORDERED_QUEUE_TAG; 4224 } 4225 } 4226 msgptr[msglen++] = order; 4227 /* 4228 ** Actual tags are numbered 1,3,5,..2*MAXTAGS+1, 4229 ** since we may have to deal with devices that have 4230 ** problems with #TAG 0 or too great #TAG numbers. 4231 */ 4232 msgptr[msglen++] = (cp->tag << 1) + 1; 4233 } 4234 4235 /*---------------------------------------------------- 4236 ** 4237 ** Build the data descriptors 4238 ** 4239 **---------------------------------------------------- 4240 */ 4241 4242 direction = cmd->sc_data_direction; 4243 if (direction != DMA_NONE) { 4244 segments = ncr_scatter(np, cp, cp->cmd); 4245 if (segments < 0) { 4246 ncr_free_ccb(np, cp); 4247 return(DID_ERROR); 4248 } 4249 } 4250 else { 4251 cp->data_len = 0; 4252 segments = 0; 4253 } 4254 4255 /*--------------------------------------------------- 4256 ** 4257 ** negotiation required? 4258 ** 4259 ** (nego_status is filled by ncr_prepare_nego()) 4260 ** 4261 **--------------------------------------------------- 4262 */ 4263 4264 cp->nego_status = 0; 4265 4266 if ((!tp->widedone || !tp->period) && !tp->nego_cp && lp) { 4267 msglen += ncr_prepare_nego (np, cp, msgptr + msglen); 4268 } 4269 4270 /*---------------------------------------------------- 4271 ** 4272 ** Determine xfer direction. 4273 ** 4274 **---------------------------------------------------- 4275 */ 4276 if (!cp->data_len) 4277 direction = DMA_NONE; 4278 4279 /* 4280 ** If data direction is BIDIRECTIONAL, speculate FROM_DEVICE 4281 ** but prepare alternate pointers for TO_DEVICE in case 4282 ** of our speculation will be just wrong. 4283 ** SCRIPTS will swap values if needed. 4284 */ 4285 switch(direction) { 4286 case DMA_BIDIRECTIONAL: 4287 case DMA_TO_DEVICE: 4288 goalp = NCB_SCRIPT_PHYS (np, data_out2) + 8; 4289 if (segments <= MAX_SCATTERL) 4290 lastp = goalp - 8 - (segments * 16); 4291 else { 4292 lastp = NCB_SCRIPTH_PHYS (np, hdata_out2); 4293 lastp -= (segments - MAX_SCATTERL) * 16; 4294 } 4295 if (direction != DMA_BIDIRECTIONAL) 4296 break; 4297 cp->phys.header.wgoalp = cpu_to_scr(goalp); 4298 cp->phys.header.wlastp = cpu_to_scr(lastp); 4299 /* fall through */ 4300 case DMA_FROM_DEVICE: 4301 goalp = NCB_SCRIPT_PHYS (np, data_in2) + 8; 4302 if (segments <= MAX_SCATTERL) 4303 lastp = goalp - 8 - (segments * 16); 4304 else { 4305 lastp = NCB_SCRIPTH_PHYS (np, hdata_in2); 4306 lastp -= (segments - MAX_SCATTERL) * 16; 4307 } 4308 break; 4309 default: 4310 case DMA_NONE: 4311 lastp = goalp = NCB_SCRIPT_PHYS (np, no_data); 4312 break; 4313 } 4314 4315 /* 4316 ** Set all pointers values needed by SCRIPTS. 4317 ** If direction is unknown, start at data_io. 4318 */ 4319 cp->phys.header.lastp = cpu_to_scr(lastp); 4320 cp->phys.header.goalp = cpu_to_scr(goalp); 4321 4322 if (direction == DMA_BIDIRECTIONAL) 4323 cp->phys.header.savep = 4324 cpu_to_scr(NCB_SCRIPTH_PHYS (np, data_io)); 4325 else 4326 cp->phys.header.savep= cpu_to_scr(lastp); 4327 4328 /* 4329 ** Save the initial data pointer in order to be able 4330 ** to redo the command. 4331 */ 4332 cp->startp = cp->phys.header.savep; 4333 4334 /*---------------------------------------------------- 4335 ** 4336 ** fill in ccb 4337 ** 4338 **---------------------------------------------------- 4339 ** 4340 ** 4341 ** physical -> virtual backlink 4342 ** Generic SCSI command 4343 */ 4344 4345 /* 4346 ** Startqueue 4347 */ 4348 cp->start.schedule.l_paddr = cpu_to_scr(NCB_SCRIPT_PHYS (np, select)); 4349 cp->restart.schedule.l_paddr = cpu_to_scr(NCB_SCRIPT_PHYS (np, resel_dsa)); 4350 /* 4351 ** select 4352 */ 4353 cp->phys.select.sel_id = sdev_id(sdev); 4354 cp->phys.select.sel_scntl3 = tp->wval; 4355 cp->phys.select.sel_sxfer = tp->sval; 4356 /* 4357 ** message 4358 */ 4359 cp->phys.smsg.addr = cpu_to_scr(CCB_PHYS (cp, scsi_smsg)); 4360 cp->phys.smsg.size = cpu_to_scr(msglen); 4361 4362 /* 4363 ** command 4364 */ 4365 memcpy(cp->cdb_buf, cmd->cmnd, min_t(int, cmd->cmd_len, sizeof(cp->cdb_buf))); 4366 cp->phys.cmd.addr = cpu_to_scr(CCB_PHYS (cp, cdb_buf[0])); 4367 cp->phys.cmd.size = cpu_to_scr(cmd->cmd_len); 4368 4369 /* 4370 ** status 4371 */ 4372 cp->actualquirks = 0; 4373 cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY; 4374 cp->scsi_status = S_ILLEGAL; 4375 cp->parity_status = 0; 4376 4377 cp->xerr_status = XE_OK; 4378 4379 /*---------------------------------------------------- 4380 ** 4381 ** Critical region: start this job. 4382 ** 4383 **---------------------------------------------------- 4384 */ 4385 4386 /* activate this job. */ 4387 cp->magic = CCB_MAGIC; 4388 4389 /* 4390 ** insert next CCBs into start queue. 4391 ** 2 max at a time is enough to flush the CCB wait queue. 4392 */ 4393 cp->auto_sense = 0; 4394 if (lp) 4395 ncr_start_next_ccb(np, lp, 2); 4396 else 4397 ncr_put_start_queue(np, cp); 4398 4399 /* Command is successfully queued. */ 4400 4401 return DID_OK; 4402} 4403 4404 4405/*========================================================== 4406** 4407** 4408** Insert a CCB into the start queue and wake up the 4409** SCRIPTS processor. 4410** 4411** 4412**========================================================== 4413*/ 4414 4415static void ncr_start_next_ccb(struct ncb *np, struct lcb *lp, int maxn) 4416{ 4417 struct list_head *qp; 4418 struct ccb *cp; 4419 4420 if (lp->held_ccb) 4421 return; 4422 4423 while (maxn-- && lp->queuedccbs < lp->queuedepth) { 4424 qp = ncr_list_pop(&lp->wait_ccbq); 4425 if (!qp) 4426 break; 4427 ++lp->queuedccbs; 4428 cp = list_entry(qp, struct ccb, link_ccbq); 4429 list_add_tail(qp, &lp->busy_ccbq); 4430 lp->jump_ccb[cp->tag == NO_TAG ? 0 : cp->tag] = 4431 cpu_to_scr(CCB_PHYS (cp, restart)); 4432 ncr_put_start_queue(np, cp); 4433 } 4434} 4435 4436static void ncr_put_start_queue(struct ncb *np, struct ccb *cp) 4437{ 4438 u16 qidx; 4439 4440 /* 4441 ** insert into start queue. 4442 */ 4443 if (!np->squeueput) np->squeueput = 1; 4444 qidx = np->squeueput + 2; 4445 if (qidx >= MAX_START + MAX_START) qidx = 1; 4446 4447 np->scripth->tryloop [qidx] = cpu_to_scr(NCB_SCRIPT_PHYS (np, idle)); 4448 MEMORY_BARRIER(); 4449 np->scripth->tryloop [np->squeueput] = cpu_to_scr(CCB_PHYS (cp, start)); 4450 4451 np->squeueput = qidx; 4452 ++np->queuedccbs; 4453 cp->queued = 1; 4454 4455 if (DEBUG_FLAGS & DEBUG_QUEUE) 4456 printk ("%s: queuepos=%d.\n", ncr_name (np), np->squeueput); 4457 4458 /* 4459 ** Script processor may be waiting for reselect. 4460 ** Wake it up. 4461 */ 4462 MEMORY_BARRIER(); 4463 OUTB (nc_istat, SIGP); 4464} 4465 4466 4467static int ncr_reset_scsi_bus(struct ncb *np, int enab_int, int settle_delay) 4468{ 4469 u32 term; 4470 int retv = 0; 4471 4472 np->settle_time = jiffies + settle_delay * HZ; 4473 4474 if (bootverbose > 1) 4475 printk("%s: resetting, " 4476 "command processing suspended for %d seconds\n", 4477 ncr_name(np), settle_delay); 4478 4479 ncr_chip_reset(np, 100); 4480 udelay(2000); /* The 895 needs time for the bus mode to settle */ 4481 if (enab_int) 4482 OUTW (nc_sien, RST); 4483 /* 4484 ** Enable Tolerant, reset IRQD if present and 4485 ** properly set IRQ mode, prior to resetting the bus. 4486 */ 4487 OUTB (nc_stest3, TE); 4488 OUTB (nc_scntl1, CRST); 4489 udelay(200); 4490 4491 if (!driver_setup.bus_check) 4492 goto out; 4493 /* 4494 ** Check for no terminators or SCSI bus shorts to ground. 4495 ** Read SCSI data bus, data parity bits and control signals. 4496 ** We are expecting RESET to be TRUE and other signals to be 4497 ** FALSE. 4498 */ 4499 4500 term = INB(nc_sstat0); 4501 term = ((term & 2) << 7) + ((term & 1) << 17); /* rst sdp0 */ 4502 term |= ((INB(nc_sstat2) & 0x01) << 26) | /* sdp1 */ 4503 ((INW(nc_sbdl) & 0xff) << 9) | /* d7-0 */ 4504 ((INW(nc_sbdl) & 0xff00) << 10) | /* d15-8 */ 4505 INB(nc_sbcl); /* req ack bsy sel atn msg cd io */ 4506 4507 if (!(np->features & FE_WIDE)) 4508 term &= 0x3ffff; 4509 4510 if (term != (2<<7)) { 4511 printk("%s: suspicious SCSI data while resetting the BUS.\n", 4512 ncr_name(np)); 4513 printk("%s: %sdp0,d7-0,rst,req,ack,bsy,sel,atn,msg,c/d,i/o = " 4514 "0x%lx, expecting 0x%lx\n", 4515 ncr_name(np), 4516 (np->features & FE_WIDE) ? "dp1,d15-8," : "", 4517 (u_long)term, (u_long)(2<<7)); 4518 if (driver_setup.bus_check == 1) 4519 retv = 1; 4520 } 4521out: 4522 OUTB (nc_scntl1, 0); 4523 return retv; 4524} 4525 4526/* 4527 * Start reset process. 4528 * If reset in progress do nothing. 4529 * The interrupt handler will reinitialize the chip. 4530 * The timeout handler will wait for settle_time before 4531 * clearing it and so resuming command processing. 4532 */ 4533static void ncr_start_reset(struct ncb *np) 4534{ 4535 if (!np->settle_time) { 4536 ncr_reset_scsi_bus(np, 1, driver_setup.settle_delay); 4537 } 4538} 4539 4540/*========================================================== 4541** 4542** 4543** Reset the SCSI BUS. 4544** This is called from the generic SCSI driver. 4545** 4546** 4547**========================================================== 4548*/ 4549static int ncr_reset_bus (struct ncb *np, struct scsi_cmnd *cmd, int sync_reset) 4550{ 4551/* struct scsi_device *device = cmd->device; */ 4552 struct ccb *cp; 4553 int found; 4554 4555/* 4556 * Return immediately if reset is in progress. 4557 */ 4558 if (np->settle_time) { 4559 return FAILED; 4560 } 4561/* 4562 * Start the reset process. 4563 * The script processor is then assumed to be stopped. 4564 * Commands will now be queued in the waiting list until a settle 4565 * delay of 2 seconds will be completed. 4566 */ 4567 ncr_start_reset(np); 4568/* 4569 * First, look in the wakeup list 4570 */ 4571 for (found=0, cp=np->ccb; cp; cp=cp->link_ccb) { 4572 /* 4573 ** look for the ccb of this command. 4574 */ 4575 if (cp->host_status == HS_IDLE) continue; 4576 if (cp->cmd == cmd) { 4577 found = 1; 4578 break; 4579 } 4580 } 4581/* 4582 * Then, look in the waiting list 4583 */ 4584 if (!found && retrieve_from_waiting_list(0, np, cmd)) 4585 found = 1; 4586/* 4587 * Wake-up all awaiting commands with DID_RESET. 4588 */ 4589 reset_waiting_list(np); 4590/* 4591 * Wake-up all pending commands with HS_RESET -> DID_RESET. 4592 */ 4593 ncr_wakeup(np, HS_RESET); 4594/* 4595 * If the involved command was not in a driver queue, and the 4596 * scsi driver told us reset is synchronous, and the command is not 4597 * currently in the waiting list, complete it with DID_RESET status, 4598 * in order to keep it alive. 4599 */ 4600 if (!found && sync_reset && !retrieve_from_waiting_list(0, np, cmd)) { 4601 cmd->result = ScsiResult(DID_RESET, 0); 4602 ncr_queue_done_cmd(np, cmd); 4603 } 4604 4605 return SUCCESS; 4606} 4607 4608 4609static void ncr_detach(struct ncb *np) 4610{ 4611 struct ccb *cp; 4612 struct tcb *tp; 4613 struct lcb *lp; 4614 int target, lun; 4615 int i; 4616 char inst_name[16]; 4617 4618 /* Local copy so we don't access np after freeing it! */ 4619 strlcpy(inst_name, ncr_name(np), sizeof(inst_name)); 4620 4621 printk("%s: releasing host resources\n", ncr_name(np)); 4622 4623/* 4624** Stop the ncr_timeout process 4625** Set release_stage to 1 and wait that ncr_timeout() set it to 2. 4626*/ 4627 4628#ifdef DEBUG_NCR53C8XX 4629 printk("%s: stopping the timer\n", ncr_name(np)); 4630#endif 4631 np->release_stage = 1; 4632 for (i = 50 ; i && np->release_stage != 2 ; i--) 4633 mdelay(100); 4634 if (np->release_stage != 2) 4635 printk("%s: the timer seems to be already stopped\n", ncr_name(np)); 4636 else np->release_stage = 2; 4637 4638/* 4639** Disable chip interrupts 4640*/ 4641 4642#ifdef DEBUG_NCR53C8XX 4643 printk("%s: disabling chip interrupts\n", ncr_name(np)); 4644#endif 4645 OUTW (nc_sien , 0); 4646 OUTB (nc_dien , 0); 4647 4648 /* 4649 ** Reset NCR chip 4650 ** Restore bios setting for automatic clock detection. 4651 */ 4652 4653 printk("%s: resetting chip\n", ncr_name(np)); 4654 ncr_chip_reset(np, 100); 4655 4656 OUTB(nc_dmode, np->sv_dmode); 4657 OUTB(nc_dcntl, np->sv_dcntl); 4658 OUTB(nc_ctest0, np->sv_ctest0); 4659 OUTB(nc_ctest3, np->sv_ctest3); 4660 OUTB(nc_ctest4, np->sv_ctest4); 4661 OUTB(nc_ctest5, np->sv_ctest5); 4662 OUTB(nc_gpcntl, np->sv_gpcntl); 4663 OUTB(nc_stest2, np->sv_stest2); 4664 4665 ncr_selectclock(np, np->sv_scntl3); 4666 4667 /* 4668 ** Free allocated ccb(s) 4669 */ 4670 4671 while ((cp=np->ccb->link_ccb) != NULL) { 4672 np->ccb->link_ccb = cp->link_ccb; 4673 if (cp->host_status) { 4674 printk("%s: shall free an active ccb (host_status=%d)\n", 4675 ncr_name(np), cp->host_status); 4676 } 4677#ifdef DEBUG_NCR53C8XX 4678 printk("%s: freeing ccb (%lx)\n", ncr_name(np), (u_long) cp); 4679#endif 4680 m_free_dma(cp, sizeof(*cp), "CCB"); 4681 } 4682 4683 /* Free allocated tp(s) */ 4684 4685 for (target = 0; target < MAX_TARGET ; target++) { 4686 tp=&np->target[target]; 4687 for (lun = 0 ; lun < MAX_LUN ; lun++) { 4688 lp = tp->lp[lun]; 4689 if (lp) { 4690#ifdef DEBUG_NCR53C8XX 4691 printk("%s: freeing lp (%lx)\n", ncr_name(np), (u_long) lp); 4692#endif 4693 if (lp->jump_ccb != &lp->jump_ccb_0) 4694 m_free_dma(lp->jump_ccb,256,"JUMP_CCB"); 4695 m_free_dma(lp, sizeof(*lp), "LCB"); 4696 } 4697 } 4698 } 4699 4700 if (np->scripth0) 4701 m_free_dma(np->scripth0, sizeof(struct scripth), "SCRIPTH"); 4702 if (np->script0) 4703 m_free_dma(np->script0, sizeof(struct script), "SCRIPT"); 4704 if (np->ccb) 4705 m_free_dma(np->ccb, sizeof(struct ccb), "CCB"); 4706 m_free_dma(np, sizeof(struct ncb), "NCB"); 4707 4708 printk("%s: host resources successfully released\n", inst_name); 4709} 4710 4711/*========================================================== 4712** 4713** 4714** Complete execution of a SCSI command. 4715** Signal completion to the generic SCSI driver. 4716** 4717** 4718**========================================================== 4719*/ 4720 4721void ncr_complete (struct ncb *np, struct ccb *cp) 4722{ 4723 struct scsi_cmnd *cmd; 4724 struct tcb *tp; 4725 struct lcb *lp; 4726 4727 /* 4728 ** Sanity check 4729 */ 4730 4731 if (!cp || cp->magic != CCB_MAGIC || !cp->cmd) 4732 return; 4733 4734 /* 4735 ** Print minimal debug information. 4736 */ 4737 4738 if (DEBUG_FLAGS & DEBUG_TINY) 4739 printk ("CCB=%lx STAT=%x/%x\n", (unsigned long)cp, 4740 cp->host_status,cp->scsi_status); 4741 4742 /* 4743 ** Get command, target and lun pointers. 4744 */ 4745 4746 cmd = cp->cmd; 4747 cp->cmd = NULL; 4748 tp = &np->target[cmd->device->id]; 4749 lp = tp->lp[cmd->device->lun]; 4750 4751 /* 4752 ** We donnot queue more than 1 ccb per target 4753 ** with negotiation at any time. If this ccb was 4754 ** used for negotiation, clear this info in the tcb. 4755 */ 4756 4757 if (cp == tp->nego_cp) 4758 tp->nego_cp = NULL; 4759 4760 /* 4761 ** If auto-sense performed, change scsi status. 4762 */ 4763 if (cp->auto_sense) { 4764 cp->scsi_status = cp->auto_sense; 4765 } 4766 4767 /* 4768 ** If we were recovering from queue full or performing 4769 ** auto-sense, requeue skipped CCBs to the wait queue. 4770 */ 4771 4772 if (lp && lp->held_ccb) { 4773 if (cp == lp->held_ccb) { 4774 list_splice_init(&lp->skip_ccbq, &lp->wait_ccbq); 4775 lp->held_ccb = NULL; 4776 } 4777 } 4778 4779 /* 4780 ** Check for parity errors. 4781 */ 4782 4783 if (cp->parity_status > 1) { 4784 PRINT_ADDR(cmd, "%d parity error(s).\n",cp->parity_status); 4785 } 4786 4787 /* 4788 ** Check for extended errors. 4789 */ 4790 4791 if (cp->xerr_status != XE_OK) { 4792 switch (cp->xerr_status) { 4793 case XE_EXTRA_DATA: 4794 PRINT_ADDR(cmd, "extraneous data discarded.\n"); 4795 break; 4796 case XE_BAD_PHASE: 4797 PRINT_ADDR(cmd, "invalid scsi phase (4/5).\n"); 4798 break; 4799 default: 4800 PRINT_ADDR(cmd, "extended error %d.\n", 4801 cp->xerr_status); 4802 break; 4803 } 4804 if (cp->host_status==HS_COMPLETE) 4805 cp->host_status = HS_FAIL; 4806 } 4807 4808 /* 4809 ** Print out any error for debugging purpose. 4810 */ 4811 if (DEBUG_FLAGS & (DEBUG_RESULT|DEBUG_TINY)) { 4812 if (cp->host_status!=HS_COMPLETE || cp->scsi_status!=S_GOOD) { 4813 PRINT_ADDR(cmd, "ERROR: cmd=%x host_status=%x " 4814 "scsi_status=%x\n", cmd->cmnd[0], 4815 cp->host_status, cp->scsi_status); 4816 } 4817 } 4818 4819 /* 4820 ** Check the status. 4821 */ 4822 if ( (cp->host_status == HS_COMPLETE) 4823 && (cp->scsi_status == S_GOOD || 4824 cp->scsi_status == S_COND_MET)) { 4825 /* 4826 * All went well (GOOD status). 4827 * CONDITION MET status is returned on 4828 * `Pre-Fetch' or `Search data' success. 4829 */ 4830 cmd->result = ScsiResult(DID_OK, cp->scsi_status); 4831 4832 /* 4833 ** @RESID@ 4834 ** Could dig out the correct value for resid, 4835 ** but it would be quite complicated. 4836 */ 4837 /* if (cp->phys.header.lastp != cp->phys.header.goalp) */ 4838 4839 /* 4840 ** Allocate the lcb if not yet. 4841 */ 4842 if (!lp) 4843 ncr_alloc_lcb (np, cmd->device->id, cmd->device->lun); 4844 4845 tp->bytes += cp->data_len; 4846 tp->transfers ++; 4847 4848 /* 4849 ** If tags was reduced due to queue full, 4850 ** increase tags if 1000 good status received. 4851 */ 4852 if (lp && lp->usetags && lp->numtags < lp->maxtags) { 4853 ++lp->num_good; 4854 if (lp->num_good >= 1000) { 4855 lp->num_good = 0; 4856 ++lp->numtags; 4857 ncr_setup_tags (np, cmd->device); 4858 } 4859 } 4860 } else if ((cp->host_status == HS_COMPLETE) 4861 && (cp->scsi_status == S_CHECK_COND)) { 4862 /* 4863 ** Check condition code 4864 */ 4865 cmd->result = ScsiResult(DID_OK, S_CHECK_COND); 4866 4867 /* 4868 ** Copy back sense data to caller's buffer. 4869 */ 4870 memcpy(cmd->sense_buffer, cp->sense_buf, 4871 min(sizeof(cmd->sense_buffer), sizeof(cp->sense_buf))); 4872 4873 if (DEBUG_FLAGS & (DEBUG_RESULT|DEBUG_TINY)) { 4874 u_char * p = (u_char*) & cmd->sense_buffer; 4875 int i; 4876 PRINT_ADDR(cmd, "sense data:"); 4877 for (i=0; i<14; i++) printk (" %x", *p++); 4878 printk (".\n"); 4879 } 4880 } else if ((cp->host_status == HS_COMPLETE) 4881 && (cp->scsi_status == S_CONFLICT)) { 4882 /* 4883 ** Reservation Conflict condition code 4884 */ 4885 cmd->result = ScsiResult(DID_OK, S_CONFLICT); 4886 4887 } else if ((cp->host_status == HS_COMPLETE) 4888 && (cp->scsi_status == S_BUSY || 4889 cp->scsi_status == S_QUEUE_FULL)) { 4890 4891 /* 4892 ** Target is busy. 4893 */ 4894 cmd->result = ScsiResult(DID_OK, cp->scsi_status); 4895 4896 } else if ((cp->host_status == HS_SEL_TIMEOUT) 4897 || (cp->host_status == HS_TIMEOUT)) { 4898 4899 /* 4900 ** No response 4901 */ 4902 cmd->result = ScsiResult(DID_TIME_OUT, cp->scsi_status); 4903 4904 } else if (cp->host_status == HS_RESET) { 4905 4906 /* 4907 ** SCSI bus reset 4908 */ 4909 cmd->result = ScsiResult(DID_RESET, cp->scsi_status); 4910 4911 } else if (cp->host_status == HS_ABORTED) { 4912 4913 /* 4914 ** Transfer aborted 4915 */ 4916 cmd->result = ScsiResult(DID_ABORT, cp->scsi_status); 4917 4918 } else { 4919 4920 /* 4921 ** Other protocol messes 4922 */ 4923 PRINT_ADDR(cmd, "COMMAND FAILED (%x %x) @%p.\n", 4924 cp->host_status, cp->scsi_status, cp); 4925 4926 cmd->result = ScsiResult(DID_ERROR, cp->scsi_status); 4927 } 4928 4929 /* 4930 ** trace output 4931 */ 4932 4933 if (tp->usrflag & UF_TRACE) { 4934 u_char * p; 4935 int i; 4936 PRINT_ADDR(cmd, " CMD:"); 4937 p = (u_char*) &cmd->cmnd[0]; 4938 for (i=0; i<cmd->cmd_len; i++) printk (" %x", *p++); 4939 4940 if (cp->host_status==HS_COMPLETE) { 4941 switch (cp->scsi_status) { 4942 case S_GOOD: 4943 printk (" GOOD"); 4944 break; 4945 case S_CHECK_COND: 4946 printk (" SENSE:"); 4947 p = (u_char*) &cmd->sense_buffer; 4948 for (i=0; i<14; i++) 4949 printk (" %x", *p++); 4950 break; 4951 default: 4952 printk (" STAT: %x\n", cp->scsi_status); 4953 break; 4954 } 4955 } else printk (" HOSTERROR: %x", cp->host_status); 4956 printk ("\n"); 4957 } 4958 4959 /* 4960 ** Free this ccb 4961 */ 4962 ncr_free_ccb (np, cp); 4963 4964 /* 4965 ** requeue awaiting scsi commands for this lun. 4966 */ 4967 if (lp && lp->queuedccbs < lp->queuedepth && 4968 !list_empty(&lp->wait_ccbq)) 4969 ncr_start_next_ccb(np, lp, 2); 4970 4971 /* 4972 ** requeue awaiting scsi commands for this controller. 4973 */ 4974 if (np->waiting_list) 4975 requeue_waiting_list(np); 4976 4977 /* 4978 ** signal completion to generic driver. 4979 */ 4980 ncr_queue_done_cmd(np, cmd); 4981} 4982 4983/*========================================================== 4984** 4985** 4986** Signal all (or one) control block done. 4987** 4988** 4989**========================================================== 4990*/ 4991 4992/* 4993** This CCB has been skipped by the NCR. 4994** Queue it in the corresponding unit queue. 4995*/ 4996static void ncr_ccb_skipped(struct ncb *np, struct ccb *cp) 4997{ 4998 struct tcb *tp = &np->target[cp->target]; 4999 struct lcb *lp = tp->lp[cp->lun]; 5000 5001 if (lp && cp != np->ccb) { 5002 cp->host_status &= ~HS_SKIPMASK; 5003 cp->start.schedule.l_paddr = 5004 cpu_to_scr(NCB_SCRIPT_PHYS (np, select)); 5005 list_move_tail(&cp->link_ccbq, &lp->skip_ccbq); 5006 if (cp->queued) { 5007 --lp->queuedccbs; 5008 } 5009 } 5010 if (cp->queued) { 5011 --np->queuedccbs; 5012 cp->queued = 0; 5013 } 5014} 5015 5016/* 5017** The NCR has completed CCBs. 5018** Look at the DONE QUEUE if enabled, otherwise scan all CCBs 5019*/ 5020void ncr_wakeup_done (struct ncb *np) 5021{ 5022 struct ccb *cp; 5023#ifdef SCSI_NCR_CCB_DONE_SUPPORT 5024 int i, j; 5025 5026 i = np->ccb_done_ic; 5027 while (1) { 5028 j = i+1; 5029 if (j >= MAX_DONE) 5030 j = 0; 5031 5032 cp = np->ccb_done[j]; 5033 if (!CCB_DONE_VALID(cp)) 5034 break; 5035 5036 np->ccb_done[j] = (struct ccb *)CCB_DONE_EMPTY; 5037 np->scripth->done_queue[5*j + 4] = 5038 cpu_to_scr(NCB_SCRIPT_PHYS (np, done_plug)); 5039 MEMORY_BARRIER(); 5040 np->scripth->done_queue[5*i + 4] = 5041 cpu_to_scr(NCB_SCRIPT_PHYS (np, done_end)); 5042 5043 if (cp->host_status & HS_DONEMASK) 5044 ncr_complete (np, cp); 5045 else if (cp->host_status & HS_SKIPMASK) 5046 ncr_ccb_skipped (np, cp); 5047 5048 i = j; 5049 } 5050 np->ccb_done_ic = i; 5051#else 5052 cp = np->ccb; 5053 while (cp) { 5054 if (cp->host_status & HS_DONEMASK) 5055 ncr_complete (np, cp); 5056 else if (cp->host_status & HS_SKIPMASK) 5057 ncr_ccb_skipped (np, cp); 5058 cp = cp->link_ccb; 5059 } 5060#endif 5061} 5062 5063/* 5064** Complete all active CCBs. 5065*/ 5066void ncr_wakeup (struct ncb *np, u_long code) 5067{ 5068 struct ccb *cp = np->ccb; 5069 5070 while (cp) { 5071 if (cp->host_status != HS_IDLE) { 5072 cp->host_status = code; 5073 ncr_complete (np, cp); 5074 } 5075 cp = cp->link_ccb; 5076 } 5077} 5078 5079/* 5080** Reset ncr chip. 5081*/ 5082 5083/* Some initialisation must be done immediately following reset, for 53c720, 5084 * at least. EA (dcntl bit 5) isn't set here as it is set once only in 5085 * the _detect function. 5086 */ 5087static void ncr_chip_reset(struct ncb *np, int delay) 5088{ 5089 OUTB (nc_istat, SRST); 5090 udelay(delay); 5091 OUTB (nc_istat, 0 ); 5092 5093 if (np->features & FE_EHP) 5094 OUTB (nc_ctest0, EHP); 5095 if (np->features & FE_MUX) 5096 OUTB (nc_ctest4, MUX); 5097} 5098 5099 5100/*========================================================== 5101** 5102** 5103** Start NCR chip. 5104** 5105** 5106**========================================================== 5107*/ 5108 5109void ncr_init (struct ncb *np, int reset, char * msg, u_long code) 5110{ 5111 int i; 5112 5113 /* 5114 ** Reset chip if asked, otherwise just clear fifos. 5115 */ 5116 5117 if (reset) { 5118 OUTB (nc_istat, SRST); 5119 udelay(100); 5120 } 5121 else { 5122 OUTB (nc_stest3, TE|CSF); 5123 OUTONB (nc_ctest3, CLF); 5124 } 5125 5126 /* 5127 ** Message. 5128 */ 5129 5130 if (msg) printk (KERN_INFO "%s: restart (%s).\n", ncr_name (np), msg); 5131 5132 /* 5133 ** Clear Start Queue 5134 */ 5135 np->queuedepth = MAX_START - 1; /* 1 entry needed as end marker */ 5136 for (i = 1; i < MAX_START + MAX_START; i += 2) 5137 np->scripth0->tryloop[i] = 5138 cpu_to_scr(NCB_SCRIPT_PHYS (np, idle)); 5139 5140 /* 5141 ** Start at first entry. 5142 */ 5143 np->squeueput = 0; 5144 np->script0->startpos[0] = cpu_to_scr(NCB_SCRIPTH_PHYS (np, tryloop)); 5145 5146#ifdef SCSI_NCR_CCB_DONE_SUPPORT 5147 /* 5148 ** Clear Done Queue 5149 */ 5150 for (i = 0; i < MAX_DONE; i++) { 5151 np->ccb_done[i] = (struct ccb *)CCB_DONE_EMPTY; 5152 np->scripth0->done_queue[5*i + 4] = 5153 cpu_to_scr(NCB_SCRIPT_PHYS (np, done_end)); 5154 } 5155#endif 5156 5157 /* 5158 ** Start at first entry. 5159 */ 5160 np->script0->done_pos[0] = cpu_to_scr(NCB_SCRIPTH_PHYS (np,done_queue)); 5161 np->ccb_done_ic = MAX_DONE-1; 5162 np->scripth0->done_queue[5*(MAX_DONE-1) + 4] = 5163 cpu_to_scr(NCB_SCRIPT_PHYS (np, done_plug)); 5164 5165 /* 5166 ** Wakeup all pending jobs. 5167 */ 5168 ncr_wakeup (np, code); 5169 5170 /* 5171 ** Init chip. 5172 */ 5173 5174 /* 5175 ** Remove reset; big delay because the 895 needs time for the 5176 ** bus mode to settle 5177 */ 5178 ncr_chip_reset(np, 2000); 5179 5180 OUTB (nc_scntl0, np->rv_scntl0 | 0xc0); 5181 /* full arb., ena parity, par->ATN */ 5182 OUTB (nc_scntl1, 0x00); /* odd parity, and remove CRST!! */ 5183 5184 ncr_selectclock(np, np->rv_scntl3); /* Select SCSI clock */ 5185 5186 OUTB (nc_scid , RRE|np->myaddr); /* Adapter SCSI address */ 5187 OUTW (nc_respid, 1ul<<np->myaddr); /* Id to respond to */ 5188 OUTB (nc_istat , SIGP ); /* Signal Process */ 5189 OUTB (nc_dmode , np->rv_dmode); /* Burst length, dma mode */ 5190 OUTB (nc_ctest5, np->rv_ctest5); /* Large fifo + large burst */ 5191 5192 OUTB (nc_dcntl , NOCOM|np->rv_dcntl); /* Protect SFBR */ 5193 OUTB (nc_ctest0, np->rv_ctest0); /* 720: CDIS and EHP */ 5194 OUTB (nc_ctest3, np->rv_ctest3); /* Write and invalidate */ 5195 OUTB (nc_ctest4, np->rv_ctest4); /* Master parity checking */ 5196 5197 OUTB (nc_stest2, EXT|np->rv_stest2); /* Extended Sreq/Sack filtering */ 5198 OUTB (nc_stest3, TE); /* TolerANT enable */ 5199 OUTB (nc_stime0, 0x0c ); /* HTH disabled STO 0.25 sec */ 5200 5201 /* 5202 ** Disable disconnects. 5203 */ 5204 5205 np->disc = 0; 5206 5207 /* 5208 ** Enable GPIO0 pin for writing if LED support. 5209 */ 5210 5211 if (np->features & FE_LED0) { 5212 OUTOFFB (nc_gpcntl, 0x01); 5213 } 5214 5215 /* 5216 ** enable ints 5217 */ 5218 5219 OUTW (nc_sien , STO|HTH|MA|SGE|UDC|RST|PAR); 5220 OUTB (nc_dien , MDPE|BF|ABRT|SSI|SIR|IID); 5221 5222 /* 5223 ** Fill in target structure. 5224 ** Reinitialize usrsync. 5225 ** Reinitialize usrwide. 5226 ** Prepare sync negotiation according to actual SCSI bus mode. 5227 */ 5228 5229 for (i=0;i<MAX_TARGET;i++) { 5230 struct tcb *tp = &np->target[i]; 5231 5232 tp->sval = 0; 5233 tp->wval = np->rv_scntl3; 5234 5235 if (tp->usrsync != 255) { 5236 if (tp->usrsync <= np->maxsync) { 5237 if (tp->usrsync < np->minsync) { 5238 tp->usrsync = np->minsync; 5239 } 5240 } 5241 else 5242 tp->usrsync = 255; 5243 } 5244 5245 if (tp->usrwide > np->maxwide) 5246 tp->usrwide = np->maxwide; 5247 5248 } 5249 5250 /* 5251 ** Start script processor. 5252 */ 5253 if (np->paddr2) { 5254 if (bootverbose) 5255 printk ("%s: Downloading SCSI SCRIPTS.\n", 5256 ncr_name(np)); 5257 OUTL (nc_scratcha, vtobus(np->script0)); 5258 OUTL_DSP (NCB_SCRIPTH_PHYS (np, start_ram)); 5259 } 5260 else 5261 OUTL_DSP (NCB_SCRIPT_PHYS (np, start)); 5262} 5263 5264/*========================================================== 5265** 5266** Prepare the negotiation values for wide and 5267** synchronous transfers. 5268** 5269**========================================================== 5270*/ 5271 5272static void ncr_negotiate (struct ncb* np, struct tcb* tp) 5273{ 5274 /* 5275 ** minsync unit is 4ns ! 5276 */ 5277 5278 u_long minsync = tp->usrsync; 5279 5280 /* 5281 ** SCSI bus mode limit 5282 */ 5283 5284 if (np->scsi_mode && np->scsi_mode == SMODE_SE) { 5285 if (minsync < 12) minsync = 12; 5286 } 5287 5288 /* 5289 ** our limit .. 5290 */ 5291 5292 if (minsync < np->minsync) 5293 minsync = np->minsync; 5294 5295 /* 5296 ** divider limit 5297 */ 5298 5299 if (minsync > np->maxsync) 5300 minsync = 255; 5301 5302 if (tp->maxoffs > np->maxoffs) 5303 tp->maxoffs = np->maxoffs; 5304 5305 tp->minsync = minsync; 5306 tp->maxoffs = (minsync<255 ? tp->maxoffs : 0); 5307 5308 /* 5309 ** period=0: has to negotiate sync transfer 5310 */ 5311 5312 tp->period=0; 5313 5314 /* 5315 ** widedone=0: has to negotiate wide transfer 5316 */ 5317 tp->widedone=0; 5318} 5319 5320/*========================================================== 5321** 5322** Get clock factor and sync divisor for a given 5323** synchronous factor period. 5324** Returns the clock factor (in sxfer) and scntl3 5325** synchronous divisor field. 5326** 5327**========================================================== 5328*/ 5329 5330static void ncr_getsync(struct ncb *np, u_char sfac, u_char *fakp, u_char *scntl3p) 5331{ 5332 u_long clk = np->clock_khz; /* SCSI clock frequency in kHz */ 5333 int div = np->clock_divn; /* Number of divisors supported */ 5334 u_long fak; /* Sync factor in sxfer */ 5335 u_long per; /* Period in tenths of ns */ 5336 u_long kpc; /* (per * clk) */ 5337 5338 /* 5339 ** Compute the synchronous period in tenths of nano-seconds 5340 */ 5341 if (sfac <= 10) per = 250; 5342 else if (sfac == 11) per = 303; 5343 else if (sfac == 12) per = 500; 5344 else per = 40 * sfac; 5345 5346 /* 5347 ** Look for the greatest clock divisor that allows an 5348 ** input speed faster than the period. 5349 */ 5350 kpc = per * clk; 5351 while (--div >= 0) 5352 if (kpc >= (div_10M[div] << 2)) break; 5353 5354 /* 5355 ** Calculate the lowest clock factor that allows an output 5356 ** speed not faster than the period. 5357 */ 5358 fak = (kpc - 1) / div_10M[div] + 1; 5359 5360 5361 if (fak < 4) fak = 4; /* Should never happen, too bad ... */ 5362 5363 /* 5364 ** Compute and return sync parameters for the ncr 5365 */ 5366 *fakp = fak - 4; 5367 *scntl3p = ((div+1) << 4) + (sfac < 25 ? 0x80 : 0); 5368} 5369 5370 5371/*========================================================== 5372** 5373** Set actual values, sync status and patch all ccbs of 5374** a target according to new sync/wide agreement. 5375** 5376**========================================================== 5377*/ 5378 5379static void ncr_set_sync_wide_status (struct ncb *np, u_char target) 5380{ 5381 struct ccb *cp; 5382 struct tcb *tp = &np->target[target]; 5383 5384 /* 5385 ** set actual value and sync_status 5386 */ 5387 OUTB (nc_sxfer, tp->sval); 5388 np->sync_st = tp->sval; 5389 OUTB (nc_scntl3, tp->wval); 5390 np->wide_st = tp->wval; 5391 5392 /* 5393 ** patch ALL ccbs of this target. 5394 */ 5395 for (cp = np->ccb; cp; cp = cp->link_ccb) { 5396 if (!cp->cmd) continue; 5397 if (scmd_id(cp->cmd) != target) continue; 5398 cp->phys.select.sel_scntl3 = tp->wval; 5399 cp->phys.select.sel_sxfer = tp->sval; 5400 } 5401} 5402 5403/*========================================================== 5404** 5405** Switch sync mode for current job and it's target 5406** 5407**========================================================== 5408*/ 5409 5410static void ncr_setsync (struct ncb *np, struct ccb *cp, u_char scntl3, u_char sxfer) 5411{ 5412 struct scsi_cmnd *cmd = cp->cmd; 5413 struct tcb *tp; 5414 u_char target = INB (nc_sdid) & 0x0f; 5415 u_char idiv; 5416 5417 BUG_ON(target != (scmd_id(cmd) & 0xf)); 5418 5419 tp = &np->target[target]; 5420 5421 if (!scntl3 || !(sxfer & 0x1f)) 5422 scntl3 = np->rv_scntl3; 5423 scntl3 = (scntl3 & 0xf0) | (tp->wval & EWS) | (np->rv_scntl3 & 0x07); 5424 5425 /* 5426 ** Deduce the value of controller sync period from scntl3. 5427 ** period is in tenths of nano-seconds. 5428 */ 5429 5430 idiv = ((scntl3 >> 4) & 0x7); 5431 if ((sxfer & 0x1f) && idiv) 5432 tp->period = (((sxfer>>5)+4)*div_10M[idiv-1])/np->clock_khz; 5433 else 5434 tp->period = 0xffff; 5435 5436 /* Stop there if sync parameters are unchanged */ 5437 if (tp->sval == sxfer && tp->wval == scntl3) 5438 return; 5439 tp->sval = sxfer; 5440 tp->wval = scntl3; 5441 5442 if (sxfer & 0x01f) { 5443 /* Disable extended Sreq/Sack filtering */ 5444 if (tp->period <= 2000) 5445 OUTOFFB(nc_stest2, EXT); 5446 } 5447 5448 spi_display_xfer_agreement(tp->starget); 5449 5450 /* 5451 ** set actual value and sync_status 5452 ** patch ALL ccbs of this target. 5453 */ 5454 ncr_set_sync_wide_status(np, target); 5455} 5456 5457/*========================================================== 5458** 5459** Switch wide mode for current job and it's target 5460** SCSI specs say: a SCSI device that accepts a WDTR 5461** message shall reset the synchronous agreement to 5462** asynchronous mode. 5463** 5464**========================================================== 5465*/ 5466 5467static void ncr_setwide (struct ncb *np, struct ccb *cp, u_char wide, u_char ack) 5468{ 5469 struct scsi_cmnd *cmd = cp->cmd; 5470 u16 target = INB (nc_sdid) & 0x0f; 5471 struct tcb *tp; 5472 u_char scntl3; 5473 u_char sxfer; 5474 5475 BUG_ON(target != (scmd_id(cmd) & 0xf)); 5476 5477 tp = &np->target[target]; 5478 tp->widedone = wide+1; 5479 scntl3 = (tp->wval & (~EWS)) | (wide ? EWS : 0); 5480 5481 sxfer = ack ? 0 : tp->sval; 5482 5483 /* 5484 ** Stop there if sync/wide parameters are unchanged 5485 */ 5486 if (tp->sval == sxfer && tp->wval == scntl3) return; 5487 tp->sval = sxfer; 5488 tp->wval = scntl3; 5489 5490 /* 5491 ** Bells and whistles ;-) 5492 */ 5493 if (bootverbose >= 2) { 5494 dev_info(&cmd->device->sdev_target->dev, "WIDE SCSI %sabled.\n", 5495 (scntl3 & EWS) ? "en" : "dis"); 5496 } 5497 5498 /* 5499 ** set actual value and sync_status 5500 ** patch ALL ccbs of this target. 5501 */ 5502 ncr_set_sync_wide_status(np, target); 5503} 5504 5505/*========================================================== 5506** 5507** Switch tagged mode for a target. 5508** 5509**========================================================== 5510*/ 5511 5512static void ncr_setup_tags (struct ncb *np, struct scsi_device *sdev) 5513{ 5514 unsigned char tn = sdev->id, ln = sdev->lun; 5515 struct tcb *tp = &np->target[tn]; 5516 struct lcb *lp = tp->lp[ln]; 5517 u_char reqtags, maxdepth; 5518 5519 /* 5520 ** Just in case ... 5521 */ 5522 if ((!tp) || (!lp) || !sdev) 5523 return; 5524 5525 /* 5526 ** If SCSI device queue depth is not yet set, leave here. 5527 */ 5528 if (!lp->scdev_depth) 5529 return; 5530 5531 /* 5532 ** Donnot allow more tags than the SCSI driver can queue 5533 ** for this device. 5534 ** Donnot allow more tags than we can handle. 5535 */ 5536 maxdepth = lp->scdev_depth; 5537 if (maxdepth > lp->maxnxs) maxdepth = lp->maxnxs; 5538 if (lp->maxtags > maxdepth) lp->maxtags = maxdepth; 5539 if (lp->numtags > maxdepth) lp->numtags = maxdepth; 5540 5541 /* 5542 ** only devices conformant to ANSI Version >= 2 5543 ** only devices capable of tagged commands 5544 ** only if enabled by user .. 5545 */ 5546 if (sdev->tagged_supported && lp->numtags > 1) { 5547 reqtags = lp->numtags; 5548 } else { 5549 reqtags = 1; 5550 } 5551 5552 /* 5553 ** Update max number of tags 5554 */ 5555 lp->numtags = reqtags; 5556 if (lp->numtags > lp->maxtags) 5557 lp->maxtags = lp->numtags; 5558 5559 /* 5560 ** If we want to switch tag mode, we must wait 5561 ** for no CCB to be active. 5562 */ 5563 if (reqtags > 1 && lp->usetags) { /* Stay in tagged mode */ 5564 if (lp->queuedepth == reqtags) /* Already announced */ 5565 return; 5566 lp->queuedepth = reqtags; 5567 } 5568 else if (reqtags <= 1 && !lp->usetags) { /* Stay in untagged mode */ 5569 lp->queuedepth = reqtags; 5570 return; 5571 } 5572 else { /* Want to switch tag mode */ 5573 if (lp->busyccbs) /* If not yet safe, return */ 5574 return; 5575 lp->queuedepth = reqtags; 5576 lp->usetags = reqtags > 1 ? 1 : 0; 5577 } 5578 5579 /* 5580 ** Patch the lun mini-script, according to tag mode. 5581 */ 5582 lp->jump_tag.l_paddr = lp->usetags? 5583 cpu_to_scr(NCB_SCRIPT_PHYS(np, resel_tag)) : 5584 cpu_to_scr(NCB_SCRIPT_PHYS(np, resel_notag)); 5585 5586 /* 5587 ** Announce change to user. 5588 */ 5589 if (bootverbose) { 5590 if (lp->usetags) { 5591 dev_info(&sdev->sdev_gendev, 5592 "tagged command queue depth set to %d\n", 5593 reqtags); 5594 } else { 5595 dev_info(&sdev->sdev_gendev, 5596 "tagged command queueing disabled\n"); 5597 } 5598 } 5599} 5600 5601/*========================================================== 5602** 5603** 5604** ncr timeout handler. 5605** 5606** 5607**========================================================== 5608** 5609** Misused to keep the driver running when 5610** interrupts are not configured correctly. 5611** 5612**---------------------------------------------------------- 5613*/ 5614 5615static void ncr_timeout (struct ncb *np) 5616{ 5617 u_long thistime = jiffies; 5618 5619 /* 5620 ** If release process in progress, let's go 5621 ** Set the release stage from 1 to 2 to synchronize 5622 ** with the release process. 5623 */ 5624 5625 if (np->release_stage) { 5626 if (np->release_stage == 1) np->release_stage = 2; 5627 return; 5628 } 5629 5630 np->timer.expires = jiffies + SCSI_NCR_TIMER_INTERVAL; 5631 add_timer(&np->timer); 5632 5633 /* 5634 ** If we are resetting the ncr, wait for settle_time before 5635 ** clearing it. Then command processing will be resumed. 5636 */ 5637 if (np->settle_time) { 5638 if (np->settle_time <= thistime) { 5639 if (bootverbose > 1) 5640 printk("%s: command processing resumed\n", ncr_name(np)); 5641 np->settle_time = 0; 5642 np->disc = 1; 5643 requeue_waiting_list(np); 5644 } 5645 return; 5646 } 5647 5648 /* 5649 ** Since the generic scsi driver only allows us 0.5 second 5650 ** to perform abort of a command, we must look at ccbs about 5651 ** every 0.25 second. 5652 */ 5653 if (np->lasttime + 4*HZ < thistime) { 5654 /* 5655 ** block ncr interrupts 5656 */ 5657 np->lasttime = thistime; 5658 } 5659 5660#ifdef SCSI_NCR_BROKEN_INTR 5661 if (INB(nc_istat) & (INTF|SIP|DIP)) { 5662 5663 /* 5664 ** Process pending interrupts. 5665 */ 5666 if (DEBUG_FLAGS & DEBUG_TINY) printk ("{"); 5667 ncr_exception (np); 5668 if (DEBUG_FLAGS & DEBUG_TINY) printk ("}"); 5669 } 5670#endif /* SCSI_NCR_BROKEN_INTR */ 5671} 5672 5673/*========================================================== 5674** 5675** log message for real hard errors 5676** 5677** "ncr0 targ 0?: ERROR (ds:si) (so-si-sd) (sxfer/scntl3) @ name (dsp:dbc)." 5678** " reg: r0 r1 r2 r3 r4 r5 r6 ..... rf." 5679** 5680** exception register: 5681** ds: dstat 5682** si: sist 5683** 5684** SCSI bus lines: 5685** so: control lines as driver by NCR. 5686** si: control lines as seen by NCR. 5687** sd: scsi data lines as seen by NCR. 5688** 5689** wide/fastmode: 5690** sxfer: (see the manual) 5691** scntl3: (see the manual) 5692** 5693** current script command: 5694** dsp: script address (relative to start of script). 5695** dbc: first word of script command. 5696** 5697** First 16 register of the chip: 5698** r0..rf 5699** 5700**========================================================== 5701*/ 5702 5703static void ncr_log_hard_error(struct ncb *np, u16 sist, u_char dstat) 5704{ 5705 u32 dsp; 5706 int script_ofs; 5707 int script_size; 5708 char *script_name; 5709 u_char *script_base; 5710 int i; 5711 5712 dsp = INL (nc_dsp); 5713 5714 if (dsp > np->p_script && dsp <= np->p_script + sizeof(struct script)) { 5715 script_ofs = dsp - np->p_script; 5716 script_size = sizeof(struct script); 5717 script_base = (u_char *) np->script0; 5718 script_name = "script"; 5719 } 5720 else if (np->p_scripth < dsp && 5721 dsp <= np->p_scripth + sizeof(struct scripth)) { 5722 script_ofs = dsp - np->p_scripth; 5723 script_size = sizeof(struct scripth); 5724 script_base = (u_char *) np->scripth0; 5725 script_name = "scripth"; 5726 } else { 5727 script_ofs = dsp; 5728 script_size = 0; 5729 script_base = NULL; 5730 script_name = "mem"; 5731 } 5732 5733 printk ("%s:%d: ERROR (%x:%x) (%x-%x-%x) (%x/%x) @ (%s %x:%08x).\n", 5734 ncr_name (np), (unsigned)INB (nc_sdid)&0x0f, dstat, sist, 5735 (unsigned)INB (nc_socl), (unsigned)INB (nc_sbcl), (unsigned)INB (nc_sbdl), 5736 (unsigned)INB (nc_sxfer),(unsigned)INB (nc_scntl3), script_name, script_ofs, 5737 (unsigned)INL (nc_dbc)); 5738 5739 if (((script_ofs & 3) == 0) && 5740 (unsigned)script_ofs < script_size) { 5741 printk ("%s: script cmd = %08x\n", ncr_name(np), 5742 scr_to_cpu((int) *(ncrcmd *)(script_base + script_ofs))); 5743 } 5744 5745 printk ("%s: regdump:", ncr_name(np)); 5746 for (i=0; i<16;i++) 5747 printk (" %02x", (unsigned)INB_OFF(i)); 5748 printk (".\n"); 5749} 5750 5751/*============================================================ 5752** 5753** ncr chip exception handler. 5754** 5755**============================================================ 5756** 5757** In normal cases, interrupt conditions occur one at a 5758** time. The ncr is able to stack in some extra registers 5759** other interrupts that will occur after the first one. 5760** But, several interrupts may occur at the same time. 5761** 5762** We probably should only try to deal with the normal 5763** case, but it seems that multiple interrupts occur in 5764** some cases that are not abnormal at all. 5765** 5766** The most frequent interrupt condition is Phase Mismatch. 5767** We should want to service this interrupt quickly. 5768** A SCSI parity error may be delivered at the same time. 5769** The SIR interrupt is not very frequent in this driver, 5770** since the INTFLY is likely used for command completion 5771** signaling. 5772** The Selection Timeout interrupt may be triggered with 5773** IID and/or UDC. 5774** The SBMC interrupt (SCSI Bus Mode Change) may probably 5775** occur at any time. 5776** 5777** This handler try to deal as cleverly as possible with all 5778** the above. 5779** 5780**============================================================ 5781*/ 5782 5783void ncr_exception (struct ncb *np) 5784{ 5785 u_char istat, dstat; 5786 u16 sist; 5787 int i; 5788 5789 /* 5790 ** interrupt on the fly ? 5791 ** Since the global header may be copied back to a CCB 5792 ** using a posted PCI memory write, the last operation on 5793 ** the istat register is a READ in order to flush posted 5794 ** PCI write commands. 5795 */ 5796 istat = INB (nc_istat); 5797 if (istat & INTF) { 5798 OUTB (nc_istat, (istat & SIGP) | INTF); 5799 istat = INB (nc_istat); 5800 if (DEBUG_FLAGS & DEBUG_TINY) printk ("F "); 5801 ncr_wakeup_done (np); 5802 } 5803 5804 if (!(istat & (SIP|DIP))) 5805 return; 5806 5807 if (istat & CABRT) 5808 OUTB (nc_istat, CABRT); 5809 5810 /* 5811 ** Steinbach's Guideline for Systems Programming: 5812 ** Never test for an error condition you don't know how to handle. 5813 */ 5814 5815 sist = (istat & SIP) ? INW (nc_sist) : 0; 5816 dstat = (istat & DIP) ? INB (nc_dstat) : 0; 5817 5818 if (DEBUG_FLAGS & DEBUG_TINY) 5819 printk ("<%d|%x:%x|%x:%x>", 5820 (int)INB(nc_scr0), 5821 dstat,sist, 5822 (unsigned)INL(nc_dsp), 5823 (unsigned)INL(nc_dbc)); 5824 5825 /*======================================================== 5826 ** First, interrupts we want to service cleanly. 5827 ** 5828 ** Phase mismatch is the most frequent interrupt, and 5829 ** so we have to service it as quickly and as cleanly 5830 ** as possible. 5831 ** Programmed interrupts are rarely used in this driver, 5832 ** but we must handle them cleanly anyway. 5833 ** We try to deal with PAR and SBMC combined with 5834 ** some other interrupt(s). 5835 **========================================================= 5836 */ 5837 5838 if (!(sist & (STO|GEN|HTH|SGE|UDC|RST)) && 5839 !(dstat & (MDPE|BF|ABRT|IID))) { 5840 if ((sist & SBMC) && ncr_int_sbmc (np)) 5841 return; 5842 if ((sist & PAR) && ncr_int_par (np)) 5843 return; 5844 if (sist & MA) { 5845 ncr_int_ma (np); 5846 return; 5847 } 5848 if (dstat & SIR) { 5849 ncr_int_sir (np); 5850 return; 5851 } 5852 /* 5853 ** DEL 397 - 53C875 Rev 3 - Part Number 609-0392410 - ITEM 2. 5854 */ 5855 if (!(sist & (SBMC|PAR)) && !(dstat & SSI)) { 5856 printk( "%s: unknown interrupt(s) ignored, " 5857 "ISTAT=%x DSTAT=%x SIST=%x\n", 5858 ncr_name(np), istat, dstat, sist); 5859 return; 5860 } 5861 OUTONB_STD (); 5862 return; 5863 } 5864 5865 /*======================================================== 5866 ** Now, interrupts that need some fixing up. 5867 ** Order and multiple interrupts is so less important. 5868 ** 5869 ** If SRST has been asserted, we just reset the chip. 5870 ** 5871 ** Selection is intirely handled by the chip. If the 5872 ** chip says STO, we trust it. Seems some other 5873 ** interrupts may occur at the same time (UDC, IID), so 5874 ** we ignore them. In any case we do enough fix-up 5875 ** in the service routine. 5876 ** We just exclude some fatal dma errors. 5877 **========================================================= 5878 */ 5879 5880 if (sist & RST) { 5881 ncr_init (np, 1, bootverbose ? "scsi reset" : NULL, HS_RESET); 5882 return; 5883 } 5884 5885 if ((sist & STO) && 5886 !(dstat & (MDPE|BF|ABRT))) { 5887 /* 5888 ** DEL 397 - 53C875 Rev 3 - Part Number 609-0392410 - ITEM 1. 5889 */ 5890 OUTONB (nc_ctest3, CLF); 5891 5892 ncr_int_sto (np); 5893 return; 5894 } 5895 5896 /*========================================================= 5897 ** Now, interrupts we are not able to recover cleanly. 5898 ** (At least for the moment). 5899 ** 5900 ** Do the register dump. 5901 ** Log message for real hard errors. 5902 ** Clear all fifos. 5903 ** For MDPE, BF, ABORT, IID, SGE and HTH we reset the 5904 ** BUS and the chip. 5905 ** We are more soft for UDC. 5906 **========================================================= 5907 */ 5908 5909 if (time_after(jiffies, np->regtime)) { 5910 np->regtime = jiffies + 10*HZ; 5911 for (i = 0; i<sizeof(np->regdump); i++) 5912 ((char*)&np->regdump)[i] = INB_OFF(i); 5913 np->regdump.nc_dstat = dstat; 5914 np->regdump.nc_sist = sist; 5915 } 5916 5917 ncr_log_hard_error(np, sist, dstat); 5918 5919 printk ("%s: have to clear fifos.\n", ncr_name (np)); 5920 OUTB (nc_stest3, TE|CSF); 5921 OUTONB (nc_ctest3, CLF); 5922 5923 if ((sist & (SGE)) || 5924 (dstat & (MDPE|BF|ABRT|IID))) { 5925 ncr_start_reset(np); 5926 return; 5927 } 5928 5929 if (sist & HTH) { 5930 printk ("%s: handshake timeout\n", ncr_name(np)); 5931 ncr_start_reset(np); 5932 return; 5933 } 5934 5935 if (sist & UDC) { 5936 printk ("%s: unexpected disconnect\n", ncr_name(np)); 5937 OUTB (HS_PRT, HS_UNEXPECTED); 5938 OUTL_DSP (NCB_SCRIPT_PHYS (np, cleanup)); 5939 return; 5940 } 5941 5942 /*========================================================= 5943 ** We just miss the cause of the interrupt. :( 5944 ** Print a message. The timeout will do the real work. 5945 **========================================================= 5946 */ 5947 printk ("%s: unknown interrupt\n", ncr_name(np)); 5948} 5949 5950/*========================================================== 5951** 5952** ncr chip exception handler for selection timeout 5953** 5954**========================================================== 5955** 5956** There seems to be a bug in the 53c810. 5957** Although a STO-Interrupt is pending, 5958** it continues executing script commands. 5959** But it will fail and interrupt (IID) on 5960** the next instruction where it's looking 5961** for a valid phase. 5962** 5963**---------------------------------------------------------- 5964*/ 5965 5966void ncr_int_sto (struct ncb *np) 5967{ 5968 u_long dsa; 5969 struct ccb *cp; 5970 if (DEBUG_FLAGS & DEBUG_TINY) printk ("T"); 5971 5972 /* 5973 ** look for ccb and set the status. 5974 */ 5975 5976 dsa = INL (nc_dsa); 5977 cp = np->ccb; 5978 while (cp && (CCB_PHYS (cp, phys) != dsa)) 5979 cp = cp->link_ccb; 5980 5981 if (cp) { 5982 cp-> host_status = HS_SEL_TIMEOUT; 5983 ncr_complete (np, cp); 5984 } 5985 5986 /* 5987 ** repair start queue and jump to start point. 5988 */ 5989 5990 OUTL_DSP (NCB_SCRIPTH_PHYS (np, sto_restart)); 5991 return; 5992} 5993 5994/*========================================================== 5995** 5996** ncr chip exception handler for SCSI bus mode change 5997** 5998**========================================================== 5999** 6000** spi2-r12 11.2.3 says a transceiver mode change must 6001** generate a reset event and a device that detects a reset 6002** event shall initiate a hard reset. It says also that a 6003** device that detects a mode change shall set data transfer 6004** mode to eight bit asynchronous, etc... 6005** So, just resetting should be enough. 6006** 6007** 6008**---------------------------------------------------------- 6009*/ 6010 6011static int ncr_int_sbmc (struct ncb *np) 6012{ 6013 u_char scsi_mode = INB (nc_stest4) & SMODE; 6014 6015 if (scsi_mode != np->scsi_mode) { 6016 printk("%s: SCSI bus mode change from %x to %x.\n", 6017 ncr_name(np), np->scsi_mode, scsi_mode); 6018 6019 np->scsi_mode = scsi_mode; 6020 6021 6022 /* 6023 ** Suspend command processing for 1 second and 6024 ** reinitialize all except the chip. 6025 */ 6026 np->settle_time = jiffies + HZ; 6027 ncr_init (np, 0, bootverbose ? "scsi mode change" : NULL, HS_RESET); 6028 return 1; 6029 } 6030 return 0; 6031} 6032 6033/*========================================================== 6034** 6035** ncr chip exception handler for SCSI parity error. 6036** 6037**========================================================== 6038** 6039** 6040**---------------------------------------------------------- 6041*/ 6042 6043static int ncr_int_par (struct ncb *np) 6044{ 6045 u_char hsts = INB (HS_PRT); 6046 u32 dbc = INL (nc_dbc); 6047 u_char sstat1 = INB (nc_sstat1); 6048 int phase = -1; 6049 int msg = -1; 6050 u32 jmp; 6051 6052 printk("%s: SCSI parity error detected: SCR1=%d DBC=%x SSTAT1=%x\n", 6053 ncr_name(np), hsts, dbc, sstat1); 6054 6055 /* 6056 * Ignore the interrupt if the NCR is not connected 6057 * to the SCSI bus, since the right work should have 6058 * been done on unexpected disconnection handling. 6059 */ 6060 if (!(INB (nc_scntl1) & ISCON)) 6061 return 0; 6062 6063 /* 6064 * If the nexus is not clearly identified, reset the bus. 6065 * We will try to do better later. 6066 */ 6067 if (hsts & HS_INVALMASK) 6068 goto reset_all; 6069 6070 /* 6071 * If the SCSI parity error occurs in MSG IN phase, prepare a 6072 * MSG PARITY message. Otherwise, prepare a INITIATOR DETECTED 6073 * ERROR message and let the device decide to retry the command 6074 * or to terminate with check condition. If we were in MSG IN 6075 * phase waiting for the response of a negotiation, we will 6076 * get SIR_NEGO_FAILED at dispatch. 6077 */ 6078 if (!(dbc & 0xc0000000)) 6079 phase = (dbc >> 24) & 7; 6080 if (phase == 7) 6081 msg = MSG_PARITY_ERROR; 6082 else 6083 msg = INITIATOR_ERROR; 6084 6085 6086 /* 6087 * If the NCR stopped on a MOVE ^ DATA_IN, we jump to a 6088 * script that will ignore all data in bytes until phase 6089 * change, since we are not sure the chip will wait the phase 6090 * change prior to delivering the interrupt. 6091 */ 6092 if (phase == 1) 6093 jmp = NCB_SCRIPTH_PHYS (np, par_err_data_in); 6094 else 6095 jmp = NCB_SCRIPTH_PHYS (np, par_err_other); 6096 6097 OUTONB (nc_ctest3, CLF ); /* clear dma fifo */ 6098 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */ 6099 6100 np->msgout[0] = msg; 6101 OUTL_DSP (jmp); 6102 return 1; 6103 6104reset_all: 6105 ncr_start_reset(np); 6106 return 1; 6107} 6108 6109/*========================================================== 6110** 6111** 6112** ncr chip exception handler for phase errors. 6113** 6114** 6115**========================================================== 6116** 6117** We have to construct a new transfer descriptor, 6118** to transfer the rest of the current block. 6119** 6120**---------------------------------------------------------- 6121*/ 6122 6123static void ncr_int_ma (struct ncb *np) 6124{ 6125 u32 dbc; 6126 u32 rest; 6127 u32 dsp; 6128 u32 dsa; 6129 u32 nxtdsp; 6130 u32 newtmp; 6131 u32 *vdsp; 6132 u32 oadr, olen; 6133 u32 *tblp; 6134 ncrcmd *newcmd; 6135 u_char cmd, sbcl; 6136 struct ccb *cp; 6137 6138 dsp = INL (nc_dsp); 6139 dbc = INL (nc_dbc); 6140 sbcl = INB (nc_sbcl); 6141 6142 cmd = dbc >> 24; 6143 rest = dbc & 0xffffff; 6144 6145 /* 6146 ** Take into account dma fifo and various buffers and latches, 6147 ** only if the interrupted phase is an OUTPUT phase. 6148 */ 6149 6150 if ((cmd & 1) == 0) { 6151 u_char ctest5, ss0, ss2; 6152 u16 delta; 6153 6154 ctest5 = (np->rv_ctest5 & DFS) ? INB (nc_ctest5) : 0; 6155 if (ctest5 & DFS) 6156 delta=(((ctest5 << 8) | (INB (nc_dfifo) & 0xff)) - rest) & 0x3ff; 6157 else 6158 delta=(INB (nc_dfifo) - rest) & 0x7f; 6159 6160 /* 6161 ** The data in the dma fifo has not been transferred to 6162 ** the target -> add the amount to the rest 6163 ** and clear the data. 6164 ** Check the sstat2 register in case of wide transfer. 6165 */ 6166 6167 rest += delta; 6168 ss0 = INB (nc_sstat0); 6169 if (ss0 & OLF) rest++; 6170 if (ss0 & ORF) rest++; 6171 if (INB(nc_scntl3) & EWS) { 6172 ss2 = INB (nc_sstat2); 6173 if (ss2 & OLF1) rest++; 6174 if (ss2 & ORF1) rest++; 6175 } 6176 6177 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_PHASE)) 6178 printk ("P%x%x RL=%d D=%d SS0=%x ", cmd&7, sbcl&7, 6179 (unsigned) rest, (unsigned) delta, ss0); 6180 6181 } else { 6182 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_PHASE)) 6183 printk ("P%x%x RL=%d ", cmd&7, sbcl&7, rest); 6184 } 6185 6186 /* 6187 ** Clear fifos. 6188 */ 6189 OUTONB (nc_ctest3, CLF ); /* clear dma fifo */ 6190 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */ 6191 6192 /* 6193 ** locate matching cp. 6194 ** if the interrupted phase is DATA IN or DATA OUT, 6195 ** trust the global header. 6196 */ 6197 dsa = INL (nc_dsa); 6198 if (!(cmd & 6)) { 6199 cp = np->header.cp; 6200 if (CCB_PHYS(cp, phys) != dsa) 6201 cp = NULL; 6202 } else { 6203 cp = np->ccb; 6204 while (cp && (CCB_PHYS (cp, phys) != dsa)) 6205 cp = cp->link_ccb; 6206 } 6207 6208 /* 6209 ** try to find the interrupted script command, 6210 ** and the address at which to continue. 6211 */ 6212 vdsp = NULL; 6213 nxtdsp = 0; 6214 if (dsp > np->p_script && 6215 dsp <= np->p_script + sizeof(struct script)) { 6216 vdsp = (u32 *)((char*)np->script0 + (dsp-np->p_script-8)); 6217 nxtdsp = dsp; 6218 } 6219 else if (dsp > np->p_scripth && 6220 dsp <= np->p_scripth + sizeof(struct scripth)) { 6221 vdsp = (u32 *)((char*)np->scripth0 + (dsp-np->p_scripth-8)); 6222 nxtdsp = dsp; 6223 } 6224 else if (cp) { 6225 if (dsp == CCB_PHYS (cp, patch[2])) { 6226 vdsp = &cp->patch[0]; 6227 nxtdsp = scr_to_cpu(vdsp[3]); 6228 } 6229 else if (dsp == CCB_PHYS (cp, patch[6])) { 6230 vdsp = &cp->patch[4]; 6231 nxtdsp = scr_to_cpu(vdsp[3]); 6232 } 6233 } 6234 6235 /* 6236 ** log the information 6237 */ 6238 6239 if (DEBUG_FLAGS & DEBUG_PHASE) { 6240 printk ("\nCP=%p CP2=%p DSP=%x NXT=%x VDSP=%p CMD=%x ", 6241 cp, np->header.cp, 6242 (unsigned)dsp, 6243 (unsigned)nxtdsp, vdsp, cmd); 6244 } 6245 6246 /* 6247 ** cp=0 means that the DSA does not point to a valid control 6248 ** block. This should not happen since we donnot use multi-byte 6249 ** move while we are being reselected ot after command complete. 6250 ** We are not able to recover from such a phase error. 6251 */ 6252 if (!cp) { 6253 printk ("%s: SCSI phase error fixup: " 6254 "CCB already dequeued (0x%08lx)\n", 6255 ncr_name (np), (u_long) np->header.cp); 6256 goto reset_all; 6257 } 6258 6259 /* 6260 ** get old startaddress and old length. 6261 */ 6262 6263 oadr = scr_to_cpu(vdsp[1]); 6264 6265 if (cmd & 0x10) { /* Table indirect */ 6266 tblp = (u32 *) ((char*) &cp->phys + oadr); 6267 olen = scr_to_cpu(tblp[0]); 6268 oadr = scr_to_cpu(tblp[1]); 6269 } else { 6270 tblp = (u32 *) 0; 6271 olen = scr_to_cpu(vdsp[0]) & 0xffffff; 6272 } 6273 6274 if (DEBUG_FLAGS & DEBUG_PHASE) { 6275 printk ("OCMD=%x\nTBLP=%p OLEN=%x OADR=%x\n", 6276 (unsigned) (scr_to_cpu(vdsp[0]) >> 24), 6277 tblp, 6278 (unsigned) olen, 6279 (unsigned) oadr); 6280 } 6281 6282 /* 6283 ** check cmd against assumed interrupted script command. 6284 */ 6285 6286 if (cmd != (scr_to_cpu(vdsp[0]) >> 24)) { 6287 PRINT_ADDR(cp->cmd, "internal error: cmd=%02x != %02x=(vdsp[0] " 6288 ">> 24)\n", cmd, scr_to_cpu(vdsp[0]) >> 24); 6289 6290 goto reset_all; 6291 } 6292 6293 /* 6294 ** cp != np->header.cp means that the header of the CCB 6295 ** currently being processed has not yet been copied to 6296 ** the global header area. That may happen if the device did 6297 ** not accept all our messages after having been selected. 6298 */ 6299 if (cp != np->header.cp) { 6300 printk ("%s: SCSI phase error fixup: " 6301 "CCB address mismatch (0x%08lx != 0x%08lx)\n", 6302 ncr_name (np), (u_long) cp, (u_long) np->header.cp); 6303 } 6304 6305 /* 6306 ** if old phase not dataphase, leave here. 6307 */ 6308 6309 if (cmd & 0x06) { 6310 PRINT_ADDR(cp->cmd, "phase change %x-%x %d@%08x resid=%d.\n", 6311 cmd&7, sbcl&7, (unsigned)olen, 6312 (unsigned)oadr, (unsigned)rest); 6313 goto unexpected_phase; 6314 } 6315 6316 /* 6317 ** choose the correct patch area. 6318 ** if savep points to one, choose the other. 6319 */ 6320 6321 newcmd = cp->patch; 6322 newtmp = CCB_PHYS (cp, patch); 6323 if (newtmp == scr_to_cpu(cp->phys.header.savep)) { 6324 newcmd = &cp->patch[4]; 6325 newtmp = CCB_PHYS (cp, patch[4]); 6326 } 6327 6328 /* 6329 ** fillin the commands 6330 */ 6331 6332 newcmd[0] = cpu_to_scr(((cmd & 0x0f) << 24) | rest); 6333 newcmd[1] = cpu_to_scr(oadr + olen - rest); 6334 newcmd[2] = cpu_to_scr(SCR_JUMP); 6335 newcmd[3] = cpu_to_scr(nxtdsp); 6336 6337 if (DEBUG_FLAGS & DEBUG_PHASE) { 6338 PRINT_ADDR(cp->cmd, "newcmd[%d] %x %x %x %x.\n", 6339 (int) (newcmd - cp->patch), 6340 (unsigned)scr_to_cpu(newcmd[0]), 6341 (unsigned)scr_to_cpu(newcmd[1]), 6342 (unsigned)scr_to_cpu(newcmd[2]), 6343 (unsigned)scr_to_cpu(newcmd[3])); 6344 } 6345 /* 6346 ** fake the return address (to the patch). 6347 ** and restart script processor at dispatcher. 6348 */ 6349 OUTL (nc_temp, newtmp); 6350 OUTL_DSP (NCB_SCRIPT_PHYS (np, dispatch)); 6351 return; 6352 6353 /* 6354 ** Unexpected phase changes that occurs when the current phase 6355 ** is not a DATA IN or DATA OUT phase are due to error conditions. 6356 ** Such event may only happen when the SCRIPTS is using a 6357 ** multibyte SCSI MOVE. 6358 ** 6359 ** Phase change Some possible cause 6360 ** 6361 ** COMMAND --> MSG IN SCSI parity error detected by target. 6362 ** COMMAND --> STATUS Bad command or refused by target. 6363 ** MSG OUT --> MSG IN Message rejected by target. 6364 ** MSG OUT --> COMMAND Bogus target that discards extended 6365 ** negotiation messages. 6366 ** 6367 ** The code below does not care of the new phase and so 6368 ** trusts the target. Why to annoy it ? 6369 ** If the interrupted phase is COMMAND phase, we restart at 6370 ** dispatcher. 6371 ** If a target does not get all the messages after selection, 6372 ** the code assumes blindly that the target discards extended 6373 ** messages and clears the negotiation status. 6374 ** If the target does not want all our response to negotiation, 6375 ** we force a SIR_NEGO_PROTO interrupt (it is a hack that avoids 6376 ** bloat for such a should_not_happen situation). 6377 ** In all other situation, we reset the BUS. 6378 ** Are these assumptions reasonnable ? (Wait and see ...) 6379 */ 6380unexpected_phase: 6381 dsp -= 8; 6382 nxtdsp = 0; 6383 6384 switch (cmd & 7) { 6385 case 2: /* COMMAND phase */ 6386 nxtdsp = NCB_SCRIPT_PHYS (np, dispatch); 6387 break; 6388 case 6: /* MSG OUT phase */ 6389 np->scripth->nxtdsp_go_on[0] = cpu_to_scr(dsp + 8); 6390 if (dsp == NCB_SCRIPT_PHYS (np, send_ident)) { 6391 cp->host_status = HS_BUSY; 6392 nxtdsp = NCB_SCRIPTH_PHYS (np, clratn_go_on); 6393 } 6394 else if (dsp == NCB_SCRIPTH_PHYS (np, send_wdtr) || 6395 dsp == NCB_SCRIPTH_PHYS (np, send_sdtr)) { 6396 nxtdsp = NCB_SCRIPTH_PHYS (np, nego_bad_phase); 6397 } 6398 break; 6399 } 6400 6401 if (nxtdsp) { 6402 OUTL_DSP (nxtdsp); 6403 return; 6404 } 6405 6406reset_all: 6407 ncr_start_reset(np); 6408} 6409 6410 6411static void ncr_sir_to_redo(struct ncb *np, int num, struct ccb *cp) 6412{ 6413 struct scsi_cmnd *cmd = cp->cmd; 6414 struct tcb *tp = &np->target[cmd->device->id]; 6415 struct lcb *lp = tp->lp[cmd->device->lun]; 6416 struct list_head *qp; 6417 struct ccb * cp2; 6418 int disc_cnt = 0; 6419 int busy_cnt = 0; 6420 u32 startp; 6421 u_char s_status = INB (SS_PRT); 6422 6423 /* 6424 ** Let the SCRIPTS processor skip all not yet started CCBs, 6425 ** and count disconnected CCBs. Since the busy queue is in 6426 ** the same order as the chip start queue, disconnected CCBs 6427 ** are before cp and busy ones after. 6428 */ 6429 if (lp) { 6430 qp = lp->busy_ccbq.prev; 6431 while (qp != &lp->busy_ccbq) { 6432 cp2 = list_entry(qp, struct ccb, link_ccbq); 6433 qp = qp->prev; 6434 ++busy_cnt; 6435 if (cp2 == cp) 6436 break; 6437 cp2->start.schedule.l_paddr = 6438 cpu_to_scr(NCB_SCRIPTH_PHYS (np, skip)); 6439 } 6440 lp->held_ccb = cp; /* Requeue when this one completes */ 6441 disc_cnt = lp->queuedccbs - busy_cnt; 6442 } 6443 6444 switch(s_status) { 6445 default: /* Just for safety, should never happen */ 6446 case S_QUEUE_FULL: 6447 /* 6448 ** Decrease number of tags to the number of 6449 ** disconnected commands. 6450 */ 6451 if (!lp) 6452 goto out; 6453 if (bootverbose >= 1) { 6454 PRINT_ADDR(cmd, "QUEUE FULL! %d busy, %d disconnected " 6455 "CCBs\n", busy_cnt, disc_cnt); 6456 } 6457 if (disc_cnt < lp->numtags) { 6458 lp->numtags = disc_cnt > 2 ? disc_cnt : 2; 6459 lp->num_good = 0; 6460 ncr_setup_tags (np, cmd->device); 6461 } 6462 /* 6463 ** Requeue the command to the start queue. 6464 ** If any disconnected commands, 6465 ** Clear SIGP. 6466 ** Jump to reselect. 6467 */ 6468 cp->phys.header.savep = cp->startp; 6469 cp->host_status = HS_BUSY; 6470 cp->scsi_status = S_ILLEGAL; 6471 6472 ncr_put_start_queue(np, cp); 6473 if (disc_cnt) 6474 INB (nc_ctest2); /* Clear SIGP */ 6475 OUTL_DSP (NCB_SCRIPT_PHYS (np, reselect)); 6476 return; 6477 case S_TERMINATED: 6478 case S_CHECK_COND: 6479 /* 6480 ** If we were requesting sense, give up. 6481 */ 6482 if (cp->auto_sense) 6483 goto out; 6484 6485 /* 6486 ** Device returned CHECK CONDITION status. 6487 ** Prepare all needed data strutures for getting 6488 ** sense data. 6489 ** 6490 ** identify message 6491 */ 6492 cp->scsi_smsg2[0] = IDENTIFY(0, cmd->device->lun); 6493 cp->phys.smsg.addr = cpu_to_scr(CCB_PHYS (cp, scsi_smsg2)); 6494 cp->phys.smsg.size = cpu_to_scr(1); 6495 6496 /* 6497 ** sense command 6498 */ 6499 cp->phys.cmd.addr = cpu_to_scr(CCB_PHYS (cp, sensecmd)); 6500 cp->phys.cmd.size = cpu_to_scr(6); 6501 6502 /* 6503 ** patch requested size into sense command 6504 */ 6505 cp->sensecmd[0] = 0x03; 6506 cp->sensecmd[1] = cmd->device->lun << 5; 6507 cp->sensecmd[4] = sizeof(cp->sense_buf); 6508 6509 /* 6510 ** sense data 6511 */ 6512 memset(cp->sense_buf, 0, sizeof(cp->sense_buf)); 6513 cp->phys.sense.addr = cpu_to_scr(CCB_PHYS(cp,sense_buf[0])); 6514 cp->phys.sense.size = cpu_to_scr(sizeof(cp->sense_buf)); 6515 6516 /* 6517 ** requeue the command. 6518 */ 6519 startp = cpu_to_scr(NCB_SCRIPTH_PHYS (np, sdata_in)); 6520 6521 cp->phys.header.savep = startp; 6522 cp->phys.header.goalp = startp + 24; 6523 cp->phys.header.lastp = startp; 6524 cp->phys.header.wgoalp = startp + 24; 6525 cp->phys.header.wlastp = startp; 6526 6527 cp->host_status = HS_BUSY; 6528 cp->scsi_status = S_ILLEGAL; 6529 cp->auto_sense = s_status; 6530 6531 cp->start.schedule.l_paddr = 6532 cpu_to_scr(NCB_SCRIPT_PHYS (np, select)); 6533 6534 /* 6535 ** Select without ATN for quirky devices. 6536 */ 6537 if (cmd->device->select_no_atn) 6538 cp->start.schedule.l_paddr = 6539 cpu_to_scr(NCB_SCRIPTH_PHYS (np, select_no_atn)); 6540 6541 ncr_put_start_queue(np, cp); 6542 6543 OUTL_DSP (NCB_SCRIPT_PHYS (np, start)); 6544 return; 6545 } 6546 6547out: 6548 OUTONB_STD (); 6549 return; 6550} 6551 6552 6553/*========================================================== 6554** 6555** 6556** ncr chip exception handler for programmed interrupts. 6557** 6558** 6559**========================================================== 6560*/ 6561 6562void ncr_int_sir (struct ncb *np) 6563{ 6564 u_char scntl3; 6565 u_char chg, ofs, per, fak, wide; 6566 u_char num = INB (nc_dsps); 6567 struct ccb *cp=NULL; 6568 u_long dsa = INL (nc_dsa); 6569 u_char target = INB (nc_sdid) & 0x0f; 6570 struct tcb *tp = &np->target[target]; 6571 struct scsi_target *starget = tp->starget; 6572 6573 if (DEBUG_FLAGS & DEBUG_TINY) printk ("I#%d", num); 6574 6575 switch (num) { 6576 case SIR_INTFLY: 6577 /* 6578 ** This is used for HP Zalon/53c720 where INTFLY 6579 ** operation is currently broken. 6580 */ 6581 ncr_wakeup_done(np); 6582#ifdef SCSI_NCR_CCB_DONE_SUPPORT 6583 OUTL(nc_dsp, NCB_SCRIPT_PHYS (np, done_end) + 8); 6584#else 6585 OUTL(nc_dsp, NCB_SCRIPT_PHYS (np, start)); 6586#endif 6587 return; 6588 case SIR_RESEL_NO_MSG_IN: 6589 case SIR_RESEL_NO_IDENTIFY: 6590 /* 6591 ** If devices reselecting without sending an IDENTIFY 6592 ** message still exist, this should help. 6593 ** We just assume lun=0, 1 CCB, no tag. 6594 */ 6595 if (tp->lp[0]) { 6596 OUTL_DSP (scr_to_cpu(tp->lp[0]->jump_ccb[0])); 6597 return; 6598 } 6599 case SIR_RESEL_BAD_TARGET: /* Will send a TARGET RESET message */ 6600 case SIR_RESEL_BAD_LUN: /* Will send a TARGET RESET message */ 6601 case SIR_RESEL_BAD_I_T_L_Q: /* Will send an ABORT TAG message */ 6602 case SIR_RESEL_BAD_I_T_L: /* Will send an ABORT message */ 6603 printk ("%s:%d: SIR %d, " 6604 "incorrect nexus identification on reselection\n", 6605 ncr_name (np), target, num); 6606 goto out; 6607 case SIR_DONE_OVERFLOW: 6608 printk ("%s:%d: SIR %d, " 6609 "CCB done queue overflow\n", 6610 ncr_name (np), target, num); 6611 goto out; 6612 case SIR_BAD_STATUS: 6613 cp = np->header.cp; 6614 if (!cp || CCB_PHYS (cp, phys) != dsa) 6615 goto out; 6616 ncr_sir_to_redo(np, num, cp); 6617 return; 6618 default: 6619 /* 6620 ** lookup the ccb 6621 */ 6622 cp = np->ccb; 6623 while (cp && (CCB_PHYS (cp, phys) != dsa)) 6624 cp = cp->link_ccb; 6625 6626 BUG_ON(!cp); 6627 BUG_ON(cp != np->header.cp); 6628 6629 if (!cp || cp != np->header.cp) 6630 goto out; 6631 } 6632 6633 switch (num) { 6634/*----------------------------------------------------------------------------- 6635** 6636** Was Sie schon immer ueber transfermode negotiation wissen wollten ... 6637** ("Everything you've always wanted to know about transfer mode 6638** negotiation") 6639** 6640** We try to negotiate sync and wide transfer only after 6641** a successful inquire command. We look at byte 7 of the 6642** inquire data to determine the capabilities of the target. 6643** 6644** When we try to negotiate, we append the negotiation message 6645** to the identify and (maybe) simple tag message. 6646** The host status field is set to HS_NEGOTIATE to mark this 6647** situation. 6648** 6649** If the target doesn't answer this message immediately 6650** (as required by the standard), the SIR_NEGO_FAIL interrupt 6651** will be raised eventually. 6652** The handler removes the HS_NEGOTIATE status, and sets the 6653** negotiated value to the default (async / nowide). 6654** 6655** If we receive a matching answer immediately, we check it 6656** for validity, and set the values. 6657** 6658** If we receive a Reject message immediately, we assume the 6659** negotiation has failed, and fall back to standard values. 6660** 6661** If we receive a negotiation message while not in HS_NEGOTIATE 6662** state, it's a target initiated negotiation. We prepare a 6663** (hopefully) valid answer, set our parameters, and send back 6664** this answer to the target. 6665** 6666** If the target doesn't fetch the answer (no message out phase), 6667** we assume the negotiation has failed, and fall back to default 6668** settings. 6669** 6670** When we set the values, we adjust them in all ccbs belonging 6671** to this target, in the controller's register, and in the "phys" 6672** field of the controller's struct ncb. 6673** 6674** Possible cases: hs sir msg_in value send goto 6675** We try to negotiate: 6676** -> target doesn't msgin NEG FAIL noop defa. - dispatch 6677** -> target rejected our msg NEG FAIL reject defa. - dispatch 6678** -> target answered (ok) NEG SYNC sdtr set - clrack 6679** -> target answered (!ok) NEG SYNC sdtr defa. REJ--->msg_bad 6680** -> target answered (ok) NEG WIDE wdtr set - clrack 6681** -> target answered (!ok) NEG WIDE wdtr defa. REJ--->msg_bad 6682** -> any other msgin NEG FAIL noop defa. - dispatch 6683** 6684** Target tries to negotiate: 6685** -> incoming message --- SYNC sdtr set SDTR - 6686** -> incoming message --- WIDE wdtr set WDTR - 6687** We sent our answer: 6688** -> target doesn't msgout --- PROTO ? defa. - dispatch 6689** 6690**----------------------------------------------------------------------------- 6691*/ 6692 6693 case SIR_NEGO_FAILED: 6694 /*------------------------------------------------------- 6695 ** 6696 ** Negotiation failed. 6697 ** Target doesn't send an answer message, 6698 ** or target rejected our message. 6699 ** 6700 ** Remove negotiation request. 6701 ** 6702 **------------------------------------------------------- 6703 */ 6704 OUTB (HS_PRT, HS_BUSY); 6705 6706 /* fall through */ 6707 6708 case SIR_NEGO_PROTO: 6709 /*------------------------------------------------------- 6710 ** 6711 ** Negotiation failed. 6712 ** Target doesn't fetch the answer message. 6713 ** 6714 **------------------------------------------------------- 6715 */ 6716 6717 if (DEBUG_FLAGS & DEBUG_NEGO) { 6718 PRINT_ADDR(cp->cmd, "negotiation failed sir=%x " 6719 "status=%x.\n", num, cp->nego_status); 6720 } 6721 6722 /* 6723 ** any error in negotiation: 6724 ** fall back to default mode. 6725 */ 6726 switch (cp->nego_status) { 6727 6728 case NS_SYNC: 6729 spi_period(starget) = 0; 6730 spi_offset(starget) = 0; 6731 ncr_setsync (np, cp, 0, 0xe0); 6732 break; 6733 6734 case NS_WIDE: 6735 spi_width(starget) = 0; 6736 ncr_setwide (np, cp, 0, 0); 6737 break; 6738 6739 } 6740 np->msgin [0] = NOP; 6741 np->msgout[0] = NOP; 6742 cp->nego_status = 0; 6743 break; 6744 6745 case SIR_NEGO_SYNC: 6746 if (DEBUG_FLAGS & DEBUG_NEGO) { 6747 ncr_print_msg(cp, "sync msgin", np->msgin); 6748 } 6749 6750 chg = 0; 6751 per = np->msgin[3]; 6752 ofs = np->msgin[4]; 6753 if (ofs==0) per=255; 6754 6755 /* 6756 ** if target sends SDTR message, 6757 ** it CAN transfer synch. 6758 */ 6759 6760 if (ofs && starget) 6761 spi_support_sync(starget) = 1; 6762 6763 /* 6764 ** check values against driver limits. 6765 */ 6766 6767 if (per < np->minsync) 6768 {chg = 1; per = np->minsync;} 6769 if (per < tp->minsync) 6770 {chg = 1; per = tp->minsync;} 6771 if (ofs > tp->maxoffs) 6772 {chg = 1; ofs = tp->maxoffs;} 6773 6774 /* 6775 ** Check against controller limits. 6776 */ 6777 fak = 7; 6778 scntl3 = 0; 6779 if (ofs != 0) { 6780 ncr_getsync(np, per, &fak, &scntl3); 6781 if (fak > 7) { 6782 chg = 1; 6783 ofs = 0; 6784 } 6785 } 6786 if (ofs == 0) { 6787 fak = 7; 6788 per = 0; 6789 scntl3 = 0; 6790 tp->minsync = 0; 6791 } 6792 6793 if (DEBUG_FLAGS & DEBUG_NEGO) { 6794 PRINT_ADDR(cp->cmd, "sync: per=%d scntl3=0x%x ofs=%d " 6795 "fak=%d chg=%d.\n", per, scntl3, ofs, fak, chg); 6796 } 6797 6798 if (INB (HS_PRT) == HS_NEGOTIATE) { 6799 OUTB (HS_PRT, HS_BUSY); 6800 switch (cp->nego_status) { 6801 6802 case NS_SYNC: 6803 /* This was an answer message */ 6804 if (chg) { 6805 /* Answer wasn't acceptable. */ 6806 spi_period(starget) = 0; 6807 spi_offset(starget) = 0; 6808 ncr_setsync(np, cp, 0, 0xe0); 6809 OUTL_DSP(NCB_SCRIPT_PHYS (np, msg_bad)); 6810 } else { 6811 /* Answer is ok. */ 6812 spi_period(starget) = per; 6813 spi_offset(starget) = ofs; 6814 ncr_setsync(np, cp, scntl3, (fak<<5)|ofs); 6815 OUTL_DSP(NCB_SCRIPT_PHYS (np, clrack)); 6816 } 6817 return; 6818 6819 case NS_WIDE: 6820 spi_width(starget) = 0; 6821 ncr_setwide(np, cp, 0, 0); 6822 break; 6823 } 6824 } 6825 6826 /* 6827 ** It was a request. Set value and 6828 ** prepare an answer message 6829 */ 6830 6831 spi_period(starget) = per; 6832 spi_offset(starget) = ofs; 6833 ncr_setsync(np, cp, scntl3, (fak<<5)|ofs); 6834 6835 spi_populate_sync_msg(np->msgout, per, ofs); 6836 cp->nego_status = NS_SYNC; 6837 6838 if (DEBUG_FLAGS & DEBUG_NEGO) { 6839 ncr_print_msg(cp, "sync msgout", np->msgout); 6840 } 6841 6842 if (!ofs) { 6843 OUTL_DSP (NCB_SCRIPT_PHYS (np, msg_bad)); 6844 return; 6845 } 6846 np->msgin [0] = NOP; 6847 6848 break; 6849 6850 case SIR_NEGO_WIDE: 6851 /* 6852 ** Wide request message received. 6853 */ 6854 if (DEBUG_FLAGS & DEBUG_NEGO) { 6855 ncr_print_msg(cp, "wide msgin", np->msgin); 6856 } 6857 6858 /* 6859 ** get requested values. 6860 */ 6861 6862 chg = 0; 6863 wide = np->msgin[3]; 6864 6865 /* 6866 ** if target sends WDTR message, 6867 ** it CAN transfer wide. 6868 */ 6869 6870 if (wide && starget) 6871 spi_support_wide(starget) = 1; 6872 6873 /* 6874 ** check values against driver limits. 6875 */ 6876 6877 if (wide > tp->usrwide) 6878 {chg = 1; wide = tp->usrwide;} 6879 6880 if (DEBUG_FLAGS & DEBUG_NEGO) { 6881 PRINT_ADDR(cp->cmd, "wide: wide=%d chg=%d.\n", wide, 6882 chg); 6883 } 6884 6885 if (INB (HS_PRT) == HS_NEGOTIATE) { 6886 OUTB (HS_PRT, HS_BUSY); 6887 switch (cp->nego_status) { 6888 6889 case NS_WIDE: 6890 /* 6891 ** This was an answer message 6892 */ 6893 if (chg) { 6894 /* Answer wasn't acceptable. */ 6895 spi_width(starget) = 0; 6896 ncr_setwide(np, cp, 0, 1); 6897 OUTL_DSP (NCB_SCRIPT_PHYS (np, msg_bad)); 6898 } else { 6899 /* Answer is ok. */ 6900 spi_width(starget) = wide; 6901 ncr_setwide(np, cp, wide, 1); 6902 OUTL_DSP (NCB_SCRIPT_PHYS (np, clrack)); 6903 } 6904 return; 6905 6906 case NS_SYNC: 6907 spi_period(starget) = 0; 6908 spi_offset(starget) = 0; 6909 ncr_setsync(np, cp, 0, 0xe0); 6910 break; 6911 } 6912 } 6913 6914 /* 6915 ** It was a request, set value and 6916 ** prepare an answer message 6917 */ 6918 6919 spi_width(starget) = wide; 6920 ncr_setwide(np, cp, wide, 1); 6921 spi_populate_width_msg(np->msgout, wide); 6922 6923 np->msgin [0] = NOP; 6924 6925 cp->nego_status = NS_WIDE; 6926 6927 if (DEBUG_FLAGS & DEBUG_NEGO) { 6928 ncr_print_msg(cp, "wide msgout", np->msgin); 6929 } 6930 break; 6931 6932/*-------------------------------------------------------------------- 6933** 6934** Processing of special messages 6935** 6936**-------------------------------------------------------------------- 6937*/ 6938 6939 case SIR_REJECT_RECEIVED: 6940 /*----------------------------------------------- 6941 ** 6942 ** We received a MESSAGE_REJECT. 6943 ** 6944 **----------------------------------------------- 6945 */ 6946 6947 PRINT_ADDR(cp->cmd, "MESSAGE_REJECT received (%x:%x).\n", 6948 (unsigned)scr_to_cpu(np->lastmsg), np->msgout[0]); 6949 break; 6950 6951 case SIR_REJECT_SENT: 6952 /*----------------------------------------------- 6953 ** 6954 ** We received an unknown message 6955 ** 6956 **----------------------------------------------- 6957 */ 6958 6959 ncr_print_msg(cp, "MESSAGE_REJECT sent for", np->msgin); 6960 break; 6961 6962/*-------------------------------------------------------------------- 6963** 6964** Processing of special messages 6965** 6966**-------------------------------------------------------------------- 6967*/ 6968 6969 case SIR_IGN_RESIDUE: 6970 /*----------------------------------------------- 6971 ** 6972 ** We received an IGNORE RESIDUE message, 6973 ** which couldn't be handled by the script. 6974 ** 6975 **----------------------------------------------- 6976 */ 6977 6978 PRINT_ADDR(cp->cmd, "IGNORE_WIDE_RESIDUE received, but not yet " 6979 "implemented.\n"); 6980 break; 6981 } 6982 6983out: 6984 OUTONB_STD (); 6985} 6986 6987/*========================================================== 6988** 6989** 6990** Acquire a control block 6991** 6992** 6993**========================================================== 6994*/ 6995 6996static struct ccb *ncr_get_ccb(struct ncb *np, struct scsi_cmnd *cmd) 6997{ 6998 u_char tn = cmd->device->id; 6999 u_char ln = cmd->device->lun; 7000 struct tcb *tp = &np->target[tn]; 7001 struct lcb *lp = tp->lp[ln]; 7002 u_char tag = NO_TAG; 7003 struct ccb *cp = NULL; 7004 7005 /* 7006 ** Lun structure available ? 7007 */ 7008 if (lp) { 7009 struct list_head *qp; 7010 /* 7011 ** Keep from using more tags than we can handle. 7012 */ 7013 if (lp->usetags && lp->busyccbs >= lp->maxnxs) 7014 return NULL; 7015 7016 /* 7017 ** Allocate a new CCB if needed. 7018 */ 7019 if (list_empty(&lp->free_ccbq)) 7020 ncr_alloc_ccb(np, tn, ln); 7021 7022 /* 7023 ** Look for free CCB 7024 */ 7025 qp = ncr_list_pop(&lp->free_ccbq); 7026 if (qp) { 7027 cp = list_entry(qp, struct ccb, link_ccbq); 7028 if (cp->magic) { 7029 PRINT_ADDR(cmd, "ccb free list corrupted " 7030 "(@%p)\n", cp); 7031 cp = NULL; 7032 } else { 7033 list_add_tail(qp, &lp->wait_ccbq); 7034 ++lp->busyccbs; 7035 } 7036 } 7037 7038 /* 7039 ** If a CCB is available, 7040 ** Get a tag for this nexus if required. 7041 */ 7042 if (cp) { 7043 if (lp->usetags) 7044 tag = lp->cb_tags[lp->ia_tag]; 7045 } 7046 else if (lp->actccbs > 0) 7047 return NULL; 7048 } 7049 7050 /* 7051 ** if nothing available, take the default. 7052 */ 7053 if (!cp) 7054 cp = np->ccb; 7055 7056 /* 7057 ** Wait until available. 7058 */ 7059 7060 if (cp->magic) 7061 return NULL; 7062 7063 cp->magic = 1; 7064 7065 /* 7066 ** Move to next available tag if tag used. 7067 */ 7068 if (lp) { 7069 if (tag != NO_TAG) { 7070 ++lp->ia_tag; 7071 if (lp->ia_tag == MAX_TAGS) 7072 lp->ia_tag = 0; 7073 lp->tags_umap |= (((tagmap_t) 1) << tag); 7074 } 7075 } 7076 7077 /* 7078 ** Remember all informations needed to free this CCB. 7079 */ 7080 cp->tag = tag; 7081 cp->target = tn; 7082 cp->lun = ln; 7083 7084 if (DEBUG_FLAGS & DEBUG_TAGS) { 7085 PRINT_ADDR(cmd, "ccb @%p using tag %d.\n", cp, tag); 7086 } 7087 7088 return cp; 7089} 7090 7091/*========================================================== 7092** 7093** 7094** Release one control block 7095** 7096** 7097**========================================================== 7098*/ 7099 7100static void ncr_free_ccb (struct ncb *np, struct ccb *cp) 7101{ 7102 struct tcb *tp = &np->target[cp->target]; 7103 struct lcb *lp = tp->lp[cp->lun]; 7104 7105 if (DEBUG_FLAGS & DEBUG_TAGS) { 7106 PRINT_ADDR(cp->cmd, "ccb @%p freeing tag %d.\n", cp, cp->tag); 7107 } 7108 7109 /* 7110 ** If lun control block available, 7111 ** decrement active commands and increment credit, 7112 ** free the tag if any and remove the JUMP for reselect. 7113 */ 7114 if (lp) { 7115 if (cp->tag != NO_TAG) { 7116 lp->cb_tags[lp->if_tag++] = cp->tag; 7117 if (lp->if_tag == MAX_TAGS) 7118 lp->if_tag = 0; 7119 lp->tags_umap &= ~(((tagmap_t) 1) << cp->tag); 7120 lp->tags_smap &= lp->tags_umap; 7121 lp->jump_ccb[cp->tag] = 7122 cpu_to_scr(NCB_SCRIPTH_PHYS(np, bad_i_t_l_q)); 7123 } else { 7124 lp->jump_ccb[0] = 7125 cpu_to_scr(NCB_SCRIPTH_PHYS(np, bad_i_t_l)); 7126 } 7127 } 7128 7129 /* 7130 ** Make this CCB available. 7131 */ 7132 7133 if (lp) { 7134 if (cp != np->ccb) 7135 list_move(&cp->link_ccbq, &lp->free_ccbq); 7136 --lp->busyccbs; 7137 if (cp->queued) { 7138 --lp->queuedccbs; 7139 } 7140 } 7141 cp -> host_status = HS_IDLE; 7142 cp -> magic = 0; 7143 if (cp->queued) { 7144 --np->queuedccbs; 7145 cp->queued = 0; 7146 } 7147 7148} 7149 7150 7151#define ncr_reg_bus_addr(r) (np->paddr + offsetof (struct ncr_reg, r)) 7152 7153/*------------------------------------------------------------------------ 7154** Initialize the fixed part of a CCB structure. 7155**------------------------------------------------------------------------ 7156**------------------------------------------------------------------------ 7157*/ 7158static void ncr_init_ccb(struct ncb *np, struct ccb *cp) 7159{ 7160 ncrcmd copy_4 = np->features & FE_PFEN ? SCR_COPY(4) : SCR_COPY_F(4); 7161 7162 /* 7163 ** Remember virtual and bus address of this ccb. 7164 */ 7165 cp->p_ccb = vtobus(cp); 7166 cp->phys.header.cp = cp; 7167 7168 /* 7169 ** This allows list_del to work for the default ccb. 7170 */ 7171 INIT_LIST_HEAD(&cp->link_ccbq); 7172 7173 /* 7174 ** Initialyze the start and restart launch script. 7175 ** 7176 ** COPY(4) @(...p_phys), @(dsa) 7177 ** JUMP @(sched_point) 7178 */ 7179 cp->start.setup_dsa[0] = cpu_to_scr(copy_4); 7180 cp->start.setup_dsa[1] = cpu_to_scr(CCB_PHYS(cp, start.p_phys)); 7181 cp->start.setup_dsa[2] = cpu_to_scr(ncr_reg_bus_addr(nc_dsa)); 7182 cp->start.schedule.l_cmd = cpu_to_scr(SCR_JUMP); 7183 cp->start.p_phys = cpu_to_scr(CCB_PHYS(cp, phys)); 7184 7185 memcpy(&cp->restart, &cp->start, sizeof(cp->restart)); 7186 7187 cp->start.schedule.l_paddr = cpu_to_scr(NCB_SCRIPT_PHYS (np, idle)); 7188 cp->restart.schedule.l_paddr = cpu_to_scr(NCB_SCRIPTH_PHYS (np, abort)); 7189} 7190 7191 7192/*------------------------------------------------------------------------ 7193** Allocate a CCB and initialize its fixed part. 7194**------------------------------------------------------------------------ 7195**------------------------------------------------------------------------ 7196*/ 7197static void ncr_alloc_ccb(struct ncb *np, u_char tn, u_char ln) 7198{ 7199 struct tcb *tp = &np->target[tn]; 7200 struct lcb *lp = tp->lp[ln]; 7201 struct ccb *cp = NULL; 7202 7203 /* 7204 ** Allocate memory for this CCB. 7205 */ 7206 cp = m_calloc_dma(sizeof(struct ccb), "CCB"); 7207 if (!cp) 7208 return; 7209 7210 /* 7211 ** Count it and initialyze it. 7212 */ 7213 lp->actccbs++; 7214 np->actccbs++; 7215 memset(cp, 0, sizeof (*cp)); 7216 ncr_init_ccb(np, cp); 7217 7218 /* 7219 ** Chain into wakeup list and free ccb queue and take it 7220 ** into account for tagged commands. 7221 */ 7222 cp->link_ccb = np->ccb->link_ccb; 7223 np->ccb->link_ccb = cp; 7224 7225 list_add(&cp->link_ccbq, &lp->free_ccbq); 7226} 7227 7228/*========================================================== 7229** 7230** 7231** Allocation of resources for Targets/Luns/Tags. 7232** 7233** 7234**========================================================== 7235*/ 7236 7237 7238/*------------------------------------------------------------------------ 7239** Target control block initialisation. 7240**------------------------------------------------------------------------ 7241** This data structure is fully initialized after a SCSI command 7242** has been successfully completed for this target. 7243** It contains a SCRIPT that is called on target reselection. 7244**------------------------------------------------------------------------ 7245*/ 7246static void ncr_init_tcb (struct ncb *np, u_char tn) 7247{ 7248 struct tcb *tp = &np->target[tn]; 7249 ncrcmd copy_1 = np->features & FE_PFEN ? SCR_COPY(1) : SCR_COPY_F(1); 7250 int th = tn & 3; 7251 int i; 7252 7253 /* 7254 ** Jump to next tcb if SFBR does not match this target. 7255 ** JUMP IF (SFBR != #target#), @(next tcb) 7256 */ 7257 tp->jump_tcb.l_cmd = 7258 cpu_to_scr((SCR_JUMP ^ IFFALSE (DATA (0x80 + tn)))); 7259 tp->jump_tcb.l_paddr = np->jump_tcb[th].l_paddr; 7260 7261 /* 7262 ** Load the synchronous transfer register. 7263 ** COPY @(tp->sval), @(sxfer) 7264 */ 7265 tp->getscr[0] = cpu_to_scr(copy_1); 7266 tp->getscr[1] = cpu_to_scr(vtobus (&tp->sval)); 7267#ifdef SCSI_NCR_BIG_ENDIAN 7268 tp->getscr[2] = cpu_to_scr(ncr_reg_bus_addr(nc_sxfer) ^ 3); 7269#else 7270 tp->getscr[2] = cpu_to_scr(ncr_reg_bus_addr(nc_sxfer)); 7271#endif 7272 7273 /* 7274 ** Load the timing register. 7275 ** COPY @(tp->wval), @(scntl3) 7276 */ 7277 tp->getscr[3] = cpu_to_scr(copy_1); 7278 tp->getscr[4] = cpu_to_scr(vtobus (&tp->wval)); 7279#ifdef SCSI_NCR_BIG_ENDIAN 7280 tp->getscr[5] = cpu_to_scr(ncr_reg_bus_addr(nc_scntl3) ^ 3); 7281#else 7282 tp->getscr[5] = cpu_to_scr(ncr_reg_bus_addr(nc_scntl3)); 7283#endif 7284 7285 /* 7286 ** Get the IDENTIFY message and the lun. 7287 ** CALL @script(resel_lun) 7288 */ 7289 tp->call_lun.l_cmd = cpu_to_scr(SCR_CALL); 7290 tp->call_lun.l_paddr = cpu_to_scr(NCB_SCRIPT_PHYS (np, resel_lun)); 7291 7292 /* 7293 ** Look for the lun control block of this nexus. 7294 ** For i = 0 to 3 7295 ** JUMP ^ IFTRUE (MASK (i, 3)), @(next_lcb) 7296 */ 7297 for (i = 0 ; i < 4 ; i++) { 7298 tp->jump_lcb[i].l_cmd = 7299 cpu_to_scr((SCR_JUMP ^ IFTRUE (MASK (i, 3)))); 7300 tp->jump_lcb[i].l_paddr = 7301 cpu_to_scr(NCB_SCRIPTH_PHYS (np, bad_identify)); 7302 } 7303 7304 /* 7305 ** Link this target control block to the JUMP chain. 7306 */ 7307 np->jump_tcb[th].l_paddr = cpu_to_scr(vtobus (&tp->jump_tcb)); 7308 7309 /* 7310 ** These assert's should be moved at driver initialisations. 7311 */ 7312#ifdef SCSI_NCR_BIG_ENDIAN 7313 BUG_ON(((offsetof(struct ncr_reg, nc_sxfer) ^ 7314 offsetof(struct tcb , sval )) &3) != 3); 7315 BUG_ON(((offsetof(struct ncr_reg, nc_scntl3) ^ 7316 offsetof(struct tcb , wval )) &3) != 3); 7317#else 7318 BUG_ON(((offsetof(struct ncr_reg, nc_sxfer) ^ 7319 offsetof(struct tcb , sval )) &3) != 0); 7320 BUG_ON(((offsetof(struct ncr_reg, nc_scntl3) ^ 7321 offsetof(struct tcb , wval )) &3) != 0); 7322#endif 7323} 7324 7325 7326/*------------------------------------------------------------------------ 7327** Lun control block allocation and initialization. 7328**------------------------------------------------------------------------ 7329** This data structure is allocated and initialized after a SCSI 7330** command has been successfully completed for this target/lun. 7331**------------------------------------------------------------------------ 7332*/ 7333static struct lcb *ncr_alloc_lcb (struct ncb *np, u_char tn, u_char ln) 7334{ 7335 struct tcb *tp = &np->target[tn]; 7336 struct lcb *lp = tp->lp[ln]; 7337 ncrcmd copy_4 = np->features & FE_PFEN ? SCR_COPY(4) : SCR_COPY_F(4); 7338 int lh = ln & 3; 7339 7340 /* 7341 ** Already done, return. 7342 */ 7343 if (lp) 7344 return lp; 7345 7346 /* 7347 ** Allocate the lcb. 7348 */ 7349 lp = m_calloc_dma(sizeof(struct lcb), "LCB"); 7350 if (!lp) 7351 goto fail; 7352 memset(lp, 0, sizeof(*lp)); 7353 tp->lp[ln] = lp; 7354 7355 /* 7356 ** Initialize the target control block if not yet. 7357 */ 7358 if (!tp->jump_tcb.l_cmd) 7359 ncr_init_tcb(np, tn); 7360 7361 /* 7362 ** Initialize the CCB queue headers. 7363 */ 7364 INIT_LIST_HEAD(&lp->free_ccbq); 7365 INIT_LIST_HEAD(&lp->busy_ccbq); 7366 INIT_LIST_HEAD(&lp->wait_ccbq); 7367 INIT_LIST_HEAD(&lp->skip_ccbq); 7368 7369 /* 7370 ** Set max CCBs to 1 and use the default 1 entry 7371 ** jump table by default. 7372 */ 7373 lp->maxnxs = 1; 7374 lp->jump_ccb = &lp->jump_ccb_0; 7375 lp->p_jump_ccb = cpu_to_scr(vtobus(lp->jump_ccb)); 7376 7377 /* 7378 ** Initilialyze the reselect script: 7379 ** 7380 ** Jump to next lcb if SFBR does not match this lun. 7381 ** Load TEMP with the CCB direct jump table bus address. 7382 ** Get the SIMPLE TAG message and the tag. 7383 ** 7384 ** JUMP IF (SFBR != #lun#), @(next lcb) 7385 ** COPY @(lp->p_jump_ccb), @(temp) 7386 ** JUMP @script(resel_notag) 7387 */ 7388 lp->jump_lcb.l_cmd = 7389 cpu_to_scr((SCR_JUMP ^ IFFALSE (MASK (0x80+ln, 0xff)))); 7390 lp->jump_lcb.l_paddr = tp->jump_lcb[lh].l_paddr; 7391 7392 lp->load_jump_ccb[0] = cpu_to_scr(copy_4); 7393 lp->load_jump_ccb[1] = cpu_to_scr(vtobus (&lp->p_jump_ccb)); 7394 lp->load_jump_ccb[2] = cpu_to_scr(ncr_reg_bus_addr(nc_temp)); 7395 7396 lp->jump_tag.l_cmd = cpu_to_scr(SCR_JUMP); 7397 lp->jump_tag.l_paddr = cpu_to_scr(NCB_SCRIPT_PHYS (np, resel_notag)); 7398 7399 /* 7400 ** Link this lun control block to the JUMP chain. 7401 */ 7402 tp->jump_lcb[lh].l_paddr = cpu_to_scr(vtobus (&lp->jump_lcb)); 7403 7404 /* 7405 ** Initialize command queuing control. 7406 */ 7407 lp->busyccbs = 1; 7408 lp->queuedccbs = 1; 7409 lp->queuedepth = 1; 7410fail: 7411 return lp; 7412} 7413 7414 7415/*------------------------------------------------------------------------ 7416** Lun control block setup on INQUIRY data received. 7417**------------------------------------------------------------------------ 7418** We only support WIDE, SYNC for targets and CMDQ for logical units. 7419** This setup is done on each INQUIRY since we are expecting user 7420** will play with CHANGE DEFINITION commands. :-) 7421**------------------------------------------------------------------------ 7422*/ 7423static struct lcb *ncr_setup_lcb (struct ncb *np, struct scsi_device *sdev) 7424{ 7425 unsigned char tn = sdev->id, ln = sdev->lun; 7426 struct tcb *tp = &np->target[tn]; 7427 struct lcb *lp = tp->lp[ln]; 7428 7429 /* If no lcb, try to allocate it. */ 7430 if (!lp && !(lp = ncr_alloc_lcb(np, tn, ln))) 7431 goto fail; 7432 7433 /* 7434 ** If unit supports tagged commands, allocate the 7435 ** CCB JUMP table if not yet. 7436 */ 7437 if (sdev->tagged_supported && lp->jump_ccb == &lp->jump_ccb_0) { 7438 int i; 7439 lp->jump_ccb = m_calloc_dma(256, "JUMP_CCB"); 7440 if (!lp->jump_ccb) { 7441 lp->jump_ccb = &lp->jump_ccb_0; 7442 goto fail; 7443 } 7444 lp->p_jump_ccb = cpu_to_scr(vtobus(lp->jump_ccb)); 7445 for (i = 0 ; i < 64 ; i++) 7446 lp->jump_ccb[i] = 7447 cpu_to_scr(NCB_SCRIPTH_PHYS (np, bad_i_t_l_q)); 7448 for (i = 0 ; i < MAX_TAGS ; i++) 7449 lp->cb_tags[i] = i; 7450 lp->maxnxs = MAX_TAGS; 7451 lp->tags_stime = jiffies + 3*HZ; 7452 ncr_setup_tags (np, sdev); 7453 } 7454 7455 7456fail: 7457 return lp; 7458} 7459 7460/*========================================================== 7461** 7462** 7463** Build Scatter Gather Block 7464** 7465** 7466**========================================================== 7467** 7468** The transfer area may be scattered among 7469** several non adjacent physical pages. 7470** 7471** We may use MAX_SCATTER blocks. 7472** 7473**---------------------------------------------------------- 7474*/ 7475 7476/* 7477** We try to reduce the number of interrupts caused 7478** by unexpected phase changes due to disconnects. 7479** A typical harddisk may disconnect before ANY block. 7480** If we wanted to avoid unexpected phase changes at all 7481** we had to use a break point every 512 bytes. 7482** Of course the number of scatter/gather blocks is 7483** limited. 7484** Under Linux, the scatter/gatter blocks are provided by 7485** the generic driver. We just have to copy addresses and 7486** sizes to the data segment array. 7487*/ 7488 7489static int ncr_scatter_no_sglist(struct ncb *np, struct ccb *cp, struct scsi_cmnd *cmd) 7490{ 7491 struct scr_tblmove *data = &cp->phys.data[MAX_SCATTER - 1]; 7492 int segment; 7493 7494 cp->data_len = cmd->request_bufflen; 7495 7496 if (cmd->request_bufflen) { 7497 dma_addr_t baddr = map_scsi_single_data(np, cmd); 7498 if (baddr) { 7499 ncr_build_sge(np, data, baddr, cmd->request_bufflen); 7500 segment = 1; 7501 } else { 7502 segment = -2; 7503 } 7504 } else { 7505 segment = 0; 7506 } 7507 7508 return segment; 7509} 7510 7511static int ncr_scatter(struct ncb *np, struct ccb *cp, struct scsi_cmnd *cmd) 7512{ 7513 int segment = 0; 7514 int use_sg = (int) cmd->use_sg; 7515 7516 cp->data_len = 0; 7517 7518 if (!use_sg) 7519 segment = ncr_scatter_no_sglist(np, cp, cmd); 7520 else if ((use_sg = map_scsi_sg_data(np, cmd)) > 0) { 7521 struct scatterlist *scatter = (struct scatterlist *)cmd->request_buffer; 7522 struct scr_tblmove *data; 7523 7524 if (use_sg > MAX_SCATTER) { 7525 unmap_scsi_data(np, cmd); 7526 return -1; 7527 } 7528 7529 data = &cp->phys.data[MAX_SCATTER - use_sg]; 7530 7531 for (segment = 0; segment < use_sg; segment++) { 7532 dma_addr_t baddr = sg_dma_address(&scatter[segment]); 7533 unsigned int len = sg_dma_len(&scatter[segment]); 7534 7535 ncr_build_sge(np, &data[segment], baddr, len); 7536 cp->data_len += len; 7537 } 7538 } else { 7539 segment = -2; 7540 } 7541 7542 return segment; 7543} 7544 7545/*========================================================== 7546** 7547** 7548** Test the bus snoop logic :-( 7549** 7550** Has to be called with interrupts disabled. 7551** 7552** 7553**========================================================== 7554*/ 7555 7556static int __init ncr_regtest (struct ncb* np) 7557{ 7558 register volatile u32 data; 7559 /* 7560 ** ncr registers may NOT be cached. 7561 ** write 0xffffffff to a read only register area, 7562 ** and try to read it back. 7563 */ 7564 data = 0xffffffff; 7565 OUTL_OFF(offsetof(struct ncr_reg, nc_dstat), data); 7566 data = INL_OFF(offsetof(struct ncr_reg, nc_dstat)); 7567 if (data == 0xffffffff) { 7568 printk ("CACHE TEST FAILED: reg dstat-sstat2 readback %x.\n", 7569 (unsigned) data); 7570 return (0x10); 7571 } 7572 return (0); 7573} 7574 7575static int __init ncr_snooptest (struct ncb* np) 7576{ 7577 u32 ncr_rd, ncr_wr, ncr_bk, host_rd, host_wr, pc; 7578 int i, err=0; 7579 if (np->reg) { 7580 err |= ncr_regtest (np); 7581 if (err) 7582 return (err); 7583 } 7584 7585 /* init */ 7586 pc = NCB_SCRIPTH_PHYS (np, snooptest); 7587 host_wr = 1; 7588 ncr_wr = 2; 7589 /* 7590 ** Set memory and register. 7591 */ 7592 np->ncr_cache = cpu_to_scr(host_wr); 7593 OUTL (nc_temp, ncr_wr); 7594 /* 7595 ** Start script (exchange values) 7596 */ 7597 OUTL_DSP (pc); 7598 /* 7599 ** Wait 'til done (with timeout) 7600 */ 7601 for (i=0; i<NCR_SNOOP_TIMEOUT; i++) 7602 if (INB(nc_istat) & (INTF|SIP|DIP)) 7603 break; 7604 /* 7605 ** Save termination position. 7606 */ 7607 pc = INL (nc_dsp); 7608 /* 7609 ** Read memory and register. 7610 */ 7611 host_rd = scr_to_cpu(np->ncr_cache); 7612 ncr_rd = INL (nc_scratcha); 7613 ncr_bk = INL (nc_temp); 7614 /* 7615 ** Reset ncr chip 7616 */ 7617 ncr_chip_reset(np, 100); 7618 /* 7619 ** check for timeout 7620 */ 7621 if (i>=NCR_SNOOP_TIMEOUT) { 7622 printk ("CACHE TEST FAILED: timeout.\n"); 7623 return (0x20); 7624 } 7625 /* 7626 ** Check termination position. 7627 */ 7628 if (pc != NCB_SCRIPTH_PHYS (np, snoopend)+8) { 7629 printk ("CACHE TEST FAILED: script execution failed.\n"); 7630 printk ("start=%08lx, pc=%08lx, end=%08lx\n", 7631 (u_long) NCB_SCRIPTH_PHYS (np, snooptest), (u_long) pc, 7632 (u_long) NCB_SCRIPTH_PHYS (np, snoopend) +8); 7633 return (0x40); 7634 } 7635 /* 7636 ** Show results. 7637 */ 7638 if (host_wr != ncr_rd) { 7639 printk ("CACHE TEST FAILED: host wrote %d, ncr read %d.\n", 7640 (int) host_wr, (int) ncr_rd); 7641 err |= 1; 7642 } 7643 if (host_rd != ncr_wr) { 7644 printk ("CACHE TEST FAILED: ncr wrote %d, host read %d.\n", 7645 (int) ncr_wr, (int) host_rd); 7646 err |= 2; 7647 } 7648 if (ncr_bk != ncr_wr) { 7649 printk ("CACHE TEST FAILED: ncr wrote %d, read back %d.\n", 7650 (int) ncr_wr, (int) ncr_bk); 7651 err |= 4; 7652 } 7653 return (err); 7654} 7655 7656/*========================================================== 7657** 7658** Determine the ncr's clock frequency. 7659** This is essential for the negotiation 7660** of the synchronous transfer rate. 7661** 7662**========================================================== 7663** 7664** Note: we have to return the correct value. 7665** THERE IS NO SAFE DEFAULT VALUE. 7666** 7667** Most NCR/SYMBIOS boards are delivered with a 40 Mhz clock. 7668** 53C860 and 53C875 rev. 1 support fast20 transfers but 7669** do not have a clock doubler and so are provided with a 7670** 80 MHz clock. All other fast20 boards incorporate a doubler 7671** and so should be delivered with a 40 MHz clock. 7672** The future fast40 chips (895/895) use a 40 Mhz base clock 7673** and provide a clock quadrupler (160 Mhz). The code below 7674** tries to deal as cleverly as possible with all this stuff. 7675** 7676**---------------------------------------------------------- 7677*/ 7678 7679/* 7680 * Select NCR SCSI clock frequency 7681 */ 7682static void ncr_selectclock(struct ncb *np, u_char scntl3) 7683{ 7684 if (np->multiplier < 2) { 7685 OUTB(nc_scntl3, scntl3); 7686 return; 7687 } 7688 7689 if (bootverbose >= 2) 7690 printk ("%s: enabling clock multiplier\n", ncr_name(np)); 7691 7692 OUTB(nc_stest1, DBLEN); /* Enable clock multiplier */ 7693 if (np->multiplier > 2) { /* Poll bit 5 of stest4 for quadrupler */ 7694 int i = 20; 7695 while (!(INB(nc_stest4) & LCKFRQ) && --i > 0) 7696 udelay(20); 7697 if (!i) 7698 printk("%s: the chip cannot lock the frequency\n", ncr_name(np)); 7699 } else /* Wait 20 micro-seconds for doubler */ 7700 udelay(20); 7701 OUTB(nc_stest3, HSC); /* Halt the scsi clock */ 7702 OUTB(nc_scntl3, scntl3); 7703 OUTB(nc_stest1, (DBLEN|DBLSEL));/* Select clock multiplier */ 7704 OUTB(nc_stest3, 0x00); /* Restart scsi clock */ 7705} 7706 7707 7708/* 7709 * calculate NCR SCSI clock frequency (in KHz) 7710 */ 7711static unsigned __init ncrgetfreq (struct ncb *np, int gen) 7712{ 7713 unsigned ms = 0; 7714 char count = 0; 7715 7716 /* 7717 * Measure GEN timer delay in order 7718 * to calculate SCSI clock frequency 7719 * 7720 * This code will never execute too 7721 * many loop iterations (if DELAY is 7722 * reasonably correct). It could get 7723 * too low a delay (too high a freq.) 7724 * if the CPU is slow executing the 7725 * loop for some reason (an NMI, for 7726 * example). For this reason we will 7727 * if multiple measurements are to be 7728 * performed trust the higher delay 7729 * (lower frequency returned). 7730 */ 7731 OUTB (nc_stest1, 0); /* make sure clock doubler is OFF */ 7732 OUTW (nc_sien , 0); /* mask all scsi interrupts */ 7733 (void) INW (nc_sist); /* clear pending scsi interrupt */ 7734 OUTB (nc_dien , 0); /* mask all dma interrupts */ 7735 (void) INW (nc_sist); /* another one, just to be sure :) */ 7736 OUTB (nc_scntl3, 4); /* set pre-scaler to divide by 3 */ 7737 OUTB (nc_stime1, 0); /* disable general purpose timer */ 7738 OUTB (nc_stime1, gen); /* set to nominal delay of 1<<gen * 125us */ 7739 while (!(INW(nc_sist) & GEN) && ms++ < 100000) { 7740 for (count = 0; count < 10; count ++) 7741 udelay(100); /* count ms */ 7742 } 7743 OUTB (nc_stime1, 0); /* disable general purpose timer */ 7744 /* 7745 * set prescaler to divide by whatever 0 means 7746 * 0 ought to choose divide by 2, but appears 7747 * to set divide by 3.5 mode in my 53c810 ... 7748 */ 7749 OUTB (nc_scntl3, 0); 7750 7751 if (bootverbose >= 2) 7752 printk ("%s: Delay (GEN=%d): %u msec\n", ncr_name(np), gen, ms); 7753 /* 7754 * adjust for prescaler, and convert into KHz 7755 */ 7756 return ms ? ((1 << gen) * 4340) / ms : 0; 7757} 7758 7759/* 7760 * Get/probe NCR SCSI clock frequency 7761 */ 7762static void __init ncr_getclock (struct ncb *np, int mult) 7763{ 7764 unsigned char scntl3 = INB(nc_scntl3); 7765 unsigned char stest1 = INB(nc_stest1); 7766 unsigned f1; 7767 7768 np->multiplier = 1; 7769 f1 = 40000; 7770 7771 /* 7772 ** True with 875 or 895 with clock multiplier selected 7773 */ 7774 if (mult > 1 && (stest1 & (DBLEN+DBLSEL)) == DBLEN+DBLSEL) { 7775 if (bootverbose >= 2) 7776 printk ("%s: clock multiplier found\n", ncr_name(np)); 7777 np->multiplier = mult; 7778 } 7779 7780 /* 7781 ** If multiplier not found or scntl3 not 7,5,3, 7782 ** reset chip and get frequency from general purpose timer. 7783 ** Otherwise trust scntl3 BIOS setting. 7784 */ 7785 if (np->multiplier != mult || (scntl3 & 7) < 3 || !(scntl3 & 1)) { 7786 unsigned f2; 7787 7788 ncr_chip_reset(np, 5); 7789 7790 (void) ncrgetfreq (np, 11); /* throw away first result */ 7791 f1 = ncrgetfreq (np, 11); 7792 f2 = ncrgetfreq (np, 11); 7793 7794 if(bootverbose) 7795 printk ("%s: NCR clock is %uKHz, %uKHz\n", ncr_name(np), f1, f2); 7796 7797 if (f1 > f2) f1 = f2; /* trust lower result */ 7798 7799 if (f1 < 45000) f1 = 40000; 7800 else if (f1 < 55000) f1 = 50000; 7801 else f1 = 80000; 7802 7803 if (f1 < 80000 && mult > 1) { 7804 if (bootverbose >= 2) 7805 printk ("%s: clock multiplier assumed\n", ncr_name(np)); 7806 np->multiplier = mult; 7807 } 7808 } else { 7809 if ((scntl3 & 7) == 3) f1 = 40000; 7810 else if ((scntl3 & 7) == 5) f1 = 80000; 7811 else f1 = 160000; 7812 7813 f1 /= np->multiplier; 7814 } 7815 7816 /* 7817 ** Compute controller synchronous parameters. 7818 */ 7819 f1 *= np->multiplier; 7820 np->clock_khz = f1; 7821} 7822 7823/*===================== LINUX ENTRY POINTS SECTION ==========================*/ 7824 7825static int ncr53c8xx_slave_alloc(struct scsi_device *device) 7826{ 7827 struct Scsi_Host *host = device->host; 7828 struct ncb *np = ((struct host_data *) host->hostdata)->ncb; 7829 struct tcb *tp = &np->target[device->id]; 7830 tp->starget = device->sdev_target; 7831 7832 return 0; 7833} 7834 7835static int ncr53c8xx_slave_configure(struct scsi_device *device) 7836{ 7837 struct Scsi_Host *host = device->host; 7838 struct ncb *np = ((struct host_data *) host->hostdata)->ncb; 7839 struct tcb *tp = &np->target[device->id]; 7840 struct lcb *lp = tp->lp[device->lun]; 7841 int numtags, depth_to_use; 7842 7843 ncr_setup_lcb(np, device); 7844 7845 /* 7846 ** Select queue depth from driver setup. 7847 ** Donnot use more than configured by user. 7848 ** Use at least 2. 7849 ** Donnot use more than our maximum. 7850 */ 7851 numtags = device_queue_depth(np->unit, device->id, device->lun); 7852 if (numtags > tp->usrtags) 7853 numtags = tp->usrtags; 7854 if (!device->tagged_supported) 7855 numtags = 1; 7856 depth_to_use = numtags; 7857 if (depth_to_use < 2) 7858 depth_to_use = 2; 7859 if (depth_to_use > MAX_TAGS) 7860 depth_to_use = MAX_TAGS; 7861 7862 scsi_adjust_queue_depth(device, 7863 (device->tagged_supported ? 7864 MSG_SIMPLE_TAG : 0), 7865 depth_to_use); 7866 7867 if (lp) { 7868 lp->numtags = lp->maxtags = numtags; 7869 lp->scdev_depth = depth_to_use; 7870 } 7871 ncr_setup_tags (np, device); 7872 7873#ifdef DEBUG_NCR53C8XX 7874 printk("ncr53c8xx_select_queue_depth: host=%d, id=%d, lun=%d, depth=%d\n", 7875 np->unit, device->id, device->lun, depth_to_use); 7876#endif 7877 7878 if (spi_support_sync(device->sdev_target) && 7879 !spi_initial_dv(device->sdev_target)) 7880 spi_dv_device(device); 7881 return 0; 7882} 7883 7884static int ncr53c8xx_queue_command (struct scsi_cmnd *cmd, void (* done)(struct scsi_cmnd *)) 7885{ 7886 struct ncb *np = ((struct host_data *) cmd->device->host->hostdata)->ncb; 7887 unsigned long flags; 7888 int sts; 7889 7890#ifdef DEBUG_NCR53C8XX 7891printk("ncr53c8xx_queue_command\n"); 7892#endif 7893 7894 cmd->scsi_done = done; 7895 cmd->host_scribble = NULL; 7896 cmd->__data_mapped = 0; 7897 cmd->__data_mapping = 0; 7898 7899 spin_lock_irqsave(&np->smp_lock, flags); 7900 7901 if ((sts = ncr_queue_command(np, cmd)) != DID_OK) { 7902 cmd->result = ScsiResult(sts, 0); 7903#ifdef DEBUG_NCR53C8XX 7904printk("ncr53c8xx : command not queued - result=%d\n", sts); 7905#endif 7906 } 7907#ifdef DEBUG_NCR53C8XX 7908 else 7909printk("ncr53c8xx : command successfully queued\n"); 7910#endif 7911 7912 spin_unlock_irqrestore(&np->smp_lock, flags); 7913 7914 if (sts != DID_OK) { 7915 unmap_scsi_data(np, cmd); 7916 done(cmd); 7917 sts = 0; 7918 } 7919 7920 return sts; 7921} 7922 7923irqreturn_t ncr53c8xx_intr(int irq, void *dev_id) 7924{ 7925 unsigned long flags; 7926 struct Scsi_Host *shost = (struct Scsi_Host *)dev_id; 7927 struct host_data *host_data = (struct host_data *)shost->hostdata; 7928 struct ncb *np = host_data->ncb; 7929 struct scsi_cmnd *done_list; 7930 7931#ifdef DEBUG_NCR53C8XX 7932 printk("ncr53c8xx : interrupt received\n"); 7933#endif 7934 7935 if (DEBUG_FLAGS & DEBUG_TINY) printk ("["); 7936 7937 spin_lock_irqsave(&np->smp_lock, flags); 7938 ncr_exception(np); 7939 done_list = np->done_list; 7940 np->done_list = NULL; 7941 spin_unlock_irqrestore(&np->smp_lock, flags); 7942 7943 if (DEBUG_FLAGS & DEBUG_TINY) printk ("]\n"); 7944 7945 if (done_list) 7946 ncr_flush_done_cmds(done_list); 7947 return IRQ_HANDLED; 7948} 7949 7950static void ncr53c8xx_timeout(unsigned long npref) 7951{ 7952 struct ncb *np = (struct ncb *) npref; 7953 unsigned long flags; 7954 struct scsi_cmnd *done_list; 7955 7956 spin_lock_irqsave(&np->smp_lock, flags); 7957 ncr_timeout(np); 7958 done_list = np->done_list; 7959 np->done_list = NULL; 7960 spin_unlock_irqrestore(&np->smp_lock, flags); 7961 7962 if (done_list) 7963 ncr_flush_done_cmds(done_list); 7964} 7965 7966static int ncr53c8xx_bus_reset(struct scsi_cmnd *cmd) 7967{ 7968 struct ncb *np = ((struct host_data *) cmd->device->host->hostdata)->ncb; 7969 int sts; 7970 unsigned long flags; 7971 struct scsi_cmnd *done_list; 7972 7973 /* 7974 * If the mid-level driver told us reset is synchronous, it seems 7975 * that we must call the done() callback for the involved command, 7976 * even if this command was not queued to the low-level driver, 7977 * before returning SUCCESS. 7978 */ 7979 7980 spin_lock_irqsave(&np->smp_lock, flags); 7981 sts = ncr_reset_bus(np, cmd, 1); 7982 7983 done_list = np->done_list; 7984 np->done_list = NULL; 7985 spin_unlock_irqrestore(&np->smp_lock, flags); 7986 7987 ncr_flush_done_cmds(done_list); 7988 7989 return sts; 7990} 7991 7992 7993 7994/* 7995** Scsi command waiting list management. 7996** 7997** It may happen that we cannot insert a scsi command into the start queue, 7998** in the following circumstances. 7999** Too few preallocated ccb(s), 8000** maxtags < cmd_per_lun of the Linux host control block, 8001** etc... 8002** Such scsi commands are inserted into a waiting list. 8003** When a scsi command complete, we try to requeue the commands of the 8004** waiting list. 8005*/ 8006 8007#define next_wcmd host_scribble 8008 8009static void insert_into_waiting_list(struct ncb *np, struct scsi_cmnd *cmd) 8010{ 8011 struct scsi_cmnd *wcmd; 8012 8013#ifdef DEBUG_WAITING_LIST 8014 printk("%s: cmd %lx inserted into waiting list\n", ncr_name(np), (u_long) cmd); 8015#endif 8016 cmd->next_wcmd = NULL; 8017 if (!(wcmd = np->waiting_list)) np->waiting_list = cmd; 8018 else { 8019 while ((wcmd->next_wcmd) != 0) 8020 wcmd = (struct scsi_cmnd *) wcmd->next_wcmd; 8021 wcmd->next_wcmd = (char *) cmd; 8022 } 8023} 8024 8025static struct scsi_cmnd *retrieve_from_waiting_list(int to_remove, struct ncb *np, struct scsi_cmnd *cmd) 8026{ 8027 struct scsi_cmnd **pcmd = &np->waiting_list; 8028 8029 while (*pcmd) { 8030 if (cmd == *pcmd) { 8031 if (to_remove) { 8032 *pcmd = (struct scsi_cmnd *) cmd->next_wcmd; 8033 cmd->next_wcmd = NULL; 8034 } 8035#ifdef DEBUG_WAITING_LIST 8036 printk("%s: cmd %lx retrieved from waiting list\n", ncr_name(np), (u_long) cmd); 8037#endif 8038 return cmd; 8039 } 8040 pcmd = (struct scsi_cmnd **) &(*pcmd)->next_wcmd; 8041 } 8042 return NULL; 8043} 8044 8045static void process_waiting_list(struct ncb *np, int sts) 8046{ 8047 struct scsi_cmnd *waiting_list, *wcmd; 8048 8049 waiting_list = np->waiting_list; 8050 np->waiting_list = NULL; 8051 8052#ifdef DEBUG_WAITING_LIST 8053 if (waiting_list) printk("%s: waiting_list=%lx processing sts=%d\n", ncr_name(np), (u_long) waiting_list, sts); 8054#endif 8055 while ((wcmd = waiting_list) != 0) { 8056 waiting_list = (struct scsi_cmnd *) wcmd->next_wcmd; 8057 wcmd->next_wcmd = NULL; 8058 if (sts == DID_OK) { 8059#ifdef DEBUG_WAITING_LIST 8060 printk("%s: cmd %lx trying to requeue\n", ncr_name(np), (u_long) wcmd); 8061#endif 8062 sts = ncr_queue_command(np, wcmd); 8063 } 8064 if (sts != DID_OK) { 8065#ifdef DEBUG_WAITING_LIST 8066 printk("%s: cmd %lx done forced sts=%d\n", ncr_name(np), (u_long) wcmd, sts); 8067#endif 8068 wcmd->result = ScsiResult(sts, 0); 8069 ncr_queue_done_cmd(np, wcmd); 8070 } 8071 } 8072} 8073 8074#undef next_wcmd 8075 8076static ssize_t show_ncr53c8xx_revision(struct class_device *dev, char *buf) 8077{ 8078 struct Scsi_Host *host = class_to_shost(dev); 8079 struct host_data *host_data = (struct host_data *)host->hostdata; 8080 8081 return snprintf(buf, 20, "0x%x\n", host_data->ncb->revision_id); 8082} 8083 8084static struct class_device_attribute ncr53c8xx_revision_attr = { 8085 .attr = { .name = "revision", .mode = S_IRUGO, }, 8086 .show = show_ncr53c8xx_revision, 8087}; 8088 8089static struct class_device_attribute *ncr53c8xx_host_attrs[] = { 8090 &ncr53c8xx_revision_attr, 8091 NULL 8092}; 8093 8094/*========================================================== 8095** 8096** Boot command line. 8097** 8098**========================================================== 8099*/ 8100#ifdef MODULE 8101char *ncr53c8xx; /* command line passed by insmod */ 8102module_param(ncr53c8xx, charp, 0); 8103#endif 8104 8105#ifndef MODULE 8106static int __init ncr53c8xx_setup(char *str) 8107{ 8108 return sym53c8xx__setup(str); 8109} 8110 8111__setup("ncr53c8xx=", ncr53c8xx_setup); 8112#endif 8113 8114 8115/* 8116 * Host attach and initialisations. 8117 * 8118 * Allocate host data and ncb structure. 8119 * Request IO region and remap MMIO region. 8120 * Do chip initialization. 8121 * If all is OK, install interrupt handling and 8122 * start the timer daemon. 8123 */ 8124struct Scsi_Host * __init ncr_attach(struct scsi_host_template *tpnt, 8125 int unit, struct ncr_device *device) 8126{ 8127 struct host_data *host_data; 8128 struct ncb *np = NULL; 8129 struct Scsi_Host *instance = NULL; 8130 u_long flags = 0; 8131 int i; 8132 8133 if (!tpnt->name) 8134 tpnt->name = SCSI_NCR_DRIVER_NAME; 8135 if (!tpnt->shost_attrs) 8136 tpnt->shost_attrs = ncr53c8xx_host_attrs; 8137 8138 tpnt->queuecommand = ncr53c8xx_queue_command; 8139 tpnt->slave_configure = ncr53c8xx_slave_configure; 8140 tpnt->slave_alloc = ncr53c8xx_slave_alloc; 8141 tpnt->eh_bus_reset_handler = ncr53c8xx_bus_reset; 8142 tpnt->can_queue = SCSI_NCR_CAN_QUEUE; 8143 tpnt->this_id = 7; 8144 tpnt->sg_tablesize = SCSI_NCR_SG_TABLESIZE; 8145 tpnt->cmd_per_lun = SCSI_NCR_CMD_PER_LUN; 8146 tpnt->use_clustering = ENABLE_CLUSTERING; 8147 8148 if (device->differential) 8149 driver_setup.diff_support = device->differential; 8150 8151 printk(KERN_INFO "ncr53c720-%d: rev 0x%x irq %d\n", 8152 unit, device->chip.revision_id, device->slot.irq); 8153 8154 instance = scsi_host_alloc(tpnt, sizeof(*host_data)); 8155 if (!instance) 8156 goto attach_error; 8157 host_data = (struct host_data *) instance->hostdata; 8158 8159 np = __m_calloc_dma(device->dev, sizeof(struct ncb), "NCB"); 8160 if (!np) 8161 goto attach_error; 8162 spin_lock_init(&np->smp_lock); 8163 np->dev = device->dev; 8164 np->p_ncb = vtobus(np); 8165 host_data->ncb = np; 8166 8167 np->ccb = m_calloc_dma(sizeof(struct ccb), "CCB"); 8168 if (!np->ccb) 8169 goto attach_error; 8170 8171 /* Store input information in the host data structure. */ 8172 np->unit = unit; 8173 np->verbose = driver_setup.verbose; 8174 sprintf(np->inst_name, "ncr53c720-%d", np->unit); 8175 np->revision_id = device->chip.revision_id; 8176 np->features = device->chip.features; 8177 np->clock_divn = device->chip.nr_divisor; 8178 np->maxoffs = device->chip.offset_max; 8179 np->maxburst = device->chip.burst_max; 8180 np->myaddr = device->host_id; 8181 8182 /* Allocate SCRIPTS areas. */ 8183 np->script0 = m_calloc_dma(sizeof(struct script), "SCRIPT"); 8184 if (!np->script0) 8185 goto attach_error; 8186 np->scripth0 = m_calloc_dma(sizeof(struct scripth), "SCRIPTH"); 8187 if (!np->scripth0) 8188 goto attach_error; 8189 8190 init_timer(&np->timer); 8191 np->timer.data = (unsigned long) np; 8192 np->timer.function = ncr53c8xx_timeout; 8193 8194 /* Try to map the controller chip to virtual and physical memory. */ 8195 8196 np->paddr = device->slot.base; 8197 np->paddr2 = (np->features & FE_RAM) ? device->slot.base_2 : 0; 8198 8199 if (device->slot.base_v) 8200 np->vaddr = device->slot.base_v; 8201 else 8202 np->vaddr = ioremap(device->slot.base_c, 128); 8203 8204 if (!np->vaddr) { 8205 printk(KERN_ERR 8206 "%s: can't map memory mapped IO region\n",ncr_name(np)); 8207 goto attach_error; 8208 } else { 8209 if (bootverbose > 1) 8210 printk(KERN_INFO 8211 "%s: using memory mapped IO at virtual address 0x%lx\n", ncr_name(np), (u_long) np->vaddr); 8212 } 8213 8214 /* Make the controller's registers available. Now the INB INW INL 8215 * OUTB OUTW OUTL macros can be used safely. 8216 */ 8217 8218 np->reg = (struct ncr_reg __iomem *)np->vaddr; 8219 8220 /* Do chip dependent initialization. */ 8221 ncr_prepare_setting(np); 8222 8223 if (np->paddr2 && sizeof(struct script) > 4096) { 8224 np->paddr2 = 0; 8225 printk(KERN_WARNING "%s: script too large, NOT using on chip RAM.\n", 8226 ncr_name(np)); 8227 } 8228 8229 instance->max_channel = 0; 8230 instance->this_id = np->myaddr; 8231 instance->max_id = np->maxwide ? 16 : 8; 8232 instance->max_lun = SCSI_NCR_MAX_LUN; 8233 instance->base = (unsigned long) np->reg; 8234 instance->irq = device->slot.irq; 8235 instance->unique_id = device->slot.base; 8236 instance->dma_channel = 0; 8237 instance->cmd_per_lun = MAX_TAGS; 8238 instance->can_queue = (MAX_START-4); 8239 /* This can happen if you forget to call ncr53c8xx_init from 8240 * your module_init */ 8241 BUG_ON(!ncr53c8xx_transport_template); 8242 instance->transportt = ncr53c8xx_transport_template; 8243 8244 /* Patch script to physical addresses */ 8245 ncr_script_fill(&script0, &scripth0); 8246 8247 np->scripth = np->scripth0; 8248 np->p_scripth = vtobus(np->scripth); 8249 np->p_script = (np->paddr2) ? np->paddr2 : vtobus(np->script0); 8250 8251 ncr_script_copy_and_bind(np, (ncrcmd *) &script0, 8252 (ncrcmd *) np->script0, sizeof(struct script)); 8253 ncr_script_copy_and_bind(np, (ncrcmd *) &scripth0, 8254 (ncrcmd *) np->scripth0, sizeof(struct scripth)); 8255 np->ccb->p_ccb = vtobus (np->ccb); 8256 8257 /* Patch the script for LED support. */ 8258 8259 if (np->features & FE_LED0) { 8260 np->script0->idle[0] = 8261 cpu_to_scr(SCR_REG_REG(gpreg, SCR_OR, 0x01)); 8262 np->script0->reselected[0] = 8263 cpu_to_scr(SCR_REG_REG(gpreg, SCR_AND, 0xfe)); 8264 np->script0->start[0] = 8265 cpu_to_scr(SCR_REG_REG(gpreg, SCR_AND, 0xfe)); 8266 } 8267 8268 /* 8269 * Look for the target control block of this nexus. 8270 * For i = 0 to 3 8271 * JUMP ^ IFTRUE (MASK (i, 3)), @(next_lcb) 8272 */ 8273 for (i = 0 ; i < 4 ; i++) { 8274 np->jump_tcb[i].l_cmd = 8275 cpu_to_scr((SCR_JUMP ^ IFTRUE (MASK (i, 3)))); 8276 np->jump_tcb[i].l_paddr = 8277 cpu_to_scr(NCB_SCRIPTH_PHYS (np, bad_target)); 8278 } 8279 8280 ncr_chip_reset(np, 100); 8281 8282 /* Now check the cache handling of the chipset. */ 8283 8284 if (ncr_snooptest(np)) { 8285 printk(KERN_ERR "CACHE INCORRECTLY CONFIGURED.\n"); 8286 goto attach_error; 8287 } 8288 8289 /* Install the interrupt handler. */ 8290 np->irq = device->slot.irq; 8291 8292 /* Initialize the fixed part of the default ccb. */ 8293 ncr_init_ccb(np, np->ccb); 8294 8295 /* 8296 * After SCSI devices have been opened, we cannot reset the bus 8297 * safely, so we do it here. Interrupt handler does the real work. 8298 * Process the reset exception if interrupts are not enabled yet. 8299 * Then enable disconnects. 8300 */ 8301 spin_lock_irqsave(&np->smp_lock, flags); 8302 if (ncr_reset_scsi_bus(np, 0, driver_setup.settle_delay) != 0) { 8303 printk(KERN_ERR "%s: FATAL ERROR: CHECK SCSI BUS - CABLES, TERMINATION, DEVICE POWER etc.!\n", ncr_name(np)); 8304 8305 spin_unlock_irqrestore(&np->smp_lock, flags); 8306 goto attach_error; 8307 } 8308 ncr_exception(np); 8309 8310 np->disc = 1; 8311 8312 /* 8313 * The middle-level SCSI driver does not wait for devices to settle. 8314 * Wait synchronously if more than 2 seconds. 8315 */ 8316 if (driver_setup.settle_delay > 2) { 8317 printk(KERN_INFO "%s: waiting %d seconds for scsi devices to settle...\n", 8318 ncr_name(np), driver_setup.settle_delay); 8319 mdelay(1000 * driver_setup.settle_delay); 8320 } 8321 8322 /* start the timeout daemon */ 8323 np->lasttime=0; 8324 ncr_timeout (np); 8325 8326 /* use SIMPLE TAG messages by default */ 8327#ifdef SCSI_NCR_ALWAYS_SIMPLE_TAG 8328 np->order = SIMPLE_QUEUE_TAG; 8329#endif 8330 8331 spin_unlock_irqrestore(&np->smp_lock, flags); 8332 8333 return instance; 8334 8335 attach_error: 8336 if (!instance) 8337 return NULL; 8338 printk(KERN_INFO "%s: detaching...\n", ncr_name(np)); 8339 if (!np) 8340 goto unregister; 8341 if (np->scripth0) 8342 m_free_dma(np->scripth0, sizeof(struct scripth), "SCRIPTH"); 8343 if (np->script0) 8344 m_free_dma(np->script0, sizeof(struct script), "SCRIPT"); 8345 if (np->ccb) 8346 m_free_dma(np->ccb, sizeof(struct ccb), "CCB"); 8347 m_free_dma(np, sizeof(struct ncb), "NCB"); 8348 host_data->ncb = NULL; 8349 8350 unregister: 8351 scsi_host_put(instance); 8352 8353 return NULL; 8354} 8355 8356 8357int ncr53c8xx_release(struct Scsi_Host *host) 8358{ 8359 struct host_data *host_data; 8360#ifdef DEBUG_NCR53C8XX 8361 printk("ncr53c8xx: release\n"); 8362#endif 8363 if (!host) 8364 return 1; 8365 host_data = (struct host_data *)host->hostdata; 8366 if (host_data && host_data->ncb) 8367 ncr_detach(host_data->ncb); 8368 return 1; 8369} 8370 8371static void ncr53c8xx_set_period(struct scsi_target *starget, int period) 8372{ 8373 struct Scsi_Host *shost = dev_to_shost(starget->dev.parent); 8374 struct ncb *np = ((struct host_data *)shost->hostdata)->ncb; 8375 struct tcb *tp = &np->target[starget->id]; 8376 8377 if (period > np->maxsync) 8378 period = np->maxsync; 8379 else if (period < np->minsync) 8380 period = np->minsync; 8381 8382 tp->usrsync = period; 8383 8384 ncr_negotiate(np, tp); 8385} 8386 8387static void ncr53c8xx_set_offset(struct scsi_target *starget, int offset) 8388{ 8389 struct Scsi_Host *shost = dev_to_shost(starget->dev.parent); 8390 struct ncb *np = ((struct host_data *)shost->hostdata)->ncb; 8391 struct tcb *tp = &np->target[starget->id]; 8392 8393 if (offset > np->maxoffs) 8394 offset = np->maxoffs; 8395 else if (offset < 0) 8396 offset = 0; 8397 8398 tp->maxoffs = offset; 8399 8400 ncr_negotiate(np, tp); 8401} 8402 8403static void ncr53c8xx_set_width(struct scsi_target *starget, int width) 8404{ 8405 struct Scsi_Host *shost = dev_to_shost(starget->dev.parent); 8406 struct ncb *np = ((struct host_data *)shost->hostdata)->ncb; 8407 struct tcb *tp = &np->target[starget->id]; 8408 8409 if (width > np->maxwide) 8410 width = np->maxwide; 8411 else if (width < 0) 8412 width = 0; 8413 8414 tp->usrwide = width; 8415 8416 ncr_negotiate(np, tp); 8417} 8418 8419static void ncr53c8xx_get_signalling(struct Scsi_Host *shost) 8420{ 8421 struct ncb *np = ((struct host_data *)shost->hostdata)->ncb; 8422 enum spi_signal_type type; 8423 8424 switch (np->scsi_mode) { 8425 case SMODE_SE: 8426 type = SPI_SIGNAL_SE; 8427 break; 8428 case SMODE_HVD: 8429 type = SPI_SIGNAL_HVD; 8430 break; 8431 default: 8432 type = SPI_SIGNAL_UNKNOWN; 8433 break; 8434 } 8435 spi_signalling(shost) = type; 8436} 8437 8438static struct spi_function_template ncr53c8xx_transport_functions = { 8439 .set_period = ncr53c8xx_set_period, 8440 .show_period = 1, 8441 .set_offset = ncr53c8xx_set_offset, 8442 .show_offset = 1, 8443 .set_width = ncr53c8xx_set_width, 8444 .show_width = 1, 8445 .get_signalling = ncr53c8xx_get_signalling, 8446}; 8447 8448int __init ncr53c8xx_init(void) 8449{ 8450 ncr53c8xx_transport_template = spi_attach_transport(&ncr53c8xx_transport_functions); 8451 if (!ncr53c8xx_transport_template) 8452 return -ENODEV; 8453 return 0; 8454} 8455 8456void ncr53c8xx_exit(void) 8457{ 8458 spi_release_transport(ncr53c8xx_transport_template); 8459} 8460