1/* 2 * ti113x.h 1.16 1999/10/25 20:03:34 3 * 4 * The contents of this file are subject to the Mozilla Public License 5 * Version 1.1 (the "License"); you may not use this file except in 6 * compliance with the License. You may obtain a copy of the License 7 * at http://www.mozilla.org/MPL/ 8 * 9 * Software distributed under the License is distributed on an "AS IS" 10 * basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See 11 * the License for the specific language governing rights and 12 * limitations under the License. 13 * 14 * The initial developer of the original code is David A. Hinds 15 * <dahinds@users.sourceforge.net>. Portions created by David A. Hinds 16 * are Copyright (C) 1999 David A. Hinds. All Rights Reserved. 17 * 18 * Alternatively, the contents of this file may be used under the 19 * terms of the GNU General Public License version 2 (the "GPL"), in which 20 * case the provisions of the GPL are applicable instead of the 21 * above. If you wish to allow the use of your version of this file 22 * only under the terms of the GPL and not to allow others to use 23 * your version of this file under the MPL, indicate your decision by 24 * deleting the provisions above and replace them with the notice and 25 * other provisions required by the GPL. If you do not delete the 26 * provisions above, a recipient may use your version of this file 27 * under either the MPL or the GPL. 28 */ 29 30#ifndef _LINUX_TI113X_H 31#define _LINUX_TI113X_H 32 33 34/* Register definitions for TI 113X PCI-to-CardBus bridges */ 35 36/* System Control Register */ 37#define TI113X_SYSTEM_CONTROL 0x0080 /* 32 bit */ 38#define TI113X_SCR_SMIROUTE 0x04000000 39#define TI113X_SCR_SMISTATUS 0x02000000 40#define TI113X_SCR_SMIENB 0x01000000 41#define TI113X_SCR_VCCPROT 0x00200000 42#define TI113X_SCR_REDUCEZV 0x00100000 43#define TI113X_SCR_CDREQEN 0x00080000 44#define TI113X_SCR_CDMACHAN 0x00070000 45#define TI113X_SCR_SOCACTIVE 0x00002000 46#define TI113X_SCR_PWRSTREAM 0x00000800 47#define TI113X_SCR_DELAYUP 0x00000400 48#define TI113X_SCR_DELAYDOWN 0x00000200 49#define TI113X_SCR_INTERROGATE 0x00000100 50#define TI113X_SCR_CLKRUN_SEL 0x00000080 51#define TI113X_SCR_PWRSAVINGS 0x00000040 52#define TI113X_SCR_SUBSYSRW 0x00000020 53#define TI113X_SCR_CB_DPAR 0x00000010 54#define TI113X_SCR_CDMA_EN 0x00000008 55#define TI113X_SCR_ASYNC_IRQ 0x00000004 56#define TI113X_SCR_KEEPCLK 0x00000002 57#define TI113X_SCR_CLKRUN_ENA 0x00000001 58 59#define TI122X_SCR_SER_STEP 0xc0000000 60#define TI122X_SCR_INTRTIE 0x20000000 61#define TIXX21_SCR_TIEALL 0x10000000 62#define TI122X_SCR_CBRSVD 0x00400000 63#define TI122X_SCR_MRBURSTDN 0x00008000 64#define TI122X_SCR_MRBURSTUP 0x00004000 65#define TI122X_SCR_RIMUX 0x00000001 66 67/* Multimedia Control Register */ 68#define TI1250_MULTIMEDIA_CTL 0x0084 /* 8 bit */ 69#define TI1250_MMC_ZVOUTEN 0x80 70#define TI1250_MMC_PORTSEL 0x40 71#define TI1250_MMC_ZVEN1 0x02 72#define TI1250_MMC_ZVEN0 0x01 73 74#define TI1250_GENERAL_STATUS 0x0085 /* 8 bit */ 75#define TI1250_GPIO0_CONTROL 0x0088 /* 8 bit */ 76#define TI1250_GPIO1_CONTROL 0x0089 /* 8 bit */ 77#define TI1250_GPIO2_CONTROL 0x008a /* 8 bit */ 78#define TI1250_GPIO3_CONTROL 0x008b /* 8 bit */ 79#define TI1250_GPIO_MODE_MASK 0xc0 80 81/* IRQMUX/MFUNC Register */ 82#define TI122X_MFUNC 0x008c /* 32 bit */ 83#define TI122X_MFUNC0_MASK 0x0000000f 84#define TI122X_MFUNC1_MASK 0x000000f0 85#define TI122X_MFUNC2_MASK 0x00000f00 86#define TI122X_MFUNC3_MASK 0x0000f000 87#define TI122X_MFUNC4_MASK 0x000f0000 88#define TI122X_MFUNC5_MASK 0x00f00000 89#define TI122X_MFUNC6_MASK 0x0f000000 90 91#define TI122X_MFUNC0_INTA 0x00000002 92#define TI125X_MFUNC0_INTB 0x00000001 93#define TI122X_MFUNC1_INTB 0x00000020 94#define TI122X_MFUNC3_IRQSER 0x00001000 95 96 97/* Retry Status Register */ 98#define TI113X_RETRY_STATUS 0x0090 /* 8 bit */ 99#define TI113X_RSR_PCIRETRY 0x80 100#define TI113X_RSR_CBRETRY 0x40 101#define TI113X_RSR_TEXP_CBB 0x20 102#define TI113X_RSR_MEXP_CBB 0x10 103#define TI113X_RSR_TEXP_CBA 0x08 104#define TI113X_RSR_MEXP_CBA 0x04 105#define TI113X_RSR_TEXP_PCI 0x02 106#define TI113X_RSR_MEXP_PCI 0x01 107 108/* Card Control Register */ 109#define TI113X_CARD_CONTROL 0x0091 /* 8 bit */ 110#define TI113X_CCR_RIENB 0x80 111#define TI113X_CCR_ZVENABLE 0x40 112#define TI113X_CCR_PCI_IRQ_ENA 0x20 113#define TI113X_CCR_PCI_IREQ 0x10 114#define TI113X_CCR_PCI_CSC 0x08 115#define TI113X_CCR_SPKROUTEN 0x02 116#define TI113X_CCR_IFG 0x01 117 118#define TI1220_CCR_PORT_SEL 0x20 119#define TI122X_CCR_AUD2MUX 0x04 120 121/* Device Control Register */ 122#define TI113X_DEVICE_CONTROL 0x0092 /* 8 bit */ 123#define TI113X_DCR_5V_FORCE 0x40 124#define TI113X_DCR_3V_FORCE 0x20 125#define TI113X_DCR_IMODE_MASK 0x06 126#define TI113X_DCR_IMODE_ISA 0x02 127#define TI113X_DCR_IMODE_SERIAL 0x04 128 129#define TI12XX_DCR_IMODE_PCI_ONLY 0x00 130#define TI12XX_DCR_IMODE_ALL_SERIAL 0x06 131 132/* Buffer Control Register */ 133#define TI113X_BUFFER_CONTROL 0x0093 /* 8 bit */ 134#define TI113X_BCR_CB_READ_DEPTH 0x08 135#define TI113X_BCR_CB_WRITE_DEPTH 0x04 136#define TI113X_BCR_PCI_READ_DEPTH 0x02 137#define TI113X_BCR_PCI_WRITE_DEPTH 0x01 138 139/* Diagnostic Register */ 140#define TI1250_DIAGNOSTIC 0x0093 /* 8 bit */ 141#define TI1250_DIAG_TRUE_VALUE 0x80 142#define TI1250_DIAG_PCI_IREQ 0x40 143#define TI1250_DIAG_PCI_CSC 0x20 144#define TI1250_DIAG_ASYNC_CSC 0x01 145 146/* DMA Registers */ 147#define TI113X_DMA_0 0x0094 /* 32 bit */ 148#define TI113X_DMA_1 0x0098 /* 32 bit */ 149 150/* ExCA IO offset registers */ 151#define TI113X_IO_OFFSET(map) (0x36+((map)<<1)) 152 153/* EnE test register */ 154#define ENE_TEST_C9 0xc9 /* 8bit */ 155#define ENE_TEST_C9_TLTENABLE 0x02 156#define ENE_TEST_C9_PFENABLE_F0 0x04 157#define ENE_TEST_C9_PFENABLE_F1 0x08 158#define ENE_TEST_C9_PFENABLE (ENE_TEST_C9_PFENABLE_F0 | ENE_TEST_C9_PFENABLE_F0) 159#define ENE_TEST_C9_WPDISALBLE_F0 0x40 160#define ENE_TEST_C9_WPDISALBLE_F1 0x80 161#define ENE_TEST_C9_WPDISALBLE (ENE_TEST_C9_WPDISALBLE_F0 | ENE_TEST_C9_WPDISALBLE_F1) 162 163/* 164 * Texas Instruments CardBus controller overrides. 165 */ 166#define ti_sysctl(socket) ((socket)->private[0]) 167#define ti_cardctl(socket) ((socket)->private[1]) 168#define ti_devctl(socket) ((socket)->private[2]) 169#define ti_diag(socket) ((socket)->private[3]) 170#define ti_mfunc(socket) ((socket)->private[4]) 171#define ene_test_c9(socket) ((socket)->private[5]) 172 173/* 174 * These are the TI specific power management handlers. 175 */ 176static void ti_save_state(struct yenta_socket *socket) 177{ 178 ti_sysctl(socket) = config_readl(socket, TI113X_SYSTEM_CONTROL); 179 ti_mfunc(socket) = config_readl(socket, TI122X_MFUNC); 180 ti_cardctl(socket) = config_readb(socket, TI113X_CARD_CONTROL); 181 ti_devctl(socket) = config_readb(socket, TI113X_DEVICE_CONTROL); 182 ti_diag(socket) = config_readb(socket, TI1250_DIAGNOSTIC); 183 184 if (socket->dev->vendor == PCI_VENDOR_ID_ENE) 185 ene_test_c9(socket) = config_readb(socket, ENE_TEST_C9); 186} 187 188static void ti_restore_state(struct yenta_socket *socket) 189{ 190 config_writel(socket, TI113X_SYSTEM_CONTROL, ti_sysctl(socket)); 191 config_writel(socket, TI122X_MFUNC, ti_mfunc(socket)); 192 config_writeb(socket, TI113X_CARD_CONTROL, ti_cardctl(socket)); 193 config_writeb(socket, TI113X_DEVICE_CONTROL, ti_devctl(socket)); 194 config_writeb(socket, TI1250_DIAGNOSTIC, ti_diag(socket)); 195 196 if (socket->dev->vendor == PCI_VENDOR_ID_ENE) 197 config_writeb(socket, ENE_TEST_C9, ene_test_c9(socket)); 198} 199 200/* 201 * Zoom video control for TI122x/113x chips 202 */ 203 204static void ti_zoom_video(struct pcmcia_socket *sock, int onoff) 205{ 206 u8 reg; 207 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); 208 209 /* If we don't have a Zoom Video switch this is harmless, 210 we just tristate the unused (ZV) lines */ 211 reg = config_readb(socket, TI113X_CARD_CONTROL); 212 if (onoff) 213 /* Zoom zoom, we will all go together, zoom zoom, zoom zoom */ 214 reg |= TI113X_CCR_ZVENABLE; 215 else 216 reg &= ~TI113X_CCR_ZVENABLE; 217 config_writeb(socket, TI113X_CARD_CONTROL, reg); 218} 219 220 221static void ti1250_zoom_video(struct pcmcia_socket *sock, int onoff) 222{ 223 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); 224 int shift = 0; 225 u8 reg; 226 227 ti_zoom_video(sock, onoff); 228 229 reg = config_readb(socket, TI1250_MULTIMEDIA_CTL); 230 reg |= TI1250_MMC_ZVOUTEN; /* ZV bus enable */ 231 232 if(PCI_FUNC(socket->dev->devfn)==1) 233 shift = 1; 234 235 if(onoff) 236 { 237 reg &= ~(1<<6); /* Clear select bit */ 238 reg |= shift<<6; /* Favour our socket */ 239 reg |= 1<<shift; /* Socket zoom video on */ 240 } 241 else 242 { 243 reg &= ~(1<<6); /* Clear select bit */ 244 reg |= (1^shift)<<6; /* Favour other socket */ 245 reg &= ~(1<<shift); /* Socket zoon video off */ 246 } 247 248 config_writeb(socket, TI1250_MULTIMEDIA_CTL, reg); 249} 250 251static void ti_set_zv(struct yenta_socket *socket) 252{ 253 if(socket->dev->vendor == PCI_VENDOR_ID_TI) 254 { 255 switch(socket->dev->device) 256 { 257 /* There may be more .. */ 258 case PCI_DEVICE_ID_TI_1220: 259 case PCI_DEVICE_ID_TI_1221: 260 case PCI_DEVICE_ID_TI_1225: 261 case PCI_DEVICE_ID_TI_4510: 262 socket->socket.zoom_video = ti_zoom_video; 263 break; 264 case PCI_DEVICE_ID_TI_1250: 265 case PCI_DEVICE_ID_TI_1251A: 266 case PCI_DEVICE_ID_TI_1251B: 267 case PCI_DEVICE_ID_TI_1450: 268 socket->socket.zoom_video = ti1250_zoom_video; 269 } 270 } 271} 272 273 274/* 275 * Generic TI init - TI has an extension for the 276 * INTCTL register that sets the PCI CSC interrupt. 277 * Make sure we set it correctly at open and init 278 * time 279 * - override: disable the PCI CSC interrupt. This makes 280 * it possible to use the CSC interrupt to probe the 281 * ISA interrupts. 282 * - init: set the interrupt to match our PCI state. 283 * This makes us correctly get PCI CSC interrupt 284 * events. 285 */ 286static int ti_init(struct yenta_socket *socket) 287{ 288 u8 new, reg = exca_readb(socket, I365_INTCTL); 289 290 new = reg & ~I365_INTR_ENA; 291 if (socket->cb_irq) 292 new |= I365_INTR_ENA; 293 if (new != reg) 294 exca_writeb(socket, I365_INTCTL, new); 295 return 0; 296} 297 298static int ti_override(struct yenta_socket *socket) 299{ 300 u8 new, reg = exca_readb(socket, I365_INTCTL); 301 302 new = reg & ~I365_INTR_ENA; 303 if (new != reg) 304 exca_writeb(socket, I365_INTCTL, new); 305 306 ti_set_zv(socket); 307 308 return 0; 309} 310 311static int ti113x_override(struct yenta_socket *socket) 312{ 313 u8 cardctl; 314 315 cardctl = config_readb(socket, TI113X_CARD_CONTROL); 316 cardctl &= ~(TI113X_CCR_PCI_IRQ_ENA | TI113X_CCR_PCI_IREQ | TI113X_CCR_PCI_CSC); 317 if (socket->cb_irq) 318 cardctl |= TI113X_CCR_PCI_IRQ_ENA | TI113X_CCR_PCI_CSC | TI113X_CCR_PCI_IREQ; 319 config_writeb(socket, TI113X_CARD_CONTROL, cardctl); 320 321 return ti_override(socket); 322} 323 324 325/* irqrouting for func0, probes PCI interrupt and ISA interrupts */ 326static void ti12xx_irqroute_func0(struct yenta_socket *socket) 327{ 328 u32 mfunc, mfunc_old, devctl; 329 u8 gpio3, gpio3_old; 330 int pci_irq_status; 331 332 mfunc = mfunc_old = config_readl(socket, TI122X_MFUNC); 333 devctl = config_readb(socket, TI113X_DEVICE_CONTROL); 334 printk(KERN_INFO "Yenta TI: socket %s, mfunc 0x%08x, devctl 0x%02x\n", 335 pci_name(socket->dev), mfunc, devctl); 336 337 /* make sure PCI interrupts are enabled before probing */ 338 ti_init(socket); 339 340 /* test PCI interrupts first. only try fixing if return value is 0! */ 341 pci_irq_status = yenta_probe_cb_irq(socket); 342 if (pci_irq_status) 343 goto out; 344 345 /* 346 * We're here which means PCI interrupts are _not_ delivered. try to 347 * find the right setting (all serial or parallel) 348 */ 349 printk(KERN_INFO "Yenta TI: socket %s probing PCI interrupt failed, trying to fix\n", 350 pci_name(socket->dev)); 351 352 /* for serial PCI make sure MFUNC3 is set to IRQSER */ 353 if ((devctl & TI113X_DCR_IMODE_MASK) == TI12XX_DCR_IMODE_ALL_SERIAL) { 354 switch (socket->dev->device) { 355 case PCI_DEVICE_ID_TI_1250: 356 case PCI_DEVICE_ID_TI_1251A: 357 case PCI_DEVICE_ID_TI_1251B: 358 case PCI_DEVICE_ID_TI_1450: 359 case PCI_DEVICE_ID_TI_1451A: 360 case PCI_DEVICE_ID_TI_4450: 361 case PCI_DEVICE_ID_TI_4451: 362 /* these chips have no IRQSER setting in MFUNC3 */ 363 break; 364 365 default: 366 mfunc = (mfunc & ~TI122X_MFUNC3_MASK) | TI122X_MFUNC3_IRQSER; 367 368 /* write down if changed, probe */ 369 if (mfunc != mfunc_old) { 370 config_writel(socket, TI122X_MFUNC, mfunc); 371 372 pci_irq_status = yenta_probe_cb_irq(socket); 373 if (pci_irq_status == 1) { 374 printk(KERN_INFO "Yenta TI: socket %s all-serial interrupts ok\n", 375 pci_name(socket->dev)); 376 mfunc_old = mfunc; 377 goto out; 378 } 379 380 /* not working, back to old value */ 381 mfunc = mfunc_old; 382 config_writel(socket, TI122X_MFUNC, mfunc); 383 384 if (pci_irq_status == -1) 385 goto out; 386 } 387 } 388 389 /* serial PCI interrupts not working fall back to parallel */ 390 printk(KERN_INFO "Yenta TI: socket %s falling back to parallel PCI interrupts\n", 391 pci_name(socket->dev)); 392 devctl &= ~TI113X_DCR_IMODE_MASK; 393 devctl |= TI113X_DCR_IMODE_SERIAL; /* serial ISA could be right */ 394 config_writeb(socket, TI113X_DEVICE_CONTROL, devctl); 395 } 396 397 /* parallel PCI interrupts: route INTA */ 398 switch (socket->dev->device) { 399 case PCI_DEVICE_ID_TI_1250: 400 case PCI_DEVICE_ID_TI_1251A: 401 case PCI_DEVICE_ID_TI_1251B: 402 case PCI_DEVICE_ID_TI_1450: 403 /* make sure GPIO3 is set to INTA */ 404 gpio3 = gpio3_old = config_readb(socket, TI1250_GPIO3_CONTROL); 405 gpio3 &= ~TI1250_GPIO_MODE_MASK; 406 if (gpio3 != gpio3_old) 407 config_writeb(socket, TI1250_GPIO3_CONTROL, gpio3); 408 break; 409 410 default: 411 gpio3 = gpio3_old = 0; 412 413 mfunc = (mfunc & ~TI122X_MFUNC0_MASK) | TI122X_MFUNC0_INTA; 414 if (mfunc != mfunc_old) 415 config_writel(socket, TI122X_MFUNC, mfunc); 416 } 417 418 /* time to probe again */ 419 pci_irq_status = yenta_probe_cb_irq(socket); 420 if (pci_irq_status == 1) { 421 mfunc_old = mfunc; 422 printk(KERN_INFO "Yenta TI: socket %s parallel PCI interrupts ok\n", 423 pci_name(socket->dev)); 424 } else { 425 /* not working, back to old value */ 426 mfunc = mfunc_old; 427 config_writel(socket, TI122X_MFUNC, mfunc); 428 if (gpio3 != gpio3_old) 429 config_writeb(socket, TI1250_GPIO3_CONTROL, gpio3_old); 430 } 431 432out: 433 if (pci_irq_status < 1) { 434 socket->cb_irq = 0; 435 printk(KERN_INFO "Yenta TI: socket %s no PCI interrupts. Fish. Please report.\n", 436 pci_name(socket->dev)); 437 } 438} 439 440 441/* changes the irq of func1 to match that of func0 */ 442static int ti12xx_align_irqs(struct yenta_socket *socket, int *old_irq) 443{ 444 struct pci_dev *func0; 445 446 /* find func0 device */ 447 func0 = pci_get_slot(socket->dev->bus, socket->dev->devfn & ~0x07); 448 if (!func0) 449 return 0; 450 451 if (old_irq) 452 *old_irq = socket->cb_irq; 453 socket->cb_irq = socket->dev->irq = func0->irq; 454 455 pci_dev_put(func0); 456 457 return 1; 458} 459 460/* 461 * ties INTA and INTB together. also changes the devices irq to that of 462 * the function 0 device. call from func1 only. 463 * returns 1 if INTRTIE changed, 0 otherwise. 464 */ 465static int ti12xx_tie_interrupts(struct yenta_socket *socket, int *old_irq) 466{ 467 u32 sysctl; 468 int ret; 469 470 sysctl = config_readl(socket, TI113X_SYSTEM_CONTROL); 471 if (sysctl & TI122X_SCR_INTRTIE) 472 return 0; 473 474 /* align */ 475 ret = ti12xx_align_irqs(socket, old_irq); 476 if (!ret) 477 return 0; 478 479 /* tie */ 480 sysctl |= TI122X_SCR_INTRTIE; 481 config_writel(socket, TI113X_SYSTEM_CONTROL, sysctl); 482 483 return 1; 484} 485 486/* undo what ti12xx_tie_interrupts() did */ 487static void ti12xx_untie_interrupts(struct yenta_socket *socket, int old_irq) 488{ 489 u32 sysctl = config_readl(socket, TI113X_SYSTEM_CONTROL); 490 sysctl &= ~TI122X_SCR_INTRTIE; 491 config_writel(socket, TI113X_SYSTEM_CONTROL, sysctl); 492 493 socket->cb_irq = socket->dev->irq = old_irq; 494} 495 496/* 497 * irqrouting for func1, plays with INTB routing 498 * only touches MFUNC for INTB routing. all other bits are taken 499 * care of in func0 already. 500 */ 501static void ti12xx_irqroute_func1(struct yenta_socket *socket) 502{ 503 u32 mfunc, mfunc_old, devctl, sysctl; 504 int pci_irq_status; 505 506 mfunc = mfunc_old = config_readl(socket, TI122X_MFUNC); 507 devctl = config_readb(socket, TI113X_DEVICE_CONTROL); 508 printk(KERN_INFO "Yenta TI: socket %s, mfunc 0x%08x, devctl 0x%02x\n", 509 pci_name(socket->dev), mfunc, devctl); 510 511 /* if IRQs are configured as tied, align irq of func1 with func0 */ 512 sysctl = config_readl(socket, TI113X_SYSTEM_CONTROL); 513 if (sysctl & TI122X_SCR_INTRTIE) 514 ti12xx_align_irqs(socket, NULL); 515 516 /* make sure PCI interrupts are enabled before probing */ 517 ti_init(socket); 518 519 /* test PCI interrupts first. only try fixing if return value is 0! */ 520 pci_irq_status = yenta_probe_cb_irq(socket); 521 if (pci_irq_status) 522 goto out; 523 524 /* 525 * We're here which means PCI interrupts are _not_ delivered. try to 526 * find the right setting 527 */ 528 printk(KERN_INFO "Yenta TI: socket %s probing PCI interrupt failed, trying to fix\n", 529 pci_name(socket->dev)); 530 531 532 /* if all serial: set INTRTIE, probe again */ 533 if ((devctl & TI113X_DCR_IMODE_MASK) == TI12XX_DCR_IMODE_ALL_SERIAL) { 534 int old_irq; 535 536 if (ti12xx_tie_interrupts(socket, &old_irq)) { 537 pci_irq_status = yenta_probe_cb_irq(socket); 538 if (pci_irq_status == 1) { 539 printk(KERN_INFO "Yenta TI: socket %s all-serial interrupts, tied ok\n", 540 pci_name(socket->dev)); 541 goto out; 542 } 543 544 ti12xx_untie_interrupts(socket, old_irq); 545 } 546 } 547 /* parallel PCI: route INTB, probe again */ 548 else { 549 int old_irq; 550 551 switch (socket->dev->device) { 552 case PCI_DEVICE_ID_TI_1250: 553 /* the 1250 has one pin for IRQSER/INTB depending on devctl */ 554 break; 555 556 case PCI_DEVICE_ID_TI_1251A: 557 case PCI_DEVICE_ID_TI_1251B: 558 case PCI_DEVICE_ID_TI_1450: 559 /* 560 * those have a pin for IRQSER/INTB plus INTB in MFUNC0 561 * we alread probed the shared pin, now go for MFUNC0 562 */ 563 mfunc = (mfunc & ~TI122X_MFUNC0_MASK) | TI125X_MFUNC0_INTB; 564 break; 565 566 default: 567 mfunc = (mfunc & ~TI122X_MFUNC1_MASK) | TI122X_MFUNC1_INTB; 568 break; 569 } 570 571 /* write, probe */ 572 if (mfunc != mfunc_old) { 573 config_writel(socket, TI122X_MFUNC, mfunc); 574 575 pci_irq_status = yenta_probe_cb_irq(socket); 576 if (pci_irq_status == 1) { 577 printk(KERN_INFO "Yenta TI: socket %s parallel PCI interrupts ok\n", 578 pci_name(socket->dev)); 579 goto out; 580 } 581 582 mfunc = mfunc_old; 583 config_writel(socket, TI122X_MFUNC, mfunc); 584 585 if (pci_irq_status == -1) 586 goto out; 587 } 588 589 /* still nothing: set INTRTIE */ 590 if (ti12xx_tie_interrupts(socket, &old_irq)) { 591 pci_irq_status = yenta_probe_cb_irq(socket); 592 if (pci_irq_status == 1) { 593 printk(KERN_INFO "Yenta TI: socket %s parallel PCI interrupts, tied ok\n", 594 pci_name(socket->dev)); 595 goto out; 596 } 597 598 ti12xx_untie_interrupts(socket, old_irq); 599 } 600 } 601 602out: 603 if (pci_irq_status < 1) { 604 socket->cb_irq = 0; 605 printk(KERN_INFO "Yenta TI: socket %s no PCI interrupts. Fish. Please report.\n", 606 pci_name(socket->dev)); 607 } 608} 609 610 611/* Returns true value if the second slot of a two-slot controller is empty */ 612static int ti12xx_2nd_slot_empty(struct yenta_socket *socket) 613{ 614 struct pci_dev *func; 615 struct yenta_socket *slot2; 616 int devfn; 617 unsigned int state; 618 int ret = 1; 619 u32 sysctl; 620 621 /* catch the two-slot controllers */ 622 switch (socket->dev->device) { 623 case PCI_DEVICE_ID_TI_1220: 624 case PCI_DEVICE_ID_TI_1221: 625 case PCI_DEVICE_ID_TI_1225: 626 case PCI_DEVICE_ID_TI_1251A: 627 case PCI_DEVICE_ID_TI_1251B: 628 case PCI_DEVICE_ID_TI_1420: 629 case PCI_DEVICE_ID_TI_1450: 630 case PCI_DEVICE_ID_TI_1451A: 631 case PCI_DEVICE_ID_TI_1520: 632 case PCI_DEVICE_ID_TI_1620: 633 case PCI_DEVICE_ID_TI_4520: 634 case PCI_DEVICE_ID_TI_4450: 635 case PCI_DEVICE_ID_TI_4451: 636 /* 637 * there are way more, but they need to be added in yenta_socket.c 638 * and pci_ids.h first anyway. 639 */ 640 break; 641 642 case PCI_DEVICE_ID_TI_XX12: 643 case PCI_DEVICE_ID_TI_X515: 644 case PCI_DEVICE_ID_TI_X420: 645 case PCI_DEVICE_ID_TI_X620: 646 case PCI_DEVICE_ID_TI_XX21_XX11: 647 case PCI_DEVICE_ID_TI_7410: 648 case PCI_DEVICE_ID_TI_7610: 649 /* 650 * those are either single or dual slot CB with additional functions 651 * like 1394, smartcard reader, etc. check the TIEALL flag for them 652 * the TIEALL flag binds the IRQ of all functions toghether. 653 * we catch the single slot variants later. 654 */ 655 sysctl = config_readl(socket, TI113X_SYSTEM_CONTROL); 656 if (sysctl & TIXX21_SCR_TIEALL) 657 return 0; 658 659 break; 660 661 /* single-slot controllers have the 2nd slot empty always :) */ 662 default: 663 return 1; 664 } 665 666 /* get other slot */ 667 devfn = socket->dev->devfn & ~0x07; 668 func = pci_get_slot(socket->dev->bus, 669 (socket->dev->devfn & 0x07) ? devfn : devfn | 0x01); 670 if (!func) 671 return 1; 672 673 /* 674 * check that the device id of both slots match. this is needed for the 675 * XX21 and the XX11 controller that share the same device id for single 676 * and dual slot controllers. return '2nd slot empty'. we already checked 677 * if the interrupt is tied to another function. 678 */ 679 if (socket->dev->device != func->device) 680 goto out; 681 682 slot2 = pci_get_drvdata(func); 683 if (!slot2) 684 goto out; 685 686 /* check state */ 687 yenta_get_status(&socket->socket, &state); 688 if (state & SS_DETECT) { 689 ret = 0; 690 goto out; 691 } 692 693out: 694 pci_dev_put(func); 695 return ret; 696} 697 698/* 699 * TI specifiy parts for the power hook. 700 * 701 * some TI's with some CB's produces interrupt storm on power on. it has been 702 * seen with atheros wlan cards on TI1225 and TI1410. solution is simply to 703 * disable any CB interrupts during this time. 704 */ 705static int ti12xx_power_hook(struct pcmcia_socket *sock, int operation) 706{ 707 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); 708 u32 mfunc, devctl, sysctl; 709 u8 gpio3; 710 711 /* only POWER_PRE and POWER_POST are interesting */ 712 if ((operation != HOOK_POWER_PRE) && (operation != HOOK_POWER_POST)) 713 return 0; 714 715 devctl = config_readb(socket, TI113X_DEVICE_CONTROL); 716 sysctl = config_readl(socket, TI113X_SYSTEM_CONTROL); 717 mfunc = config_readl(socket, TI122X_MFUNC); 718 719 /* 720 * all serial/tied: only disable when modparm set. always doing it 721 * would mean a regression for working setups 'cos it disables the 722 * interrupts for both both slots on 2-slot controllers 723 * (and users of single slot controllers where it's save have to 724 * live with setting the modparm, most don't have to anyway) 725 */ 726 if (((devctl & TI113X_DCR_IMODE_MASK) == TI12XX_DCR_IMODE_ALL_SERIAL) && 727 (pwr_irqs_off || ti12xx_2nd_slot_empty(socket))) { 728 switch (socket->dev->device) { 729 case PCI_DEVICE_ID_TI_1250: 730 case PCI_DEVICE_ID_TI_1251A: 731 case PCI_DEVICE_ID_TI_1251B: 732 case PCI_DEVICE_ID_TI_1450: 733 case PCI_DEVICE_ID_TI_1451A: 734 case PCI_DEVICE_ID_TI_4450: 735 case PCI_DEVICE_ID_TI_4451: 736 /* these chips have no IRQSER setting in MFUNC3 */ 737 break; 738 739 default: 740 if (operation == HOOK_POWER_PRE) 741 mfunc = (mfunc & ~TI122X_MFUNC3_MASK); 742 else 743 mfunc = (mfunc & ~TI122X_MFUNC3_MASK) | TI122X_MFUNC3_IRQSER; 744 } 745 746 return 0; 747 } 748 749 /* do the job differently for func0/1 */ 750 if ((PCI_FUNC(socket->dev->devfn) == 0) || 751 ((sysctl & TI122X_SCR_INTRTIE) && 752 (pwr_irqs_off || ti12xx_2nd_slot_empty(socket)))) { 753 /* some bridges are different */ 754 switch (socket->dev->device) { 755 case PCI_DEVICE_ID_TI_1250: 756 case PCI_DEVICE_ID_TI_1251A: 757 case PCI_DEVICE_ID_TI_1251B: 758 case PCI_DEVICE_ID_TI_1450: 759 /* those oldies use gpio3 for INTA */ 760 gpio3 = config_readb(socket, TI1250_GPIO3_CONTROL); 761 if (operation == HOOK_POWER_PRE) 762 gpio3 = (gpio3 & ~TI1250_GPIO_MODE_MASK) | 0x40; 763 else 764 gpio3 &= ~TI1250_GPIO_MODE_MASK; 765 config_writeb(socket, TI1250_GPIO3_CONTROL, gpio3); 766 break; 767 768 default: 769 /* all new bridges are the same */ 770 if (operation == HOOK_POWER_PRE) 771 mfunc &= ~TI122X_MFUNC0_MASK; 772 else 773 mfunc |= TI122X_MFUNC0_INTA; 774 config_writel(socket, TI122X_MFUNC, mfunc); 775 } 776 } else { 777 switch (socket->dev->device) { 778 case PCI_DEVICE_ID_TI_1251A: 779 case PCI_DEVICE_ID_TI_1251B: 780 case PCI_DEVICE_ID_TI_1450: 781 /* those have INTA elsewhere and INTB in MFUNC0 */ 782 if (operation == HOOK_POWER_PRE) 783 mfunc &= ~TI122X_MFUNC0_MASK; 784 else 785 mfunc |= TI125X_MFUNC0_INTB; 786 config_writel(socket, TI122X_MFUNC, mfunc); 787 788 break; 789 790 default: 791 /* all new bridges are the same */ 792 if (operation == HOOK_POWER_PRE) 793 mfunc &= ~TI122X_MFUNC1_MASK; 794 else 795 mfunc |= TI122X_MFUNC1_INTB; 796 config_writel(socket, TI122X_MFUNC, mfunc); 797 } 798 } 799 800 return 0; 801} 802 803static int ti12xx_override(struct yenta_socket *socket) 804{ 805 u32 val, val_orig; 806 807 /* make sure that memory burst is active */ 808 val_orig = val = config_readl(socket, TI113X_SYSTEM_CONTROL); 809 if (disable_clkrun && PCI_FUNC(socket->dev->devfn) == 0) { 810 printk(KERN_INFO "Yenta: Disabling CLKRUN feature\n"); 811 val |= TI113X_SCR_KEEPCLK; 812 } 813 if (!(val & TI122X_SCR_MRBURSTUP)) { 814 printk(KERN_INFO "Yenta: Enabling burst memory read transactions\n"); 815 val |= TI122X_SCR_MRBURSTUP; 816 } 817 if (val_orig != val) 818 config_writel(socket, TI113X_SYSTEM_CONTROL, val); 819 820 /* 821 * Yenta expects controllers to use CSCINT to route 822 * CSC interrupts to PCI rather than INTVAL. 823 */ 824 val = config_readb(socket, TI1250_DIAGNOSTIC); 825 printk(KERN_INFO "Yenta: Using %s to route CSC interrupts to PCI\n", 826 (val & TI1250_DIAG_PCI_CSC) ? "CSCINT" : "INTVAL"); 827 printk(KERN_INFO "Yenta: Routing CardBus interrupts to %s\n", 828 (val & TI1250_DIAG_PCI_IREQ) ? "PCI" : "ISA"); 829 830 /* do irqrouting, depending on function */ 831 if (PCI_FUNC(socket->dev->devfn) == 0) 832 ti12xx_irqroute_func0(socket); 833 else 834 ti12xx_irqroute_func1(socket); 835 836 /* install power hook */ 837 socket->socket.power_hook = ti12xx_power_hook; 838 839 return ti_override(socket); 840} 841 842 843static int ti1250_override(struct yenta_socket *socket) 844{ 845 u8 old, diag; 846 847 old = config_readb(socket, TI1250_DIAGNOSTIC); 848 diag = old & ~(TI1250_DIAG_PCI_CSC | TI1250_DIAG_PCI_IREQ); 849 if (socket->cb_irq) 850 diag |= TI1250_DIAG_PCI_CSC | TI1250_DIAG_PCI_IREQ; 851 852 if (diag != old) { 853 printk(KERN_INFO "Yenta: adjusting diagnostic: %02x -> %02x\n", 854 old, diag); 855 config_writeb(socket, TI1250_DIAGNOSTIC, diag); 856 } 857 858 return ti12xx_override(socket); 859} 860 861 862/** 863 * EnE specific part. EnE bridges are register compatible with TI bridges but 864 * have their own test registers and more important their own little problems. 865 * Some fixup code to make everybody happy (TM). 866 */ 867 868#ifdef CONFIG_YENTA_ENE_TUNE 869/** 870 * set/clear various test bits: 871 * Defaults to clear the bit. 872 * - mask (u8) defines what bits to change 873 * - bits (u8) is the values to change them to 874 * -> it's 875 * current = (current & ~mask) | bits 876 */ 877/* pci ids of devices that wants to have the bit set */ 878#define DEVID(_vend,_dev,_subvend,_subdev,mask,bits) { \ 879 .vendor = _vend, \ 880 .device = _dev, \ 881 .subvendor = _subvend, \ 882 .subdevice = _subdev, \ 883 .driver_data = ((mask) << 8 | (bits)), \ 884 } 885static struct pci_device_id ene_tune_tbl[] = { 886 /* Echo Audio products based on motorola DSP56301 and DSP56361 */ 887 DEVID(PCI_VENDOR_ID_MOTOROLA, 0x1801, 0xECC0, PCI_ANY_ID, 888 ENE_TEST_C9_TLTENABLE | ENE_TEST_C9_PFENABLE, ENE_TEST_C9_TLTENABLE), 889 DEVID(PCI_VENDOR_ID_MOTOROLA, 0x3410, 0xECC0, PCI_ANY_ID, 890 ENE_TEST_C9_TLTENABLE | ENE_TEST_C9_PFENABLE, ENE_TEST_C9_TLTENABLE), 891 892 {} 893}; 894 895static void ene_tune_bridge(struct pcmcia_socket *sock, struct pci_bus *bus) 896{ 897 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); 898 struct pci_dev *dev; 899 struct pci_device_id *id = NULL; 900 u8 test_c9, old_c9, mask, bits; 901 902 list_for_each_entry(dev, &bus->devices, bus_list) { 903 id = (struct pci_device_id *) pci_match_id(ene_tune_tbl, dev); 904 if (id) 905 break; 906 } 907 908 test_c9 = old_c9 = config_readb(socket, ENE_TEST_C9); 909 if (id) { 910 mask = (id->driver_data >> 8) & 0xFF; 911 bits = id->driver_data & 0xFF; 912 913 test_c9 = (test_c9 & ~mask) | bits; 914 } 915 else 916 /* default to clear TLTEnable bit, old behaviour */ 917 test_c9 &= ~ENE_TEST_C9_TLTENABLE; 918 919 printk(KERN_INFO "yenta EnE: chaning testregister 0xC9, %02x -> %02x\n", old_c9, test_c9); 920 config_writeb(socket, ENE_TEST_C9, test_c9); 921} 922 923static int ene_override(struct yenta_socket *socket) 924{ 925 /* install tune_bridge() function */ 926 socket->socket.tune_bridge = ene_tune_bridge; 927 928 return ti1250_override(socket); 929} 930#else 931# define ene_override ti1250_override 932#endif /* !CONFIG_YENTA_ENE_TUNE */ 933 934#endif /* _LINUX_TI113X_H */ 935