1/****************************************************************************** 2 3 Copyright(c) 2003 - 2006 Intel Corporation. All rights reserved. 4 5 This program is free software; you can redistribute it and/or modify it 6 under the terms of version 2 of the GNU General Public License as 7 published by the Free Software Foundation. 8 9 This program is distributed in the hope that it will be useful, but WITHOUT 10 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 more details. 13 14 You should have received a copy of the GNU General Public License along with 15 this program; if not, write to the Free Software Foundation, Inc., 59 16 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 17 18 The full GNU General Public License is included in this distribution in the 19 file called LICENSE. 20 21 Contact Information: 22 James P. Ketrenos <ipw2100-admin@linux.intel.com> 23 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 24 25******************************************************************************/ 26#ifndef _IPW2100_H 27#define _IPW2100_H 28 29#include <linux/sched.h> 30#include <linux/interrupt.h> 31#include <linux/netdevice.h> 32#include <linux/etherdevice.h> 33#include <linux/list.h> 34#include <linux/delay.h> 35#include <linux/skbuff.h> 36#include <asm/io.h> 37#include <linux/socket.h> 38#include <linux/if_arp.h> 39#include <linux/wireless.h> 40#include <net/iw_handler.h> // new driver API 41 42#include <net/ieee80211.h> 43 44#ifdef CONFIG_IPW2100_MONITOR 45#include <net/ieee80211_radiotap.h> 46#endif 47 48#include <linux/workqueue.h> 49#include <linux/mutex.h> 50 51struct ipw2100_priv; 52struct ipw2100_tx_packet; 53struct ipw2100_rx_packet; 54 55#define IPW_DL_UNINIT 0x80000000 56#define IPW_DL_NONE 0x00000000 57#define IPW_DL_ALL 0x7FFFFFFF 58 59 60#define IPW_DL_ERROR (1<<0) 61#define IPW_DL_WARNING (1<<1) 62#define IPW_DL_INFO (1<<2) 63#define IPW_DL_WX (1<<3) 64#define IPW_DL_HC (1<<5) 65#define IPW_DL_STATE (1<<6) 66 67#define IPW_DL_NOTIF (1<<10) 68#define IPW_DL_SCAN (1<<11) 69#define IPW_DL_ASSOC (1<<12) 70#define IPW_DL_DROP (1<<13) 71 72#define IPW_DL_IOCTL (1<<14) 73#define IPW_DL_RF_KILL (1<<17) 74 75#define IPW_DL_MANAGE (1<<15) 76#define IPW_DL_FW (1<<16) 77 78#define IPW_DL_FRAG (1<<21) 79#define IPW_DL_WEP (1<<22) 80#define IPW_DL_TX (1<<23) 81#define IPW_DL_RX (1<<24) 82#define IPW_DL_ISR (1<<25) 83#define IPW_DL_IO (1<<26) 84#define IPW_DL_TRACE (1<<28) 85 86#define IPW_DEBUG_ERROR(f, a...) printk(KERN_ERR DRV_NAME ": " f, ## a) 87#define IPW_DEBUG_WARNING(f, a...) printk(KERN_WARNING DRV_NAME ": " f, ## a) 88#define IPW_DEBUG_INFO(f...) IPW_DEBUG(IPW_DL_INFO, ## f) 89#define IPW_DEBUG_WX(f...) IPW_DEBUG(IPW_DL_WX, ## f) 90#define IPW_DEBUG_SCAN(f...) IPW_DEBUG(IPW_DL_SCAN, ## f) 91#define IPW_DEBUG_NOTIF(f...) IPW_DEBUG(IPW_DL_NOTIF, ## f) 92#define IPW_DEBUG_TRACE(f...) IPW_DEBUG(IPW_DL_TRACE, ## f) 93#define IPW_DEBUG_RX(f...) IPW_DEBUG(IPW_DL_RX, ## f) 94#define IPW_DEBUG_TX(f...) IPW_DEBUG(IPW_DL_TX, ## f) 95#define IPW_DEBUG_ISR(f...) IPW_DEBUG(IPW_DL_ISR, ## f) 96#define IPW_DEBUG_MANAGEMENT(f...) IPW_DEBUG(IPW_DL_MANAGE, ## f) 97#define IPW_DEBUG_WEP(f...) IPW_DEBUG(IPW_DL_WEP, ## f) 98#define IPW_DEBUG_HC(f...) IPW_DEBUG(IPW_DL_HC, ## f) 99#define IPW_DEBUG_FRAG(f...) IPW_DEBUG(IPW_DL_FRAG, ## f) 100#define IPW_DEBUG_FW(f...) IPW_DEBUG(IPW_DL_FW, ## f) 101#define IPW_DEBUG_RF_KILL(f...) IPW_DEBUG(IPW_DL_RF_KILL, ## f) 102#define IPW_DEBUG_DROP(f...) IPW_DEBUG(IPW_DL_DROP, ## f) 103#define IPW_DEBUG_IO(f...) IPW_DEBUG(IPW_DL_IO, ## f) 104#define IPW_DEBUG_IOCTL(f...) IPW_DEBUG(IPW_DL_IOCTL, ## f) 105#define IPW_DEBUG_STATE(f, a...) IPW_DEBUG(IPW_DL_STATE | IPW_DL_ASSOC | IPW_DL_INFO, f, ## a) 106#define IPW_DEBUG_ASSOC(f, a...) IPW_DEBUG(IPW_DL_ASSOC | IPW_DL_INFO, f, ## a) 107 108enum { 109 IPW_HW_STATE_DISABLED = 1, 110 IPW_HW_STATE_ENABLED = 0 111}; 112 113struct ssid_context { 114 char ssid[IW_ESSID_MAX_SIZE + 1]; 115 int ssid_len; 116 unsigned char bssid[ETH_ALEN]; 117 int port_type; 118 int channel; 119 120}; 121 122extern const char *port_type_str[]; 123extern const char *band_str[]; 124 125#define NUMBER_OF_BD_PER_COMMAND_PACKET 1 126#define NUMBER_OF_BD_PER_DATA_PACKET 2 127 128#define IPW_MAX_BDS 6 129#define NUMBER_OF_OVERHEAD_BDS_PER_PACKETR 2 130#define NUMBER_OF_BDS_TO_LEAVE_FOR_COMMANDS 1 131 132#define REQUIRED_SPACE_IN_RING_FOR_COMMAND_PACKET \ 133 (IPW_BD_QUEUE_W_R_MIN_SPARE + NUMBER_OF_BD_PER_COMMAND_PACKET) 134 135struct bd_status { 136 union { 137 struct { 138 u8 nlf:1, txType:2, intEnabled:1, reserved:4; 139 } fields; 140 u8 field; 141 } info; 142} __attribute__ ((packed)); 143 144struct ipw2100_bd { 145 u32 host_addr; 146 u32 buf_length; 147 struct bd_status status; 148 /* number of fragments for frame (should be set only for 149 * 1st TBD) */ 150 u8 num_fragments; 151 u8 reserved[6]; 152} __attribute__ ((packed)); 153 154#define IPW_BD_QUEUE_LENGTH(n) (1<<n) 155#define IPW_BD_ALIGNMENT(L) (L*sizeof(struct ipw2100_bd)) 156 157#define IPW_BD_STATUS_TX_FRAME_802_3 0x00 158#define IPW_BD_STATUS_TX_FRAME_NOT_LAST_FRAGMENT 0x01 159#define IPW_BD_STATUS_TX_FRAME_COMMAND 0x02 160#define IPW_BD_STATUS_TX_FRAME_802_11 0x04 161#define IPW_BD_STATUS_TX_INTERRUPT_ENABLE 0x08 162 163struct ipw2100_bd_queue { 164 /* driver (virtual) pointer to queue */ 165 struct ipw2100_bd *drv; 166 167 /* firmware (physical) pointer to queue */ 168 dma_addr_t nic; 169 170 /* Length of phy memory allocated for BDs */ 171 u32 size; 172 173 /* Number of BDs in queue (and in array) */ 174 u32 entries; 175 176 /* Number of available BDs (invalid for NIC BDs) */ 177 u32 available; 178 179 /* Offset of oldest used BD in array (next one to 180 * check for completion) */ 181 u32 oldest; 182 183 /* Offset of next available (unused) BD */ 184 u32 next; 185}; 186 187#define RX_QUEUE_LENGTH 256 188#define TX_QUEUE_LENGTH 256 189#define HW_QUEUE_LENGTH 256 190 191#define TX_PENDED_QUEUE_LENGTH (TX_QUEUE_LENGTH / NUMBER_OF_BD_PER_DATA_PACKET) 192 193#define STATUS_TYPE_MASK 0x0000000f 194#define COMMAND_STATUS_VAL 0 195#define STATUS_CHANGE_VAL 1 196#define P80211_DATA_VAL 2 197#define P8023_DATA_VAL 3 198#define HOST_NOTIFICATION_VAL 4 199 200#define IPW2100_RSSI_TO_DBM (-98) 201 202struct ipw2100_status { 203 u32 frame_size; 204 u16 status_fields; 205 u8 flags; 206#define IPW_STATUS_FLAG_DECRYPTED (1<<0) 207#define IPW_STATUS_FLAG_WEP_ENCRYPTED (1<<1) 208#define IPW_STATUS_FLAG_CRC_ERROR (1<<2) 209 u8 rssi; 210} __attribute__ ((packed)); 211 212struct ipw2100_status_queue { 213 /* driver (virtual) pointer to queue */ 214 struct ipw2100_status *drv; 215 216 /* firmware (physical) pointer to queue */ 217 dma_addr_t nic; 218 219 /* Length of phy memory allocated for BDs */ 220 u32 size; 221}; 222 223#define HOST_COMMAND_PARAMS_REG_LEN 100 224#define CMD_STATUS_PARAMS_REG_LEN 3 225 226#define IPW_WPA_CAPABILITIES 0x1 227#define IPW_WPA_LISTENINTERVAL 0x2 228#define IPW_WPA_AP_ADDRESS 0x4 229 230#define IPW_MAX_VAR_IE_LEN ((HOST_COMMAND_PARAMS_REG_LEN - 4) * sizeof(u32)) 231 232struct ipw2100_wpa_assoc_frame { 233 u16 fixed_ie_mask; 234 struct { 235 u16 capab_info; 236 u16 listen_interval; 237 u8 current_ap[ETH_ALEN]; 238 } fixed_ies; 239 u32 var_ie_len; 240 u8 var_ie[IPW_MAX_VAR_IE_LEN]; 241}; 242 243#define IPW_BSS 1 244#define IPW_MONITOR 2 245#define IPW_IBSS 3 246 247/** 248 * @struct _tx_cmd - HWCommand 249 * @brief H/W command structure. 250 */ 251struct ipw2100_cmd_header { 252 u32 host_command_reg; 253 u32 host_command_reg1; 254 u32 sequence; 255 u32 host_command_len_reg; 256 u32 host_command_params_reg[HOST_COMMAND_PARAMS_REG_LEN]; 257 u32 cmd_status_reg; 258 u32 cmd_status_params_reg[CMD_STATUS_PARAMS_REG_LEN]; 259 u32 rxq_base_ptr; 260 u32 rxq_next_ptr; 261 u32 rxq_host_ptr; 262 u32 txq_base_ptr; 263 u32 txq_next_ptr; 264 u32 txq_host_ptr; 265 u32 tx_status_reg; 266 u32 reserved; 267 u32 status_change_reg; 268 u32 reserved1[3]; 269 u32 *ordinal1_ptr; 270 u32 *ordinal2_ptr; 271} __attribute__ ((packed)); 272 273struct ipw2100_data_header { 274 u32 host_command_reg; 275 u32 host_command_reg1; 276 u8 encrypted; // BOOLEAN in win! TRUE if frame is enc by driver 277 u8 needs_encryption; // BOOLEAN in win! TRUE if frma need to be enc in NIC 278 u8 wep_index; // 0 no key, 1-4 key index, 0xff immediate key 279 u8 key_size; // 0 no imm key, 0x5 64bit encr, 0xd 128bit encr, 0x10 128bit encr and 128bit IV 280 u8 key[16]; 281 u8 reserved[10]; // f/w reserved 282 u8 src_addr[ETH_ALEN]; 283 u8 dst_addr[ETH_ALEN]; 284 u16 fragment_size; 285} __attribute__ ((packed)); 286 287/* Host command data structure */ 288struct host_command { 289 u32 host_command; // COMMAND ID 290 u32 host_command1; // COMMAND ID 291 u32 host_command_sequence; // UNIQUE COMMAND NUMBER (ID) 292 u32 host_command_length; // LENGTH 293 u32 host_command_parameters[HOST_COMMAND_PARAMS_REG_LEN]; // COMMAND PARAMETERS 294} __attribute__ ((packed)); 295 296typedef enum { 297 POWER_ON_RESET, 298 EXIT_POWER_DOWN_RESET, 299 SW_RESET, 300 EEPROM_RW, 301 SW_RE_INIT 302} ipw2100_reset_event; 303 304enum { 305 COMMAND = 0xCAFE, 306 DATA, 307 RX 308}; 309 310struct ipw2100_tx_packet { 311 int type; 312 int index; 313 union { 314 struct { /* COMMAND */ 315 struct ipw2100_cmd_header *cmd; 316 dma_addr_t cmd_phys; 317 } c_struct; 318 struct { /* DATA */ 319 struct ipw2100_data_header *data; 320 dma_addr_t data_phys; 321 struct ieee80211_txb *txb; 322 } d_struct; 323 } info; 324 int jiffy_start; 325 326 struct list_head list; 327}; 328 329struct ipw2100_rx_packet { 330 struct ipw2100_rx *rxp; 331 dma_addr_t dma_addr; 332 int jiffy_start; 333 struct sk_buff *skb; 334 struct list_head list; 335}; 336 337#define FRAG_DISABLED (1<<31) 338#define RTS_DISABLED (1<<31) 339#define MAX_RTS_THRESHOLD 2304U 340#define MIN_RTS_THRESHOLD 1U 341#define DEFAULT_RTS_THRESHOLD 1000U 342 343#define DEFAULT_BEACON_INTERVAL 100U 344#define DEFAULT_SHORT_RETRY_LIMIT 7U 345#define DEFAULT_LONG_RETRY_LIMIT 4U 346 347struct ipw2100_ordinals { 348 u32 table1_addr; 349 u32 table2_addr; 350 u32 table1_size; 351 u32 table2_size; 352}; 353 354/* Host Notification header */ 355struct ipw2100_notification { 356 u32 hnhdr_subtype; /* type of host notification */ 357 u32 hnhdr_size; /* size in bytes of data 358 or number of entries, if table. 359 Does NOT include header */ 360} __attribute__ ((packed)); 361 362#define MAX_KEY_SIZE 16 363#define MAX_KEYS 8 364 365#define IPW2100_WEP_ENABLE (1<<1) 366#define IPW2100_WEP_DROP_CLEAR (1<<2) 367 368#define IPW_NONE_CIPHER (1<<0) 369#define IPW_WEP40_CIPHER (1<<1) 370#define IPW_TKIP_CIPHER (1<<2) 371#define IPW_CCMP_CIPHER (1<<4) 372#define IPW_WEP104_CIPHER (1<<5) 373#define IPW_CKIP_CIPHER (1<<6) 374 375#define IPW_AUTH_OPEN 0 376#define IPW_AUTH_SHARED 1 377#define IPW_AUTH_LEAP 2 378#define IPW_AUTH_LEAP_CISCO_ID 0x80 379 380struct statistic { 381 int value; 382 int hi; 383 int lo; 384}; 385 386#define INIT_STAT(x) do { \ 387 (x)->value = (x)->hi = 0; \ 388 (x)->lo = 0x7fffffff; \ 389} while (0) 390#define SET_STAT(x,y) do { \ 391 (x)->value = y; \ 392 if ((x)->value > (x)->hi) (x)->hi = (x)->value; \ 393 if ((x)->value < (x)->lo) (x)->lo = (x)->value; \ 394} while (0) 395#define INC_STAT(x) do { if (++(x)->value > (x)->hi) (x)->hi = (x)->value; } \ 396while (0) 397#define DEC_STAT(x) do { if (--(x)->value < (x)->lo) (x)->lo = (x)->value; } \ 398while (0) 399 400#define IPW2100_ERROR_QUEUE 5 401 402/* Power management code: enable or disable? */ 403enum { 404#ifdef CONFIG_PM 405 IPW2100_PM_DISABLED = 0, 406 PM_STATE_SIZE = 16, 407#else 408 IPW2100_PM_DISABLED = 1, 409 PM_STATE_SIZE = 0, 410#endif 411}; 412 413#define STATUS_POWERED (1<<0) 414#define STATUS_CMD_ACTIVE (1<<1) /**< host command in progress */ 415#define STATUS_RUNNING (1<<2) /* Card initialized, but not enabled */ 416#define STATUS_ENABLED (1<<3) /* Card enabled -- can scan,Tx,Rx */ 417#define STATUS_STOPPING (1<<4) /* Card is in shutdown phase */ 418#define STATUS_INITIALIZED (1<<5) /* Card is ready for external calls */ 419#define STATUS_ASSOCIATING (1<<9) /* Associated, but no BSSID yet */ 420#define STATUS_ASSOCIATED (1<<10) /* Associated and BSSID valid */ 421#define STATUS_INT_ENABLED (1<<11) 422#define STATUS_RF_KILL_HW (1<<12) 423#define STATUS_RF_KILL_SW (1<<13) 424#define STATUS_RF_KILL_MASK (STATUS_RF_KILL_HW | STATUS_RF_KILL_SW) 425#define STATUS_EXIT_PENDING (1<<14) 426 427#define STATUS_SCAN_PENDING (1<<23) 428#define STATUS_SCANNING (1<<24) 429#define STATUS_SCAN_ABORTING (1<<25) 430#define STATUS_SCAN_COMPLETE (1<<26) 431#define STATUS_WX_EVENT_PENDING (1<<27) 432#define STATUS_RESET_PENDING (1<<29) 433#define STATUS_SECURITY_UPDATED (1<<30) /* Security sync needed */ 434 435/* Internal NIC states */ 436#define IPW_STATE_INITIALIZED (1<<0) 437#define IPW_STATE_COUNTRY_FOUND (1<<1) 438#define IPW_STATE_ASSOCIATED (1<<2) 439#define IPW_STATE_ASSN_LOST (1<<3) 440#define IPW_STATE_ASSN_CHANGED (1<<4) 441#define IPW_STATE_SCAN_COMPLETE (1<<5) 442#define IPW_STATE_ENTERED_PSP (1<<6) 443#define IPW_STATE_LEFT_PSP (1<<7) 444#define IPW_STATE_RF_KILL (1<<8) 445#define IPW_STATE_DISABLED (1<<9) 446#define IPW_STATE_POWER_DOWN (1<<10) 447#define IPW_STATE_SCANNING (1<<11) 448 449#define CFG_STATIC_CHANNEL (1<<0) /* Restrict assoc. to single channel */ 450#define CFG_STATIC_ESSID (1<<1) /* Restrict assoc. to single SSID */ 451#define CFG_STATIC_BSSID (1<<2) /* Restrict assoc. to single BSSID */ 452#define CFG_CUSTOM_MAC (1<<3) 453#define CFG_LONG_PREAMBLE (1<<4) 454#define CFG_ASSOCIATE (1<<6) 455#define CFG_FIXED_RATE (1<<7) 456#define CFG_ADHOC_CREATE (1<<8) 457#define CFG_C3_DISABLED (1<<9) 458#define CFG_PASSIVE_SCAN (1<<10) 459#ifdef CONFIG_IPW2100_MONITOR 460#define CFG_CRC_CHECK (1<<11) 461#endif 462 463#define CAP_SHARED_KEY (1<<0) /* Off = OPEN */ 464#define CAP_PRIVACY_ON (1<<1) /* Off = No privacy */ 465 466struct ipw2100_priv { 467 468 int stop_hang_check; /* Set 1 when shutting down to kill hang_check */ 469 int stop_rf_kill; /* Set 1 when shutting down to kill rf_kill */ 470 471 struct ieee80211_device *ieee; 472 unsigned long status; 473 unsigned long config; 474 unsigned long capability; 475 476 /* Statistics */ 477 int resets; 478 int reset_backoff; 479 480 /* Context */ 481 u8 essid[IW_ESSID_MAX_SIZE]; 482 u8 essid_len; 483 u8 bssid[ETH_ALEN]; 484 u8 channel; 485 int last_mode; 486 int cstate_limit; 487 488 unsigned long connect_start; 489 unsigned long last_reset; 490 491 u32 channel_mask; 492 u32 fatal_error; 493 u32 fatal_errors[IPW2100_ERROR_QUEUE]; 494 u32 fatal_index; 495 int eeprom_version; 496 int firmware_version; 497 unsigned long hw_features; 498 int hangs; 499 u32 last_rtc; 500 int dump_raw; /* 1 to dump raw bytes in /sys/.../memory */ 501 u8 *snapshot[0x30]; 502 503 u8 mandatory_bssid_mac[ETH_ALEN]; 504 u8 mac_addr[ETH_ALEN]; 505 506 int power_mode; 507 508 int messages_sent; 509 510 int short_retry_limit; 511 int long_retry_limit; 512 513 u32 rts_threshold; 514 u32 frag_threshold; 515 516 int in_isr; 517 518 u32 tx_rates; 519 int tx_power; 520 u32 beacon_interval; 521 522 char nick[IW_ESSID_MAX_SIZE + 1]; 523 524 struct ipw2100_status_queue status_queue; 525 526 struct statistic txq_stat; 527 struct statistic rxq_stat; 528 struct ipw2100_bd_queue rx_queue; 529 struct ipw2100_bd_queue tx_queue; 530 struct ipw2100_rx_packet *rx_buffers; 531 532 struct statistic fw_pend_stat; 533 struct list_head fw_pend_list; 534 535 struct statistic msg_free_stat; 536 struct statistic msg_pend_stat; 537 struct list_head msg_free_list; 538 struct list_head msg_pend_list; 539 struct ipw2100_tx_packet *msg_buffers; 540 541 struct statistic tx_free_stat; 542 struct statistic tx_pend_stat; 543 struct list_head tx_free_list; 544 struct list_head tx_pend_list; 545 struct ipw2100_tx_packet *tx_buffers; 546 547 struct ipw2100_ordinals ordinals; 548 549 struct pci_dev *pci_dev; 550 551 struct proc_dir_entry *dir_dev; 552 553 struct net_device *net_dev; 554 struct iw_statistics wstats; 555 556 struct iw_public_data wireless_data; 557 558 struct tasklet_struct irq_tasklet; 559 560 struct workqueue_struct *workqueue; 561 struct delayed_work reset_work; 562 struct delayed_work security_work; 563 struct delayed_work wx_event_work; 564 struct delayed_work hang_check; 565 struct delayed_work rf_kill; 566 567 u32 interrupts; 568 int tx_interrupts; 569 int rx_interrupts; 570 int inta_other; 571 572 spinlock_t low_lock; 573 struct mutex action_mutex; 574 struct mutex adapter_mutex; 575 576 wait_queue_head_t wait_command_queue; 577}; 578 579/********************************************************* 580 * Host Command -> From Driver to FW 581 *********************************************************/ 582 583/** 584 * Host command identifiers 585 */ 586#define HOST_COMPLETE 2 587#define SYSTEM_CONFIG 6 588#define SSID 8 589#define MANDATORY_BSSID 9 590#define AUTHENTICATION_TYPE 10 591#define ADAPTER_ADDRESS 11 592#define PORT_TYPE 12 593#define INTERNATIONAL_MODE 13 594#define CHANNEL 14 595#define RTS_THRESHOLD 15 596#define FRAG_THRESHOLD 16 597#define POWER_MODE 17 598#define TX_RATES 18 599#define BASIC_TX_RATES 19 600#define WEP_KEY_INFO 20 601#define WEP_KEY_INDEX 25 602#define WEP_FLAGS 26 603#define ADD_MULTICAST 27 604#define CLEAR_ALL_MULTICAST 28 605#define BEACON_INTERVAL 29 606#define ATIM_WINDOW 30 607#define CLEAR_STATISTICS 31 608#define SEND 33 609#define TX_POWER_INDEX 36 610#define BROADCAST_SCAN 43 611#define CARD_DISABLE 44 612#define PREFERRED_BSSID 45 613#define SET_SCAN_OPTIONS 46 614#define SCAN_DWELL_TIME 47 615#define SWEEP_TABLE 48 616#define AP_OR_STATION_TABLE 49 617#define GROUP_ORDINALS 50 618#define SHORT_RETRY_LIMIT 51 619#define LONG_RETRY_LIMIT 52 620 621#define HOST_PRE_POWER_DOWN 58 622#define CARD_DISABLE_PHY_OFF 61 623#define MSDU_TX_RATES 62 624 625/* Rogue AP Detection */ 626#define SET_STATION_STAT_BITS 64 627#define CLEAR_STATIONS_STAT_BITS 65 628#define LEAP_ROGUE_MODE 66 //TODO tbw replaced by CFG_LEAP_ROGUE_AP 629#define SET_SECURITY_INFORMATION 67 630#define DISASSOCIATION_BSSID 68 631#define SET_WPA_IE 69 632 633/* system configuration bit mask: */ 634#define IPW_CFG_MONITOR 0x00004 635#define IPW_CFG_PREAMBLE_AUTO 0x00010 636#define IPW_CFG_IBSS_AUTO_START 0x00020 637#define IPW_CFG_LOOPBACK 0x00100 638#define IPW_CFG_ANSWER_BCSSID_PROBE 0x00800 639#define IPW_CFG_BT_SIDEBAND_SIGNAL 0x02000 640#define IPW_CFG_802_1x_ENABLE 0x04000 641#define IPW_CFG_BSS_MASK 0x08000 642#define IPW_CFG_IBSS_MASK 0x10000 643 644#define IPW_SCAN_NOASSOCIATE (1<<0) 645#define IPW_SCAN_MIXED_CELL (1<<1) 646/* RESERVED (1<<2) */ 647#define IPW_SCAN_PASSIVE (1<<3) 648 649#define IPW_NIC_FATAL_ERROR 0x2A7F0 650#define IPW_ERROR_ADDR(x) (x & 0x3FFFF) 651#define IPW_ERROR_CODE(x) ((x & 0xFF000000) >> 24) 652#define IPW2100_ERR_C3_CORRUPTION (0x10 << 24) 653#define IPW2100_ERR_MSG_TIMEOUT (0x11 << 24) 654#define IPW2100_ERR_FW_LOAD (0x12 << 24) 655 656#define IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND 0x200 657#define IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x0D80 658 659#define IPW_MEM_HOST_SHARED_RX_BD_BASE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x40) 660#define IPW_MEM_HOST_SHARED_RX_STATUS_BASE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x44) 661#define IPW_MEM_HOST_SHARED_RX_BD_SIZE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x48) 662#define IPW_MEM_HOST_SHARED_RX_READ_INDEX (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0xa0) 663 664#define IPW_MEM_HOST_SHARED_TX_QUEUE_BD_BASE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x00) 665#define IPW_MEM_HOST_SHARED_TX_QUEUE_BD_SIZE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x04) 666#define IPW_MEM_HOST_SHARED_TX_QUEUE_READ_INDEX (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x80) 667 668#define IPW_MEM_HOST_SHARED_RX_WRITE_INDEX \ 669 (IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND + 0x20) 670 671#define IPW_MEM_HOST_SHARED_TX_QUEUE_WRITE_INDEX \ 672 (IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND) 673 674#define IPW_MEM_HOST_SHARED_ORDINALS_TABLE_1 (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x180) 675#define IPW_MEM_HOST_SHARED_ORDINALS_TABLE_2 (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x184) 676 677#define IPW2100_INTA_TX_TRANSFER (0x00000001) // Bit 0 (LSB) 678#define IPW2100_INTA_RX_TRANSFER (0x00000002) // Bit 1 679#define IPW2100_INTA_TX_COMPLETE (0x00000004) // Bit 2 680#define IPW2100_INTA_EVENT_INTERRUPT (0x00000008) // Bit 3 681#define IPW2100_INTA_STATUS_CHANGE (0x00000010) // Bit 4 682#define IPW2100_INTA_BEACON_PERIOD_EXPIRED (0x00000020) // Bit 5 683#define IPW2100_INTA_SLAVE_MODE_HOST_COMMAND_DONE (0x00010000) // Bit 16 684#define IPW2100_INTA_FW_INIT_DONE (0x01000000) // Bit 24 685#define IPW2100_INTA_FW_CALIBRATION_CALC (0x02000000) // Bit 25 686#define IPW2100_INTA_FATAL_ERROR (0x40000000) // Bit 30 687#define IPW2100_INTA_PARITY_ERROR (0x80000000) // Bit 31 (MSB) 688 689#define IPW_AUX_HOST_RESET_REG_PRINCETON_RESET (0x00000001) 690#define IPW_AUX_HOST_RESET_REG_FORCE_NMI (0x00000002) 691#define IPW_AUX_HOST_RESET_REG_PCI_HOST_CLUSTER_FATAL_NMI (0x00000004) 692#define IPW_AUX_HOST_RESET_REG_CORE_FATAL_NMI (0x00000008) 693#define IPW_AUX_HOST_RESET_REG_SW_RESET (0x00000080) 694#define IPW_AUX_HOST_RESET_REG_MASTER_DISABLED (0x00000100) 695#define IPW_AUX_HOST_RESET_REG_STOP_MASTER (0x00000200) 696 697#define IPW_AUX_HOST_GP_CNTRL_BIT_CLOCK_READY (0x00000001) // Bit 0 (LSB) 698#define IPW_AUX_HOST_GP_CNTRL_BIT_HOST_ALLOWS_STANDBY (0x00000002) // Bit 1 699#define IPW_AUX_HOST_GP_CNTRL_BIT_INIT_DONE (0x00000004) // Bit 2 700#define IPW_AUX_HOST_GP_CNTRL_BITS_SYS_CONFIG (0x000007c0) // Bits 6-10 701#define IPW_AUX_HOST_GP_CNTRL_BIT_BUS_TYPE (0x00000200) // Bit 9 702#define IPW_AUX_HOST_GP_CNTRL_BIT_BAR0_BLOCK_SIZE (0x00000400) // Bit 10 703#define IPW_AUX_HOST_GP_CNTRL_BIT_USB_MODE (0x20000000) // Bit 29 704#define IPW_AUX_HOST_GP_CNTRL_BIT_HOST_FORCES_SYS_CLK (0x40000000) // Bit 30 705#define IPW_AUX_HOST_GP_CNTRL_BIT_FW_FORCES_SYS_CLK (0x80000000) // Bit 31 (MSB) 706 707#define IPW_BIT_GPIO_GPIO1_MASK 0x0000000C 708#define IPW_BIT_GPIO_GPIO3_MASK 0x000000C0 709#define IPW_BIT_GPIO_GPIO1_ENABLE 0x00000008 710#define IPW_BIT_GPIO_RF_KILL 0x00010000 711 712#define IPW_BIT_GPIO_LED_OFF 0x00002000 // Bit 13 = 1 713 714#define IPW_REG_DOMAIN_0_OFFSET 0x0000 715#define IPW_REG_DOMAIN_1_OFFSET IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND 716 717#define IPW_REG_INTA IPW_REG_DOMAIN_0_OFFSET + 0x0008 718#define IPW_REG_INTA_MASK IPW_REG_DOMAIN_0_OFFSET + 0x000C 719#define IPW_REG_INDIRECT_ACCESS_ADDRESS IPW_REG_DOMAIN_0_OFFSET + 0x0010 720#define IPW_REG_INDIRECT_ACCESS_DATA IPW_REG_DOMAIN_0_OFFSET + 0x0014 721#define IPW_REG_AUTOINCREMENT_ADDRESS IPW_REG_DOMAIN_0_OFFSET + 0x0018 722#define IPW_REG_AUTOINCREMENT_DATA IPW_REG_DOMAIN_0_OFFSET + 0x001C 723#define IPW_REG_RESET_REG IPW_REG_DOMAIN_0_OFFSET + 0x0020 724#define IPW_REG_GP_CNTRL IPW_REG_DOMAIN_0_OFFSET + 0x0024 725#define IPW_REG_GPIO IPW_REG_DOMAIN_0_OFFSET + 0x0030 726#define IPW_REG_FW_TYPE IPW_REG_DOMAIN_1_OFFSET + 0x0188 727#define IPW_REG_FW_VERSION IPW_REG_DOMAIN_1_OFFSET + 0x018C 728#define IPW_REG_FW_COMPATABILITY_VERSION IPW_REG_DOMAIN_1_OFFSET + 0x0190 729 730#define IPW_REG_INDIRECT_ADDR_MASK 0x00FFFFFC 731 732#define IPW_INTERRUPT_MASK 0xC1010013 733 734#define IPW2100_CONTROL_REG 0x220000 735#define IPW2100_CONTROL_PHY_OFF 0x8 736 737#define IPW2100_COMMAND 0x00300004 738#define IPW2100_COMMAND_PHY_ON 0x0 739#define IPW2100_COMMAND_PHY_OFF 0x1 740 741/* in DEBUG_AREA, values of memory always 0xd55555d5 */ 742#define IPW_REG_DOA_DEBUG_AREA_START IPW_REG_DOMAIN_0_OFFSET + 0x0090 743#define IPW_REG_DOA_DEBUG_AREA_END IPW_REG_DOMAIN_0_OFFSET + 0x00FF 744#define IPW_DATA_DOA_DEBUG_VALUE 0xd55555d5 745 746#define IPW_INTERNAL_REGISTER_HALT_AND_RESET 0x003000e0 747 748#define IPW_WAIT_CLOCK_STABILIZATION_DELAY 50 // micro seconds 749#define IPW_WAIT_RESET_ARC_COMPLETE_DELAY 10 // micro seconds 750#define IPW_WAIT_RESET_MASTER_ASSERT_COMPLETE_DELAY 10 // micro seconds 751 752// BD ring queue read/write difference 753#define IPW_BD_QUEUE_W_R_MIN_SPARE 2 754 755#define IPW_CACHE_LINE_LENGTH_DEFAULT 0x80 756 757#define IPW_CARD_DISABLE_PHY_OFF_COMPLETE_WAIT 100 // 100 milli 758#define IPW_PREPARE_POWER_DOWN_COMPLETE_WAIT 100 // 100 milli 759 760#define IPW_HEADER_802_11_SIZE sizeof(struct ieee80211_hdr_3addr) 761#define IPW_MAX_80211_PAYLOAD_SIZE 2304U 762#define IPW_MAX_802_11_PAYLOAD_LENGTH 2312 763#define IPW_MAX_ACCEPTABLE_TX_FRAME_LENGTH 1536 764#define IPW_MIN_ACCEPTABLE_RX_FRAME_LENGTH 60 765#define IPW_MAX_ACCEPTABLE_RX_FRAME_LENGTH \ 766 (IPW_MAX_ACCEPTABLE_TX_FRAME_LENGTH + IPW_HEADER_802_11_SIZE - \ 767 sizeof(struct ethhdr)) 768 769#define IPW_802_11_FCS_LENGTH 4 770#define IPW_RX_NIC_BUFFER_LENGTH \ 771 (IPW_MAX_802_11_PAYLOAD_LENGTH + IPW_HEADER_802_11_SIZE + \ 772 IPW_802_11_FCS_LENGTH) 773 774#define IPW_802_11_PAYLOAD_OFFSET \ 775 (sizeof(struct ieee80211_hdr_3addr) + \ 776 sizeof(struct ieee80211_snap_hdr)) 777 778struct ipw2100_rx { 779 union { 780 unsigned char payload[IPW_RX_NIC_BUFFER_LENGTH]; 781 struct ieee80211_hdr_4addr header; 782 u32 status; 783 struct ipw2100_notification notification; 784 struct ipw2100_cmd_header command; 785 } rx_data; 786} __attribute__ ((packed)); 787 788/* Bit 0-7 are for 802.11b tx rates - . Bit 5-7 are reserved */ 789#define TX_RATE_1_MBIT 0x0001 790#define TX_RATE_2_MBIT 0x0002 791#define TX_RATE_5_5_MBIT 0x0004 792#define TX_RATE_11_MBIT 0x0008 793#define TX_RATE_MASK 0x000F 794#define DEFAULT_TX_RATES 0x000F 795 796#define IPW_POWER_MODE_CAM 0x00 //(always on) 797#define IPW_POWER_INDEX_1 0x01 798#define IPW_POWER_INDEX_2 0x02 799#define IPW_POWER_INDEX_3 0x03 800#define IPW_POWER_INDEX_4 0x04 801#define IPW_POWER_INDEX_5 0x05 802#define IPW_POWER_AUTO 0x06 803#define IPW_POWER_MASK 0x0F 804#define IPW_POWER_ENABLED 0x10 805#define IPW_POWER_LEVEL(x) ((x) & IPW_POWER_MASK) 806 807#define IPW_TX_POWER_AUTO 0 808#define IPW_TX_POWER_ENHANCED 1 809 810#define IPW_TX_POWER_DEFAULT 32 811#define IPW_TX_POWER_MIN 0 812#define IPW_TX_POWER_MAX 16 813#define IPW_TX_POWER_MIN_DBM (-12) 814#define IPW_TX_POWER_MAX_DBM 16 815 816#define FW_SCAN_DONOT_ASSOCIATE 0x0001 // Dont Attempt to Associate after Scan 817#define FW_SCAN_PASSIVE 0x0008 // Force PASSSIVE Scan 818 819#define REG_MIN_CHANNEL 0 820#define REG_MAX_CHANNEL 14 821 822#define REG_CHANNEL_MASK 0x00003FFF 823#define IPW_IBSS_11B_DEFAULT_MASK 0x87ff 824 825#define DIVERSITY_EITHER 0 // Use both antennas 826#define DIVERSITY_ANTENNA_A 1 // Use antenna A 827#define DIVERSITY_ANTENNA_B 2 // Use antenna B 828 829#define HOST_COMMAND_WAIT 0 830#define HOST_COMMAND_NO_WAIT 1 831 832#define LOCK_NONE 0 833#define LOCK_DRIVER 1 834#define LOCK_FW 2 835 836#define TYPE_SWEEP_ORD 0x000D 837#define TYPE_IBSS_STTN_ORD 0x000E 838#define TYPE_BSS_AP_ORD 0x000F 839#define TYPE_RAW_BEACON_ENTRY 0x0010 840#define TYPE_CALIBRATION_DATA 0x0011 841#define TYPE_ROGUE_AP_DATA 0x0012 842#define TYPE_ASSOCIATION_REQUEST 0x0013 843#define TYPE_REASSOCIATION_REQUEST 0x0014 844 845#define HW_FEATURE_RFKILL 0x0001 846#define RF_KILLSWITCH_OFF 1 847#define RF_KILLSWITCH_ON 0 848 849#define IPW_COMMAND_POOL_SIZE 40 850 851#define IPW_START_ORD_TAB_1 1 852#define IPW_START_ORD_TAB_2 1000 853 854#define IPW_ORD_TAB_1_ENTRY_SIZE sizeof(u32) 855 856#define IS_ORDINAL_TABLE_ONE(mgr,id) \ 857 ((id >= IPW_START_ORD_TAB_1) && (id < mgr->table1_size)) 858#define IS_ORDINAL_TABLE_TWO(mgr,id) \ 859 ((id >= IPW_START_ORD_TAB_2) && (id < (mgr->table2_size + IPW_START_ORD_TAB_2))) 860 861#define BSS_ID_LENGTH 6 862 863// Fixed size data: Ordinal Table 1 864typedef enum _ORDINAL_TABLE_1 { // NS - means Not Supported by FW 865// Transmit statistics 866 IPW_ORD_STAT_TX_HOST_REQUESTS = 1, // # of requested Host Tx's (MSDU) 867 IPW_ORD_STAT_TX_HOST_COMPLETE, // # of successful Host Tx's (MSDU) 868 IPW_ORD_STAT_TX_DIR_DATA, // # of successful Directed Tx's (MSDU) 869 870 IPW_ORD_STAT_TX_DIR_DATA1 = 4, // # of successful Directed Tx's (MSDU) @ 1MB 871 IPW_ORD_STAT_TX_DIR_DATA2, // # of successful Directed Tx's (MSDU) @ 2MB 872 IPW_ORD_STAT_TX_DIR_DATA5_5, // # of successful Directed Tx's (MSDU) @ 5_5MB 873 IPW_ORD_STAT_TX_DIR_DATA11, // # of successful Directed Tx's (MSDU) @ 11MB 874 IPW_ORD_STAT_TX_DIR_DATA22, // # of successful Directed Tx's (MSDU) @ 22MB 875 876 IPW_ORD_STAT_TX_NODIR_DATA1 = 13, // # of successful Non_Directed Tx's (MSDU) @ 1MB 877 IPW_ORD_STAT_TX_NODIR_DATA2, // # of successful Non_Directed Tx's (MSDU) @ 2MB 878 IPW_ORD_STAT_TX_NODIR_DATA5_5, // # of successful Non_Directed Tx's (MSDU) @ 5.5MB 879 IPW_ORD_STAT_TX_NODIR_DATA11, // # of successful Non_Directed Tx's (MSDU) @ 11MB 880 881 IPW_ORD_STAT_NULL_DATA = 21, // # of successful NULL data Tx's 882 IPW_ORD_STAT_TX_RTS, // # of successful Tx RTS 883 IPW_ORD_STAT_TX_CTS, // # of successful Tx CTS 884 IPW_ORD_STAT_TX_ACK, // # of successful Tx ACK 885 IPW_ORD_STAT_TX_ASSN, // # of successful Association Tx's 886 IPW_ORD_STAT_TX_ASSN_RESP, // # of successful Association response Tx's 887 IPW_ORD_STAT_TX_REASSN, // # of successful Reassociation Tx's 888 IPW_ORD_STAT_TX_REASSN_RESP, // # of successful Reassociation response Tx's 889 IPW_ORD_STAT_TX_PROBE, // # of probes successfully transmitted 890 IPW_ORD_STAT_TX_PROBE_RESP, // # of probe responses successfully transmitted 891 IPW_ORD_STAT_TX_BEACON, // # of tx beacon 892 IPW_ORD_STAT_TX_ATIM, // # of Tx ATIM 893 IPW_ORD_STAT_TX_DISASSN, // # of successful Disassociation TX 894 IPW_ORD_STAT_TX_AUTH, // # of successful Authentication Tx 895 IPW_ORD_STAT_TX_DEAUTH, // # of successful Deauthentication TX 896 897 IPW_ORD_STAT_TX_TOTAL_BYTES = 41, // Total successful Tx data bytes 898 IPW_ORD_STAT_TX_RETRIES, // # of Tx retries 899 IPW_ORD_STAT_TX_RETRY1, // # of Tx retries at 1MBPS 900 IPW_ORD_STAT_TX_RETRY2, // # of Tx retries at 2MBPS 901 IPW_ORD_STAT_TX_RETRY5_5, // # of Tx retries at 5.5MBPS 902 IPW_ORD_STAT_TX_RETRY11, // # of Tx retries at 11MBPS 903 904 IPW_ORD_STAT_TX_FAILURES = 51, // # of Tx Failures 905 IPW_ORD_STAT_TX_ABORT_AT_HOP, //NS // # of Tx's aborted at hop time 906 IPW_ORD_STAT_TX_MAX_TRIES_IN_HOP, // # of times max tries in a hop failed 907 IPW_ORD_STAT_TX_ABORT_LATE_DMA, //NS // # of times tx aborted due to late dma setup 908 IPW_ORD_STAT_TX_ABORT_STX, //NS // # of times backoff aborted 909 IPW_ORD_STAT_TX_DISASSN_FAIL, // # of times disassociation failed 910 IPW_ORD_STAT_TX_ERR_CTS, // # of missed/bad CTS frames 911 IPW_ORD_STAT_TX_BPDU, //NS // # of spanning tree BPDUs sent 912 IPW_ORD_STAT_TX_ERR_ACK, // # of tx err due to acks 913 914 // Receive statistics 915 IPW_ORD_STAT_RX_HOST = 61, // # of packets passed to host 916 IPW_ORD_STAT_RX_DIR_DATA, // # of directed packets 917 IPW_ORD_STAT_RX_DIR_DATA1, // # of directed packets at 1MB 918 IPW_ORD_STAT_RX_DIR_DATA2, // # of directed packets at 2MB 919 IPW_ORD_STAT_RX_DIR_DATA5_5, // # of directed packets at 5.5MB 920 IPW_ORD_STAT_RX_DIR_DATA11, // # of directed packets at 11MB 921 IPW_ORD_STAT_RX_DIR_DATA22, // # of directed packets at 22MB 922 923 IPW_ORD_STAT_RX_NODIR_DATA = 71, // # of nondirected packets 924 IPW_ORD_STAT_RX_NODIR_DATA1, // # of nondirected packets at 1MB 925 IPW_ORD_STAT_RX_NODIR_DATA2, // # of nondirected packets at 2MB 926 IPW_ORD_STAT_RX_NODIR_DATA5_5, // # of nondirected packets at 5.5MB 927 IPW_ORD_STAT_RX_NODIR_DATA11, // # of nondirected packets at 11MB 928 929 IPW_ORD_STAT_RX_NULL_DATA = 80, // # of null data rx's 930 IPW_ORD_STAT_RX_POLL, //NS // # of poll rx 931 IPW_ORD_STAT_RX_RTS, // # of Rx RTS 932 IPW_ORD_STAT_RX_CTS, // # of Rx CTS 933 IPW_ORD_STAT_RX_ACK, // # of Rx ACK 934 IPW_ORD_STAT_RX_CFEND, // # of Rx CF End 935 IPW_ORD_STAT_RX_CFEND_ACK, // # of Rx CF End + CF Ack 936 IPW_ORD_STAT_RX_ASSN, // # of Association Rx's 937 IPW_ORD_STAT_RX_ASSN_RESP, // # of Association response Rx's 938 IPW_ORD_STAT_RX_REASSN, // # of Reassociation Rx's 939 IPW_ORD_STAT_RX_REASSN_RESP, // # of Reassociation response Rx's 940 IPW_ORD_STAT_RX_PROBE, // # of probe Rx's 941 IPW_ORD_STAT_RX_PROBE_RESP, // # of probe response Rx's 942 IPW_ORD_STAT_RX_BEACON, // # of Rx beacon 943 IPW_ORD_STAT_RX_ATIM, // # of Rx ATIM 944 IPW_ORD_STAT_RX_DISASSN, // # of disassociation Rx 945 IPW_ORD_STAT_RX_AUTH, // # of authentication Rx 946 IPW_ORD_STAT_RX_DEAUTH, // # of deauthentication Rx 947 948 IPW_ORD_STAT_RX_TOTAL_BYTES = 101, // Total rx data bytes received 949 IPW_ORD_STAT_RX_ERR_CRC, // # of packets with Rx CRC error 950 IPW_ORD_STAT_RX_ERR_CRC1, // # of Rx CRC errors at 1MB 951 IPW_ORD_STAT_RX_ERR_CRC2, // # of Rx CRC errors at 2MB 952 IPW_ORD_STAT_RX_ERR_CRC5_5, // # of Rx CRC errors at 5.5MB 953 IPW_ORD_STAT_RX_ERR_CRC11, // # of Rx CRC errors at 11MB 954 955 IPW_ORD_STAT_RX_DUPLICATE1 = 112, // # of duplicate rx packets at 1MB 956 IPW_ORD_STAT_RX_DUPLICATE2, // # of duplicate rx packets at 2MB 957 IPW_ORD_STAT_RX_DUPLICATE5_5, // # of duplicate rx packets at 5.5MB 958 IPW_ORD_STAT_RX_DUPLICATE11, // # of duplicate rx packets at 11MB 959 IPW_ORD_STAT_RX_DUPLICATE = 119, // # of duplicate rx packets 960 961 IPW_ORD_PERS_DB_LOCK = 120, // # locking fw permanent db 962 IPW_ORD_PERS_DB_SIZE, // # size of fw permanent db 963 IPW_ORD_PERS_DB_ADDR, // # address of fw permanent db 964 IPW_ORD_STAT_RX_INVALID_PROTOCOL, // # of rx frames with invalid protocol 965 IPW_ORD_SYS_BOOT_TIME, // # Boot time 966 IPW_ORD_STAT_RX_NO_BUFFER, // # of rx frames rejected due to no buffer 967 IPW_ORD_STAT_RX_ABORT_LATE_DMA, //NS // # of rx frames rejected due to dma setup too late 968 IPW_ORD_STAT_RX_ABORT_AT_HOP, //NS // # of rx frames aborted due to hop 969 IPW_ORD_STAT_RX_MISSING_FRAG, // # of rx frames dropped due to missing fragment 970 IPW_ORD_STAT_RX_ORPHAN_FRAG, // # of rx frames dropped due to non-sequential fragment 971 IPW_ORD_STAT_RX_ORPHAN_FRAME, // # of rx frames dropped due to unmatched 1st frame 972 IPW_ORD_STAT_RX_FRAG_AGEOUT, // # of rx frames dropped due to uncompleted frame 973 IPW_ORD_STAT_RX_BAD_SSID, //NS // Bad SSID (unused) 974 IPW_ORD_STAT_RX_ICV_ERRORS, // # of ICV errors during decryption 975 976// PSP Statistics 977 IPW_ORD_STAT_PSP_SUSPENSION = 137, // # of times adapter suspended 978 IPW_ORD_STAT_PSP_BCN_TIMEOUT, // # of beacon timeout 979 IPW_ORD_STAT_PSP_POLL_TIMEOUT, // # of poll response timeouts 980 IPW_ORD_STAT_PSP_NONDIR_TIMEOUT, // # of timeouts waiting for last broadcast/muticast pkt 981 IPW_ORD_STAT_PSP_RX_DTIMS, // # of PSP DTIMs received 982 IPW_ORD_STAT_PSP_RX_TIMS, // # of PSP TIMs received 983 IPW_ORD_STAT_PSP_STATION_ID, // PSP Station ID 984 985// Association and roaming 986 IPW_ORD_LAST_ASSN_TIME = 147, // RTC time of last association 987 IPW_ORD_STAT_PERCENT_MISSED_BCNS, // current calculation of % missed beacons 988 IPW_ORD_STAT_PERCENT_RETRIES, // current calculation of % missed tx retries 989 IPW_ORD_ASSOCIATED_AP_PTR, // If associated, this is ptr to the associated 990 // AP table entry. set to 0 if not associated 991 IPW_ORD_AVAILABLE_AP_CNT, // # of AP's decsribed in the AP table 992 IPW_ORD_AP_LIST_PTR, // Ptr to list of available APs 993 IPW_ORD_STAT_AP_ASSNS, // # of associations 994 IPW_ORD_STAT_ASSN_FAIL, // # of association failures 995 IPW_ORD_STAT_ASSN_RESP_FAIL, // # of failuresdue to response fail 996 IPW_ORD_STAT_FULL_SCANS, // # of full scans 997 998 IPW_ORD_CARD_DISABLED, // # Card Disabled 999 IPW_ORD_STAT_ROAM_INHIBIT, // # of times roaming was inhibited due to ongoing activity 1000 IPW_FILLER_40, 1001 IPW_ORD_RSSI_AT_ASSN = 160, // RSSI of associated AP at time of association 1002 IPW_ORD_STAT_ASSN_CAUSE1, // # of reassociations due to no tx from AP in last N 1003 // hops or no prob_ responses in last 3 minutes 1004 IPW_ORD_STAT_ASSN_CAUSE2, // # of reassociations due to poor tx/rx quality 1005 IPW_ORD_STAT_ASSN_CAUSE3, // # of reassociations due to tx/rx quality with excessive 1006 // load at the AP 1007 IPW_ORD_STAT_ASSN_CAUSE4, // # of reassociations due to AP RSSI level fell below 1008 // eligible group 1009 IPW_ORD_STAT_ASSN_CAUSE5, // # of reassociations due to load leveling 1010 IPW_ORD_STAT_ASSN_CAUSE6, //NS // # of reassociations due to dropped by Ap 1011 IPW_FILLER_41, 1012 IPW_FILLER_42, 1013 IPW_FILLER_43, 1014 IPW_ORD_STAT_AUTH_FAIL, // # of times authentication failed 1015 IPW_ORD_STAT_AUTH_RESP_FAIL, // # of times authentication response failed 1016 IPW_ORD_STATION_TABLE_CNT, // # of entries in association table 1017 1018// Other statistics 1019 IPW_ORD_RSSI_AVG_CURR = 173, // Current avg RSSI 1020 IPW_ORD_STEST_RESULTS_CURR, //NS // Current self test results word 1021 IPW_ORD_STEST_RESULTS_CUM, //NS // Cummulative self test results word 1022 IPW_ORD_SELF_TEST_STATUS, //NS // 1023 IPW_ORD_POWER_MGMT_MODE, // Power mode - 0=CAM, 1=PSP 1024 IPW_ORD_POWER_MGMT_INDEX, //NS // 1025 IPW_ORD_COUNTRY_CODE, // IEEE country code as recv'd from beacon 1026 IPW_ORD_COUNTRY_CHANNELS, // channels suported by country 1027// IPW_ORD_COUNTRY_CHANNELS: 1028// For 11b the lower 2-byte are used for channels from 1-14 1029// and the higher 2-byte are not used. 1030 IPW_ORD_RESET_CNT, // # of adapter resets (warm) 1031 IPW_ORD_BEACON_INTERVAL, // Beacon interval 1032 1033 IPW_ORD_PRINCETON_VERSION = 184, //NS // Princeton Version 1034 IPW_ORD_ANTENNA_DIVERSITY, // TRUE if antenna diversity is disabled 1035 IPW_ORD_CCA_RSSI, //NS // CCA RSSI value (factory programmed) 1036 IPW_ORD_STAT_EEPROM_UPDATE, //NS // # of times config EEPROM updated 1037 IPW_ORD_DTIM_PERIOD, // # of beacon intervals between DTIMs 1038 IPW_ORD_OUR_FREQ, // current radio freq lower digits - channel ID 1039 1040 IPW_ORD_RTC_TIME = 190, // current RTC time 1041 IPW_ORD_PORT_TYPE, // operating mode 1042 IPW_ORD_CURRENT_TX_RATE, // current tx rate 1043 IPW_ORD_SUPPORTED_RATES, // Bitmap of supported tx rates 1044 IPW_ORD_ATIM_WINDOW, // current ATIM Window 1045 IPW_ORD_BASIC_RATES, // bitmap of basic tx rates 1046 IPW_ORD_NIC_HIGHEST_RATE, // bitmap of basic tx rates 1047 IPW_ORD_AP_HIGHEST_RATE, // bitmap of basic tx rates 1048 IPW_ORD_CAPABILITIES, // Management frame capability field 1049 IPW_ORD_AUTH_TYPE, // Type of authentication 1050 IPW_ORD_RADIO_TYPE, // Adapter card platform type 1051 IPW_ORD_RTS_THRESHOLD = 201, // Min length of packet after which RTS handshaking is used 1052 IPW_ORD_INT_MODE, // International mode 1053 IPW_ORD_FRAGMENTATION_THRESHOLD, // protocol frag threshold 1054 IPW_ORD_EEPROM_SRAM_DB_BLOCK_START_ADDRESS, // EEPROM offset in SRAM 1055 IPW_ORD_EEPROM_SRAM_DB_BLOCK_SIZE, // EEPROM size in SRAM 1056 IPW_ORD_EEPROM_SKU_CAPABILITY, // EEPROM SKU Capability 206 = 1057 IPW_ORD_EEPROM_IBSS_11B_CHANNELS, // EEPROM IBSS 11b channel set 1058 1059 IPW_ORD_MAC_VERSION = 209, // MAC Version 1060 IPW_ORD_MAC_REVISION, // MAC Revision 1061 IPW_ORD_RADIO_VERSION, // Radio Version 1062 IPW_ORD_NIC_MANF_DATE_TIME, // MANF Date/Time STAMP 1063 IPW_ORD_UCODE_VERSION, // Ucode Version 1064 IPW_ORD_HW_RF_SWITCH_STATE = 214, // HW RF Kill Switch State 1065} ORDINALTABLE1; 1066 1067// ordinal table 2 1068// Variable length data: 1069#define IPW_FIRST_VARIABLE_LENGTH_ORDINAL 1001 1070 1071typedef enum _ORDINAL_TABLE_2 { // NS - means Not Supported by FW 1072 IPW_ORD_STAT_BASE = 1000, // contains number of variable ORDs 1073 IPW_ORD_STAT_ADAPTER_MAC = 1001, // 6 bytes: our adapter MAC address 1074 IPW_ORD_STAT_PREFERRED_BSSID = 1002, // 6 bytes: BSSID of the preferred AP 1075 IPW_ORD_STAT_MANDATORY_BSSID = 1003, // 6 bytes: BSSID of the mandatory AP 1076 IPW_FILL_1, //NS // 1077 IPW_ORD_STAT_COUNTRY_TEXT = 1005, // 36 bytes: Country name text, First two bytes are Country code 1078 IPW_ORD_STAT_ASSN_SSID = 1006, // 32 bytes: ESSID String 1079 IPW_ORD_STATION_TABLE = 1007, // ? bytes: Station/AP table (via Direct SSID Scans) 1080 IPW_ORD_STAT_SWEEP_TABLE = 1008, // ? bytes: Sweep/Host Table table (via Broadcast Scans) 1081 IPW_ORD_STAT_ROAM_LOG = 1009, // ? bytes: Roaming log 1082 IPW_ORD_STAT_RATE_LOG = 1010, //NS // 0 bytes: Rate log 1083 IPW_ORD_STAT_FIFO = 1011, //NS // 0 bytes: Fifo buffer data structures 1084 IPW_ORD_STAT_FW_VER_NUM = 1012, // 14 bytes: fw version ID string as in (a.bb.ccc; "0.08.011") 1085 IPW_ORD_STAT_FW_DATE = 1013, // 14 bytes: fw date string (mmm dd yyyy; "Mar 13 2002") 1086 IPW_ORD_STAT_ASSN_AP_BSSID = 1014, // 6 bytes: MAC address of associated AP 1087 IPW_ORD_STAT_DEBUG = 1015, //NS // ? bytes: 1088 IPW_ORD_STAT_NIC_BPA_NUM = 1016, // 11 bytes: NIC BPA number in ASCII 1089 IPW_ORD_STAT_UCODE_DATE = 1017, // 5 bytes: uCode date 1090 IPW_ORD_SECURITY_NGOTIATION_RESULT = 1018, 1091} ORDINALTABLE2; // NS - means Not Supported by FW 1092 1093#define IPW_LAST_VARIABLE_LENGTH_ORDINAL 1018 1094 1095#ifndef WIRELESS_SPY 1096#define WIRELESS_SPY // enable iwspy support 1097#endif 1098 1099#define IPW_HOST_FW_SHARED_AREA0 0x0002f200 1100#define IPW_HOST_FW_SHARED_AREA0_END 0x0002f510 // 0x310 bytes 1101 1102#define IPW_HOST_FW_SHARED_AREA1 0x0002f610 1103#define IPW_HOST_FW_SHARED_AREA1_END 0x0002f630 // 0x20 bytes 1104 1105#define IPW_HOST_FW_SHARED_AREA2 0x0002fa00 1106#define IPW_HOST_FW_SHARED_AREA2_END 0x0002fa20 // 0x20 bytes 1107 1108#define IPW_HOST_FW_SHARED_AREA3 0x0002fc00 1109#define IPW_HOST_FW_SHARED_AREA3_END 0x0002fc10 // 0x10 bytes 1110 1111#define IPW_HOST_FW_INTERRUPT_AREA 0x0002ff80 1112#define IPW_HOST_FW_INTERRUPT_AREA_END 0x00030000 // 0x80 bytes 1113 1114struct ipw2100_fw_chunk { 1115 unsigned char *buf; 1116 long len; 1117 long pos; 1118 struct list_head list; 1119}; 1120 1121struct ipw2100_fw_chunk_set { 1122 const void *data; 1123 unsigned long size; 1124}; 1125 1126struct ipw2100_fw { 1127 int version; 1128 struct ipw2100_fw_chunk_set fw; 1129 struct ipw2100_fw_chunk_set uc; 1130 const struct firmware *fw_entry; 1131}; 1132 1133#define MAX_FW_VERSION_LEN 14 1134 1135#endif /* _IPW2100_H */ 1136