1/* 2 * madgemc.c: Driver for the Madge Smart 16/4 MC16 MCA token ring card. 3 * 4 * Written 2000 by Adam Fritzler 5 * 6 * This software may be used and distributed according to the terms 7 * of the GNU General Public License, incorporated herein by reference. 8 * 9 * This driver module supports the following cards: 10 * - Madge Smart 16/4 Ringnode MC16 11 * - Madge Smart 16/4 Ringnode MC32 (??) 12 * 13 * Maintainer(s): 14 * AF Adam Fritzler mid@auk.cx 15 * 16 * Modification History: 17 * 16-Jan-00 AF Created 18 * 19 */ 20static const char version[] = "madgemc.c: v0.91 23/01/2000 by Adam Fritzler\n"; 21 22#include <linux/module.h> 23#include <linux/mca.h> 24#include <linux/kernel.h> 25#include <linux/errno.h> 26#include <linux/init.h> 27#include <linux/netdevice.h> 28#include <linux/trdevice.h> 29 30#include <asm/system.h> 31#include <asm/io.h> 32#include <asm/irq.h> 33 34#include "tms380tr.h" 35#include "madgemc.h" /* Madge-specific constants */ 36 37#define MADGEMC_IO_EXTENT 32 38#define MADGEMC_SIF_OFFSET 0x08 39 40struct card_info { 41 /* 42 * These are read from the BIA ROM. 43 */ 44 unsigned int manid; 45 unsigned int cardtype; 46 unsigned int cardrev; 47 unsigned int ramsize; 48 49 /* 50 * These are read from the MCA POS registers. 51 */ 52 unsigned int burstmode:2; 53 unsigned int fairness:1; /* 0 = Fair, 1 = Unfair */ 54 unsigned int arblevel:4; 55 unsigned int ringspeed:2; /* 0 = 4mb, 1 = 16, 2 = Auto/none */ 56 unsigned int cabletype:1; /* 0 = RJ45, 1 = DB9 */ 57}; 58 59static int madgemc_open(struct net_device *dev); 60static int madgemc_close(struct net_device *dev); 61static int madgemc_chipset_init(struct net_device *dev); 62static void madgemc_read_rom(struct net_device *dev, struct card_info *card); 63static unsigned short madgemc_setnselout_pins(struct net_device *dev); 64static void madgemc_setcabletype(struct net_device *dev, int type); 65 66static int madgemc_mcaproc(char *buf, int slot, void *d); 67 68static void madgemc_setregpage(struct net_device *dev, int page); 69static void madgemc_setsifsel(struct net_device *dev, int val); 70static void madgemc_setint(struct net_device *dev, int val); 71 72static irqreturn_t madgemc_interrupt(int irq, void *dev_id); 73 74#define SIFREADB(reg) (inb(dev->base_addr + ((reg<0x8)?reg:reg-0x8))) 75#define SIFWRITEB(val, reg) (outb(val, dev->base_addr + ((reg<0x8)?reg:reg-0x8))) 76#define SIFREADW(reg) (inw(dev->base_addr + ((reg<0x8)?reg:reg-0x8))) 77#define SIFWRITEW(val, reg) (outw(val, dev->base_addr + ((reg<0x8)?reg:reg-0x8))) 78 79/* 80 * Read a byte-length value from the register. 81 */ 82static unsigned short madgemc_sifreadb(struct net_device *dev, unsigned short reg) 83{ 84 unsigned short ret; 85 if (reg<0x8) 86 ret = SIFREADB(reg); 87 else { 88 madgemc_setregpage(dev, 1); 89 ret = SIFREADB(reg); 90 madgemc_setregpage(dev, 0); 91 } 92 return ret; 93} 94 95/* 96 * Write a byte-length value to a register. 97 */ 98static void madgemc_sifwriteb(struct net_device *dev, unsigned short val, unsigned short reg) 99{ 100 if (reg<0x8) 101 SIFWRITEB(val, reg); 102 else { 103 madgemc_setregpage(dev, 1); 104 SIFWRITEB(val, reg); 105 madgemc_setregpage(dev, 0); 106 } 107 return; 108} 109 110/* 111 * Read a word-length value from a register 112 */ 113static unsigned short madgemc_sifreadw(struct net_device *dev, unsigned short reg) 114{ 115 unsigned short ret; 116 if (reg<0x8) 117 ret = SIFREADW(reg); 118 else { 119 madgemc_setregpage(dev, 1); 120 ret = SIFREADW(reg); 121 madgemc_setregpage(dev, 0); 122 } 123 return ret; 124} 125 126/* 127 * Write a word-length value to a register. 128 */ 129static void madgemc_sifwritew(struct net_device *dev, unsigned short val, unsigned short reg) 130{ 131 if (reg<0x8) 132 SIFWRITEW(val, reg); 133 else { 134 madgemc_setregpage(dev, 1); 135 SIFWRITEW(val, reg); 136 madgemc_setregpage(dev, 0); 137 } 138 return; 139} 140 141 142 143static int __devinit madgemc_probe(struct device *device) 144{ 145 static int versionprinted; 146 struct net_device *dev; 147 struct net_local *tp; 148 struct card_info *card; 149 struct mca_device *mdev = to_mca_device(device); 150 int ret = 0, i = 0; 151 152 if (versionprinted++ == 0) 153 printk("%s", version); 154 155 if(mca_device_claimed(mdev)) 156 return -EBUSY; 157 mca_device_set_claim(mdev, 1); 158 159 dev = alloc_trdev(sizeof(struct net_local)); 160 if (!dev) { 161 printk("madgemc: unable to allocate dev space\n"); 162 mca_device_set_claim(mdev, 0); 163 ret = -ENOMEM; 164 goto getout; 165 } 166 167 SET_MODULE_OWNER(dev); 168 dev->dma = 0; 169 170 card = kmalloc(sizeof(struct card_info), GFP_KERNEL); 171 if (card==NULL) { 172 printk("madgemc: unable to allocate card struct\n"); 173 ret = -ENOMEM; 174 goto getout1; 175 } 176 177 /* 178 * Parse configuration information. This all comes 179 * directly from the publicly available @002d.ADF. 180 * Get it from Madge or your local ADF library. 181 */ 182 183 /* 184 * Base address 185 */ 186 dev->base_addr = 0x0a20 + 187 ((mdev->pos[2] & MC16_POS2_ADDR2)?0x0400:0) + 188 ((mdev->pos[0] & MC16_POS0_ADDR1)?0x1000:0) + 189 ((mdev->pos[3] & MC16_POS3_ADDR3)?0x2000:0); 190 191 /* 192 * Interrupt line 193 */ 194 switch(mdev->pos[0] >> 6) { /* upper two bits */ 195 case 0x1: dev->irq = 3; break; 196 case 0x2: dev->irq = 9; break; /* IRQ 2 = IRQ 9 */ 197 case 0x3: dev->irq = 10; break; 198 default: dev->irq = 0; break; 199 } 200 201 if (dev->irq == 0) { 202 printk("%s: invalid IRQ\n", dev->name); 203 ret = -EBUSY; 204 goto getout2; 205 } 206 207 if (!request_region(dev->base_addr, MADGEMC_IO_EXTENT, 208 "madgemc")) { 209 printk(KERN_INFO "madgemc: unable to setup Smart MC in slot %d because of I/O base conflict at 0x%04lx\n", mdev->slot, dev->base_addr); 210 dev->base_addr += MADGEMC_SIF_OFFSET; 211 ret = -EBUSY; 212 goto getout2; 213 } 214 dev->base_addr += MADGEMC_SIF_OFFSET; 215 216 /* 217 * Arbitration Level 218 */ 219 card->arblevel = ((mdev->pos[0] >> 1) & 0x7) + 8; 220 221 /* 222 * Burst mode and Fairness 223 */ 224 card->burstmode = ((mdev->pos[2] >> 6) & 0x3); 225 card->fairness = ((mdev->pos[2] >> 4) & 0x1); 226 227 /* 228 * Ring Speed 229 */ 230 if ((mdev->pos[1] >> 2)&0x1) 231 card->ringspeed = 2; /* not selected */ 232 else if ((mdev->pos[2] >> 5) & 0x1) 233 card->ringspeed = 1; /* 16Mb */ 234 else 235 card->ringspeed = 0; /* 4Mb */ 236 237 /* 238 * Cable type 239 */ 240 if ((mdev->pos[1] >> 6)&0x1) 241 card->cabletype = 1; /* STP/DB9 */ 242 else 243 card->cabletype = 0; /* UTP/RJ-45 */ 244 245 246 /* 247 * ROM Info. This requires us to actually twiddle 248 * bits on the card, so we must ensure above that 249 * the base address is free of conflict (request_region above). 250 */ 251 madgemc_read_rom(dev, card); 252 253 if (card->manid != 0x4d) { /* something went wrong */ 254 printk(KERN_INFO "%s: Madge MC ROM read failed (unknown manufacturer ID %02x)\n", dev->name, card->manid); 255 goto getout3; 256 } 257 258 if ((card->cardtype != 0x08) && (card->cardtype != 0x0d)) { 259 printk(KERN_INFO "%s: Madge MC ROM read failed (unknown card ID %02x)\n", dev->name, card->cardtype); 260 ret = -EIO; 261 goto getout3; 262 } 263 264 /* All cards except Rev 0 and 1 MC16's have 256kb of RAM */ 265 if ((card->cardtype == 0x08) && (card->cardrev <= 0x01)) 266 card->ramsize = 128; 267 else 268 card->ramsize = 256; 269 270 printk("%s: %s Rev %d at 0x%04lx IRQ %d\n", 271 dev->name, 272 (card->cardtype == 0x08)?MADGEMC16_CARDNAME: 273 MADGEMC32_CARDNAME, card->cardrev, 274 dev->base_addr, dev->irq); 275 276 if (card->cardtype == 0x0d) 277 printk("%s: Warning: MC32 support is experimental and highly untested\n", dev->name); 278 279 if (card->ringspeed==2) { /* Unknown */ 280 printk("%s: Warning: Ring speed not set in POS -- Please run the reference disk and set it!\n", dev->name); 281 card->ringspeed = 1; /* default to 16mb */ 282 } 283 284 printk("%s: RAM Size: %dKB\n", dev->name, card->ramsize); 285 286 printk("%s: Ring Speed: %dMb/sec on %s\n", dev->name, 287 (card->ringspeed)?16:4, 288 card->cabletype?"STP/DB9":"UTP/RJ-45"); 289 printk("%s: Arbitration Level: %d\n", dev->name, 290 card->arblevel); 291 292 printk("%s: Burst Mode: ", dev->name); 293 switch(card->burstmode) { 294 case 0: printk("Cycle steal"); break; 295 case 1: printk("Limited burst"); break; 296 case 2: printk("Delayed release"); break; 297 case 3: printk("Immediate release"); break; 298 } 299 printk(" (%s)\n", (card->fairness)?"Unfair":"Fair"); 300 301 302 /* 303 * Enable SIF before we assign the interrupt handler, 304 * just in case we get spurious interrupts that need 305 * handling. 306 */ 307 outb(0, dev->base_addr + MC_CONTROL_REG0); /* sanity */ 308 madgemc_setsifsel(dev, 1); 309 if (request_irq(dev->irq, madgemc_interrupt, IRQF_SHARED, 310 "madgemc", dev)) { 311 ret = -EBUSY; 312 goto getout3; 313 } 314 315 madgemc_chipset_init(dev); /* enables interrupts! */ 316 madgemc_setcabletype(dev, card->cabletype); 317 318 /* Setup MCA structures */ 319 mca_device_set_name(mdev, (card->cardtype == 0x08)?MADGEMC16_CARDNAME:MADGEMC32_CARDNAME); 320 mca_set_adapter_procfn(mdev->slot, madgemc_mcaproc, dev); 321 322 printk("%s: Ring Station Address: ", dev->name); 323 printk("%2.2x", dev->dev_addr[0]); 324 for (i = 1; i < 6; i++) 325 printk(":%2.2x", dev->dev_addr[i]); 326 printk("\n"); 327 328 if (tmsdev_init(dev, device)) { 329 printk("%s: unable to get memory for dev->priv.\n", 330 dev->name); 331 ret = -ENOMEM; 332 goto getout4; 333 } 334 tp = netdev_priv(dev); 335 336 /* 337 * The MC16 is physically a 32bit card. However, Madge 338 * insists on calling it 16bit, so I'll assume here that 339 * they know what they're talking about. Cut off DMA 340 * at 16mb. 341 */ 342 tp->setnselout = madgemc_setnselout_pins; 343 tp->sifwriteb = madgemc_sifwriteb; 344 tp->sifreadb = madgemc_sifreadb; 345 tp->sifwritew = madgemc_sifwritew; 346 tp->sifreadw = madgemc_sifreadw; 347 tp->DataRate = (card->ringspeed)?SPEED_16:SPEED_4; 348 349 memcpy(tp->ProductID, "Madge MCA 16/4 ", PROD_ID_SIZE + 1); 350 351 dev->open = madgemc_open; 352 dev->stop = madgemc_close; 353 354 tp->tmspriv = card; 355 dev_set_drvdata(device, dev); 356 357 if (register_netdev(dev) == 0) 358 return 0; 359 360 dev_set_drvdata(device, NULL); 361 ret = -ENOMEM; 362getout4: 363 free_irq(dev->irq, dev); 364getout3: 365 release_region(dev->base_addr-MADGEMC_SIF_OFFSET, 366 MADGEMC_IO_EXTENT); 367getout2: 368 kfree(card); 369getout1: 370 free_netdev(dev); 371getout: 372 mca_device_set_claim(mdev, 0); 373 return ret; 374} 375 376/* 377 * Handle interrupts generated by the card 378 * 379 * The MicroChannel Madge cards need slightly more handling 380 * after an interrupt than other TMS380 cards do. 381 * 382 * First we must make sure it was this card that generated the 383 * interrupt (since interrupt sharing is allowed). Then, 384 * because we're using level-triggered interrupts (as is 385 * standard on MCA), we must toggle the interrupt line 386 * on the card in order to claim and acknowledge the interrupt. 387 * Once that is done, the interrupt should be handlable in 388 * the normal tms380tr_interrupt() routine. 389 * 390 * There's two ways we can check to see if the interrupt is ours, 391 * both with their own disadvantages... 392 * 393 * 1) Read in the SIFSTS register from the TMS controller. This 394 * is guarenteed to be accurate, however, there's a fairly 395 * large performance penalty for doing so: the Madge chips 396 * must request the register from the Eagle, the Eagle must 397 * read them from its internal bus, and then take the route 398 * back out again, for a 16bit read. 399 * 400 * 2) Use the MC_CONTROL_REG0_SINTR bit from the Madge ASICs. 401 * The major disadvantage here is that the accuracy of the 402 * bit is in question. However, it cuts out the extra read 403 * cycles it takes to read the Eagle's SIF, as its only an 404 * 8bit read, and theoretically the Madge bit is directly 405 * connected to the interrupt latch coming out of the Eagle 406 * hardware (that statement is not verified). 407 * 408 * I can't determine which of these methods has the best win. For now, 409 * we make a compromise. Use the Madge way for the first interrupt, 410 * which should be the fast-path, and then once we hit the first 411 * interrupt, keep on trying using the SIF method until we've 412 * exhausted all contiguous interrupts. 413 * 414 */ 415static irqreturn_t madgemc_interrupt(int irq, void *dev_id) 416{ 417 int pending,reg1; 418 struct net_device *dev; 419 420 if (!dev_id) { 421 printk("madgemc_interrupt: was not passed a dev_id!\n"); 422 return IRQ_NONE; 423 } 424 425 dev = (struct net_device *)dev_id; 426 427 /* Make sure its really us. -- the Madge way */ 428 pending = inb(dev->base_addr + MC_CONTROL_REG0); 429 if (!(pending & MC_CONTROL_REG0_SINTR)) 430 return IRQ_NONE; /* not our interrupt */ 431 432 /* 433 * Since we're level-triggered, we may miss the rising edge 434 * of the next interrupt while we're off handling this one, 435 * so keep checking until the SIF verifies that it has nothing 436 * left for us to do. 437 */ 438 pending = STS_SYSTEM_IRQ; 439 do { 440 if (pending & STS_SYSTEM_IRQ) { 441 442 /* Toggle the interrupt to reset the latch on card */ 443 reg1 = inb(dev->base_addr + MC_CONTROL_REG1); 444 outb(reg1 ^ MC_CONTROL_REG1_SINTEN, 445 dev->base_addr + MC_CONTROL_REG1); 446 outb(reg1, dev->base_addr + MC_CONTROL_REG1); 447 448 /* Continue handling as normal */ 449 tms380tr_interrupt(irq, dev_id); 450 451 pending = SIFREADW(SIFSTS); /* restart - the SIF way */ 452 453 } else 454 return IRQ_HANDLED; 455 } while (1); 456 457 return IRQ_HANDLED; /* not reachable */ 458} 459 460/* 461 * Set the card to the prefered ring speed. 462 * 463 * Unlike newer cards, the MC16/32 have their speed selection 464 * circuit connected to the Madge ASICs and not to the TMS380 465 * NSELOUT pins. Set the ASIC bits correctly here, and return 466 * zero to leave the TMS NSELOUT bits unaffected. 467 * 468 */ 469unsigned short madgemc_setnselout_pins(struct net_device *dev) 470{ 471 unsigned char reg1; 472 struct net_local *tp = netdev_priv(dev); 473 474 reg1 = inb(dev->base_addr + MC_CONTROL_REG1); 475 476 if(tp->DataRate == SPEED_16) 477 reg1 |= MC_CONTROL_REG1_SPEED_SEL; /* add for 16mb */ 478 else if (reg1 & MC_CONTROL_REG1_SPEED_SEL) 479 reg1 ^= MC_CONTROL_REG1_SPEED_SEL; /* remove for 4mb */ 480 outb(reg1, dev->base_addr + MC_CONTROL_REG1); 481 482 return 0; /* no change */ 483} 484 485/* 486 * Set the register page. This equates to the SRSX line 487 * on the TMS380Cx6. 488 * 489 * Register selection is normally done via three contiguous 490 * bits. However, some boards (such as the MC16/32) use only 491 * two bits, plus a separate bit in the glue chip. This 492 * sets the SRSX bit (the top bit). See page 4-17 in the 493 * Yellow Book for which registers are affected. 494 * 495 */ 496static void madgemc_setregpage(struct net_device *dev, int page) 497{ 498 static int reg1; 499 500 reg1 = inb(dev->base_addr + MC_CONTROL_REG1); 501 if ((page == 0) && (reg1 & MC_CONTROL_REG1_SRSX)) { 502 outb(reg1 ^ MC_CONTROL_REG1_SRSX, 503 dev->base_addr + MC_CONTROL_REG1); 504 } 505 else if (page == 1) { 506 outb(reg1 | MC_CONTROL_REG1_SRSX, 507 dev->base_addr + MC_CONTROL_REG1); 508 } 509 reg1 = inb(dev->base_addr + MC_CONTROL_REG1); 510 511 return; 512} 513 514/* 515 * The SIF registers are not mapped into register space by default 516 * Set this to 1 to map them, 0 to map the BIA ROM. 517 * 518 */ 519static void madgemc_setsifsel(struct net_device *dev, int val) 520{ 521 unsigned int reg0; 522 523 reg0 = inb(dev->base_addr + MC_CONTROL_REG0); 524 if ((val == 0) && (reg0 & MC_CONTROL_REG0_SIFSEL)) { 525 outb(reg0 ^ MC_CONTROL_REG0_SIFSEL, 526 dev->base_addr + MC_CONTROL_REG0); 527 } else if (val == 1) { 528 outb(reg0 | MC_CONTROL_REG0_SIFSEL, 529 dev->base_addr + MC_CONTROL_REG0); 530 } 531 reg0 = inb(dev->base_addr + MC_CONTROL_REG0); 532 533 return; 534} 535 536/* 537 * Enable SIF interrupts 538 * 539 * This does not enable interrupts in the SIF, but rather 540 * enables SIF interrupts to be passed onto the host. 541 * 542 */ 543static void madgemc_setint(struct net_device *dev, int val) 544{ 545 unsigned int reg1; 546 547 reg1 = inb(dev->base_addr + MC_CONTROL_REG1); 548 if ((val == 0) && (reg1 & MC_CONTROL_REG1_SINTEN)) { 549 outb(reg1 ^ MC_CONTROL_REG1_SINTEN, 550 dev->base_addr + MC_CONTROL_REG1); 551 } else if (val == 1) { 552 outb(reg1 | MC_CONTROL_REG1_SINTEN, 553 dev->base_addr + MC_CONTROL_REG1); 554 } 555 556 return; 557} 558 559/* 560 * Cable type is set via control register 7. Bit zero high 561 * for UTP, low for STP. 562 */ 563static void madgemc_setcabletype(struct net_device *dev, int type) 564{ 565 outb((type==0)?MC_CONTROL_REG7_CABLEUTP:MC_CONTROL_REG7_CABLESTP, 566 dev->base_addr + MC_CONTROL_REG7); 567} 568 569/* 570 * Enable the functions of the Madge chipset needed for 571 * full working order. 572 */ 573static int madgemc_chipset_init(struct net_device *dev) 574{ 575 outb(0, dev->base_addr + MC_CONTROL_REG1); /* pull SRESET low */ 576 tms380tr_wait(100); /* wait for card to reset */ 577 578 /* bring back into normal operating mode */ 579 outb(MC_CONTROL_REG1_NSRESET, dev->base_addr + MC_CONTROL_REG1); 580 581 /* map SIF registers */ 582 madgemc_setsifsel(dev, 1); 583 584 /* enable SIF interrupts */ 585 madgemc_setint(dev, 1); 586 587 return 0; 588} 589 590/* 591 * Disable the board, and put back into power-up state. 592 */ 593static void madgemc_chipset_close(struct net_device *dev) 594{ 595 /* disable interrupts */ 596 madgemc_setint(dev, 0); 597 /* unmap SIF registers */ 598 madgemc_setsifsel(dev, 0); 599 600 return; 601} 602 603/* 604 * Read the card type (MC16 or MC32) from the card. 605 * 606 * The configuration registers are stored in two separate 607 * pages. Pages are flipped by clearing bit 3 of CONTROL_REG0 (PAGE) 608 * for page zero, or setting bit 3 for page one. 609 * 610 * Page zero contains the following data: 611 * Byte 0: Manufacturer ID (0x4D -- ASCII "M") 612 * Byte 1: Card type: 613 * 0x08 for MC16 614 * 0x0D for MC32 615 * Byte 2: Card revision 616 * Byte 3: Mirror of POS config register 0 617 * Byte 4: Mirror of POS 1 618 * Byte 5: Mirror of POS 2 619 * 620 * Page one contains the following data: 621 * Byte 0: Unused 622 * Byte 1-6: BIA, MSB to LSB. 623 * 624 * Note that to read the BIA, we must unmap the SIF registers 625 * by clearing bit 2 of CONTROL_REG0 (SIFSEL), as the data 626 * will reside in the same logical location. For this reason, 627 * _never_ read the BIA while the Eagle processor is running! 628 * The SIF will be completely inaccessible until the BIA operation 629 * is complete. 630 * 631 */ 632static void madgemc_read_rom(struct net_device *dev, struct card_info *card) 633{ 634 unsigned long ioaddr; 635 unsigned char reg0, reg1, tmpreg0, i; 636 637 ioaddr = dev->base_addr; 638 639 reg0 = inb(ioaddr + MC_CONTROL_REG0); 640 reg1 = inb(ioaddr + MC_CONTROL_REG1); 641 642 /* Switch to page zero and unmap SIF */ 643 tmpreg0 = reg0 & ~(MC_CONTROL_REG0_PAGE + MC_CONTROL_REG0_SIFSEL); 644 outb(tmpreg0, ioaddr + MC_CONTROL_REG0); 645 646 card->manid = inb(ioaddr + MC_ROM_MANUFACTURERID); 647 card->cardtype = inb(ioaddr + MC_ROM_ADAPTERID); 648 card->cardrev = inb(ioaddr + MC_ROM_REVISION); 649 650 /* Switch to rom page one */ 651 outb(tmpreg0 | MC_CONTROL_REG0_PAGE, ioaddr + MC_CONTROL_REG0); 652 653 /* Read BIA */ 654 dev->addr_len = 6; 655 for (i = 0; i < 6; i++) 656 dev->dev_addr[i] = inb(ioaddr + MC_ROM_BIA_START + i); 657 658 /* Restore original register values */ 659 outb(reg0, ioaddr + MC_CONTROL_REG0); 660 outb(reg1, ioaddr + MC_CONTROL_REG1); 661 662 return; 663} 664 665static int madgemc_open(struct net_device *dev) 666{ 667 /* 668 * Go ahead and reinitialize the chipset again, just to 669 * make sure we didn't get left in a bad state. 670 */ 671 madgemc_chipset_init(dev); 672 tms380tr_open(dev); 673 return 0; 674} 675 676static int madgemc_close(struct net_device *dev) 677{ 678 tms380tr_close(dev); 679 madgemc_chipset_close(dev); 680 return 0; 681} 682 683/* 684 * Give some details available from /proc/mca/slotX 685 */ 686static int madgemc_mcaproc(char *buf, int slot, void *d) 687{ 688 struct net_device *dev = (struct net_device *)d; 689 struct net_local *tp = dev->priv; 690 struct card_info *curcard = tp->tmspriv; 691 int len = 0; 692 693 len += sprintf(buf+len, "-------\n"); 694 if (curcard) { 695 struct net_local *tp = netdev_priv(dev); 696 int i; 697 698 len += sprintf(buf+len, "Card Revision: %d\n", curcard->cardrev); 699 len += sprintf(buf+len, "RAM Size: %dkb\n", curcard->ramsize); 700 len += sprintf(buf+len, "Cable type: %s\n", (curcard->cabletype)?"STP/DB9":"UTP/RJ-45"); 701 len += sprintf(buf+len, "Configured ring speed: %dMb/sec\n", (curcard->ringspeed)?16:4); 702 len += sprintf(buf+len, "Running ring speed: %dMb/sec\n", (tp->DataRate==SPEED_16)?16:4); 703 len += sprintf(buf+len, "Device: %s\n", dev->name); 704 len += sprintf(buf+len, "IO Port: 0x%04lx\n", dev->base_addr); 705 len += sprintf(buf+len, "IRQ: %d\n", dev->irq); 706 len += sprintf(buf+len, "Arbitration Level: %d\n", curcard->arblevel); 707 len += sprintf(buf+len, "Burst Mode: "); 708 switch(curcard->burstmode) { 709 case 0: len += sprintf(buf+len, "Cycle steal"); break; 710 case 1: len += sprintf(buf+len, "Limited burst"); break; 711 case 2: len += sprintf(buf+len, "Delayed release"); break; 712 case 3: len += sprintf(buf+len, "Immediate release"); break; 713 } 714 len += sprintf(buf+len, " (%s)\n", (curcard->fairness)?"Unfair":"Fair"); 715 716 len += sprintf(buf+len, "Ring Station Address: "); 717 len += sprintf(buf+len, "%2.2x", dev->dev_addr[0]); 718 for (i = 1; i < 6; i++) 719 len += sprintf(buf+len, " %2.2x", dev->dev_addr[i]); 720 len += sprintf(buf+len, "\n"); 721 } else 722 len += sprintf(buf+len, "Card not configured\n"); 723 724 return len; 725} 726 727static int __devexit madgemc_remove(struct device *device) 728{ 729 struct net_device *dev = dev_get_drvdata(device); 730 struct net_local *tp; 731 struct card_info *card; 732 733 BUG_ON(!dev); 734 735 tp = dev->priv; 736 card = tp->tmspriv; 737 kfree(card); 738 tp->tmspriv = NULL; 739 740 unregister_netdev(dev); 741 release_region(dev->base_addr-MADGEMC_SIF_OFFSET, MADGEMC_IO_EXTENT); 742 free_irq(dev->irq, dev); 743 tmsdev_term(dev); 744 free_netdev(dev); 745 dev_set_drvdata(device, NULL); 746 747 return 0; 748} 749 750static short madgemc_adapter_ids[] __initdata = { 751 0x002d, 752 0x0000 753}; 754 755static struct mca_driver madgemc_driver = { 756 .id_table = madgemc_adapter_ids, 757 .driver = { 758 .name = "madgemc", 759 .bus = &mca_bus_type, 760 .probe = madgemc_probe, 761 .remove = __devexit_p(madgemc_remove), 762 }, 763}; 764 765static int __init madgemc_init (void) 766{ 767 return mca_register_driver (&madgemc_driver); 768} 769 770static void __exit madgemc_exit (void) 771{ 772 mca_unregister_driver (&madgemc_driver); 773} 774 775module_init(madgemc_init); 776module_exit(madgemc_exit); 777 778MODULE_LICENSE("GPL"); 779