1/*****************************************************************************/ 2 3/* 4 * yam.c -- YAM radio modem driver. 5 * 6 * Copyright (C) 1998 Frederic Rible F1OAT (frible@teaser.fr) 7 * Adapted from baycom.c driver written by Thomas Sailer (sailer@ife.ee.ethz.ch) 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; either version 2 of the License, or 12 * (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 22 * 23 * Please note that the GPL allows you to use the driver, NOT the radio. 24 * In order to use the radio, you need a license from the communications 25 * authority of your country. 26 * 27 * 28 * History: 29 * 0.0 F1OAT 06.06.98 Begin of work with baycom.c source code V 0.3 30 * 0.1 F1OAT 07.06.98 Add timer polling routine for channel arbitration 31 * 0.2 F6FBB 08.06.98 Added delay after FPGA programming 32 * 0.3 F6FBB 29.07.98 Delayed PTT implementation for dupmode=2 33 * 0.4 F6FBB 30.07.98 Added TxTail, Slottime and Persistance 34 * 0.5 F6FBB 01.08.98 Shared IRQs, /proc/net and network statistics 35 * 0.6 F6FBB 25.08.98 Added 1200Bds format 36 * 0.7 F6FBB 12.09.98 Added to the kernel configuration 37 * 0.8 F6FBB 14.10.98 Fixed slottime/persistence timing bug 38 * OK1ZIA 2.09.01 Fixed "kfree_skb on hard IRQ" 39 * using dev_kfree_skb_any(). (important in 2.4 kernel) 40 * 41 */ 42 43/*****************************************************************************/ 44 45#include <linux/module.h> 46#include <linux/types.h> 47#include <linux/net.h> 48#include <linux/in.h> 49#include <linux/if.h> 50#include <linux/slab.h> 51#include <linux/errno.h> 52#include <linux/bitops.h> 53#include <linux/random.h> 54#include <asm/io.h> 55#include <asm/system.h> 56#include <linux/interrupt.h> 57#include <linux/ioport.h> 58 59#include <linux/netdevice.h> 60#include <linux/if_arp.h> 61#include <linux/etherdevice.h> 62#include <linux/skbuff.h> 63#include <net/ax25.h> 64 65#include <linux/kernel.h> 66#include <linux/proc_fs.h> 67#include <linux/seq_file.h> 68 69#include <asm/uaccess.h> 70#include <linux/init.h> 71 72#include <linux/yam.h> 73#include "yam9600.h" 74#include "yam1200.h" 75 76/* --------------------------------------------------------------------- */ 77 78static const char yam_drvname[] = "yam"; 79static char yam_drvinfo[] __initdata = KERN_INFO "YAM driver version 0.8 by F1OAT/F6FBB\n"; 80 81/* --------------------------------------------------------------------- */ 82 83#define YAM_9600 1 84#define YAM_1200 2 85 86#define NR_PORTS 4 87#define YAM_MAGIC 0xF10A7654 88 89/* Transmitter states */ 90 91#define TX_OFF 0 92#define TX_HEAD 1 93#define TX_DATA 2 94#define TX_CRC1 3 95#define TX_CRC2 4 96#define TX_TAIL 5 97 98#define YAM_MAX_FRAME 1024 99 100#define DEFAULT_BITRATE 9600 /* bps */ 101#define DEFAULT_HOLDD 10 /* sec */ 102#define DEFAULT_TXD 300 /* ms */ 103#define DEFAULT_TXTAIL 10 /* ms */ 104#define DEFAULT_SLOT 100 /* ms */ 105#define DEFAULT_PERS 64 /* 0->255 */ 106 107struct yam_port { 108 int magic; 109 int bitrate; 110 int baudrate; 111 int iobase; 112 int irq; 113 int dupmode; 114 115 struct net_device *dev; 116 117 /* Stats section */ 118 119 struct net_device_stats stats; 120 121 int nb_rxint; 122 int nb_mdint; 123 124 /* Parameters section */ 125 126 int txd; /* tx delay */ 127 int holdd; /* duplex ptt delay */ 128 int txtail; /* txtail delay */ 129 int slot; /* slottime */ 130 int pers; /* persistence */ 131 132 /* Tx section */ 133 134 int tx_state; 135 int tx_count; 136 int slotcnt; 137 unsigned char tx_buf[YAM_MAX_FRAME]; 138 int tx_len; 139 int tx_crcl, tx_crch; 140 struct sk_buff_head send_queue; /* Packets awaiting transmission */ 141 142 /* Rx section */ 143 144 int dcd; 145 unsigned char rx_buf[YAM_MAX_FRAME]; 146 int rx_len; 147 int rx_crcl, rx_crch; 148}; 149 150struct yam_mcs { 151 unsigned char bits[YAM_FPGA_SIZE]; 152 int bitrate; 153 struct yam_mcs *next; 154}; 155 156static struct net_device *yam_devs[NR_PORTS]; 157 158static struct yam_mcs *yam_data; 159 160static DEFINE_TIMER(yam_timer, NULL, 0, 0); 161 162/* --------------------------------------------------------------------- */ 163 164#define RBR(iobase) (iobase+0) 165#define THR(iobase) (iobase+0) 166#define IER(iobase) (iobase+1) 167#define IIR(iobase) (iobase+2) 168#define FCR(iobase) (iobase+2) 169#define LCR(iobase) (iobase+3) 170#define MCR(iobase) (iobase+4) 171#define LSR(iobase) (iobase+5) 172#define MSR(iobase) (iobase+6) 173#define SCR(iobase) (iobase+7) 174#define DLL(iobase) (iobase+0) 175#define DLM(iobase) (iobase+1) 176 177#define YAM_EXTENT 8 178 179/* Interrupt Identification Register Bit Masks */ 180#define IIR_NOPEND 1 181#define IIR_MSR 0 182#define IIR_TX 2 183#define IIR_RX 4 184#define IIR_LSR 6 185#define IIR_TIMEOUT 12 /* Fifo mode only */ 186 187#define IIR_MASK 0x0F 188 189/* Interrupt Enable Register Bit Masks */ 190#define IER_RX 1 /* enable rx interrupt */ 191#define IER_TX 2 /* enable tx interrupt */ 192#define IER_LSR 4 /* enable line status interrupts */ 193#define IER_MSR 8 /* enable modem status interrupts */ 194 195/* Modem Control Register Bit Masks */ 196#define MCR_DTR 0x01 /* DTR output */ 197#define MCR_RTS 0x02 /* RTS output */ 198#define MCR_OUT1 0x04 /* OUT1 output (not accessible in RS232) */ 199#define MCR_OUT2 0x08 /* Master Interrupt enable (must be set on PCs) */ 200#define MCR_LOOP 0x10 /* Loopback enable */ 201 202/* Modem Status Register Bit Masks */ 203#define MSR_DCTS 0x01 /* Delta CTS input */ 204#define MSR_DDSR 0x02 /* Delta DSR */ 205#define MSR_DRIN 0x04 /* Delta RI */ 206#define MSR_DDCD 0x08 /* Delta DCD */ 207#define MSR_CTS 0x10 /* CTS input */ 208#define MSR_DSR 0x20 /* DSR input */ 209#define MSR_RING 0x40 /* RI input */ 210#define MSR_DCD 0x80 /* DCD input */ 211 212/* line status register bit mask */ 213#define LSR_RXC 0x01 214#define LSR_OE 0x02 215#define LSR_PE 0x04 216#define LSR_FE 0x08 217#define LSR_BREAK 0x10 218#define LSR_THRE 0x20 219#define LSR_TSRE 0x40 220 221/* Line Control Register Bit Masks */ 222#define LCR_DLAB 0x80 223#define LCR_BREAK 0x40 224#define LCR_PZERO 0x28 225#define LCR_PEVEN 0x18 226#define LCR_PODD 0x08 227#define LCR_STOP1 0x00 228#define LCR_STOP2 0x04 229#define LCR_BIT5 0x00 230#define LCR_BIT6 0x02 231#define LCR_BIT7 0x01 232#define LCR_BIT8 0x03 233 234/* YAM Modem <-> UART Port mapping */ 235 236#define TX_RDY MSR_DCTS /* transmitter ready to send */ 237#define RX_DCD MSR_DCD /* carrier detect */ 238#define RX_FLAG MSR_RING /* hdlc flag received */ 239#define FPGA_DONE MSR_DSR /* FPGA is configured */ 240#define PTT_ON (MCR_RTS|MCR_OUT2) /* activate PTT */ 241#define PTT_OFF (MCR_DTR|MCR_OUT2) /* release PTT */ 242 243#define ENABLE_RXINT IER_RX /* enable uart rx interrupt during rx */ 244#define ENABLE_TXINT IER_MSR /* enable uart ms interrupt during tx */ 245#define ENABLE_RTXINT (IER_RX|IER_MSR) /* full duplex operations */ 246 247 248/************************************************************************* 249* CRC Tables 250************************************************************************/ 251 252static const unsigned char chktabl[256] = 253{0x00, 0x89, 0x12, 0x9b, 0x24, 0xad, 0x36, 0xbf, 0x48, 0xc1, 0x5a, 0xd3, 0x6c, 0xe5, 0x7e, 254 0xf7, 0x81, 0x08, 0x93, 0x1a, 0xa5, 0x2c, 0xb7, 0x3e, 0xc9, 0x40, 0xdb, 0x52, 0xed, 0x64, 255 0xff, 0x76, 0x02, 0x8b, 0x10, 0x99, 0x26, 0xaf, 0x34, 0xbd, 0x4a, 0xc3, 0x58, 0xd1, 0x6e, 256 0xe7, 0x7c, 0xf5, 0x83, 0x0a, 0x91, 0x18, 0xa7, 0x2e, 0xb5, 0x3c, 0xcb, 0x42, 0xd9, 0x50, 257 0xef, 0x66, 0xfd, 0x74, 0x04, 0x8d, 0x16, 0x9f, 0x20, 0xa9, 0x32, 0xbb, 0x4c, 0xc5, 0x5e, 258 0xd7, 0x68, 0xe1, 0x7a, 0xf3, 0x85, 0x0c, 0x97, 0x1e, 0xa1, 0x28, 0xb3, 0x3a, 0xcd, 0x44, 259 0xdf, 0x56, 0xe9, 0x60, 0xfb, 0x72, 0x06, 0x8f, 0x14, 0x9d, 0x22, 0xab, 0x30, 0xb9, 0x4e, 260 0xc7, 0x5c, 0xd5, 0x6a, 0xe3, 0x78, 0xf1, 0x87, 0x0e, 0x95, 0x1c, 0xa3, 0x2a, 0xb1, 0x38, 261 0xcf, 0x46, 0xdd, 0x54, 0xeb, 0x62, 0xf9, 0x70, 0x08, 0x81, 0x1a, 0x93, 0x2c, 0xa5, 0x3e, 262 0xb7, 0x40, 0xc9, 0x52, 0xdb, 0x64, 0xed, 0x76, 0xff, 0x89, 0x00, 0x9b, 0x12, 0xad, 0x24, 263 0xbf, 0x36, 0xc1, 0x48, 0xd3, 0x5a, 0xe5, 0x6c, 0xf7, 0x7e, 0x0a, 0x83, 0x18, 0x91, 0x2e, 264 0xa7, 0x3c, 0xb5, 0x42, 0xcb, 0x50, 0xd9, 0x66, 0xef, 0x74, 0xfd, 0x8b, 0x02, 0x99, 0x10, 265 0xaf, 0x26, 0xbd, 0x34, 0xc3, 0x4a, 0xd1, 0x58, 0xe7, 0x6e, 0xf5, 0x7c, 0x0c, 0x85, 0x1e, 266 0x97, 0x28, 0xa1, 0x3a, 0xb3, 0x44, 0xcd, 0x56, 0xdf, 0x60, 0xe9, 0x72, 0xfb, 0x8d, 0x04, 267 0x9f, 0x16, 0xa9, 0x20, 0xbb, 0x32, 0xc5, 0x4c, 0xd7, 0x5e, 0xe1, 0x68, 0xf3, 0x7a, 0x0e, 268 0x87, 0x1c, 0x95, 0x2a, 0xa3, 0x38, 0xb1, 0x46, 0xcf, 0x54, 0xdd, 0x62, 0xeb, 0x70, 0xf9, 269 0x8f, 0x06, 0x9d, 0x14, 0xab, 0x22, 0xb9, 0x30, 0xc7, 0x4e, 0xd5, 0x5c, 0xe3, 0x6a, 0xf1, 270 0x78}; 271static const unsigned char chktabh[256] = 272{0x00, 0x11, 0x23, 0x32, 0x46, 0x57, 0x65, 0x74, 0x8c, 0x9d, 0xaf, 0xbe, 0xca, 0xdb, 0xe9, 273 0xf8, 0x10, 0x01, 0x33, 0x22, 0x56, 0x47, 0x75, 0x64, 0x9c, 0x8d, 0xbf, 0xae, 0xda, 0xcb, 274 0xf9, 0xe8, 0x21, 0x30, 0x02, 0x13, 0x67, 0x76, 0x44, 0x55, 0xad, 0xbc, 0x8e, 0x9f, 0xeb, 275 0xfa, 0xc8, 0xd9, 0x31, 0x20, 0x12, 0x03, 0x77, 0x66, 0x54, 0x45, 0xbd, 0xac, 0x9e, 0x8f, 276 0xfb, 0xea, 0xd8, 0xc9, 0x42, 0x53, 0x61, 0x70, 0x04, 0x15, 0x27, 0x36, 0xce, 0xdf, 0xed, 277 0xfc, 0x88, 0x99, 0xab, 0xba, 0x52, 0x43, 0x71, 0x60, 0x14, 0x05, 0x37, 0x26, 0xde, 0xcf, 278 0xfd, 0xec, 0x98, 0x89, 0xbb, 0xaa, 0x63, 0x72, 0x40, 0x51, 0x25, 0x34, 0x06, 0x17, 0xef, 279 0xfe, 0xcc, 0xdd, 0xa9, 0xb8, 0x8a, 0x9b, 0x73, 0x62, 0x50, 0x41, 0x35, 0x24, 0x16, 0x07, 280 0xff, 0xee, 0xdc, 0xcd, 0xb9, 0xa8, 0x9a, 0x8b, 0x84, 0x95, 0xa7, 0xb6, 0xc2, 0xd3, 0xe1, 281 0xf0, 0x08, 0x19, 0x2b, 0x3a, 0x4e, 0x5f, 0x6d, 0x7c, 0x94, 0x85, 0xb7, 0xa6, 0xd2, 0xc3, 282 0xf1, 0xe0, 0x18, 0x09, 0x3b, 0x2a, 0x5e, 0x4f, 0x7d, 0x6c, 0xa5, 0xb4, 0x86, 0x97, 0xe3, 283 0xf2, 0xc0, 0xd1, 0x29, 0x38, 0x0a, 0x1b, 0x6f, 0x7e, 0x4c, 0x5d, 0xb5, 0xa4, 0x96, 0x87, 284 0xf3, 0xe2, 0xd0, 0xc1, 0x39, 0x28, 0x1a, 0x0b, 0x7f, 0x6e, 0x5c, 0x4d, 0xc6, 0xd7, 0xe5, 285 0xf4, 0x80, 0x91, 0xa3, 0xb2, 0x4a, 0x5b, 0x69, 0x78, 0x0c, 0x1d, 0x2f, 0x3e, 0xd6, 0xc7, 286 0xf5, 0xe4, 0x90, 0x81, 0xb3, 0xa2, 0x5a, 0x4b, 0x79, 0x68, 0x1c, 0x0d, 0x3f, 0x2e, 0xe7, 287 0xf6, 0xc4, 0xd5, 0xa1, 0xb0, 0x82, 0x93, 0x6b, 0x7a, 0x48, 0x59, 0x2d, 0x3c, 0x0e, 0x1f, 288 0xf7, 0xe6, 0xd4, 0xc5, 0xb1, 0xa0, 0x92, 0x83, 0x7b, 0x6a, 0x58, 0x49, 0x3d, 0x2c, 0x1e, 289 0x0f}; 290 291/************************************************************************* 292* FPGA functions 293************************************************************************/ 294 295static void delay(int ms) 296{ 297 unsigned long timeout = jiffies + ((ms * HZ) / 1000); 298 while (time_before(jiffies, timeout)) 299 cpu_relax(); 300} 301 302/* 303 * reset FPGA 304 */ 305 306static void fpga_reset(int iobase) 307{ 308 outb(0, IER(iobase)); 309 outb(LCR_DLAB | LCR_BIT5, LCR(iobase)); 310 outb(1, DLL(iobase)); 311 outb(0, DLM(iobase)); 312 313 outb(LCR_BIT5, LCR(iobase)); 314 inb(LSR(iobase)); 315 inb(MSR(iobase)); 316 /* turn off FPGA supply voltage */ 317 outb(MCR_OUT1 | MCR_OUT2, MCR(iobase)); 318 delay(100); 319 /* turn on FPGA supply voltage again */ 320 outb(MCR_DTR | MCR_RTS | MCR_OUT1 | MCR_OUT2, MCR(iobase)); 321 delay(100); 322} 323 324/* 325 * send one byte to FPGA 326 */ 327 328static int fpga_write(int iobase, unsigned char wrd) 329{ 330 unsigned char bit; 331 int k; 332 unsigned long timeout = jiffies + HZ / 10; 333 334 for (k = 0; k < 8; k++) { 335 bit = (wrd & 0x80) ? (MCR_RTS | MCR_DTR) : MCR_DTR; 336 outb(bit | MCR_OUT1 | MCR_OUT2, MCR(iobase)); 337 wrd <<= 1; 338 outb(0xfc, THR(iobase)); 339 while ((inb(LSR(iobase)) & LSR_TSRE) == 0) 340 if (time_after(jiffies, timeout)) 341 return -1; 342 } 343 344 return 0; 345} 346 347static unsigned char *add_mcs(unsigned char *bits, int bitrate) 348{ 349 struct yam_mcs *p; 350 351 /* If it already exists, replace the bit data */ 352 p = yam_data; 353 while (p) { 354 if (p->bitrate == bitrate) { 355 memcpy(p->bits, bits, YAM_FPGA_SIZE); 356 return p->bits; 357 } 358 p = p->next; 359 } 360 361 /* Allocate a new mcs */ 362 if ((p = kmalloc(sizeof(struct yam_mcs), GFP_KERNEL)) == NULL) { 363 printk(KERN_WARNING "YAM: no memory to allocate mcs\n"); 364 return NULL; 365 } 366 memcpy(p->bits, bits, YAM_FPGA_SIZE); 367 p->bitrate = bitrate; 368 p->next = yam_data; 369 yam_data = p; 370 371 return p->bits; 372} 373 374static unsigned char *get_mcs(int bitrate) 375{ 376 struct yam_mcs *p; 377 378 p = yam_data; 379 while (p) { 380 if (p->bitrate == bitrate) 381 return p->bits; 382 p = p->next; 383 } 384 385 /* Load predefined mcs data */ 386 switch (bitrate) { 387 case 1200: 388 return add_mcs(bits_1200, bitrate); 389 default: 390 return add_mcs(bits_9600, bitrate); 391 } 392} 393 394/* 395 * download bitstream to FPGA 396 * data is contained in bits[] array in yam1200.h resp. yam9600.h 397 */ 398 399static int fpga_download(int iobase, int bitrate) 400{ 401 int i, rc; 402 unsigned char *pbits; 403 404 pbits = get_mcs(bitrate); 405 if (pbits == NULL) 406 return -1; 407 408 fpga_reset(iobase); 409 for (i = 0; i < YAM_FPGA_SIZE; i++) { 410 if (fpga_write(iobase, pbits[i])) { 411 printk(KERN_ERR "yam: error in write cycle\n"); 412 return -1; /* write... */ 413 } 414 } 415 416 fpga_write(iobase, 0xFF); 417 rc = inb(MSR(iobase)); /* check DONE signal */ 418 419 /* Needed for some hardwares */ 420 delay(50); 421 422 return (rc & MSR_DSR) ? 0 : -1; 423} 424 425 426/************************************************************************ 427* Serial port init 428************************************************************************/ 429 430static void yam_set_uart(struct net_device *dev) 431{ 432 struct yam_port *yp = netdev_priv(dev); 433 int divisor = 115200 / yp->baudrate; 434 435 outb(0, IER(dev->base_addr)); 436 outb(LCR_DLAB | LCR_BIT8, LCR(dev->base_addr)); 437 outb(divisor, DLL(dev->base_addr)); 438 outb(0, DLM(dev->base_addr)); 439 outb(LCR_BIT8, LCR(dev->base_addr)); 440 outb(PTT_OFF, MCR(dev->base_addr)); 441 outb(0x00, FCR(dev->base_addr)); 442 443 /* Flush pending irq */ 444 445 inb(RBR(dev->base_addr)); 446 inb(MSR(dev->base_addr)); 447 448 /* Enable rx irq */ 449 450 outb(ENABLE_RTXINT, IER(dev->base_addr)); 451} 452 453 454/* --------------------------------------------------------------------- */ 455 456enum uart { 457 c_uart_unknown, c_uart_8250, 458 c_uart_16450, c_uart_16550, c_uart_16550A 459}; 460 461static const char *uart_str[] = 462{"unknown", "8250", "16450", "16550", "16550A"}; 463 464static enum uart yam_check_uart(unsigned int iobase) 465{ 466 unsigned char b1, b2, b3; 467 enum uart u; 468 enum uart uart_tab[] = 469 {c_uart_16450, c_uart_unknown, c_uart_16550, c_uart_16550A}; 470 471 b1 = inb(MCR(iobase)); 472 outb(b1 | 0x10, MCR(iobase)); /* loopback mode */ 473 b2 = inb(MSR(iobase)); 474 outb(0x1a, MCR(iobase)); 475 b3 = inb(MSR(iobase)) & 0xf0; 476 outb(b1, MCR(iobase)); /* restore old values */ 477 outb(b2, MSR(iobase)); 478 if (b3 != 0x90) 479 return c_uart_unknown; 480 inb(RBR(iobase)); 481 inb(RBR(iobase)); 482 outb(0x01, FCR(iobase)); /* enable FIFOs */ 483 u = uart_tab[(inb(IIR(iobase)) >> 6) & 3]; 484 if (u == c_uart_16450) { 485 outb(0x5a, SCR(iobase)); 486 b1 = inb(SCR(iobase)); 487 outb(0xa5, SCR(iobase)); 488 b2 = inb(SCR(iobase)); 489 if ((b1 != 0x5a) || (b2 != 0xa5)) 490 u = c_uart_8250; 491 } 492 return u; 493} 494 495/****************************************************************************** 496* Rx Section 497******************************************************************************/ 498static inline void yam_rx_flag(struct net_device *dev, struct yam_port *yp) 499{ 500 if (yp->dcd && yp->rx_len >= 3 && yp->rx_len < YAM_MAX_FRAME) { 501 int pkt_len = yp->rx_len - 2 + 1; /* -CRC + kiss */ 502 struct sk_buff *skb; 503 504 if ((yp->rx_crch & yp->rx_crcl) != 0xFF) { 505 /* Bad crc */ 506 } else { 507 if (!(skb = dev_alloc_skb(pkt_len))) { 508 printk(KERN_WARNING "%s: memory squeeze, dropping packet\n", dev->name); 509 ++yp->stats.rx_dropped; 510 } else { 511 unsigned char *cp; 512 cp = skb_put(skb, pkt_len); 513 *cp++ = 0; /* KISS kludge */ 514 memcpy(cp, yp->rx_buf, pkt_len - 1); 515 skb->protocol = ax25_type_trans(skb, dev); 516 netif_rx(skb); 517 dev->last_rx = jiffies; 518 ++yp->stats.rx_packets; 519 } 520 } 521 } 522 yp->rx_len = 0; 523 yp->rx_crcl = 0x21; 524 yp->rx_crch = 0xf3; 525} 526 527static inline void yam_rx_byte(struct net_device *dev, struct yam_port *yp, unsigned char rxb) 528{ 529 if (yp->rx_len < YAM_MAX_FRAME) { 530 unsigned char c = yp->rx_crcl; 531 yp->rx_crcl = (chktabl[c] ^ yp->rx_crch); 532 yp->rx_crch = (chktabh[c] ^ rxb); 533 yp->rx_buf[yp->rx_len++] = rxb; 534 } 535} 536 537/******************************************************************************** 538* TX Section 539********************************************************************************/ 540 541static void ptt_on(struct net_device *dev) 542{ 543 outb(PTT_ON, MCR(dev->base_addr)); 544} 545 546static void ptt_off(struct net_device *dev) 547{ 548 outb(PTT_OFF, MCR(dev->base_addr)); 549} 550 551static int yam_send_packet(struct sk_buff *skb, struct net_device *dev) 552{ 553 struct yam_port *yp = netdev_priv(dev); 554 555 skb_queue_tail(&yp->send_queue, skb); 556 dev->trans_start = jiffies; 557 return 0; 558} 559 560static void yam_start_tx(struct net_device *dev, struct yam_port *yp) 561{ 562 if ((yp->tx_state == TX_TAIL) || (yp->txd == 0)) 563 yp->tx_count = 1; 564 else 565 yp->tx_count = (yp->bitrate * yp->txd) / 8000; 566 yp->tx_state = TX_HEAD; 567 ptt_on(dev); 568} 569 570static void yam_arbitrate(struct net_device *dev) 571{ 572 struct yam_port *yp = netdev_priv(dev); 573 574 if (yp->magic != YAM_MAGIC || yp->tx_state != TX_OFF || 575 skb_queue_empty(&yp->send_queue)) 576 return; 577 /* tx_state is TX_OFF and there is data to send */ 578 579 if (yp->dupmode) { 580 /* Full duplex mode, don't wait */ 581 yam_start_tx(dev, yp); 582 return; 583 } 584 if (yp->dcd) { 585 /* DCD on, wait slotime ... */ 586 yp->slotcnt = yp->slot / 10; 587 return; 588 } 589 /* Is slottime passed ? */ 590 if ((--yp->slotcnt) > 0) 591 return; 592 593 yp->slotcnt = yp->slot / 10; 594 595 /* is random > persist ? */ 596 if ((random32() % 256) > yp->pers) 597 return; 598 599 yam_start_tx(dev, yp); 600} 601 602static void yam_dotimer(unsigned long dummy) 603{ 604 int i; 605 606 for (i = 0; i < NR_PORTS; i++) { 607 struct net_device *dev = yam_devs[i]; 608 if (dev && netif_running(dev)) 609 yam_arbitrate(dev); 610 } 611 yam_timer.expires = jiffies + HZ / 100; 612 add_timer(&yam_timer); 613} 614 615static void yam_tx_byte(struct net_device *dev, struct yam_port *yp) 616{ 617 struct sk_buff *skb; 618 unsigned char b, temp; 619 620 switch (yp->tx_state) { 621 case TX_OFF: 622 break; 623 case TX_HEAD: 624 if (--yp->tx_count <= 0) { 625 if (!(skb = skb_dequeue(&yp->send_queue))) { 626 ptt_off(dev); 627 yp->tx_state = TX_OFF; 628 break; 629 } 630 yp->tx_state = TX_DATA; 631 if (skb->data[0] != 0) { 632/* do_kiss_params(s, skb->data, skb->len); */ 633 dev_kfree_skb_any(skb); 634 break; 635 } 636 yp->tx_len = skb->len - 1; /* strip KISS byte */ 637 if (yp->tx_len >= YAM_MAX_FRAME || yp->tx_len < 2) { 638 dev_kfree_skb_any(skb); 639 break; 640 } 641 skb_copy_from_linear_data_offset(skb, 1, 642 yp->tx_buf, 643 yp->tx_len); 644 dev_kfree_skb_any(skb); 645 yp->tx_count = 0; 646 yp->tx_crcl = 0x21; 647 yp->tx_crch = 0xf3; 648 yp->tx_state = TX_DATA; 649 } 650 break; 651 case TX_DATA: 652 b = yp->tx_buf[yp->tx_count++]; 653 outb(b, THR(dev->base_addr)); 654 temp = yp->tx_crcl; 655 yp->tx_crcl = chktabl[temp] ^ yp->tx_crch; 656 yp->tx_crch = chktabh[temp] ^ b; 657 if (yp->tx_count >= yp->tx_len) { 658 yp->tx_state = TX_CRC1; 659 } 660 break; 661 case TX_CRC1: 662 yp->tx_crch = chktabl[yp->tx_crcl] ^ yp->tx_crch; 663 yp->tx_crcl = chktabh[yp->tx_crcl] ^ chktabl[yp->tx_crch] ^ 0xff; 664 outb(yp->tx_crcl, THR(dev->base_addr)); 665 yp->tx_state = TX_CRC2; 666 break; 667 case TX_CRC2: 668 outb(chktabh[yp->tx_crch] ^ 0xFF, THR(dev->base_addr)); 669 if (skb_queue_empty(&yp->send_queue)) { 670 yp->tx_count = (yp->bitrate * yp->txtail) / 8000; 671 if (yp->dupmode == 2) 672 yp->tx_count += (yp->bitrate * yp->holdd) / 8; 673 if (yp->tx_count == 0) 674 yp->tx_count = 1; 675 yp->tx_state = TX_TAIL; 676 } else { 677 yp->tx_count = 1; 678 yp->tx_state = TX_HEAD; 679 } 680 ++yp->stats.tx_packets; 681 break; 682 case TX_TAIL: 683 if (--yp->tx_count <= 0) { 684 yp->tx_state = TX_OFF; 685 ptt_off(dev); 686 } 687 break; 688 } 689} 690 691/*********************************************************************************** 692* ISR routine 693************************************************************************************/ 694 695static irqreturn_t yam_interrupt(int irq, void *dev_id) 696{ 697 struct net_device *dev; 698 struct yam_port *yp; 699 unsigned char iir; 700 int counter = 100; 701 int i; 702 int handled = 0; 703 704 for (i = 0; i < NR_PORTS; i++) { 705 dev = yam_devs[i]; 706 yp = netdev_priv(dev); 707 708 if (!netif_running(dev)) 709 continue; 710 711 while ((iir = IIR_MASK & inb(IIR(dev->base_addr))) != IIR_NOPEND) { 712 unsigned char msr = inb(MSR(dev->base_addr)); 713 unsigned char lsr = inb(LSR(dev->base_addr)); 714 unsigned char rxb; 715 716 handled = 1; 717 718 if (lsr & LSR_OE) 719 ++yp->stats.rx_fifo_errors; 720 721 yp->dcd = (msr & RX_DCD) ? 1 : 0; 722 723 if (--counter <= 0) { 724 printk(KERN_ERR "%s: too many irq iir=%d\n", 725 dev->name, iir); 726 goto out; 727 } 728 if (msr & TX_RDY) { 729 ++yp->nb_mdint; 730 yam_tx_byte(dev, yp); 731 } 732 if (lsr & LSR_RXC) { 733 ++yp->nb_rxint; 734 rxb = inb(RBR(dev->base_addr)); 735 if (msr & RX_FLAG) 736 yam_rx_flag(dev, yp); 737 else 738 yam_rx_byte(dev, yp, rxb); 739 } 740 } 741 } 742out: 743 return IRQ_RETVAL(handled); 744} 745 746#ifdef CONFIG_PROC_FS 747 748static void *yam_seq_start(struct seq_file *seq, loff_t *pos) 749{ 750 return (*pos < NR_PORTS) ? yam_devs[*pos] : NULL; 751} 752 753static void *yam_seq_next(struct seq_file *seq, void *v, loff_t *pos) 754{ 755 ++*pos; 756 return (*pos < NR_PORTS) ? yam_devs[*pos] : NULL; 757} 758 759static void yam_seq_stop(struct seq_file *seq, void *v) 760{ 761} 762 763static int yam_seq_show(struct seq_file *seq, void *v) 764{ 765 struct net_device *dev = v; 766 const struct yam_port *yp = netdev_priv(dev); 767 768 seq_printf(seq, "Device %s\n", dev->name); 769 seq_printf(seq, " Up %d\n", netif_running(dev)); 770 seq_printf(seq, " Speed %u\n", yp->bitrate); 771 seq_printf(seq, " IoBase 0x%x\n", yp->iobase); 772 seq_printf(seq, " BaudRate %u\n", yp->baudrate); 773 seq_printf(seq, " IRQ %u\n", yp->irq); 774 seq_printf(seq, " TxState %u\n", yp->tx_state); 775 seq_printf(seq, " Duplex %u\n", yp->dupmode); 776 seq_printf(seq, " HoldDly %u\n", yp->holdd); 777 seq_printf(seq, " TxDelay %u\n", yp->txd); 778 seq_printf(seq, " TxTail %u\n", yp->txtail); 779 seq_printf(seq, " SlotTime %u\n", yp->slot); 780 seq_printf(seq, " Persist %u\n", yp->pers); 781 seq_printf(seq, " TxFrames %lu\n", yp->stats.tx_packets); 782 seq_printf(seq, " RxFrames %lu\n", yp->stats.rx_packets); 783 seq_printf(seq, " TxInt %u\n", yp->nb_mdint); 784 seq_printf(seq, " RxInt %u\n", yp->nb_rxint); 785 seq_printf(seq, " RxOver %lu\n", yp->stats.rx_fifo_errors); 786 seq_printf(seq, "\n"); 787 return 0; 788} 789 790static struct seq_operations yam_seqops = { 791 .start = yam_seq_start, 792 .next = yam_seq_next, 793 .stop = yam_seq_stop, 794 .show = yam_seq_show, 795}; 796 797static int yam_info_open(struct inode *inode, struct file *file) 798{ 799 return seq_open(file, &yam_seqops); 800} 801 802static const struct file_operations yam_info_fops = { 803 .owner = THIS_MODULE, 804 .open = yam_info_open, 805 .read = seq_read, 806 .llseek = seq_lseek, 807 .release = seq_release, 808}; 809 810#endif 811 812 813/* --------------------------------------------------------------------- */ 814 815static struct net_device_stats *yam_get_stats(struct net_device *dev) 816{ 817 struct yam_port *yp; 818 819 if (!dev) 820 return NULL; 821 822 yp = netdev_priv(dev); 823 if (yp->magic != YAM_MAGIC) 824 return NULL; 825 826 /* 827 * Get the current statistics. This may be called with the 828 * card open or closed. 829 */ 830 return &yp->stats; 831} 832 833/* --------------------------------------------------------------------- */ 834 835static int yam_open(struct net_device *dev) 836{ 837 struct yam_port *yp = netdev_priv(dev); 838 enum uart u; 839 int i; 840 int ret=0; 841 842 printk(KERN_INFO "Trying %s at iobase 0x%lx irq %u\n", dev->name, dev->base_addr, dev->irq); 843 844 if (!dev || !yp->bitrate) 845 return -ENXIO; 846 if (!dev->base_addr || dev->base_addr > 0x1000 - YAM_EXTENT || 847 dev->irq < 2 || dev->irq > 15) { 848 return -ENXIO; 849 } 850 if (!request_region(dev->base_addr, YAM_EXTENT, dev->name)) 851 { 852 printk(KERN_ERR "%s: cannot 0x%lx busy\n", dev->name, dev->base_addr); 853 return -EACCES; 854 } 855 if ((u = yam_check_uart(dev->base_addr)) == c_uart_unknown) { 856 printk(KERN_ERR "%s: cannot find uart type\n", dev->name); 857 ret = -EIO; 858 goto out_release_base; 859 } 860 if (fpga_download(dev->base_addr, yp->bitrate)) { 861 printk(KERN_ERR "%s: cannot init FPGA\n", dev->name); 862 ret = -EIO; 863 goto out_release_base; 864 } 865 outb(0, IER(dev->base_addr)); 866 if (request_irq(dev->irq, yam_interrupt, IRQF_DISABLED | IRQF_SHARED, dev->name, dev)) { 867 printk(KERN_ERR "%s: irq %d busy\n", dev->name, dev->irq); 868 ret = -EBUSY; 869 goto out_release_base; 870 } 871 872 yam_set_uart(dev); 873 874 netif_start_queue(dev); 875 876 yp->slotcnt = yp->slot / 10; 877 878 /* Reset overruns for all ports - FPGA programming makes overruns */ 879 for (i = 0; i < NR_PORTS; i++) { 880 struct net_device *dev = yam_devs[i]; 881 struct yam_port *yp = netdev_priv(dev); 882 inb(LSR(dev->base_addr)); 883 yp->stats.rx_fifo_errors = 0; 884 } 885 886 printk(KERN_INFO "%s at iobase 0x%lx irq %u uart %s\n", dev->name, dev->base_addr, dev->irq, 887 uart_str[u]); 888 return 0; 889 890out_release_base: 891 release_region(dev->base_addr, YAM_EXTENT); 892 return ret; 893} 894 895/* --------------------------------------------------------------------- */ 896 897static int yam_close(struct net_device *dev) 898{ 899 struct sk_buff *skb; 900 struct yam_port *yp = netdev_priv(dev); 901 902 if (!dev) 903 return -EINVAL; 904 905 /* 906 * disable interrupts 907 */ 908 outb(0, IER(dev->base_addr)); 909 outb(1, MCR(dev->base_addr)); 910 /* Remove IRQ handler if last */ 911 free_irq(dev->irq,dev); 912 release_region(dev->base_addr, YAM_EXTENT); 913 netif_stop_queue(dev); 914 while ((skb = skb_dequeue(&yp->send_queue))) 915 dev_kfree_skb(skb); 916 917 printk(KERN_INFO "%s: close yam at iobase 0x%lx irq %u\n", 918 yam_drvname, dev->base_addr, dev->irq); 919 return 0; 920} 921 922/* --------------------------------------------------------------------- */ 923 924static int yam_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) 925{ 926 struct yam_port *yp = netdev_priv(dev); 927 struct yamdrv_ioctl_cfg yi; 928 struct yamdrv_ioctl_mcs *ym; 929 int ioctl_cmd; 930 931 if (copy_from_user(&ioctl_cmd, ifr->ifr_data, sizeof(int))) 932 return -EFAULT; 933 934 if (yp->magic != YAM_MAGIC) 935 return -EINVAL; 936 937 if (!capable(CAP_NET_ADMIN)) 938 return -EPERM; 939 940 if (cmd != SIOCDEVPRIVATE) 941 return -EINVAL; 942 943 switch (ioctl_cmd) { 944 945 case SIOCYAMRESERVED: 946 return -EINVAL; /* unused */ 947 948 case SIOCYAMSMCS: 949 if (netif_running(dev)) 950 return -EINVAL; /* Cannot change this parameter when up */ 951 if ((ym = kmalloc(sizeof(struct yamdrv_ioctl_mcs), GFP_KERNEL)) == NULL) 952 return -ENOBUFS; 953 ym->bitrate = 9600; 954 if (copy_from_user(ym, ifr->ifr_data, sizeof(struct yamdrv_ioctl_mcs))) { 955 kfree(ym); 956 return -EFAULT; 957 } 958 if (ym->bitrate > YAM_MAXBITRATE) { 959 kfree(ym); 960 return -EINVAL; 961 } 962 add_mcs(ym->bits, ym->bitrate); 963 kfree(ym); 964 break; 965 966 case SIOCYAMSCFG: 967 if (!capable(CAP_SYS_RAWIO)) 968 return -EPERM; 969 if (copy_from_user(&yi, ifr->ifr_data, sizeof(struct yamdrv_ioctl_cfg))) 970 return -EFAULT; 971 972 if ((yi.cfg.mask & YAM_IOBASE) && netif_running(dev)) 973 return -EINVAL; /* Cannot change this parameter when up */ 974 if ((yi.cfg.mask & YAM_IRQ) && netif_running(dev)) 975 return -EINVAL; /* Cannot change this parameter when up */ 976 if ((yi.cfg.mask & YAM_BITRATE) && netif_running(dev)) 977 return -EINVAL; /* Cannot change this parameter when up */ 978 if ((yi.cfg.mask & YAM_BAUDRATE) && netif_running(dev)) 979 return -EINVAL; /* Cannot change this parameter when up */ 980 981 if (yi.cfg.mask & YAM_IOBASE) { 982 yp->iobase = yi.cfg.iobase; 983 dev->base_addr = yi.cfg.iobase; 984 } 985 if (yi.cfg.mask & YAM_IRQ) { 986 if (yi.cfg.irq > 15) 987 return -EINVAL; 988 yp->irq = yi.cfg.irq; 989 dev->irq = yi.cfg.irq; 990 } 991 if (yi.cfg.mask & YAM_BITRATE) { 992 if (yi.cfg.bitrate > YAM_MAXBITRATE) 993 return -EINVAL; 994 yp->bitrate = yi.cfg.bitrate; 995 } 996 if (yi.cfg.mask & YAM_BAUDRATE) { 997 if (yi.cfg.baudrate > YAM_MAXBAUDRATE) 998 return -EINVAL; 999 yp->baudrate = yi.cfg.baudrate; 1000 } 1001 if (yi.cfg.mask & YAM_MODE) { 1002 if (yi.cfg.mode > YAM_MAXMODE) 1003 return -EINVAL; 1004 yp->dupmode = yi.cfg.mode; 1005 } 1006 if (yi.cfg.mask & YAM_HOLDDLY) { 1007 if (yi.cfg.holddly > YAM_MAXHOLDDLY) 1008 return -EINVAL; 1009 yp->holdd = yi.cfg.holddly; 1010 } 1011 if (yi.cfg.mask & YAM_TXDELAY) { 1012 if (yi.cfg.txdelay > YAM_MAXTXDELAY) 1013 return -EINVAL; 1014 yp->txd = yi.cfg.txdelay; 1015 } 1016 if (yi.cfg.mask & YAM_TXTAIL) { 1017 if (yi.cfg.txtail > YAM_MAXTXTAIL) 1018 return -EINVAL; 1019 yp->txtail = yi.cfg.txtail; 1020 } 1021 if (yi.cfg.mask & YAM_PERSIST) { 1022 if (yi.cfg.persist > YAM_MAXPERSIST) 1023 return -EINVAL; 1024 yp->pers = yi.cfg.persist; 1025 } 1026 if (yi.cfg.mask & YAM_SLOTTIME) { 1027 if (yi.cfg.slottime > YAM_MAXSLOTTIME) 1028 return -EINVAL; 1029 yp->slot = yi.cfg.slottime; 1030 yp->slotcnt = yp->slot / 10; 1031 } 1032 break; 1033 1034 case SIOCYAMGCFG: 1035 yi.cfg.mask = 0xffffffff; 1036 yi.cfg.iobase = yp->iobase; 1037 yi.cfg.irq = yp->irq; 1038 yi.cfg.bitrate = yp->bitrate; 1039 yi.cfg.baudrate = yp->baudrate; 1040 yi.cfg.mode = yp->dupmode; 1041 yi.cfg.txdelay = yp->txd; 1042 yi.cfg.holddly = yp->holdd; 1043 yi.cfg.txtail = yp->txtail; 1044 yi.cfg.persist = yp->pers; 1045 yi.cfg.slottime = yp->slot; 1046 if (copy_to_user(ifr->ifr_data, &yi, sizeof(struct yamdrv_ioctl_cfg))) 1047 return -EFAULT; 1048 break; 1049 1050 default: 1051 return -EINVAL; 1052 1053 } 1054 1055 return 0; 1056} 1057 1058/* --------------------------------------------------------------------- */ 1059 1060static int yam_set_mac_address(struct net_device *dev, void *addr) 1061{ 1062 struct sockaddr *sa = (struct sockaddr *) addr; 1063 1064 /* addr is an AX.25 shifted ASCII mac address */ 1065 memcpy(dev->dev_addr, sa->sa_data, dev->addr_len); 1066 return 0; 1067} 1068 1069/* --------------------------------------------------------------------- */ 1070 1071static void yam_setup(struct net_device *dev) 1072{ 1073 struct yam_port *yp = netdev_priv(dev); 1074 1075 yp->magic = YAM_MAGIC; 1076 yp->bitrate = DEFAULT_BITRATE; 1077 yp->baudrate = DEFAULT_BITRATE * 2; 1078 yp->iobase = 0; 1079 yp->irq = 0; 1080 yp->dupmode = 0; 1081 yp->holdd = DEFAULT_HOLDD; 1082 yp->txd = DEFAULT_TXD; 1083 yp->txtail = DEFAULT_TXTAIL; 1084 yp->slot = DEFAULT_SLOT; 1085 yp->pers = DEFAULT_PERS; 1086 yp->dev = dev; 1087 1088 dev->base_addr = yp->iobase; 1089 dev->irq = yp->irq; 1090 1091 dev->open = yam_open; 1092 dev->stop = yam_close; 1093 dev->do_ioctl = yam_ioctl; 1094 dev->hard_start_xmit = yam_send_packet; 1095 dev->get_stats = yam_get_stats; 1096 1097 skb_queue_head_init(&yp->send_queue); 1098 1099 dev->hard_header = ax25_hard_header; 1100 dev->rebuild_header = ax25_rebuild_header; 1101 1102 dev->set_mac_address = yam_set_mac_address; 1103 1104 dev->type = ARPHRD_AX25; 1105 dev->hard_header_len = AX25_MAX_HEADER_LEN; 1106 dev->mtu = AX25_MTU; 1107 dev->addr_len = AX25_ADDR_LEN; 1108 memcpy(dev->broadcast, &ax25_bcast, AX25_ADDR_LEN); 1109 memcpy(dev->dev_addr, &ax25_defaddr, AX25_ADDR_LEN); 1110} 1111 1112static int __init yam_init_driver(void) 1113{ 1114 struct net_device *dev; 1115 int i, err; 1116 char name[IFNAMSIZ]; 1117 1118 printk(yam_drvinfo); 1119 1120 for (i = 0; i < NR_PORTS; i++) { 1121 sprintf(name, "yam%d", i); 1122 1123 dev = alloc_netdev(sizeof(struct yam_port), name, 1124 yam_setup); 1125 if (!dev) { 1126 printk(KERN_ERR "yam: cannot allocate net device %s\n", 1127 dev->name); 1128 err = -ENOMEM; 1129 goto error; 1130 } 1131 1132 err = register_netdev(dev); 1133 if (err) { 1134 printk(KERN_WARNING "yam: cannot register net device %s\n", dev->name); 1135 goto error; 1136 } 1137 yam_devs[i] = dev; 1138 1139 } 1140 1141 yam_timer.function = yam_dotimer; 1142 yam_timer.expires = jiffies + HZ / 100; 1143 add_timer(&yam_timer); 1144 1145 proc_net_fops_create("yam", S_IRUGO, &yam_info_fops); 1146 return 0; 1147 error: 1148 while (--i >= 0) { 1149 unregister_netdev(yam_devs[i]); 1150 free_netdev(yam_devs[i]); 1151 } 1152 return err; 1153} 1154 1155/* --------------------------------------------------------------------- */ 1156 1157static void __exit yam_cleanup_driver(void) 1158{ 1159 struct yam_mcs *p; 1160 int i; 1161 1162 del_timer(&yam_timer); 1163 for (i = 0; i < NR_PORTS; i++) { 1164 struct net_device *dev = yam_devs[i]; 1165 if (dev) { 1166 unregister_netdev(dev); 1167 free_netdev(dev); 1168 } 1169 } 1170 1171 while (yam_data) { 1172 p = yam_data; 1173 yam_data = yam_data->next; 1174 kfree(p); 1175 } 1176 1177 proc_net_remove("yam"); 1178} 1179 1180/* --------------------------------------------------------------------- */ 1181 1182MODULE_AUTHOR("Frederic Rible F1OAT frible@teaser.fr"); 1183MODULE_DESCRIPTION("Yam amateur radio modem driver"); 1184MODULE_LICENSE("GPL"); 1185 1186module_init(yam_init_driver); 1187module_exit(yam_cleanup_driver); 1188 1189/* --------------------------------------------------------------------- */ 1190