1/*
2 *  linux/drivers/mmc/mmci.h - ARM PrimeCell MMCI PL180/1 driver
3 *
4 *  Copyright (C) 2003 Deep Blue Solutions, Ltd, All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#define MMCIPOWER		0x000
11#define MCI_PWR_OFF		0x00
12#define MCI_PWR_UP		0x02
13#define MCI_PWR_ON		0x03
14#define MCI_OD			(1 << 6)
15#define MCI_ROD			(1 << 7)
16
17#define MMCICLOCK		0x004
18#define MCI_CLK_ENABLE		(1 << 8)
19#define MCI_CLK_PWRSAVE		(1 << 9)
20#define MCI_CLK_BYPASS		(1 << 10)
21
22#define MMCIARGUMENT		0x008
23#define MMCICOMMAND		0x00c
24#define MCI_CPSM_RESPONSE	(1 << 6)
25#define MCI_CPSM_LONGRSP	(1 << 7)
26#define MCI_CPSM_INTERRUPT	(1 << 8)
27#define MCI_CPSM_PENDING	(1 << 9)
28#define MCI_CPSM_ENABLE		(1 << 10)
29
30#define MMCIRESPCMD		0x010
31#define MMCIRESPONSE0		0x014
32#define MMCIRESPONSE1		0x018
33#define MMCIRESPONSE2		0x01c
34#define MMCIRESPONSE3		0x020
35#define MMCIDATATIMER		0x024
36#define MMCIDATALENGTH		0x028
37#define MMCIDATACTRL		0x02c
38#define MCI_DPSM_ENABLE		(1 << 0)
39#define MCI_DPSM_DIRECTION	(1 << 1)
40#define MCI_DPSM_MODE		(1 << 2)
41#define MCI_DPSM_DMAENABLE	(1 << 3)
42
43#define MMCIDATACNT		0x030
44#define MMCISTATUS		0x034
45#define MCI_CMDCRCFAIL		(1 << 0)
46#define MCI_DATACRCFAIL		(1 << 1)
47#define MCI_CMDTIMEOUT		(1 << 2)
48#define MCI_DATATIMEOUT		(1 << 3)
49#define MCI_TXUNDERRUN		(1 << 4)
50#define MCI_RXOVERRUN		(1 << 5)
51#define MCI_CMDRESPEND		(1 << 6)
52#define MCI_CMDSENT		(1 << 7)
53#define MCI_DATAEND		(1 << 8)
54#define MCI_DATABLOCKEND	(1 << 10)
55#define MCI_CMDACTIVE		(1 << 11)
56#define MCI_TXACTIVE		(1 << 12)
57#define MCI_RXACTIVE		(1 << 13)
58#define MCI_TXFIFOHALFEMPTY	(1 << 14)
59#define MCI_RXFIFOHALFFULL	(1 << 15)
60#define MCI_TXFIFOFULL		(1 << 16)
61#define MCI_RXFIFOFULL		(1 << 17)
62#define MCI_TXFIFOEMPTY		(1 << 18)
63#define MCI_RXFIFOEMPTY		(1 << 19)
64#define MCI_TXDATAAVLBL		(1 << 20)
65#define MCI_RXDATAAVLBL		(1 << 21)
66
67#define MMCICLEAR		0x038
68#define MCI_CMDCRCFAILCLR	(1 << 0)
69#define MCI_DATACRCFAILCLR	(1 << 1)
70#define MCI_CMDTIMEOUTCLR	(1 << 2)
71#define MCI_DATATIMEOUTCLR	(1 << 3)
72#define MCI_TXUNDERRUNCLR	(1 << 4)
73#define MCI_RXOVERRUNCLR	(1 << 5)
74#define MCI_CMDRESPENDCLR	(1 << 6)
75#define MCI_CMDSENTCLR		(1 << 7)
76#define MCI_DATAENDCLR		(1 << 8)
77#define MCI_DATABLOCKENDCLR	(1 << 10)
78
79#define MMCIMASK0		0x03c
80#define MCI_CMDCRCFAILMASK	(1 << 0)
81#define MCI_DATACRCFAILMASK	(1 << 1)
82#define MCI_CMDTIMEOUTMASK	(1 << 2)
83#define MCI_DATATIMEOUTMASK	(1 << 3)
84#define MCI_TXUNDERRUNMASK	(1 << 4)
85#define MCI_RXOVERRUNMASK	(1 << 5)
86#define MCI_CMDRESPENDMASK	(1 << 6)
87#define MCI_CMDSENTMASK		(1 << 7)
88#define MCI_DATAENDMASK		(1 << 8)
89#define MCI_DATABLOCKENDMASK	(1 << 10)
90#define MCI_CMDACTIVEMASK	(1 << 11)
91#define MCI_TXACTIVEMASK	(1 << 12)
92#define MCI_RXACTIVEMASK	(1 << 13)
93#define MCI_TXFIFOHALFEMPTYMASK	(1 << 14)
94#define MCI_RXFIFOHALFFULLMASK	(1 << 15)
95#define MCI_TXFIFOFULLMASK	(1 << 16)
96#define MCI_RXFIFOFULLMASK	(1 << 17)
97#define MCI_TXFIFOEMPTYMASK	(1 << 18)
98#define MCI_RXFIFOEMPTYMASK	(1 << 19)
99#define MCI_TXDATAAVLBLMASK	(1 << 20)
100#define MCI_RXDATAAVLBLMASK	(1 << 21)
101
102#define MMCIMASK1		0x040
103#define MMCIFIFOCNT		0x048
104#define MMCIFIFO		0x080 /* to 0x0bc */
105
106#define MCI_IRQENABLE	\
107	(MCI_CMDCRCFAILMASK|MCI_DATACRCFAILMASK|MCI_CMDTIMEOUTMASK|	\
108	MCI_DATATIMEOUTMASK|MCI_TXUNDERRUNMASK|MCI_RXOVERRUNMASK|	\
109	MCI_CMDRESPENDMASK|MCI_CMDSENTMASK|MCI_DATABLOCKENDMASK)
110
111/*
112 * The size of the FIFO in bytes.
113 */
114#define MCI_FIFOSIZE	(16*4)
115
116#define MCI_FIFOHALFSIZE (MCI_FIFOSIZE / 2)
117
118#define NR_SG		16
119
120struct clk;
121
122struct mmci_host {
123	void __iomem		*base;
124	struct mmc_request	*mrq;
125	struct mmc_command	*cmd;
126	struct mmc_data		*data;
127	struct mmc_host		*mmc;
128	struct clk		*clk;
129
130	unsigned int		data_xfered;
131
132	spinlock_t		lock;
133
134	unsigned int		mclk;
135	unsigned int		cclk;
136	u32			pwr;
137	struct mmc_platform_data *plat;
138
139	struct timer_list	timer;
140	unsigned int		oldstat;
141
142	unsigned int		sg_len;
143
144	/* pio stuff */
145	struct scatterlist	*sg_ptr;
146	unsigned int		sg_off;
147	unsigned int		size;
148};
149
150static inline void mmci_init_sg(struct mmci_host *host, struct mmc_data *data)
151{
152	/*
153	 * Ideally, we want the higher levels to pass us a scatter list.
154	 */
155	host->sg_len = data->sg_len;
156	host->sg_ptr = data->sg;
157	host->sg_off = 0;
158}
159
160static inline int mmci_next_sg(struct mmci_host *host)
161{
162	host->sg_ptr++;
163	host->sg_off = 0;
164	return --host->sg_len;
165}
166
167static inline char *mmci_kmap_atomic(struct mmci_host *host, unsigned long *flags)
168{
169	struct scatterlist *sg = host->sg_ptr;
170
171	local_irq_save(*flags);
172	return kmap_atomic(sg->page, KM_BIO_SRC_IRQ) + sg->offset;
173}
174
175static inline void mmci_kunmap_atomic(struct mmci_host *host, void *buffer, unsigned long *flags)
176{
177	kunmap_atomic(buffer, KM_BIO_SRC_IRQ);
178	local_irq_restore(*flags);
179}
180